Themis USPIIe-USB User manual

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Themis Computer—Rest of World
5 Rue Irene Joliot-Curie
38320 Eybens, France
Phone [phone]
Fax [phone]
Themis Computer—Americas and Pacific Rim
47200 Bayside Parkway
Fremont, CA 94538
Phone [phone]
Fax [phone]
World Wide Web http://www.themis.com
USPIIe-USBHardwareManual
Version 1.3—June 2009
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Copyright © 2009 Themis Computer, Inc.
ALL RIGHTS RESERVED. No part of this publication may be reproduced in any form, by
photocopy, microfilm, retrieval system, or by any other means now known or hereafter invented without
the prior written permission of Themis Computer.
The information in this publication has been carefully checked and is believed to be accurate. However,
Themis Computer assumes no responsibility for inaccuracies. Themis Computer retains the right to
make changes to this publication at any time without prior notice. Themis Computer does not assume
any liability arising from the application or use of this publication or the product(s) described herein.
RESTRICTED RIGHTS LEGEND: Use, duplication, or disclosure by the United States Government
is subject to the restrictions set forth in DFARS 252.227-7013 (c)(1)(ii) and FAR 52.227-19.
TRADEMARKS
THEMIS®is a registered trademark of Themis Computer, Inc.
SOLARIS™is a trademark of Sun Microsystems
SPARC® and UltraSPARC®are registered trademarks of SPARC International
All other trademarks or registered trademarks used in this publication are the property of their
respective owners.
USPIIe-USB Hardware Manual, Version 1.3
June 2009
Part Number: 110534-022
Themis Customer Support
North America, South America, and Pacific Rim
Telephone: [phone]
Fax: [phone]
E-mail: [e-mail]
Web Site: http://www.themis.com
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VersionRevisionHistory
Version 1.3............................................................................................June 2009
•Modified solder-bead SB0902 in Table B-8, page B-12, to reflect change in default status and
setting descriptions.
•Other assorted minor revisions and corrections throughout the manual.
Version 1.2.........................................................................................August 2005
Version 1.1.......................................................................................October 2003
Version 1.0.......................................................................................October 2002
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v
Themis Computer
Table of Contents
How to Use This Manual ............................................................................................. xvii
1. USPIIe-USB Installation .............................................................................................. 1-1
1.1 Determine Board Type ........................................................................................... 1-1
1.2 Check Configurations ............................................................................................ 1-2
1.2.1 Combination PS/2–USB Connector ........................................................... 1-3
1.2.2 SCSI Termination ...................................................................................... 1-4
1.3 Installing USPIIe-USB Paddle Boards .................................................................. 1-7
1.3.1 Standard Paddle Board ............................................................................... 1-7
1.3.2 Multiple-I/O Paddle Board ........................................................................ 1-7
1.4 Attaching Cables and Accessing
USPIIe-USB Peripheral Devices 1-9
1.4.1 Serial Ports A/B (TTYA and TTYB) ......................................................... 1-9
1.4.1.1 Front Panel Connection .............................................................. 1-9
1.4.1.2 VME P2 Connection ................................................................... 1-9
1.4.2 Serial Ports C/D (TTYC and TTYD) ......................................................... 1-9
1.4.3 Serial Ports E/F (TTYE/F) ....................................................................... 1-10
1.4.3.1 Front Panel Connection ............................................................ 1-10
1.4.3.2 VME P2 Connection ................................................................. 1-10
1.4.4 Parallel (Printer) Port ............................................................................... 1-10
1.4.5 PMC (Expansion) Module Slots .............................................................. 1-10
1.4.6 Ethernet Network ..................................................................................... 1-10
1.4.7 SCSI A and B ........................................................................................... 1-11
1.4.8 USB-0 and USB-1 ................................................................................... 1-11
1.4.9 USB-2 ...................................................................................................... 1-12
1.4.10 Miscellaneous I/O .................................................................................... 1-12
1.4.10.1 From the Baseboard VME P2 ................................................... 1-12
1.4.10.2 From the PMC Carrier Board VME P2 .................................... 1-12
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1.5 Configuring the VME Interface ........................................................................... 1-13
1.5.1 Using OBP to Program the VME Interface ............................................. 1-13
1.5.1.1 OBP Commands ...................................................................... 1-13
1.5.1.2 OBP Environment Variables .................................................... 1-13
1.6 TOD/NVRAM Battery Replacement ................................................................... 1-14
2. USPIIe-USB Specifications .......................................................................................... 2-1
2.1 Baseboard ............................................................................................................... 2-1
2.2 PMC Carrier Board ................................................................................................ 2-4
2.3 Graphics Board ...................................................................................................... 2-6
2.4 Paddle Boards ........................................................................................................ 2-7
2.4.1 Standard Paddle Board ............................................................................... 2-7
2.4.2 Multiple I/O Paddle Board .........................................................................2-7
2.5 Backplane Jumper Settings .................................................................................... 2-8
2.6 System Specifications ............................................................................................ 2-8
2.6.1 Processor and Memory Subsystems .......................................................... 2-8
2.6.2 I/O Subsystem ............................................................................................ 2-9
2.6.3 Auxiliary Functions ................................................................................. 2-12
2.7 Environmental Specifications ............................................................................ 2-13
2.8 Estimated Power Requirements ........................................................................... 2-13
3. Hardware Overview ...................................................................................................... 3-1
3.1 Baseboard ............................................................................................................... 3-1
3.1.1 UltraSPARC-IIeProcessor and Cache ...................................................... 3-1
3.1.2 USPIIe-USB ICHIP-2 Interrupt Controller ............................................... 3-3
3.1.3 PCI-to-PCI Bridges .................................................................................... 3-4
3.1.3.1 Advanced PCI Bridge (APB) ...................................................... 3-4
3.1.3.2 Intel 21154 PCI-to-PCI Bridge ...................................................3-4
3.1.4 Sun Rio I/O Controller ...............................................................................3-5
3.1.5 Symbios SCSI Controller ........................................................................... 3-5
3.1.6 Tundra Universe II ..................................................................................... 3-5
3.1.7 PLD ............................................................................................................ 3-6
3.1.8 Acer Super I/O Controller .......................................................................... 3-6
3.1.9 Seimens SAB 82532 Controller .................................................................3-6
3.1.10 Flash Memory ............................................................................................ 3-6
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3.1.11 TOD and NVRAM ..................................................................................... 3-6
3.1.12 Memory Subsystem ................................................................................... 3-7
3.2 PMC Carrier Board ................................................................................................ 3-9
3.3 OpenBoot PROM ................................................................................................... 3-9
4. Universe II Description ................................................................................................ 4-1
4.1 Features .................................................................................................................. 4-1
4.2 VMEbus Interface .................................................................................................. 4-2
4.2.1 VMEbus Configuration .............................................................................. 4-2
4.2.2 Universe II as the VMEbus Slave .............................................................. 4-2
4.2.3 Universe II as the VMEbus Master ............................................................ 4-3
4.2.4 VMEbus First Slot Detector ...................................................................... 4-5
4.2.4.1 Automatic Slot Identification ...................................................... 4-6
4.2.4.2 Register Access at Power Up ...................................................... 4-7
4.2.5 Universe II’s Hardware Power-Up Options ............................................... 4-7
4.3 Slave Image Programming ..................................................................................... 4-9
4.3.1 VME Slave Images .................................................................................... 4-9
4.3.1.1 VMEbus Fields ......................................................................... 4-10
4.3.1.2 PCI Bus Fields .......................................................................... 4-11
4.3.1.3 Control Fields ........................................................................... 4-11
4.3.2 PCI Bus Target Images ............................................................................ 4-12
4.3.2.1 PCI Bus Fields .......................................................................... 4-12
4.3.2.2 VMEbus Fields ......................................................................... 4-13
4.3.2.3 Control Fields ........................................................................... 4-14
4.3.2.4 Special PCI Target Image ......................................................... 4-15
4.4 Universe II’s Interrupt and Interrupt Handler ...................................................... 4-17
4.4.1 VME and PCI Interrupters ....................................................................... 4-17
4.4.2 VMEbus Interrupt Handling .................................................................... 4-18
4.4.3 Universe II’s Mailbox Registers .............................................................. 4-18
4.4.4 Universe II’s Semaphores ........................................................................ 4-18
4.4.5 Programmable Slave Images on the VMEbus and PCI bus ..................... 4-18
4.4.6 DMA Controller ....................................................................................... 4-19
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5. Programmable Logic Device ........................................................................................ 5-1
5.1 Introduction ............................................................................................................ 5-1
5.2 Flash Mapping and Boot Control ........................................................................... 5-2
5.3 PLD registers ......................................................................................................... 5-2
5.4 2-Level Watchdog .................................................................................................. 5-3
5.5 Power management ................................................................................................ 5-4
5.6 Temperature management ...................................................................................... 5-5
6. Resets .............................................................................................................................. 6-1
6.1 Overview ................................................................................................................ 6-1
6.2 UltraSPARC-IIeReset Request Signals ................................................................ 6-2
6.2.1 System_Reset and P-Reset ......................................................................... 6-3
6.2.2 Externally Initiated Reset (XIR) ................................................................ 6-3
6.2.3 Watchdog Reset (WDR) ............................................................................ 6-3
6.2.4 Software Initiated Reset (SIR) ................................................................... 6-3
6.3 Reset Sources ......................................................................................................... 6-4
6.3.1 Push-Button Reset ...................................................................................... 6-4
6.3.2 Power Management Resets ........................................................................ 6-4
6.3.3 VMEbus Resets .......................................................................................... 6-4
6.3.4 2-Level Watchdog Resets ..........................................................................6-5
6.3.5 Software POR ............................................................................................ 6-5
6.3.6 Software XIR ............................................................................................. 6-6
6.4 UltraSPARC-IIeReset_Control_Register ............................................................. 6-6
Appendix A. Connector Pinouts, LEDs, Switches ......................................................... A-1
A.1 Baseboard VME P1 .............................................................................................. A-1
A.2 Baseboard VME P2 .............................................................................................. A-3
A.3 Baseboard .............................................................................................................. A-5
A.3.1 SCSI A and B ............................................................................................ A-5
A.3.2 Ethernet Port A ......................................................................................... A-7
A.3.3 Combination PS/2–USB Connector .......................................................... A-8
A.3.4 Serial Port A (RS232) and B (RS232/422) ............................................... A-9
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A.3.5 PMC Module Slot 0 ................................................................................ A-10
A.3.6 LEDs ....................................................................................................... A-10
A.3.7 Push-Button RESET ............................................................................... A-11
A.4 PMC Carrier Board ............................................................................................. A-11
A.4.1 PMC Carrier Board VME P1 Connector ................................................ A-12
A.4.2 PMC Carrier Board VME P2 Connector ................................................ A-14
A.4.3 PMC Module Slot User I/O .................................................................... A-16
A.4.3.1 PMC Module Slot 1: 64-Bit User I/O Configuration ............. A-17
A.4.3.2 PMC Module Slot 1: 32-Bit User I/O Configuration ............. A-18
A.4.3.3 PMC Module Slot 2: 32-Bit User I/O Configuration ............. A-19
A.4.3.4 PMC Module Slot 3: 0-Bit User I/O Configuration ............... A-20
A.4.4 Serial Ports E and F (RS232) .................................................................. A-21
A.4.5 Ethernet Port B ........................................................................................ A-22
A.4.6 Stereo Audio Connectors ........................................................................ A-22
A.5 Paddle Boards ..................................................................................................... A-23
A.5.1 Standard Paddle Board ............................................................................ A-23
A.5.1.1 SCSI Port A Connector ............................................................ A-23
A.5.1.2 Serial (TTY) Port B Connector ................................................ A-24
A.5.2 Multiple I/O Paddle Board ...................................................................... A-26
A.5.2.1 Ultra160 SCSI Port A (68-pin female) .................................... A-27
A.5.2.2 Parallel Port .............................................................................. A-27
A.5.2.3 Serial Port A, C, and D (RS-232) ............................................ A-27
A.5.2.4 Serial Port B (RS-232 with modem support) ........................... A-27
A.5.2.5 Dual USB Port ......................................................................... A-27
A.5.2.6 PS/2 Keyboard/Mouse Port (mini-DIN-8) ............................... A-27
A.5.2.7 Stereo Audio Line Out and Line In ......................................... A-27
A.6 Memory Module Connector ................................................................................ A-28
Appendix B. DIP-Switch, Jumper-Pin, and
Solder-Bead Configurations .......................................................................B-1
B.1 Overview ................................................................................................................B-1
B.2 Field-Configurable .................................................................................................B-1
B.2.1 DIP Switch .................................................................................................B-1
B.2.2 Baseboard Jumper Pins ..............................................................................B-3
B.2.3 Paddle Board Jumper Pins .........................................................................B-5
B.2.4 PMC Carrier Board Jumper Pins ...............................................................B-5
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B.3 Factory-Configurable .............................................................................................B-7
B.3.1 Baseboard Solder Beads ............................................................................B-7
B.3.2 Memory Module Solder Beads ..................................................................B-9
B.3.3 Paddle Board Solder Beads ........................................................................B-9
B.3.4 PMC Carrier Board Solder Beads ............................................................B-11
Appendix C. Front Panel Diagrams .................................................................................C-1
C.1 Introduction ............................................................................................................C-1
C.1.1 Front-Panel Dimensions ............................................................................C-2
C.1.2 Ejector Handles ..........................................................................................C-2
C.1.2.1 VME64-type Handles Only ........................................................C-2
C.1.3 PS/2 and USB Protocols ............................................................................C-3
C.2 USPIIe-USB Front Panels .....................................................................................C-3
C.2.1 USPIIe-USB/1 (Single VME Slot) ..........................................................C-4
C.2.2 USPIIe-USB/2G—Baseboard & 1 Graphics Board ..................................C-5
C.2.3 USPIIe-USB/3G2—Baseboard & 2 Graphics Boards ...............................C-6
C.2.4 USPIIe-USB/3GP2—Baseboard, 1 Graphics Board, and .........................C-7
2-PMC Carrier Boards
C.2.5 USPIIe-USB/3GP3—Baseboard, 1 Graphics Board, and .........................C-8
3-PMC Carrier Boards
C.2.6 USPIIe-USB/2P2 (2 VME Slots) ..............................................................C-9
C.2.7 USPIIe-USB/2P3 (2 VME Slots) ............................................................C-10
Appendix D. Board Diagrams ......................................................................................... D-1
D.1 Baseboard .............................................................................................................. D-1
D.2 PMC Carrier Board ............................................................................................... D-1
D.3 Paddle Boards ....................................................................................................... D-1
Appendix E. Glossary .......................................................................................................E-1
Appendix F. VME Slot Configurations ...........................................................................F-1
Index...............................................................................................................................Index-1
Reader Comment Card
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List of Figures
Figure 1-1 USPIIe-USB and Paddle Board Installed in a VME Backplane...................... 1-5
Figure 1-2 SCSI Termination Configurations ................................................................... 1-6
Figure 1-3 USPIIe-USB Multiple-I/O Paddle Board ........................................................ 1-8
Figure 1-4 Location of the TOD/NVRAM Battery......................................................... 1-14
Figure 1-5 TOD/NVRAM Battery Replacement............................................................. 1-15
Figure 2-1 USPIIe-USB Baseboard Block Diagram......................................................... 2-2
Figure 2-2 USPIIe-USB PMC Carrier Board Block Diagram .......................................... 2-5
Figure 3-1 UltraSPARC-IIeCPU Block Diagram ............................................................ 3-2
Figure 3-2 USPIIe-USB Reset Architecture...................................................................... 3-3
Figure 3-3 Custom Memory Module Topology (Side View)............................................ 3-7
Figure 3-4 SDRAM Memory Subsystem.......................................................................... 3-8
Figure 4-1 Universe II Architectural Diagram .................................................................. 4-4
Figure 4-2 Address Translation for VMEbus to PCI Bus Transfers ............................... 4-11
Figure 4-3 Address Translation for PCI Bus to VMEbus Transfers ............................... 4-13
Figure 4-4 Memory Mapping in the Special PCI Target Image...................................... 4-17
Figure A-1 Baseboard VME P1 Connector Orientation ................................................... A-1
Figure A-2 Baseboard VME P2 Connector Orientation.................................................... A-3
Figure A-3 Baseboard SCSI A and B Connector Orientation........................................... A-5
Figure A-4 Ethernet A Connector Orientation.................................................................. A-7
Figure A-5 Front-Panel Mini-DIN Connector .................................................................. A-8
Figure A-6 Front-Panel Serial Ports A and B .................................................................. A-9
Figure A-7 PMC Module Slot 0 Connector .................................................................... A-10
Figure A-8 PMC Carrier Board VME P1 Connector Orientation................................... A-12
Figure A-9 PMC Board VME P2 Connector .................................................................. A-14
Figure A-10 PMC Carrier Board User I/O Connector ...................................................... A-16
Figure A-11 Front-Panel Serial Ports E and F................................................................... A-21
Figure A-12 Ethernet B Connector ................................................................................... A-22
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Figure A-13 Dual Stereo Audio Connector....................................................................... A-22
Figure A-14 Standard Paddle Board SCSI Connector ...................................................... A-23
Figure A-15 Paddle Board Serial Port B Connector ......................................................... A-24
Figure A-16 USPIIe-USB Multiple-I/O Paddle Board ..................................................... A-26
Figure A-17 Line Out/In Stereo Audio Connectors .......................................................... A-28
Figure A-18 Memory Module Baseboard Connectors (Receptacle & Plug) .................... A-29
Figure B-1 Location and Configuration of SW1101 (Top Side) ....................................... B-2
Figure B-2 Baseboard Jumper Locations (Top Side)......................................................... B-6
Figure B-3 Baseboard Solder-Bead Locations (Bottom Side)......................................... B-10
Figure B-4 PMC Carrier Board Solder-Bead Locations (Bottom Side) .......................... B-16
Figure C-1 Placement of Mating Pins on Elma Handles ................................................... C-2
Figure C-2 Single-Slot Front Panel (Baseboard) ............................................................... C-4
Figure C-3 2-Slot Front Panels (Baseboard and Graphics Board)..................................... C-5
Figure C-4 3-Slot Front Panels (Baseboard and 2 Graphics Boards) ................................ C-6
Figure C-5 3-Slot Front Panels (Baseboard, Graphics Board, and ................................... C-7
2 PMC Carrier Boards)
Figure C-6 3-Slot Front Panels (Baseboard, Graphics Board, and ................................... C-8
3 PMC Carrier Boards)
Figure C-7 Double-Slot Front Panels (Baseboard and 2 PMC Carrier Boards) ................ C-9
Figure C-8 Double-Slot Front Panels (Baseboard and 3 PMC Carrier Boards) .............. C-10
Figure D-1 Baseboard Front-Panel, Component, and Connector Diagram....................... D-2
Figure D-2 USPIIe-USB/2P2 PMC Carrier Board Component and Connector Diagram. D-3
Figure D-3 USPIIe-USB/2P3 PMC Carrier Board Component and Connector Diagram. D-4
Figure D-4 Standard Paddle Board (P2 Connector and I/O Connector Sides) ................. D-5
Figure D-5 Multiple I/O Paddle Board (Component and Connector Side)....................... D-6
Figure F-1 USPIIe-USB VME Slot Configurations .......................................................... F-3
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List of Tables
Table 1-1 USPIIe-USB Model Configurations................................................................ 1-1
Table 1-2 Front-Panel DIN Settings................................................................................. 1-3
Table 2-1 CPU Speed Settings......................................................................................... 2-1
Table 2-2 Memory Configurations................................................................................... 2-3
Table 2-3 Processor Specifications .................................................................................. 2-8
Table 2-4 Memory Specifications.................................................................................... 2-9
Table 2-5 USPIIe-USB I/O Subsystem Specifications .................................................. 2-10
Table 2-6 Auxiliary Functions Specifications................................................................ 2-12
Table 2-7 USPIIe-USB Operating Environmental Specifications................................. 2-13
Table 2-8 USPIIe-USB Non-operating Environmental Specifications.......................... 2-13
Table 2-9 Estimated Power Requirements..................................................................... 2-13
Table 4-1 Universe II Miscellaneous Control Register (MISC_CTL)............................. 4-5
Table 4-2 Universe II Power-Up Options ........................................................................ 4-7
Table 4-3 PCI Configuration Base Address 0 Register (PCI_BS0)................................. 4-9
Table 4-4 PCI Configuration Base Address 1 Register (PCI_BS1)................................. 4-9
Table 4-5 VMEbus Fields for VMEbus Slave Image .................................................... 4-10
Table 4-6 PCI Bus Fields for VMEbus Slave Image ..................................................... 4-11
Table 4-7 Control Fields for VMEbus Slave Image ...................................................... 4-12
Table 4-8 PCI Bus Fields for PCI Bus Target Image..................................................... 4-13
Table 4-9 PCI Bus Fields for PCI Bus Target Images................................................... 4-14
Table 4-10 Control Fields for PCI Bus Target Image...................................................... 4-14
Table 4-11 PCI Bus Fields for Special PCI Bus Target Image........................................ 4-15
Table 4-12 Control Fields for Special PCI Bus Target Image......................................... 4-15
Table 4-13 Special PCI Target Image Register (Offset 188)........................................... 4-16
Table 5-1 PLD Register Address Map............................................................................. 5-2
Table 6-1 UltraSPARC-IIeReset_Control_Register ....................................................... 6-6
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xiv Themis Computer
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Table A-1 Baseboard VME P1 Pinouts ........................................................................... A-2
Table A-2 Baseboard VME P2 Connector Pinouts.......................................................... A-4
Table A-3 SCSI Ports A and B Connector Pin Signals.................................................... A-6
Table A-4 RJ45 Ethernet A Pinout .................................................................................. A-7
Table A-5 8-Pin Mini-DIN/PS/2–USB Pinouts............................................................... A-8
Table A-6 Serial Port A and B Connector Pinouts .......................................................... A-9
Table A-7 Color Interpretation of Front-Panel LEDs.................................................... A-10
Table A-8 PMC Carrier Board VME P1 Pinouts........................................................... A-13
Table A-9 PMC Carrier Board VME P2 Pinout ............................................................ A-15
Table A-10 PMC Carrier Slot 1 with 64 Bits of User I/O ............................................... A-17
Table A-11 PMC Carrier Slot 1 with 32 Bits of User I/O ............................................... A-18
Table A-12 PMC Carrier Slot 2 with 32 Bits of User I/O ............................................... A-19
Table A-13 PMC Carrier Slot 3 with 0 Bits of User I/O ................................................. A-20
Table A-14 Serial Port E and F Connector Pinout........................................................... A-21
Table A-15 RJ45 Ethernet B Pinout................................................................................. A-22
Table A-16 Paddle Board SCSI Port A Connector Pinouts............................................. A-24
Table A-17 Paddle Board Serial Port B Connector Pinouts ............................................ A-25
Table A-18 Audio Signal Assignments............................................................................ A-28
Table B-1 Baseboard Jumper-Pin Settings (Top Side)..................................................... B-3
Table B-2 Combined JP1401/JP1402 Configurations...................................................... B-4
Table B-3 SCSI A Access Definition ............................................................................... B-5
Table B-4 Boot-Device Settings....................................................................................... B-5
Table B-5 Baseboard Solder-Bead Settings (Bottom Side).............................................. B-7
Table B-6 Front-Panel DIN Settings................................................................................. B-9
Table B-7 CPU Speed Settings......................................................................................... B-9
Table B-8 PMC Carrier Board Solder-Bead Settings (Both Sides)................................ B-12
Table B-9 Audio Input/Output Settings (2P2 Only)....................................................... B-13
Table B-10 VME P2 Connector Configuration (2P2 and 2P3) ........................................ B-14
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Table B-11 PMC Carrier Board Selection Settings (2P2 and 2P3) .................................. B-14
Table B-12 PCB Revision Settings................................................................................... B-14
Table B-13 VME P2 Pin Signal Interpretation................................................................. B-15
Table B-14 PMC Carrier Board VME P2 Connector SB2801–SB2832 Configuration .. B-17
Table C-1 USPIIe-USB Model Configurations................................................................ C-1
Table C-2 PS/2 and USB Protocols and Connectors ........................................................ C-3
Table D-1 Standard Paddle Board Connector J0206 Pinout............................................ D-5
Table F-1 USPIIe-USB Model Configurations................................................................ F-1
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How to Use This Manual
Introduction
Thank you for purchasing the Themis USPIIe-USB single-board computer (see
photo below; Baseboard only). This USPIIe-USB Hardware Manual describes all
models of the USPIIe-USB, a SPARC version 9.0 compliant computer with a VME-
bus interface and an UltraSPARC-IIeprocessor.
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USPIIe-USB Hardware Manual
xviii Themis Computer
Themis Computer values its customer comments and opinions; therefore, a “Reader
Comment Card” is located at the end of this manual for your use. Please take the
time to fill out this card with any comments concerning Themis products and ser-
vices, and return it to Themis Computer. Your comments may also be forwarded to
Themis by sending email to [email protected].
Before you begin, carefully read each of the procedures in this manual and the asso-
ciated Software manual. Serious damage can be caused by improper handling of the
equipment.
USPIIe-USB Models
The USPIIe-USB has a total of seven models (see Table 1).
All models are based on a combination of four different VME boards: the
USPIIe-USB Baseboard, the TGA Graphics Board, and two PMC Carrier Boards
(one with 2 PMC slots and one with 3 PMC slots).
Table 1. USPIIe-USB Model Configurations
Model
Baseboard TGA3D/3D+ Graphics
Board PMC Carrier Board
VME Slot 1 VME Slot 2 VME Slot 3 2-PMC Slots
VME Slot 2 or 3 3-PMC Slots VME Slot 2 or 3
USPIIe-USB / 1 Yes
USPIIe-USB / 2G Yes Yes
USPIIe-USB / 3G2 Yes Yes Yes
USPIIe-USB / 3GP2 Yes Yes Yes (VME Slot 3)
USPIIe-USB / 3GP3 Yes Yes Yes (VME Slot 3)
USPIIe-USB / 2P2 Yes Yes (VME Slot 2)
USPIIe-USB / 2P3 Yes Yes (VME Slot 2)
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How to Use This Manual
Intended Audience
xix
Themis Computer
In addition, two paddle boards are available for the USPIIe-USB that provide I/O
connections through the P2 backplane: the Standard Paddle Board—2-slot wide,
single-slot connector, VME P2 Paddle Board and the Multiple I/O Paddle Board—a
1-slot wide, 3- or 5-row connector, VME P2 paddle board.
Intended Audience
This manual is written for system integrators and programmers. It contains all neces-
sary information for installation and configuration of the USPIIe-USB and assumes
the OpenBoot PROM (OBP) program code is installed in the system Flash memory.
If you intend to operate the USPIIe-USB with an operating system other than
Solaris, such as VxWorks or some other real-time kernel, please consult the appro-
priate documentation supplements accompanying your OS or kernel software.
Although all specific hardware and software features are described in the Hardware
and Software manuals, programmers wishing to write code for the USPIIe-USB
without the benefit of an operating system or real-time kernel will require additional
data sheets. Please refer to the section “Related References” on page xxi for infor-
mation concerning this documentation.
The reader should have a working knowledge of VMEbus and PCI local bus specifi-
cations, SPARC processor architecture, Ethernet, and SCSI (ANSI 3.131-1994)
specifications.
Unpacking
Remove the USPIIe-USB and accessories from the shipping container and check the
contents against the packing list. Be certain to observe industry-standard ESD pro-
tection procedures when handling static-sensitive components. The package should
include all elements of your order.
Caution: The USPIIe-USB contains statically sensitive components. Industry-stan-
dard antistatic measures must be observed when removing the USPIIe-USB from
its shipping container and during any subsequent handling. A wrist strap provides
grounding for static electricity between your body and the chassis of the system
unit. Electric current and voltage do not pass through the wrist strap.
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