Vega ARIES v3.0 User manual

ARIES v
3
.0
© March, 2023 Centre for Development of Advanced Computing (C-DAC) Page 1/12
Product Reference Manual
Description
The ARIES v3.0 is a fully indigenous and a “Made in India” product to get started ith basic
microprocessor programming and embedded systems. This board is built upon a RISC-V ISA compliant VEGA
Processor ith easy-to-use hard are and soft are. The VEGA SDK also provides full ecosystem ith
numerous examples and support documentation. This board is designed and developed by Centre for
Development of Advanced Computing (C-DAC) as part of the Digital India RISC-V (DIR-V) Program, by the
Ministry of Electronics and Information Technology, Government of India.
Target areas/Applications
Lo po er IoT, Sensor fusion, Smart Meter, System supervisors, Remote sensors, Wearable devices,
Toy and electronic education equipment, Legacy 8/16-bit applications, Industrial net orking and many
more…

ARIES v
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.0
© March, 2023 Centre for Development of Advanced Computing (C-DAC) Page 2/12
Features
ontroller
THEJAS32 SoC ith VEGA ET1031 Microprocessor
Memory
2MB Flash
256KB SRAM
Peripherals
•
PWM Pins : 8 nos
•
Analog Input Pins
: 4 nos
•
SPI : 3 nos
•
UART : 3 nos
•
I2C : 2 nos
•
GPIOs : 32 nos (29xGPIO, 3xRGB LED)
lock Speed
Clock Speed : 100MHz
Power
•
Input Voltage : 7-12V
•
DC Current per I/O Pin
: 12 mA
•
IO Voltage : 3.3 V

ARIES v
3
.0
© March, 2023 Centre for Development of Advanced Computing (C-DAC) Page 3/12
ONTENTS
1. The Board 4
2. Ratings 4
2.1 Recommended Operating Conditions 4
2.2 Power Consumption 4
3. Functional Overview 4
3.1 Board Topology 4
3.2 Processor 5
3.3 T EJAS32 pinout 5
3.4 Power Tree 8
4. Board Operation 8
4.1 Getting Started 8
5. onnector Pinouts 9
5.1 Board Outline & Mounting oles 12
6. ompany Information 12
7. Reference Documentation 12

© March, 2023
Centre for Development of Advanced Computing (C
1. The Board
ARIES v3
.0 is a development platform based on THEAJS32 ASIC hich operates at a frequency
of 100MHz. THEJAS32 SoC includes VEGA ET1031 Microprocessor, 256KB internal SRAM,
SPIs, Three TIMERs, Eight PWMs, Three I2C interfaces, 32 GPIOs etc. This board contains everything needed
to support standalone operation. To get started simply connect the board to a computer ith a Micro
Cable or po er it ith a
AC/DC adapter or a battery.
2. Ratings
2.1 Recommended Operating onditions
Symbol
Description
Conservative thermal limits for the
hole board:
2.2 Power onsumption
Symbol Description
VINMax
Maximum input voltage from VIN pad
VUSBMax
Maximum input voltage from USB connector
PMax
DC Current per I/O Pin
3. Functional Overview
3.1 Board Topology
Top view
Centre for Development of Advanced Computing (C
-DAC)
.0 is a development platform based on THEAJS32 ASIC hich operates at a frequency
of 100MHz. THEJAS32 SoC includes VEGA ET1031 Microprocessor, 256KB internal SRAM,
SPIs, Three TIMERs, Eight PWMs, Three I2C interfaces, 32 GPIOs etc. This board contains everything needed
to support standalone operation. To get started simply connect the board to a computer ith a Micro
AC/DC adapter or a battery.
2.1 Recommended Operating onditions
Min
Conservative thermal limits for the
-0 °C (100°F)
2.2 Power onsumption
Min
Typ
Maximum input voltage from VIN pad
7
-
Maximum input voltage from USB connector
-
5.5
DC Current per I/O Pin
-
-
ARIES v
3
.0
Page 4/12
.0 is a development platform based on THEAJS32 ASIC hich operates at a frequency
of 100MHz. THEJAS32 SoC includes VEGA ET1031 Microprocessor, 256KB internal SRAM,
Three UARTs, Four
SPIs, Three TIMERs, Eight PWMs, Three I2C interfaces, 32 GPIOs etc. This board contains everything needed
to support standalone operation. To get started simply connect the board to a computer ith a Micro
-C USB
Max
85 °C ( 185°F)
Typ
Max nit
-
12 V
5.5
V
-
12 mA

ARIES v
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.0
© March, 2023 Centre for Development of Advanced Computing (C-DAC) Page 5/12
Ref. Description Ref. Description
J8 Po er jack U2 THEJAS32 SoC
J6 USB C Connector U1 3.3V Regulator
J12 Boot Select Header U4 100 MHz Oscillator
RESET Reset Button U5 SPI Boot Flash Memory
LD1 RGB LED U6 Op-amp
LD4
Processor HeartBeat
LED
U7
1.2V Regulator
3.2 Processor
The main controller is THEAJS32 SoC hich operates at a frequency of 100MHz. It includes VEGA ET1031
Microprocessor, 256KB internal SRAM, Three UARTs, Four SPIs, Three TIMERs, Eight PWMs, Three I2C
interface, 32 GPIOs. Most of its pins are connected to the external headers, ho ever some are reserved for
internal communication.
3.3 THEJAS32 pinout
Pin # Pin Name Pin Description
1
GPIO1(3)
General purpose IO.
2
GPIO1(2)
General purpose IO.
3
PVSSIOC23
Ground reference for IO pins.
4
PVDDIO23
Positive supply for IO pins. Connect to 3.3V supply.
5
GPIO1(1)
General purpose IO.
6
GPIO1(0)
General purpose IO.
7
SPI3MOSI
SPI 3 Master Out Slave In.
8
PVDDC18
Positive supply for logic. Connect to 1.2V supply.
9
PVSSC18
Ground reference for logic.
10
SPI3MISO
SPI 3 Master In Slave Out.
11
SPI3CLK
SPI 3 Clock.
12
SPI3CSN
SPI 3 Chip Select.
13
PVSSIOC21
Ground reference for IO pins.
14
PVDDIO21
Positive
supply for IO pins. Connect to 3.3V supply.
15
BOOT
Boot select.
16
PROCBT
Heart beat signal.
17
TEDTUPD
Connect to GND.
18
PVDDC17
Positive supply for logic. Connect to 1.2V supply.
19
PVSSC17
Ground reference for logic.
20
TSTCLK
Connect to GND through a 1K
resistor.
21
TJTAGTDO
JTAG TDO. Left unconnected.
22
TJTAGTMS
JTAG TMS. Connect to GND through a 1K resistor.
23
TJTAGTDI
JTAG TDI. Connect to GND through a 1K resistor.
24
PVSSIOC19
Ground reference for IO pins.
25 PVDDIO19 Positive supply for IO pins. Connect to 3.3V supply.
26
PVDDC16
Positive supply for logic. Connect to 1.2V supply.
27
PVSSC16
Ground reference for logic.
28
TJTAGTCK
JTAG TCK. Connect to GND through a 1K resistor
29
TJTAGTRST
JTAG TRST. Connect to GND through a 1K resistor

ARIES v
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30
TSTMODE
Test mode
select. Connect to GND through a 1K resistor.
31
IIC2SDA
I2C 2 Serial Data.
32
IIC2SCL
I2C 2 Serial Clock.
33
IIC0SCL
I2C 0 Serial Clock.
34
IIC0SDA
I2C 0 Serial Data.
35
PVSSC14
Ground reference for logic.
36
PVDDC14
Positive supply for logic. Connect to 1.2V
supply.
37
PVDDIO17
Positive supply for IO pins. Connect to 3.3V supply.
38
PVSSIOC17
Ground reference for IO pins.
39
SPI1CSN
SPI 1 Chip Select.
40
SPI1CLK
SPI 1 Clock.
41
SPI1MISO
SPI 1 Master In Slave Out.
42
SPI1MOSI
SPI 1 Master Out Slave In.
43
RSTIN
Reset.
44
CLKSYS
System Clock.
45
URT1SOUT
UART 1 Serial Out / Transmit.
46
PVDDIO15
Positive supply for IO pins. Connect to 3.3V supply.
47
PVSSIOC15
Ground reference for IO pins.
48
PVSSC12
Ground reference for logic.
49
PVDDC12
Positive supply for logic. Connect to
1.2V supply.
50
URT1SIN
UART 1 Serial In / Receive.
51
GPIO0(15)
General purpose IO.
52
GPIO0(14)
General purpose IO.
53
GPIO0(13)
General purpose IO.
54
GPIO0(12)
General purpose IO.
55
GPIO0(11)
General purpose IO.
56
PVSSC11
Ground reference for logic.
57
PVDDC11
Positive supply for logic. Connect to 1.2V supply.
58
GPIO0(10)
General purpose IO.
59
PVDDIO13
Positive supply for IO pins. Connect to 3.3V supply.
60
PVSSIOC13
Ground reference for IO pins.
61
GPIO0(9)
General purpose IO.
62
GPIO0(8)
General purpose
IO.
63
GPIO0(7)
General purpose IO.
64
GPIO0(6)
General purpose IO.
65
GPIO0(5)
General purpose IO.
66
GPIO0(4)
General purpose IO.
67
PVSSC9
Ground reference for logic.
68
PVDDC9
Positive supply for logic. Connect to 1.2V supply.
69
PVDDIO11
Positive supply for
IO pins. Connect to 3.3V supply.
70
PVSSIOC11
Ground reference for IO pins.
71
GPIO0(3)
General purpose IO.
72
GPIO0(2)
General purpose IO.
73
GPIO0(1)
General purpose IO.
74
GPIO0(0)
General purpose IO.
75
PWM(7)
Pulse Width Modulation.
76
PWM(6)
Pulse Width
Modulation.
77
PWM(5)
Pulse Width Modulation.

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78
PVSSC7
Ground reference for logic.
79
PVDDC7
Positive supply for logic. Connect to 1.2V supply.
80
PWM(4)
Pulse Width Modulation.
81
PWM(3)
Pulse Width Modulation.
82
PWM(2)
Pulse Width Modulation.
83
PVDDIO8
IO
Po er Supply VDD pin.
84
PVSSIOC8
Ground reference for IO pins.
85
PWM(1)
Pulse Width Modulation.
86
PWM(0)
Pulse Width Modulation.
87
SPI0MOSI
SPI 0 Master Out Slave In.
88
PVSSC6
Ground reference for logic.
89
PVDDC6
Positive supply for logic. Connect to 1.2V
supply.
90
SPI0MISO
SPI 0 Master In Slave Out.
91
SPI0CLK
SPI 0 Clock.
92
SPI0CSN
SPI 0 Chip Select.
93
PVDDIO6
Positive supply for IO pins. Connect to 3.3V supply.
94
PVSSIOC6
Ground reference for IO pins.
95
IIC1SDA
I2C 1 Serial Data.
96
IIC1SCL
I2C 1 Serial
Clock.
97
SPI2MOSI
SPI 2 Master Out Slave In.
98
SPI2MISO
SPI 2 Master In Slave Out.
99
PVDDC4
Positive supply for logic. Connect to 1.2V supply.
100
PVSSC4
Ground reference for logic.
101
SPI2CLK
SPI 2 Clock.
102
SPI2CSN
SPI 2 Chip Select.
103
PVSSIOC4
Ground
reference for IO pins.
104
PVDDIO4
Positive supply for IO pins. Connect to 3.3V supply.
105
URT2SIN
UART 2 Serial In / Receive.
106
URT2SOUT
UART 2 Serial Out / Transmit.
107
URT0SIN
UART 0 Serial In / Receive.
108
URT0SOUT
UART 0 Serial Out / Transmit.
109
GPIO1(15)
General purpose IO.
110
GPIO1(14)
General purpose IO.
111
GPIO1(13)
General purpose IO.
112
PVDDC2
Positive supply for logic. Connect to 1.2V supply.
113
PVSSC2
Ground reference for logic.
114
PVSSIOC2
Ground reference for IO pins.
115
PVDDIO2
Positive supply for IO
pins. Connect to 3.3V supply.
116
GPIO1(12)
General purpose IO.
117
GPIO1(11)
General purpose IO.
118
GPIO1(10)
General purpose IO.
119
GPIO1(9)
General purpose IO.
120
GPIO1(8)
General purpose IO.
121
GPIO1(7)
General purpose IO.
122
GPIO1(6)
General purpose IO.
123
PVSSIOC0
Ground reference for IO pins.
124
PVDDIO0
Positive supply for IO pins. Connect to 3.3V supply.
125
PVDDC0
Positive supply for logic. Connect to 1.2V supply.

ARIES v
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.0
© March, 2023 Centre for Development of Advanced Computing (C-DAC) Page 8/12
3.4 Power Tree
4. Board Operation
4.1 Getting Started
To use Vega Arduino IDE for programming follo the steps given in the link belo
•For Linux; https://bit.ly/vega-linux
•For Windo s; https://bit.ly/vega- indo s
To use Eclipse IDE for programming follo the steps given in the link belo
•https://cdac-vega.gitlab.io/sdkuserguide.html
126
PVSSC0
Ground reference for logic.
127
GPIO1(5)
General purpose IO.
128
GPIO1(4)
General purpose
IO.
VIN
VCC_USB
LDO
OPAMP
VCC_5V
LDO
VCC_3.3V
LDO
VCC_1.2V
Thejas32 SoC
FTDI
ADC
SPI Flash
LEDs

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5. onnector Pinout

ARIES v
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SL
NO. SPECIFICATIONS THEJAS 32 ARIES BOARD REMARKS
1
SPI (4)
SPI0_SS
J1_8
Connected to HEADER J1
2
SPI0_SCLK
J1_5
3
SPI0_MISO
J1_6
4
SPI0_MOSI
J1_7
5
SPI1_SS
J7_6
Connected to HEADER J7
6
SPI1_SCLK
J7_4
7
SPI1_MISO
J7_2
8
SPI1_MOSI
J7_3
9
SPI2_SS
J4_6
Connected to HEADER J4
10
SPI2_SCLK
J4_4
11
SPI2_MISO
J4_2
12
SPI2_MOSI
J4_3
13
SPI3_SS
U5_1
Connected to SPI BOOT FLASH IC
14
SPI3_SCLK
U5_6
15
SPI3_MISO
U5_2
16
SPI3_MOSI
U5_5
17
I2C (3)
SCL
J10_12
Connected to HEADER J10
18
SDA
J10_10
19
SCL_1
J1_1
Connected to HEADER J1
20
SDA_1
J1_2
21
SCL_2
U9_10
Connected to I2C ADC IC
22
SDA_2
U9_9
23
UART (3)
UART0_RXD
U10_1
8
Connected to UART TO USB
INTERFACE IC
24
UART0_TXD
U10_
17
25
UART1_RX
J2_15
Connected to HEADER J2
26
UART1_TX
J2_13
27
UART2_RX
J5_1
Connected to HEADER J5
28
UART2_TX
J5_2
29
PWM (8)
PWM[0]
J2_5
Connected to HEADER J2
30
PWM[1]
J2_3
31
PWM[2]
J2_1
32
PWM[3]
J1_10
Connected to HEADER J1
33
PWM[4]
J1_9
34
PWM[5]
J3_3
Connected to HEADER J3
35
PWM[6]
J3_2
36
PWM[7]
J3_1
37
GPIO (32)
GPIO0
J2_11
Connected to HEADER J2
38
GPIO1
J2_9
39
GPIO2
J2_7
40
GPIO3
J2_16
41
GPIO4
J2_14
42
GPIO5
J2_12

ARIES v
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43
GPIO6
J2_10
44
GPIO7
J2_8
45
GPIO8
J2_6
46
GPIO9
J2_4
47
GPIO10
J2_2
48
GPIO11
J3_8
Connected to HEADER J3
49
GPIO12
J3_7
50
GPIO13
J3_6
51
GPIO14
J3_5
52
GPIO15
J3_4
53
GPIO16
J10_11
Connected to HEADER J10
54
GPIO17
J10_9
55
GPIO18
J10_7
56
GPIO19
J10_
5
57
GPIO20
J10_
3
58
GPIO21
J10_
1
59 GPIO22 LD1_4
Connected to
GREEN of RGB
LED
60
GPIO23
LD1_3
Connected to BLUE of RGB LED
61
GPIO24
LD1_2
Connected to RED of RGB LED
62
GPIO25
J9_7
Connected to HEADER J9
63
GPIO26
J9_6
64
GPIO27
J9_5
65
GPIO28
J9_4
66
GPIO29
J9_3
67
GPIO30
J9_2
68
GPIO31
J9_1
69
CLOCK
CLK_100M
U4_3
Connected to OSCILLATOR
70
RESET
PUSH_RESETN
U 8_1
Connected to RESET IC
71
HEART BEAT LED
PROC_HEART_BEAT
LD4_1
Connected to LED
72 BOOT SELECT BOOT_SEL J12_1 Connected to HEADER J12
73 ADC_CH0 _
J10_2
U9_4
ANALOG INPUTS Connected to
HEADER J10 & I2C ADC IC
74 ADC_CH1 _
J10_4
U9_5
75 ADC_CH2 _
J10_6
U9_6
76 ADC_CH3 _
J10_8
U9_7

© March, 2023
Centre for Development of Advanced Computing (C
5.1
Board Outline & Mounting Holes
6. ompany Information
Company name C-
DAC
Company Address
Hard are Design Group
Centre for Development of Advanced Computing (
Thiruvananthapuram, Kerala
Fax: 0471
.vegaprocessors.in
.cdac.in
7.
Reference Documentation
Reference
ARIESv3.0 details
https://vegaprocessors.in/devboards/ariesv3.html
Centre for Development of Advanced Computing (C
-DAC)
Board Outline & Mounting Holes
(
Dimensions in mm[
DAC
Hard are Design Group
Centre for Development of Advanced Computing (
C
Thiruvananthapuram, Kerala
– 695033
Fax: 0471
-2723456 Email: [email protected]
.vegaprocessors.in
.cdac.in
Reference Documentation
Link
https://vegaprocessors.in/devboards/ariesv3.html
ARIES v
3
.0
Page 12/12
Dimensions in mm[
mil] )
C
-DAC)
https://vegaprocessors.in/devboards/ariesv3.html
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