Western Digital TN-55 User manual

J U L Y 1 9 9 8
WRL
Technical Note TN-55
The Memory
Daughter-Card
Version 1.5
User’s Manual
Marc A. Viredaz
d i gi t a l
Western Research Laboratory 250 University Avenue Palo Alto, California 94301 USA

The Western Research Laboratory (WRL) is a computer systems research group that
was founded by Digital Equipment Corporation in 1982. Our focus is computer science
research relevant to the design and application of high performance scientific computers.
We test our ideas by designing, building, and using real systems. The systems we build
are research prototypes; they are not intended to become products.
There are two other research laboratories located in Palo Alto, the Network Systems
Lab (NSL) and the Systems Research Center (SRC). Another Digital research group is
located in Cambridge, Massachusetts (CRL).
Our research is directed towards mainstream high-performance computer systems. Our
prototypes are intended to foreshadow the future computing environments used by many
Digital customers. The long-term goal of WRL is to aid and accelerate the development
of high-performance uni- and multi-processors. The research projects within WRL will
address various aspects of high-performance computing.
We believe that significant advances in computer systems do not come from any single
technological advance. Technologies, both hardware and software, do not all advance at
the same pace. System design is the art of composing systems which use each level of
technology in an appropriate balance. A major advance in overall system performance
will require reexamination of all aspects of the system.
We do work in the design, fabrication and packaging of hardware; language processing
and scaling issues in system software design; and the exploration of new applications
areas that are opening up with the advent of higher performance systems. Researchers at
WRL cooperate closely and move freely among the various levels of system design. This
allows us to explore a wide range of tradeoffs to meet system goals.
We publish the results of our work in a variety of journals, conferences, research
reports, and technical notes. This document is a technical note. We use this form for
rapid distribution of technical material. Usually this represents research in progress.
Research reports are normally accounts of completed research and may include material
from earlier technical notes.
Research reports and technical notes may be ordered from us. You may mail your
order to:
Technical Report Distribution
DEC Western Research Laboratory, WRL-2
250 University Avenue
Palo Alto, California 94301 USA
Reports and technical notes may also be ordered by electronic mail. Use one of the fol-
lowing addresses:
Digital E-net: JOVE::WRL-TECHREPORTS
Internet: [email protected]
UUCP: decpa!wrl-techreports
To obtain more details on ordering by electronic mail, send a message to one of these
addresses with the word ‘‘help’’ in the Subject line; you will receive detailed instruc-
tions.
Reports and technical notes may also be accessed via the World Wide Web:
http://www.research.digital.com/wrl/home.html.

The Memory Daughter-Card Version 1.5
User's Manual
Marc A. Viredaz
July 1998
Abstract
The memory daughter-card is memory extension b oard for the Itsy pocket computer develop ed at
Compaq Computer Corp oration's Western Research Laboratory (WRL) . It provides an additional
bank of ash memory and up to three additional banks of DRAM. It is possible to b o ot from this
daughter-card. This document describes the architecture and the low-level programming mo del of
the memory daughter-card.
Revision 1.0

The Memory Daughter-Card Version 1.5 : User's Manual
Contents
Disclaimer 1
1 Intro duction 1
1.1 Purp ose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Notations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Architecture 2
2.1 Memory system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2.1.1 Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1.2 Dynamic RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3 Programmer's mo del 4
3.1 Memory daughter-card general-purp ose input/output signals . . . . . . . . . . . . . 4
3.2 Non-volatile memory identication structure . . . . . . . . . . . . . . . . . . . . . . . 5
References 5
List of Figures
1 Architecture of the memory daughter-card . . . . . . . . . . . . . . . . . . . . . . . . 2
List of Tables
1 Memory daughter-card general-purp ose input/output signals . . . . . . . . . . . . . 4
WRL, Compaq iii