Xilinx XTP194 User manual

December 2013
AC701 Built-In Self Test
Flash Application
XTP194

© Copyright 2013 Xilinx, Inc. All Rights Reserved.
XILINX, the Xilinx logo, the Brand Window and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are the property of
their respective owners.
NOTICE OF DISCLAIMER: The information disclosed to you hereunder (the “Information”) is provided “AS-IS” with no warranty of any kind, express or implied.
Xilinx does not assume any liability arising from your use of the Information. You are responsible for obtaining any rights you may require for your use of this
Information. Xilinx reserves the right to make changes, at any time, to the Information without notice and at its sole discretion. Xilinx assumes no obligation to
correct any errors contained in the Information or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical
support or assistance that may be provided to you in connection with the Information. XILINX MAKES NO OTHER WARRANTIES, WHETHER EXPRESS,
IMPLIED, OR STATUTORY, REGARDING THE INFORMATION, INCLUDING ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, OR NONINFRINGEMENT OF THIRD-PARTY RIGHTS.
Revision History
Date Version Description
12/18/13 6.0 Recompiled for 2013.4.
10/23/13 5.0 Recompiled for 2013.3. Converted to IPI, added RGMII interface and LwIP.
06/19/13 4.0 Recompiled for 2013.2. AR55431, AR55531 and AR55738 fixed.
04/03/13 3.0 Recompiled for 2013.1. Added AR55431, AR55531 and AR55738. AR53420 Fixed.
02/04/13 2.1 As per AR54044, added 2012.4 device pack. Added AR53420 and AR54223.
12/18/12 2.0 Recompiled for 2012.4
10/23/12 1.0 Initial Version.

Overview
Xilinx AC701 Board
Software Requirements
AC701 Setup
AC701 BIST (Built-In Self Test)
Compile AC701 BIST Design
Program AC701 with BIST Design
Run the LwIP Ethernet Design
References
–IP Release Notes Guide XTP025
Note: This presentation applies to the AC701

AC701 BIST Design Description
Description
–The Built-In System Test (BIST) application uses an IPI MicroBlaze system to
verify board functionality. A UART based terminal program interface offers
users a menu of tests to run.
Block Design Source
–RDF0220 - AC701 BIST Design Files (2013.4 C) zip file
–Available through http://www.xilinx.com/ac701
Note: Presentation applies to the AC701

AC701 BIST Design Description
Block Design IP
–Processor and Subsystems: MicroBlaze, MicroBlaze Debug Module (MDM),
Local Memory Bus, LMB BRAM Controller, Block Memory Generator, Proc Sys
Reset, AXI Interrupt Controller
–AXI Bus: AXI Interconnect, AXI Timer
–Memory: AXI BRAM Controller, MIG 7 Series, AXI DMA
–Peripherals: AXI Ethernet, AXI IIC, AXI GPIO, AXI UART 16550, XADC Wizard
–Other IP: Clocking Wizard, Constant, Concat, gte2_top
•Vivado Design Suite Tcl Command Reference Guide (UG835)
•Designing IP Subsystems Using IP Integrator (UG994)
Note: Presentation applies to the AC701

Xilinx AC701 Board

Vivado Software Requirements
Xilinx Vivado Design Suite 2013.4, Design Edition + SDK
–Combined installer
Note: Presentation applies to the AC701

AC701 Setup
Connect a USB Type-A to Micro-B cable to the USB JTAG (Digilent)
connector on the AC701 board
–Connect this cable to your PC

AC701 Setup
Connect a USB Type-A to Mini-B cable to the USB UART connector
on the AC701 board
–Connect this cable to your PC
–Power on the AC701 board for UART Drivers Installation

AC701 Setup
Install USB UART Drivers
–Go to http://www.silabs.com
–Search for Virtual port drivers
Note: Presentation applies to the AC701

AC701 Setup
Reboot your PC if necessary
Right-click on My Computer
and select Properties
–Select the Hardware tab
–Click on Device Manager
Note: Presentation applies to the AC701

AC701 Setup
Expand the Ports
Hardware
–Right-click on Silicon Labs
CP210x USB to UART
Bridge and select Properties
Note: Presentation applies to the AC701

AC701 Setup
Under Port Settings tab
–Click Advanced
–Set the COM Port to an open Com Port
setting from COM1 to COM4
Note: Presentation applies to the AC701

AC701 Setup
Board Power must be on before starting Tera Term
Start the Terminal Program
–Select your USB Com Port
–Set the baud to 9600
Note: Presentation applies to the AC701

AC701 Setup
Unzip the RDF0220 - AC701 BIST Design Files (2013.4 C) zip file
–Available through http://www.xilinx.com/ac701
Note: Presentation applies to the AC701

AC701 BIST
Open a Vivado Tcl Shell:
Start →All Programs →Xilinx Design Tools →Vivado 2013.4 →
Vivado 2013.4 Tcl Shell
Note: Presentation applies to the AC701

AC701 BIST
Download the BIST bitstream
In the Vivado Tcl Shell type:
source C:/ac701_bist/ready_for_download/bist_download.tcl
Note: Presentation applies to the AC701

AC701 BIST
View initial BIST screen
Note: Presentation applies to the AC701

AC701 BIST
UART Test
–Type “1” to start the UART Test
–After each test, press any key to return to the main menu
Note: Presentation applies to the AC701

AC701 BIST
LED Test
–Type 2to begin LED Test
View Walking 1’s pattern on GPIO LEDs
–Sequence repeats twice
Note: Presentation applies to the AC701