Z-World BL1800 User manual

Jackrabbit (BL1800)
C-Programmable Single-Board Computer
User’s Manual
019–00067 • 030131–E

Jackrabbit (BL1800)
Z-World, Inc.
2900 Spafford Street
Davis, California 95616-6800
USA
Telephone: [phone]
Fax: [phone]
www.zworld.com
Jackrabbit (BL1800) User’s Manual
Part Number 019-0067 • 030131–E • Printed in U.S.A.
©2000–2003 Z-World Inc. • All rights reserved.
Z-World reserves the right to make changes and
improvements to its products without providing notice.
Trademarks
Rabbit 2000 is a trademark of Rabbit Semiconductor.
Dynamic C is a registered trademark of Z-World Inc.

User’s Manual
TABLE OF CONTENTS
Chapter 1. Introduction 1
1.1 Features.................................................................................................................................................1
1.2 Development and Evaluation Tools......................................................................................................2
1.3 How to Use This Manual......................................................................................................................3
1.3.1 Additional Product Information....................................................................................................3
1.3.2 Online Documentation..................................................................................................................3
1.4 CE Compliance.....................................................................................................................................4
1.4.1 Design Guidelines.........................................................................................................................5
1.4.2 Interfacing the Jackrabbit to Other Devices..................................................................................5
Chapter 2. Subsystems 7
2.1 Jackrabbit Pinouts.................................................................................................................................8
2.1.1 Headers..........................................................................................................................................8
2.2 Digital Inputs/Outputs...........................................................................................................................9
2.2.1 Digital Inputs.................................................................................................................................9
2.2.2 Digital Outputs............................................................................................................................10
2.2.3 Bidirectional I/O .........................................................................................................................12
2.3 A/D Converter.....................................................................................................................................13
2.4 D/A Converters...................................................................................................................................15
2.4.1 DA1.............................................................................................................................................16
2.4.2 DA0.............................................................................................................................................18
2.5 Serial Communication ........................................................................................................................20
2.5.1 RS-232 ........................................................................................................................................20
2.5.2 RS-485 ........................................................................................................................................20
2.5.3 Programming Port.......................................................................................................................22
2.6 Memory...............................................................................................................................................23
2.6.1 SRAM .........................................................................................................................................23
2.6.2 Flash EPROM.............................................................................................................................23
2.7 Other Hardware...................................................................................................................................24
2.7.1 External Interrupts.......................................................................................................................24
2.7.2 Clock Doubler.............................................................................................................................24
2.7.3 Spectrum Spreader......................................................................................................................25
Appendix A. Specifications 27
A.1 Electrical and Mechanical Specifications..........................................................................................28
A.2 Jumper Configurations.......................................................................................................................30
A.3 Conformal Coating.............................................................................................................................32
A.4 Use of Rabbit 2000 Parallel Ports......................................................................................................33
Appendix B. Prototyping Board 37
B.1 Mechanical Dimensions and Layout..................................................................................................38
B.2 Using the Prototyping Board..............................................................................................................39
B.2.1 Demonstration Board .................................................................................................................40
B.2.2 Prototyping Board ......................................................................................................................42

Jackrabbit (BL1800)
Appendix C. Power Management 45
C.1 Power Supplies.................................................................................................................................. 45
C.2 Batteries and External Battery Connections......................................................................................48
C.2.1 Battery Backup Circuit .............................................................................................................. 49
C.2.2 Power to VRAM Switch............................................................................................................50
C.2.3 Reset Generator..........................................................................................................................50
C.3 Chip Select Circuit.............................................................................................................................51
Appendix D. Alternate Use of the Programming Port 53
Notice to Users 55
Index 57
Schematics 59

User’s Manual 1
1. INTRODUCTION
The Jackrabbit is a high-performance, C-programmable control-
ler with a compact form factor. A Rabbit 2000™microprocessor
operating at 30 MHz provides fast data processing.
1.1 Features
•30 MHz clock
•24 CMOS-compatible I/O
•3 analog channels: 1 A/D input, 2 PWM D/A outputs
•4 high-power outputs (factory-configured as 3 sinking and 1 sourcing)
•4 serial ports (2 RS-232 or 1 RS-232 with RTS/CTS, 1 RS-485, and 1 CMOS-compati-
ble)
•6 timers (five 8-bit timers and one 10-bit timer)
•128K SRAM, 256K flash EPROM
•Real-time clock
•Watchdog supervisor
•Voltage regulator
•Backup battery
Appendix A provides detailed specifications for the Jackrabbit.

2Jackrabbit (BL1800)
Three versions of the Jackrabbit are available. Their standard features are summarized in
Table 1.
1.2 Development and Evaluation Tools
A complete Development Kit, including a Prototyping Board and Dynamic C develop-
ment software, is available for the Jackrabbit. The Development Kit puts together the
essentials you need to design an embedded microprocessor-based system rapidly and effi-
ciently.
See the Jackrabbit (BL1800) Getting Started Manual for complete information on the
Development Kit.
Table 1. Jackrabbit Series Features
Model Features
BL1800 Full-featured controller with switching voltage regulator.
BL1810
BL1800 with 14.7 MHz clock, 128K flash EPROM, linear
voltage regulator, sinking outputs sink up to 200 mA,
sourcing output sources up to 100 mA, RS-232 serial ports
rated for 1 kV ESD
BL1820 BL1810 with 3 additional digital I/O, no RS-485, no
backup battery.

User’s Manual 3
1.3 How to Use This Manual
This user’s manual is intended to give users detailed information on the Jackrabbit. It does
not contain detailed information on the Dynamic C development environment or the Rabbit
2000™microprocessor. Most users will want more detailed information on some or all of
these topics in order to put the Jackrabbit to effective use.
1.3.1 Additional Product Information
Introductory information about the Jackrabbit and its associated Development Kit and
Prototyping Board will be found in the printed Jackrabbit (BL1800) Getting Started
Manual, which is also provided on the accompanying CD-ROM in both HTML and
Adobe PDF format.
We recommend that any users unfamiliar with Z-World products, or those who will be
using the Prototyping Board for initial evaluation and development, begin with at least a
read-through of the Getting Started manual.
In addition to the product-specific information contained in the Jackrabbit (BL1800) Get-
ting Started Manual and the Jackrabbit (BL1800) User’s Manual (this manual), several
higher level reference manuals are provided in HTML and PDF form on the accompany-
ing CD-ROM. Advanced users will find these references valuable in developing systems
based on the Jackrabbit:
•Dynamic C Premier User’s Manual
•Rabbit 2000 Microprocessor User’s Manual
1.3.2 Online Documentation
The online documentation is installed along with Dynamic C, and an icon for the docu-
mentation menu is placed on the workstation’s desktop. Double-click this icon to reach the
menu. If the icon is missing, use your browser to find and load default.htm in the docs
folder, found in the Dynamic C installation folder.
The latest versions of all documents are always available for free, unregistered download
from our Web sites as well.

4Jackrabbit (BL1800)
1.4 CE Compliance
Equipment is generally divided into two classes.
These limits apply over the range of 30–230 MHz. The limits are 7 dB higher for frequen-
cies above 230 MHz. Although the test range goes to 1 GHz, the emissions from Rabbit-
based systems at frequencies above 300 MHz are generally well below background noise
levels.
The Jackrabbit BL1800 single-board computer has been tested and was
found to be in conformity with the following applicable immunity and
emission standards. The BL1810 and BL1820 single-board computers
are also CE qualified as they are sub-versions of the BL1800 single-
board computer. Boards that are CE-compliant have the CE mark.
NOTE: Earlier versions of the BL1800 sold before 2002 that do not have the CE mark
are not CE-complaint.
Immunity
The Jackrabbit series of single-board computers meets the following EN55024/1998
immunity standards.
•EN61000-4-3 (Radiated Immunity)
•EN61000-4-4 (EFT)
•EN61000-4-6 (Conducted Immunity)
Additional shielding or filtering may be required for a heavy industrial environment.
Emissions
The Jackrabbit series of single-board computers meets the following emission standards
with the Rabbit 2000 spectrum spreader turned on and set to the normal mode. The spectrum
spreader is only available with Rev. C or higher of the Rabbit 2000 microprocessor. This
microprocessor is used in all Jackrabbit series boards that carry the CE mark.
•EN55022:1998 Class B
•FCC Part 15 Class B
In order for the Jackrabbit boards to meet these EN55022:1998 Class B standards, you
must add ferrite absorbers to the serial I/O cables used for RS-232 and RS-485 serial com-
munication. Depending on your application, you may need to add ferrite absorbers to the
CLASS A CLASS B
Digital equipment meant for light industrial use Digital equipment meant for home use
Less restrictive emissions requirement:
less than 40 dB µV/m at 10 m
(40 dB relative to 1 µV/m) or 300 µV/m
More restrictive emissions requirement:
30 dB µV/m at 10 m or 100 µV/m

User’s Manual 5
digital I/O cables. Your results may vary, depending on your application, so additional
shielding or filtering may be needed to maintain the Class B emission qualification.
NOTE: If no ferrite absorbers are fitted, the Jackrabbit boards will still meet
EN55022:1998 Class A requirements as long as the spectrum spreader is turned on.
The spectrum spreader is on by default for Jackrabbit models BL1810 and BL1820. The
spectrum spreader is off by default for the Jackrabbit model BL1800, and must be turned
on with at least one wait state in order for the BL1800 model to be CE-compliant.
Section 2.7.3 provides further information about the spectrum spreader and its use, and
includes information on how to add a wait state.
1.4.1 Design Guidelines
Note the following requirements for incorporating the Jackrabbit series of single-board
computers into your application to comply with CE requirements.
General
•The power supply provided with the Tool Kit is for development purposes only. It is the
customer’s responsibility to provide a CE-compliant power supply for the end-product
application.
•When connecting the Jackrabbit single-board computer to outdoor cables, the customer
is responsible for providing CE-approved surge/lightning protection.
•Z-World recommends placing digital I/O or analog cables that are 3 m or longer in a
metal conduit to assist in maintaining CE compliance and to conform to good cable
design practices. Z-World also recommends using properly shielded I/O cables in noisy
electromagnetic environments.
•When installing or servicing the Jackrabbit, it is the responsibility of the end-user to use
proper ESD precautions to prevent ESD damage to the Jackrabbit.
Safety
•For personal safety, all inputs and outputs to and from the Jackrabbit series of single-
board computers must not be connected to voltages exceeding SELV levels (42.4 V AC
peak, or 60 V DC). Damage to the Rabbit 2000 microprocessor may result if voltages
outside the design range of 0 V to 5.5 V DC are applied directly to any of its digital
inputs.
•The lithium backup battery circuit on the Jackrabbit single-board computer has been
designed to protect the battery from hazardous conditions such as reverse charging and
excessive current flows. Do not disable the safety features of the design.
1.4.2 Interfacing the Jackrabbit to Other Devices
Since the Jackrabbit series of single-board computers is designed to be connected to other
devices, good EMC practices should be followed to ensure compliance. CE compliance is
ultimately the responsibility of the integrator. Additional information, tips, and technical
assistance are available from your authorized Z-World distributor, and are also available
on our Web site at www.zworld.com.

6Jackrabbit (BL1800)

User’s Manual 7
2. SUBSYSTEMS
Chapter 2 describes the principal subsystems and their use for
the Jackrabbit.
•Digital Inputs/Outputs
•A/D Converter
•D/A Converters
•Serial Communication
•Memory
Figure 1 shows these Rabbit-based subsystems designed into the Jackrabbit.
Figure 1. Jackrabbit Subsystems
SRAM
Flash
15 MHz
osc
32 kHz
osc
BL1800
RABBIT
2000
RS-232
RS-485
Digital
Outputs
High-
Pow r
Outputs
Programming
Port
Digital
Inputs
A/D
Conv rt r
Analog
Outputs

8Jackrabbit (BL1800)
2.1 Jackrabbit Pinouts
Figure 2 shows the pinout for headers J4 and J5, which carry the signals associated with
the Jackrabbit subsystems.
Figure 2. Pinout for Jackrabbit Headers J4 and J5
2.1.1 Headers
Standard Jackrabbit models are equipped with two 2 ×20 IDC headers (J4 and J5) with a
2 mm pitch.
GND
RXC
TXC
PC1
PC3
PC5
PC7
AGND
DA1
PD1
PD3
PD5
PD7
GND
485+
VCC
SM1
STAT
VBAT
GND
VCC
RXB
TXB
PC0
PC2
PC4
PC6
AD0
DA0
PD0
PD2
PD4
PD6
GND
485
VCC
SM0
IOBEN
GND
/RST
J5
GND
PA0
PA2
PA4
PA6
GND
PB0
PB2
PB4
PB6
WDO
GND
PE6
PE4
PE2
PE0
HV0
HV2
K
GND
VCC
PA1
PA3
PA5
PA7
GND
PB1
PB3
PB5
PB7
PC K
PE7
PE5
PE3
PE1
GND
HV1
HV3
+RAW
VCC
J4
Bidirectional
I/O
One-Direction
I/O
Legend

User’s Manual 9
2.2 Digital Inputs/Outputs
2.2.1 Digital Inputs
The Jackrabbit has six CMOS-level digital inputs, PB0–PB5, each of which is pulled up to
+5 V as shown in Figure 3. The BL1820, which does not have RS-485, has one additional
CMOS-level digital input, PC1.
Figure 3. Digital Inputs
The actual switching threshold is approximately 2.40 V. Anything below this value is a
logic 0, and anything above is a logic 1.
NOTE: Since the voltage limits on the inputs to the Rabbit 2000 microprocessor are 0 to
5.5 V DC, the end user must ensure that the voltage applied to any I/O pin is within
these limits.
47 kW
Rabbit 2000
Microproc ssor
Vcc
GND

10 Jackrabbit (BL1800)
2.2.2 Digital Outputs
The Jackrabbit has four CMOS-level digital outputs, PB6–PB7, PCLK, and IOBEN. Four
high-power outputs, HV0–HV3, are also available—HV0–HV2 can each sink up to 1 A
(200 mA for the BL1810 and BL1820) at 30 V, and HV3 can source up to 500 mA (100 mA
for the BL1810 and BL1820) at 30 V. The BL1820, which does not have RS-485, has one
additional CMOS-level digital output, PC0.
Figure 4. Jackrabbit High-Power Digital Outputs
The common power supply for the four high-power outputs is called K, and is available on
header J4. Connect K to the power supply that powers the load, which is usually a separate
power supply to that used for the Jackrabbit, and must be no more than 30 V because of
the power limitations of the resistors used in the sourcing output circuit.
The K connection performs two functions.
1. K supplies power to the sinking/sourcing transistors used in the high-power circuits.
2. A diode-capacitor combination in the circuit “snubs”voltage transients when inductive
loads such as relays and solenoids are driven.
+K
HV0HV2 SINKING OUTPUTS
HV3 SOURCING OUTPUT
+K
Current
Fl w
Current
Fl w
PE[02]
PE3

User’s Manual 11
2.2.2.1 Configurable High-Power Output (HV3)
HV3, shown schematically in Figure 5, is factory-configured to be a sourcing output.
Figure 5. Configurable High-Current Output
When used as a sourcing output, HV3 is switched to K when PE3 on the Rabbit 2000 goes
high, and the two transistors shown in Figure 5 are turned on. The maximum sourcing cur-
rent is 100 mA (BL1810 and BL1820) or 500 mA (BL1800), and the maximum K is 30 V.
This voltage limit on K arises because R51 and R52 at the base of Q28 can each dissipate
500 mW for a total of 1 W. The 30 V limit then constrains the sinking outputs as well
because K is common to all four high-current outputs.
HV3
PE3
D24
C28
100 nF
MMBT3906
Q28
R52
1.8 kW
MMBT4401
Q25
R48
470 W
R50
100 kW
R51
1.8 kW
R56
0 W
K
(sourcing)
HV3
0 W(sinking
option)
R55
C27
100 nF

12 Jackrabbit (BL1800)
HV3 can also be reconfigured as a sinking output. To do so, remove the 0 Ωsurface-
mounted resistor R56, and solder on a 0 Ωsurface-mounted resistor or jumper wire at
R55. If you plan to drive inductive loads, add a diode at D21. Figure 6 shows the location
of these components.
Figure 6. Changing HV3 to a Sinking Output
2.2.3 Bidirectional I/O
The Jackrabbit has 14 CMOS-level bidirectional I/O: PA0–PA7, PD0, PD3, PD6–PD7,
and PE4–PE5. The BL1820, which does not have RS-485, has one additional bidirectional
I/O, PD5.
J5
GND
PA0
PA2
PA4
PA6
GND
PB0
PB2
PB4
PB6
WDO
GND
PE6
PE4
PE2
PE0
HV0
HV2
K
GND
VCC
PA1
PA3
PA5
PA7
GND
PB1
PB3
PB5
PB7
PC K
PE7
PE5
PE3
PE1
GND
HV1
HV3
+RAW
VCC
GND
RXC
TXC
PC1
PC3
PC5
PC7
AGND
DA1
PD1
PD3
PD5
PD7
GND
485+
VCC
SM1
STAT
VBAT
GND
VCC
RXB
TXB
PC0
PC2
PC4
PC6
AD0
DA0
PD0
PD2
PD4
PD6
GND
485
VCC
SM0
IOBEN
GND
/RST
J4
Battery
R55
R56
D21
C27
D24

User’s Manual 13
2.3 A/D Converter
The analog-to-digital (A/D) converter, shown in Figure 7, compares the DA0 voltage to
AD0, the voltage presented to the converter. DA0 therefore cannot be used for the digital-
to-analog (D/A) converter when the A/D converter is being used.
Figure 7. Schematic Diagram of A/D Converter
The A/D converter transforms the voltage at DA0 into a 20 mV window centered around
DA0. For example, if DA0 is 2.0 V, the window in the A/D converter would be 1.990 V to
2.010 V. If AD0 > 2.010 V, PE7 would read high and PE6 would read low. If 1.990 V <
AD0 < 2.010 V, PE7 would read low and PE6 would read low. This is the case when the
A/D input is exactly the same as DA0. If AD0 < 1.990 V, PE7 would read low and PE6
would read high.
PE6 can be imagined to be a “DA0 voltage is too high”indicator. If DA0 is larger than the
analog voltage presented at AD0, then PE6 will be true (high). If this happens, the pro-
gram will need to reduce the DA0 voltage.
PE7 can be imagined to be a “DA0 voltage is too low”indicator. If DA0 is smaller than
the analog voltage presented at AD0, then PE7 will be true (high). If this happens, the pro-
gram will need to raise the DA0 voltage.
The A/D input, AD0, is the same as DA0 only when PE6 and PE7 are low. Because the
A/D converter circuit uses a 20 mV window, the accuracy is ±10 mV. DA0 can range from
0.1 V to 2.8 V, which represents 270 steps of ±10 mV. This is better than 8-bit accuracy.
Since the D/A converter is able to change the DA0 output in 3.88 mV steps, there are 697
steps over the range from 0.1 V to 2.8 V. This represents a resolution of more than 9 bits.
–
+
–
+
Vcc Vcc
M324
M324
R31
10 kW
R34
51.1 kW
AD0
DA0
R35
200 W
R33
200 W
R32
51.1 kW
9
10
13
12
14
8R36
R30
0 W
0 W
DA0 too high
DA0 too low
PE6
PE7

14 Jackrabbit (BL1800)
There is a 10 kΩresistor, R31, connected between Vcc and AD0. This resistor should pro-
vide an appropriate voltage divider bias for a variety of common thermistors so that they
can be connected directly between AD0 and ground. The A/D converter load is the 10 kΩ
resistor connected to Vcc. Remove R31 if a smaller load is desired—this will lead to a
very high input impedance for the A/D converter.
The A/D converter has no reference voltage. There is a relative accuracy between mea-
surements, but no absolute accuracy. This is because Vcc can vary ±5%, the pulse-width
modulated outputs might not reach the full 0 V and 5 V rails out of the Rabbit 2000 micro-
processor, and the gain resistors used in the circuit have a 1% tolerance. For these reasons,
each Jackrabbit needs to be calibrated individually, with the constants held in software, to
be able to rely on an absolute accuracy. The Jackrabbit is sold without this calibration sup-
port.
The algorithm provided to perform the conversion does a successive approximation search
for the analog voltage. This takes an average of 150 ms, and a maximum of 165 ms, with a
14.7 MHz Jackrabbit.

User’s Manual 15
2.4 D/A Converters
Two digital-to-analog (D/A) converter outputs, DA0 and DA1, are supplied on the Jack-
rabbit. These are shown in Figure 8.
The D/A converters have no reference voltage. Although they may be fairly accurate from
one programmed voltage to the next, they do not have absolute accuracy. This is because
Vcc can change ±5%, the PWM outputs might not achieve the full 0 V and 5 V rail out of
the processor, and the gain resistors in the circuit have a 1% tolerance. The D/A converters
therefore need individual calibration, with the calibration constants held in software
before absolute accuracy can be relied on. The Jackrabbit is sold without such calibration.
Figure 8. Schematic Diagram of D/A Converters
Note that DA0 is used to provide a reference voltage for the A/D converter and is unavail-
able for D/A conversion when the A/D converter is being used.
Pulse-width modulation (PWM) is used for the D/A conversion. This means that the digi-
tal signal, which is either 0 V or 5 V, is a train of pulses. This means that if the signal is
taken to be usually at 0 V (or ground), there will be 5 V pulses. The voltage will be 0 V for
a given time, then jump to 5 V for a given time, then back to ground for a given time, then
back to 5 V, and so on. A hardware filter in the circuit consisting of a resistor and capacitor
averages the 5 V signal and the 0 V signal over time. Therefore, if the time that the signal
is at 5 V is equal to the time the signal is 0 V, the duty cycle will be 50%, and the average
signal will be 2.5 V. If the time at 5 V is only 25% of the time, then the average voltage
will be 1.25 V. Thus, the software needs to only vary the time the signal is at 5 V with
respect to the time the signal is at 0 V to achieve any desired voltage between 0 V and 5 V.
–
+
Vcc
M324
R29
1 MW
PD2
PD1
R22
10 kW
2
3
1
R26
82.5 kW
DA0
R20
1.1 kWR27
255 kWC20
100 nF
R21
110 kW
–
+
M324
PD4
DA1
1.1 kW100 nF
R24
100 kW
C22
R25
R28
100 kW
5
6
7

16 Jackrabbit (BL1800)
It is very easy to do pulse-width modulation with the Rabbit 2000 microprocessor because
of the chip’s architecture.
2.4.1 DA1
The op amp supporting DA1 converts pulse-width modulated signals to an analog voltage
between 0 V and 5 V. A digital signal that varies with time is fed from PD4. The resolution
of the DA1 output depends on the smallest increment of time to change the on/off time
(the time between 5 V and 0 V). The Jackrabbit uses the Rabbit 2000’s Port D control reg-
isters to clock out the signal at a timer timeout. The timer used is timer B. Timer B has 10
bits of resolution so that the voltage can be varied in 1/1024 increments. The resolution is
thus about 5 mV (5 V/1024).
R28 is present solely to balance the op amp input current bias. R25 helps to achieve a volt-
age close to ground for a 0% duty cycle.
A design constraint dictates how fast timer B must run. The hardware filter has a resistor-
capacitor filter that averages the 0 V and 5 V values. Its effect is to smooth out the digital
pulse train. It cannot be perfect, and so there will be some ripple in the output voltage. The
maximum signal decay between pulses will occur when DA1 is set to 2.5 V. This means
the pulse train will have a 50% duty cycle. The maximum signal decay will be
where RC = 0.01 s for 14.7 MHz Jackrabbits, and t is the pulse on or off time (not the
length of the total cycle).
Timer B is driven at the Rabbit 2000 frequency divided by 2. The frequency achievable
with a 14.7 MHz clock is
(14.7 MHz/2)/1024 = 7.17 kHz. This is a period of 1/f = 139 µs.
For a 50% duty cycle, half of the period will be high (70 µs at 5 V), and half will be low
(70 µs at 0 V). Thus, a 14.7 MHz Jackrabbit has t = 70 µs. Based on the standard capacitor
discharge formula, this means that the maximum voltage change will be
This is less than a 20 mV peak-to-peak ripple.
The DA1 output can be less than 100 mV for a 0% duty cycle and above 3.5 V for a 100%
duty cycle. Because of software limitations on the low side and hardware limitations on
the high side, the duty cycle can only be programmed from 12% to 72%. The low limita-
tion allows the software to perform other tasks as well as maintain the PWM for the D/A
converters. The high limitation is simply the maximum voltage obtainable with the
LM324 op amp used in the circuit. Anything outside the 12%–72% range gets output as
2.5 V 1 e
t–
RC
--------


–×
2.5 V 1 e
70 µs–
0.01 s
----------------


–×17.4 mV=