Ziatech Corporation ZT 8809A User manual

ZT 8808A/8809A
V20 Single Board Computers
OPERATING MANUAL
FOR
ZT 8808A/8809A REVISION A
ZT 88CT08A/88CT09A REVISION A
May 1, 1993
1050 Southwood Drive
San Luis Obispo, CA 93401 USA
FAX [phone]
Telephone [phone]

ZIATECHWARRANTY
ZiatechHardware:Withintwoyearsofshippingdate,Ziatechwill
repairorreplaceproductswhichprovetobedefectiveinmaterials
and/orworkmanship,providedtheyarepromptlyreturnedtoZiatech
atcustomer’sexpenseandhavenotbeenrepaired,altered,or
damagedbynon-Ziatechpersonnel. Serviceafterwarrantyis
availableatapredesignatedservicecharge.Batteriesarenotcovered
bythiswarranty.Nootherwarrantyisexpressedorimplied.
ZiatechSoftware:Within90daysofshippingdate,Ziatechwill
replacesoftware(PROMordiskette)shoulditprovedefective.
ProductsnotmanufacturedbyZiatech:Limitedtothewarranty
providedbytheoriginalmanufacturer.
Notice:ContactZiatechforaReturnMaterialsAuthorization(RMA)
numberbeforereturninganyproducttoZiatechforrepair.
LifeSupportPolicy:Ziatechproductsarenotauthorizedforuseas
criticalcomponentsinlifesupportdevicesorsystemswithoutthe
expresswrittenapprovalofthepresidentofZiatechCorporation.As
usedherein:
1. Lifesupportdevicesorsystemsaredevicesorsystemsthat
supportorsustainlifeandwhosefailuretoperform,when
properlyusedinaccordancewithinstructionsforuseprovidedin
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injurytotheuser.
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tocausethefailureofthelifesupportdeviceorsystemorto
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CUSTOMER SUPPORT
If you have a technical question, please call Ziatech’s
Customer Support Service at one of the following numbers.
Corporate Headquarters: [phone]
[phone] (FAX)
You can also use a modem to leave a message on the 24-hour
Ziatech Bulletin Board Service (BBS) by calling
[phone]. The BBS will provide you with current
Ziatech product revision and upgrade information.

PREFACE
The ZT 8808A and ZT 8809A are single board computers designed
primarily for DOS applications on the STD bus. The combination of
the 8088-compatible V20 microprocessor with RAM, EPROM, serial
ports, a printer port, timers, and a real-time clock makes a hardware-
compatible PC viable for compact industrial applications.
This manual describes the operation and use of the ZT 8808A/8809A.
The only difference between the ZT 8808A and ZT 8809A is the
processor clock speed; the ZT 8808A runs at 5 MHz and the
ZT 8809A runs at 8 MHz. The ZT 88CT08A and ZT 88CT09A are
extended temperature CMOS versions of the ZT 8808A and
ZT 8809A.
Except where otherwise specifically stated, all references in this
manual to the ZT 8809A also apply to the ZT 8808A and
ZT 88CT08A/88CT09A.
The following organizational outline describes the focus of each
chapter. Section headings enclosed in boxes indicate the locations of
labeled tabs, provided for quick access to the appropriate information.
Chapter 1, "Introduction,"is an overview of the ZT 8809A. It
includes a product definition, a listing of product features, a functional
block diagram, and a brief description of each block. If you are
evaluating the ZT 8809A to determine whether it fits your needs, this
chapter is especially useful to you.
Chapter 2, "Getting Started,"summarizes the information you need
to get your ZT 8809A up and running. Refer to the remaining
chapters in this manual for further explanation of the material covered
here.
Chapter 3, "Theory Of Operation," presents a detailed description
of ZT 8809A system level operation. Some of the topics discussed
include microprocessor performance compared to the IBM PC,

Preface
STD bus compatibility, serial communications, interrupts, direct
memory access, power-fail protection, and battery backup.
Chapter 4, "Application Examples," provides specific examples of
the ZT 8809A in operation, including code to implement these
applications. The examples demonstrate the use of interrupts, timers,
and the real-time clock.
Chapter 5, "Memory and I/O Capability," focuses on the memory
and input/output organization of the V20 microprocessor relative to
the ZT 8809A.
Chapter 6, "CPU Description (V20)," describes the basic
components of the V20 microprocessor, its enhancements over 8088
architecture, its ability to operate in both native mode and 8080
emulation mode, its operation with DMA, and the wait state
generator.
Chapter 7, "Numeric Data Processor (8087)," explains the
installation and operation of the optional 8087 Numeric Data
Processor for numerically intensive applications.
Chapter 8, "Serial Communications (16C452)," describes the two
RS-232-C serial ports on the ZT 8809A, serial port signals, and
register addresses.
Chapter 9, "Centronics Printer Interface," details the Centronics
printer port interface.
Chapter 10, "Real-Time Clock (DS 1215)," explains the
organization of the real-time clock, including method of access and
register organization.

Preface
Chapter 11, "Counter/Timers (8254)," describes the main
components of the three programmable 16-bit counter/timers
implemented in an Intel 8254 chip on the ZT 8809A. This chapter
describes the method used to program the counter/timers and their use
by STD DOS and STD ROM.
Chapter 12, "Interrupt Controller (8259A)," describes the features
and operation of the Intel 8259A Programmable Interrupt Controller
(PIC).
Chapter 13, "ZT 88CT08A/88CT09A CMOS Boards," describes
the functional, electrical, and environmental characteristics of the
CMOS versions of the ZT 8808A and ZT 8809A that differ from the
non-CMOS versions.
Appendix A, "Jumper Configurations," describes the ZT 8809A
jumper selectable options in detail.
Appendix B, "Specifications," contains the electrical, mechanical,
and environmental specifications for the ZT 8809A. It also contains
STD-80 bus timing diagrams, cable drawings, and tables showing
connector pin assignments.
Appendix C, "Customer Support," offers technical assistance for
ZT 8809A users. A revision history, and warranty and service
information are also included.

CONTENTS
I. INTRODUCTION
Chapter 1. INTRODUCTION 1-1
OVERVIEW ..................................................... 1-1
ZT 88CT08A and ZT 88CT09A................................ 1-3
FEATURES OF THE ZT 8809A ................................... 1-4
FUNCTIONAL BLOCKS ......................................... 1-6
V20 (uPD70108) Processor .................................... 1-6
Memory and I/O Addressing................................... 1-6
Wait-State Generator .......................................... 1-7
Direct Memory Access (DMA) ................................ 1-7
Optional Battery Backup ...................................... 1-7
AC/DC Power-Fail Detection .................................. 1-8
Real-Time Clock............................................. 1-9
Serial Communications....................................... 1-9
Counter/Timers ............................................. 1-10
Interrupts ................................................... 1-11
Centronics Printer/General Purpose I/O Port.................... 1-12
Optional Numeric Data Coprocessor (8087) .................... 1-12
Clock Slowdown & Halt Restart (CMOS boards only)........... 1-13
II. GETTING STARTED
Chapter 2. GETTING STARTED 2-1
OVERVIEW ..................................................... 2-2
UNPACKING .................................................... 2-2
WHAT’S IN THE BOX? .......................................... 2-3
SYSTEM REQUIREMENTS ...................................... 2-4

Contents
Physical Requirements........................................ 2-4
Power Requirements.......................................... 2-4
Environmental Requirements.................................. 2-6
INSTALLING THE ZT 8809A .................................... 2-7
Configuring the ZT 8809A for STD ROM ....................... 2-9
Configuring the ZT 8809A for STD DOS ...................... 2-13
MEMORY ADDRESSING ....................................... 2-19
I/O ADDRESSING .............................................. 2-22
UPGRADING FROM ZT 8806/8807 SYSTEMS ................... 2-24
III. USER’S REFERENCE
Chapter 3. THEORY OF OPERATION 3-1
OVERVIEW ..................................................... 3-2
RELATIVE MICROPROCESSOR PERFORMANCE ................ 3-3
STD BUS COMPATIBILITY ...................................... 3-4
MEMORY AND I/O .............................................. 3-4
SERIAL COMMUNICATIONS .................................... 3-4
Serial Port 1 (COM1) ......................................... 3-5
Serial Port 2 (COM2) ......................................... 3-6
INTERRUPTS ................................................... 3-8
Interrupt Request Assignments ................................. 3-8
Polled Interrupts on the STD Bus .............................. 3-10
STD Bus Vectored Interrupts ................................. 3-12
STD Bus Cascaded Interrupts ................................. 3-13
Non-Maskable Interrupts ..................................... 3-14
DIRECT MEMORY ACCESS (DMA) ............................ 3-15
Advantages of DMA ......................................... 3-15
DMA Operation............................................. 3-16
POWER-FAIL PROTECTION ................................... 3-18
DC Power-Fail .............................................. 3-18
AC Power-Fail .............................................. 3-19
System Battery Fail .......................................... 3-22
BATTERY ..................................................... 3-23
STATUS INDICATOR (LED) .................................... 3-25
RESET ......................................................... 3-26
CMOS VERSIONS OF THE ZT 8808A/8809A..................... 3-27
Added Features ............................................. 3-27
Functional Differences ....................................... 3-29

Contents
Chapter 4. APPLICATION EXAMPLES 4-1
OVERVIEW ..................................................... 4-2
EXAMPLE 1-A: USING SIMPLE INTERRUPTS ................... 4-3
Objectives................................................... 4-3
System Configuration......................................... 4-3
Software Outline............................................. 4-4
Program Code................................................ 4-6
EXAMPLE 1-B: HANDLING SLAVE INTERRUPTS .............. 4-13
Objectives.................................................. 4-13
System Configuration........................................ 4-14
Software Outline............................................ 4-14
Program Code.............................................. 4-17
EXAMPLE 2: POWER-FAIL/WATCHDOG TIMER ................ 4-28
Objectives.................................................. 4-28
System Level Issues ......................................... 4-28
System Requirements........................................ 4-29
Software Outline............................................ 4-31
Flowcharts For AC Power-Fail & Watchdog Interrupts.......... 4-34
EXAMPLE 3: REAL-TIME CLOCK DRIVERS .................... 4-40
Objectives.................................................. 4-40
System Configuration........................................ 4-40
Software Outline............................................ 4-40
Chapter 5. MEMORY AND I/O CAPABILITY 5-1
OVERVIEW ..................................................... 5-1
MEMORY ADDRESSING ........................................ 5-2
Memory Expansion (MEMEX) ................................ 5-2
On-Board Memory Capacity ................................... 5-2
Write Protection.............................................. 5-3
MEMORY MAPS ................................................ 5-4
BATTERY BACKUP ............................................ 5-10
MEMORY DEVICE LOCATIONS ................................ 5-11
Sockets 3D1 and 5D1 ........................................ 5-12
Sockets 7D1 and 9D1 ........................................ 5-13
DEVICE ACCESS TIMES ....................................... 5-14
INPUT/OUTPUT ADDRESSING ................................. 5-15
Chapter 6. CPU DESCRIPTION (V20) 6-1
V20 OVERVIEW ................................................ 6-2
Segment Registers............................................ 6-3
Program Counter (PC) [IP] .................................... 6-5

Contents
Prefetch Pointer (PFP) ........................................ 6-6
General Purpose Registers ..................................... 6-6
Pointers and Index Registers ................................... 6-7
Program Status Word (PSW) [FL] .............................. 6-8
V20 ARCHITECTURAL ENHANCEMENTS ....................... 6-9
Dual Data Bus ............................................... 6-9
Effective Address Generator ................................... 6-9
16/32-Bit Temporary Shift Registers (TA,TB) .................. 6-10
Loop Counter (LC) .......................................... 6-10
Program Counter (PC) and Prefetch Pointer (PFP) .............. 6-10
Enhanced and Unique Instructions............................. 6-11
MODE OPERATIONS - 8080 EMULATION MODE ............... 6-12
Break for Emulation (BRKEM) ............................... 6-14
Return From Emulation (RETEM) ............................ 6-14
Call Native Routine (CALLN) ................................ 6-15
Return from Interrupt (RETI) ................................. 6-15
Register Use in Emulation Mode .............................. 6-16
DMA SUPPORT ................................................ 6-18
RESET STATE ................................................. 6-20
WAIT-STATE GENERATOR ..................................... 6-21
Chapter 7. NUMERIC DATA PROCESSOR (8087) 7-1
OVERVIEW ..................................................... 7-1
zSBC 337 PIGGYBACK PROCESSOR ............................ 7-3
INSTALLING THE zSBC 337 ..................................... 7-4
COPROCESSOR INTERFACE .................................... 7-7
MEMORY ADDRESSING ........................................ 7-8
INTERRUPT/NUMERIC ERRORS................................ 7-9
REFERENCES ................................................. 7-13
Chapter 8. SERIAL COMMUNICATIONS (16C452) 8-1
OVERVIEW ..................................................... 8-2
SERIAL COMMUNICATIONS PROTOCOL ....................... 8-3
SERIAL INTERFACE (RS-232-C/422/485)......................... 8-8
RS-232-C vs. RS-422/485.................................... 8-10
Signal Definitions........................................... 8-11
SERIAL REGISTERS ........................................... 8-16
Transmit and Receive Buffer Registers ........................ 8-20
Scratchpad Register ......................................... 8-20
Line Control Register ........................................ 8-21
Baud Rate Generator ......................................... 8-24