Alinko DR-135 User manual

DR-135 / DR-235 / DR-435
Service Manual
CONTENTS
SPECIFICATIONS
GENERAL ........................................................................................ 2
TRANSMITTER ................................................................................ 2
RECEIVER ....................................................................................... 2
CIRCUIT DESCRIPTION DR-135
1) Receiver System (DR-135) ........................................................... 3, 4
2) Transmitter System (DR-135) ....................................................... 4, 5
3) PLL Synthesizer Circuit (DR-135) ................................................. 5, 6
4) Receiver System (DR-235) ........................................................... 6, 7
5) Transmitter System (DR-235) ....................................................... 7, 8
6) PLL Synthesizer Circuit (DR-235) ................................................. 8, 9
7) Receiver System (DR-435) ......................................................... 9, 10
8) Transmitter System (DR-435) ......................................................... 10
9) PLL Synthesizer Circuit (DR-435) ................................................... 11
10) CPU and Peripheral Circuits(DR-135 DR-235 DR-435) ............. 11,12
11) Power Supply Circuit ....................................................................... 13
12) M3826M8269GP (XA0818) ....................................................... 14~16
SEMICONDUCTOR DATA
1) M5218FP (XA0068) ........................................................................ 17
2) NJM7808FA (XA0102) .................................................................... 17
3) TC4S66F (XA0115) ........................................................................ 17
4) TK10930VTL (XA0223) .................................................................. 18
5) BU4052BF (XA0236) ...................................................................... 19
6) TC4W53FU (XA0348) .................................................................... 19
7) M64076GP (XA0352) ..................................................................... 20
8) LA4425A (XA0410) ......................................................................... 21
9) M67746 (XA0412) .......................................................................... 21
10) M68729 (XA0591) .......................................................................... 22
11) M57788 (XA0077A) ........................................................................ 23
12) mPC2710T (XA0449) ..................................................................... 24
13) NJM2902 (XA0596) ........................................................................ 24
14) 24LC32A (XA0604) ........................................................................ 25
15) S-80845ALMP-EA9-T2 (XA0620) ................................................... 25
16) L88MS05TLL (XA0675) .................................................................. 25
17) AN8010M (XA0119) ....................................................................... 26
18) TK10489M (XA0314) ...................................................................... 26
19) Transistor, Diode, and LED Ontline Drawings .................................. 27
20) LCD Connection (TTR3626UPFDHN) ........................................... 28
EXPLODED VIEW
1) Top and Front View ......................................................................... 29
2) Bottom View .................................................................................... 30
3) LCD Assembly ................................................................................ 31
PARTS LIST
CPU .......................................................................................... 32, 33
Main Unit(DR-135) .................................................................... 33~36
Main Unit(DR-235) .................................................................... 36~39
VCO Unit(DR-235) ......................................................................... 39
Main Unit(DR-435) .......................................................................... 42
VCO Unit(DR-435) ......................................................................... 42
Mechanical Parts ............................................................................ 43
Packing Parts ................................................................................. 43
ACCESSORIES .............................................................................. 43
ACCESSORIES(SCREW SET) ...................................................... 43
TNC(EJ41U) .................................................................................. 44
TNC (EJ41U) Packing Parts ........................................................... 45
DR-135 ADJUSTMENT
1) Adjustment Spot ............................................................................ 46
2) VCO and RX Adjustment Specification ........................................... 47
3) Tx Adjustment Specification ............................................................ 47
4) Rx Test Specification ....................................................................... 48
5) Tx Test Specification ....................................................................... 49
DR-235 ADJUSTMENT
1) Adjustment Spot ............................................................................ 50
2) VCO and RX Adjustment Specification ........................................... 51
3) Tx Adjustment Specification ............................................................ 51
4) Rx Test Specification ....................................................................... 52
5) Tx Test Specification ....................................................................... 53
DR-435 ADJUSTMENT
1) Adjustment Spot ............................................................................ 54
2) VCO and RX Adjustment Specification ........................................... 55
3) Tx Adjustment Specification ............................................................ 55
4) Rx Test Specification ....................................................................... 56
5) Tx Test Specification ....................................................................... 57
PC BOARD VIEW
1) CPU Unit Side A ............................................................................. 58
2) CPU Unit Side B ............................................................................. 58
3) Main Unit Side A DR-135 (UP 0400B) ............................................. 59
4) Main Unit Side B DR-135 (UP 0400B) ............................................. 59
5) Main Unit Side A DR-235 (UP 0414) ............................................... 60
6) Main Unit Side B DR-235 (UP 0414) ............................................... 60
7) Main Unit Side A DR-435 (UP 0415) ............................................... 61
8) Main Unit Side B DR-435 (UP 0415) ............................................... 61
9) Tnc Unit Side A (UP 0402) (DR-135TP only) .................................. 62
10) Tnc Unit Side B (UP 0402) (DR-135TP only) .................................. 62
SCHEMATIC DIAGRAM
1) CPU Unit DR-135 / DR-235 / DR-435 ............................................. 63
2) Main Unit DR-135 ........................................................................... 64
3) Main Unit DR-235 ........................................................................... 65
4) Main Unit DR-435 ........................................................................... 66
5) TNC Unit (DR-135TP only) ............................................................. 67
BLOCK DIAGRAM
1) DR-135 ........................................................................................... 68
2) DR-235 ........................................................................................... 69
3) DR-435 ........................................................................................... 70
ALINCO,INC.

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SPECIFICATIONS
General
Frequency coverage DR-135 DR-235 DR-435
118.000 ~ 135.995MHz (AM RX) 216.000 ~ 279.995MHz (RX) 350.000 ~ 511.995MHz (RX)
136.000 ~ 173.995MHz (RX) 222.000 ~ 224.995MHz (TX) 430.000 ~ 449.995MHz (TX)
144.000 ~ 147.995MHz (TX)
144.000 ~ 145.995MHz (RX.TX) 430.000 ~ 439.995MHz (RX.TX)
TA,TAG 118.000 ~ 135.995MHz (AM RX)
(Commercial) 136.000 ~ 173.995MHz (RX.TX)
Operating mode
Frequency resolution
Number of memory
channels
Antenna impedance
Power requirement
Ground method
Current drain Receive 0.6A(Max.) 0.4A(Squelched)
Transmit 11.0A max. 8.0A max. 10.0A max.
Operating temperature
Frequency stability
Dimensions
Weight
Transmitter
Output power High:50W (144-148MHz) High:25W High:35W
More than 33W (136-174MHz)
Mid:10W Mid:10W Mid:10W
Low:Approx.5W Low:Approx.5W Low:Approx.5W
Modulation system
Maximum frequency
deviation
Spurious emission
Adjacent
channel power
Noise and hum ratio
Receiver
Sensitivity
Receiver circuitry
Intermediate
frequency
Squelch sensitivity
Adjacent channel
selectivity
Intermoduration
rejection ratio
Spurious and
image rejection ratio
Audio output power
! Note: All specifications are subject to change without notice or obligation.
2.0W (8 ,10%THD)
70dB
60dB
-65dB(Wide mode) -55dB(Narrow mode)
-18dBu
Double conversion superheterodyne
-16dBu for 12dB SINAD
2k
-40dB (Wide mode) -34dB (Narrow mode)
-60dB
-60dB
±5kHz (Wide mode) ±2.5kHz (Narrow mode)
Variable reactance frequency modulation
142(w)×40(h)×174(d) mm
( 142×40×188mm for projection included)
Approx. 1.0kg
E,EG
(European amateur)
T,TG
(U.S amateur)
- 10 to 60
±5ppm
FM 16K0F3E (Wide mode) 8K50F3E (Narrow mode)
5,8.33,10,12.5,15,20,25,30,50 KHz
100
50 unbalanced
13.8V DC ±15% (11.7 to 15.8V)
Negative ground
˚C ˚C
Microphone impedance
1st 21.7MHz 2nd 450kHz 1st 30.85MHz 2nd 455kHz 1st 30.85MHz 2nd 455kHz

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CIRCUIT DESCRIPTION DR-135/DR-235/DR-435
1) Receiver System (DR-135)
The receiver system is a double superheterodyne system with a 21.7 MHz first IF and a 450 kHz second IF.
1. Front End
The received signal at any frequency in the 136.000MHz to 173.995MHz range
is passed through the low-pass filter (L116, L115, L114, L113, C204, C203,
C202, C216 and C215) and tuning circuit (L105, L104 and D105, D104), and
amplified by the RF amplifier (Q107). The signal from Q107 is then passed
through the tuning circuit (L103, L102, and varicaps D103 and D102) and
converted into 21.7 MHz by the mixer (Q106). The tuning circuit, which
consists of L105, L104, varicaps D105 and D104, L103, L102, varicaps
D103 and D102, is controlled by the tracking voltage form the VCO.The local signal
from the VCO is passed through the buffer (IC112), and supplied to the source of
the mixer (Q106).The radio uses the lower side of the superheterodyne system.
2. IF Circuit
The mixer mixes the received signal with the local signal to obtain the sum of
and difference between them. The crystal filter (XF102, XF101) selects 21.7
MHz frequency from the results and eliminates the signals of the unwanted
frequencies.The first IF amplifier (Q105) then amplifies the signal of the selected
frequency.
3. Demodulator Circuit
After the signal is amplified by the first IF amplifier (Q105), it is input to pin 24 of
the demodulator IC (IC108). The second local signal of 21.25 MHz (shared
with PLL IC reference oscillation), which is oscillated by the internal oscillation
circuit in IC116 and crystal (X103), is input through pin 1 of IC108.Then, these
two signals are mixed by the internal mixer in IC108 and the result is converted
into the second IF signal with a frequency of 450 kHz.The second IF signal is
output from pin 3 of IC108 to the ceramic filter (FL101 or FL102), where the
unwanted frequency band of that signal is eliminated, and the resulting signal
is sent back to the IC108 through pins 5.
The second IF signal input via pin 5 is demodulated by the internal limiter
amplifier and quadrature detection circuit in IC108, and output as an audio
signal through pin 12.
4. Audio Circuit
The audio signal from pin 12 of IC108 is amplified by the audio amplifier
(IC104:A),and switched by the signal switch IC (IC111) and then input it to the
de-emphasis circuit.
and is compensated to the audio frequency characteristics in the de-emphasis
circuit (R203, R207, R213, R209, C191, C218, C217) and amplified by the AF
amplifier (IC104:D).The signal is then input to volume (VR1) .The adjusted signal is
sent to the audio power amplifier (IC117) through pin 1 to drive the speaker.

4
5. Squelch Circuit
The detected output which is outputted from the pin 12 of IC108 is inputted to
pin 19 of IC108 after it was been amplified by IC104:A and it is outputted from
pin 20 after the noise component was been eliminated from the composed
band pass filter in the built in amplifier of the IC, then the signal is rectified by
D106 to convert into DC component. The adjusted voltage level at VR101 is
delivered to the comparator of the CPU.
The voltage is led to pin 2 of CPU and compared with the setting voltage. The
squelch will open if the input voltage is lower than the setting voltage.
During open squelch, pin 30 (SQC) of the CPU becomes "L" level, AF control
signal is being controlled and sounds is outputted from the speaker.)
6. AIR Band Reception(T only)
When the frequency is within 118~135.995MHz, Q110 automatically turns ON,
pin 14 of IC108 becomes "L" level and the condition becomes in AM detection
mode.
The receiver signal passed through the duplexer is let to the antenna switch
(D107,D101).After passing through the band-pass filter, the signal is amplified
by RF amplifier Q112. Secondly the signal is mixed with the signal from the first
local oscillator in the first-mixer Q106,then converted into the first IF. Its unwanted
signal is let to IC106, pin24.Then converted into the second IF.and is demodulated
by AM decoder of IC106, and is output from pin13 as the AF signal.
7. WIDE/NARROW switching circuit
The 2nd IF 450 kHz signal which passes through filter FL101 (wide) and FL102
(narrow) during narrow, changes its width using the width control switching
IC103 and IC102.
2) Transmitter System (DR-135)
1. Modulator Circuit
The audio signal is converted to an electrical signal by the microphone, and
input it to the microphone amplifier (Q6). Amplified signal which passes through
mic-mute control IC109 is adjusted to an appropriate mic-volume by means of
mic-gain adjust VR106.
IC114:A and B consists of two operational amplifiers; one amplifier (pins 1, 2,
and 3) is composed of pre-emphasis and IDC circuits and the other (pins 5, 6,
and 7) is composed of a splatter filter. The maximum frequency deviation is
obtained by VR107. and input to the signal switch (IC113) (9600 bps packet
signal input switch) and input to the cathode of the varicap of the VCO, to
change the electric capacity in the oscillation circuit.This produces the frequency
modulation.

5
2. Power Amplifier Circuit
The transmitted signal is oscillated by the VCO, amplified by the drive amplifier
(IC112) and younger amplifier (Q115), and input to the final power module
(IC110).The signal is then amplified by the final power module (IC110) and led
to the antenna switch (D110) and low-pass filter (L113, L114, L115, L116,
C215, C216, C202, C203 and C204), where unwanted high harmonic waves
are reduced as needed, and the resulting signal is supplied to the antenna.
3. APC Circuit
Part of the transmission power from the low-pass filter is detected by D111 and
D112, converted to DC.The detection voltage is passed through the APC circuit
(Q118, Q117, Q116), then it controls the APC voltage supplied to the younger
amplifier Q115 and the final power module IC110 to fix the transmission power.
3) PLL Synthesizer Circuit (DR-135)
1. PLL
The dividing ratio is obtained by sending data from the CPU (IC1) to pin 2 and
sending clock pulses to pin 3 of the PLL IC (IC116).The oscillated signal from
the VCO is amplified by the buffer (Q134 and Q135) and input to pin 15 of
IC116. Each programmable divider in IC116 divides the frequency of the input
signal by N according to the frequency data, to generate a comparison frequency of
5 or 6.25 kHz.
2. Reference Frequency Circuit
The reference frequency appropriate for the channel steps is obtained by dividing
the 21.25 MHz reference oscillation (X103) by 4250 or 3400, according to the data
from the CPU (IC1).When the resulting frequency is 5 kHz, channel steps of 5,
10, 15, 20, 25, 30, and 50 kHz are used. When it is 6.25 kHz, the 12.5 kHz
channel step is used.
3. Phase Comparator Circuit
The PLL (IC116) uses the reference frequency, 5 or 6.25kHz. The phase
comparator in the IC116 compares the phase of the frequency from the VCO
with that of the comparison frequency, 5 or 6.25kHz, which is obtained by the
internal divider in IC116.
4. PLL Loop Filter Circuit
If a phase difference is found in the phase comparison between the reference
frequency andVCO output frequency, the charge pump output (pin 13) of IC116
generates a pulse signal, which is converted to DC voltage by the PLL loop
filter and input to the varicap of the VCO unit for oscillation frequency control.