Analog Devices EVAL-ADF4602EB1Z Instruction manual

ADF4602 & AD9863 Femtocell Evaluation
Board
Preliminary Technical Data EVAL-ADF4602EB1Z
Rev. PrC
Evaluation boards are only intended for device evaluation and not for production purposes.
Evaluation boards are supplied “as is” and without warranties of any kind, express, implied, or
statutory including, but not limited to, any implied warranty of merchantability or fitness for a
particular purpose. No license is granted by implication or otherwise under any patents or other
intellectual property by application or use of evaluation boards. Information furnished by Analog
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Evaluation boards are not authorized to be used inlife support devices or systems.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2007 Analog Devices, Inc. All rights reserved.
FEATURES
ADF4602 femtocell transceiver
AD9863 mixed signal front end (MxFe)
Single Antenna RF Front End architecture
+13dBm output power with <-47dB ACLR
Complete front end solution for femtocell including:
switches, SAW filters, duplexer, coupler, 2 stage PA
consisting of ADL5542 and ADL5320
Simple USB interface for programming
UMTS Band 1 transmit/receive operation with GSM/WCDMA
monitoring in 850/900/1800/1900MHz bands
Accompanying software allows complete control of
ADF4602, AD9863 and RF switches
Single 9V supply
Interfaces to data acquisition board HSC-ADC-EVALB-DC for
capture and analysis of ADC data
Visual AnalogTM software allows real time FFT, time domain,
SNR, SINAD, SFDR analysis
Figure 1. EVAL-ADF4602EB1Z Board

EVAL-ADF4602EB1Z Preliminary Technical Data
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INTRODUCTION
The EVAL-ADF4602EB1Z evaluation board is designed to
allow the user to evaluate the performance of the ADF4602
transceiver and AD9863 mixed signal front end solution for
femtocell basestations.
Figure 2 shows a block diagram of the evaluation board. It
contains all the components necessary for evaluation of a local
area class BS operating in band 1, with monitoring of
WCDM/GSM signals in bands 850,900,1800,1900 and
WCDMA band 1. It includes the ADF4602, AD9863, ADL5542,
ADL5320 gain stage and all necessary RF switches and SAW
filters. The RF front end is a single-antenna architecture which
has cost and board space savings over a 2-antenna architecture.
Output power of +13dBm is achievable at the antenna output,
while still meeting femtocell ACLR requirements as specified in
3GPP WCDMA standard TS25.104.
On the receive side, the board interfaces to the HSC-ADC-
EVALB-DC data acquisition board from Analog Devices. This
board can be used with the Visual Analog software to acquire
data from the ADC and generate real time FFTs for analysis of
the ADC’s SNR, SINAD and SFDR.
The evaluation kit is programmed by the accompanying
software via the USB port. The software controls the AD9863
and ADF4602 and comes with pre-defined software settings
files for transmit and receive setups.

Preliminary Technical Data EVAL-ADF4602EB1Z
Rev. PrC | Page 3 of 37
RXHB1RF
PDET
TXRF
[0:11]
[0:11]
PA
BPF
BPF BPF
BPF BPF
BPF BPF
PC SPI Interface
RXHB2RF
RXLBRF
ADCoutput data to HSC-ADC-EVALB-DC FIFO Board
RX I/ Q
TX I/ Q
RXBBIP
RXBBIN
RXBBQP
RXBBQN
IRXP IRXN
QRXN
QRXP
TXBBIP
TXBBIN
TXBBQP
TXBBQN
ITXP
ITXN
QTXN
QTXP
L[11:0]
U[11:0]
SP6T swit ch
Antennaoutput
J5
SAW f il t er s
CouplerIsolator
SPDT swi t ches
ADF4602 AD9863
CY7C68013 USB
J1140pin connector J1080pin connector
Tx Data
FlexibleI/Ointerface
Figure 2. EVAL-ADF4602EB1Z block diagram

EVAL-ADF4602EB1Z Preliminary Technical Data
Rev. PrC | Page 4 of 37
TABLE OF CONTENTS
Software Installation & USB............................................................ 5
Easy Start Guide............................................................................ 5
Starting software & USB Control ............................................... 5
Software Description........................................................................ 6
Overview........................................................................................ 6
Hardware Description...................................................................... 8
Power Supplies .............................................................................. 8
RF Front End Section................................................................... 8
AD9863 Baseband input/output............................................... 11
AD9863 Transmit Section......................................................... 11
AD9863 Receive Section ........................................................... 12
Clocking....................................................................................... 12
Schematics, Layout and Bill of Materials .................................... 15
Schematics................................................................................... 15
PCB Layout ................................................................................. 25
Bill of Materials........................................................................... 26
Ordering Guide .......................................................................... 37
ESD Caution................................................................................ 37

Preliminary Technical Data EVAL-ADF4602EB1Z
Rev. PrC | Page 5 of 37
SOFTWARE INSTALLATION & USB
EASY START GUIDE
The evaluation software should be installed before connecting
the board to the PC via the USB cable. The software installs the
drivers necessary for the PC to recognize the evaluation board
correctly. Note that you must have administrator rights for the
Windows operating system during the entire easy start
procedure.
1. To run the installation wizard, click on the “setup.exe”
file that comes on the CD with the evaluation board.
Follow the on-screen instructions to finalize the
installation. The PC may need to be restarted after the
installation. Restart the PC if prompted to do so.
2. Connect the provided USB cable to the EVAL-
ADF4602EB1Z evaluation board and to an available
USB port on the computer.
3. The PC should recognize the evaluation board as
“EVAL-ADF4602EB1Z. The Found new Hardware
Wizard in Figure 3 should appear, click Next to
proceed.
Figure 3. Found New Hardware Wizard
4. If the Hardware Installation box in Figure 4 appears,
click Continue Anyway.
Figure 4. Hardware Installation
5. To complete the installation, click Finish.
Figure 5. Click Finish to complete
STARTING SOFTWARE & USB CONTROL
1. The evaluation board software can now be started by
clicking on Start->Programs->Analog Devices-
>ADF4602->ADF4602
2. The board selection window will appear, click OK to
proceed
3. The main software window will appear. In the lower
left hand corner the USB should display that it is
Active as in Figure 6.
Figure 6. USB Active
4. If the evaluation board is not connected, a warning
box will appear EVAL-ADF4602EB1Z not detected!,
and the USB will display as not connected in the lower
left hand corner of the screen – see Figure 7 .
Figure 7. USB Not Connected
5. After connecting the evaluation board, click on
Connect. The device should connect and show as
active - Figure 6.
Note: If at any stage the evaluation board is disconnected from
the PC and then re-connected, the Connect button must be
clicked before attempting to load register settings. Failure to do
so may cause the USB device and software to hang. If this
occurs, disconnect the evaluation board, reconnect and then
click Connect.

EVAL-ADF4602EB1Z Preliminary Technical Data
Rev. PrC | Page 6 of 37
SOFTWARE DESCRIPTION
OVERVIEW
The evaluation board software controls both the ADF4602 and
AD9863 devices. Upon startup, select “Rev B” of the evaluation
board. Figure 9 shows a screenshot. The tab in the lower left
corner selects which devices register map is currently displayed.
Within each device, there are a number of tabs e.g. user
transmit registers, user receive registers etc.
Register Writes
When writing to the registers there are two options.
1. Pressing the Load All button will load all the registers
in the selected device. In the AD9863, registers are
simply loaded in order from 1 to 25. In the ADF4602,
registers are loaded according to the “Register Load
Order” box.
2. When any register parameter is changed, e.g. by
clicking on the PLL Multiplier box in Figure 9, the
corresponding register alone will be updated with the
new setting. In this example a single write to register 0
would take place.
The Log window contains a record of all the register
writes.
RF Switch Programming
The RF switches are controlled via GPO [1:4] on the ADF4602.
In the software, select the User Tx tab in the ADF4602 to show
the transmit user registers. In register 22, setting
DACGPO_OWEN must be set to manual. Control of the
switches is then allowed via the GPO_OW checkboxes. Figure 8
shows an example of the correct setting of the registers.
See the RF Front End Section and Table 3 for more
information.
Figure 8. Correct setup of register 22 for control of GPO[1:4]. In the
screenshot, GPO3 and GPO4 are set high
Figure 9. Screenshot of EVAL-ADF4602EB1Z software

Preliminary Technical Data EVAL-ADF4602EB1Z
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Board LDO Regulator Control
The on-board regulators are controlled from the main software
panel. Each regulator can be individually turned on or off as
shown in Figure 10. This is useful for observing the current
drawn by each device. For example when measuring the current
drawn in receive, the on-board buffer and PA supplies can be
powered down in order to view the current drawn by the
ADF4602 and AD9863 alone.
Figure 10. On-board LDO regulator Control
Loading and Saving Settings
Register settings for both the ADF4602 and AD9863 can be
saved individually for future use. This feature is useful as there
are many registers in both devices and programming each
individually is time consuming.
To save settings, click on File->Save ADF4602 setup or Save
AD9863 setup. Loading saved files is achieved by clicking on
the corresponding Load option.
When a file is loaded, the filename is shown in the Current
Setup frame in the top left hand corner of the screen. Having
loaded settings files for each device, a Load All should be
performed on both devices to initialize them correctly.
Help
Hovering the mouse pointer over the register text will give a
description of the register function.
ADF4602 R0.1 Silicon Soft Reset
A soft reset must be performed on the ADF4602 R0.1 silicon
after power up for correct operation. To do this, load all
registers, then toggle the soft reset button in register 2, and then
load all registers again.
Default Configurations
A number of default software configurations are provided for
easy setup of the evaluation board. It is recommended that these
be used when first using the evaluation board. Table 1 shows the
files that come with the evaluation software.
Compatibility with Visual Analog software
The Visual Analog software and the EVAL-ADF4602EB1Z
software should not be operated simultaneously on a single
PC/laptop. This is due to the incompatibility of the USB drivers.
The Visual Analog software must be run on a separate PC.
File Name Mode Description
ADF4602_tx.txt ADF4602
Transmit
ADF4602 Transmit @
2140MHz. Output power =
+13dBm. Receive section
powered down. RF
switches set appropriately
ad9863_tx_FD
mode.txt
AD9863
Transmit FD
Mode
AD9863 TxDACs
powered up. TxPGA
gain = max. ADCs
powered down. PLL
multiplier = 2x.
Interpolation control =
2x. Tx input data
interleaved
ADF4602_rx.txt ADF4602
Receive
ADF4602 Receive @
1950MHz. Rx gain = 45.
Transmit section
powered down. RF
switches set
appropriately
ad9863_rx_FD
mode_alt_timin
g.txt
AD9863
Receive FD mode
AD9863 ADCs powered
up. Sample rate =
19.2MHz. Rx output
data interleaved
ad9863_rx_24H
Dmode_alt_timi
ng.txt
AD9863
Receive HD24
mode
AD9863 ADCs powered
up. Sample rate =
19.2MHz. Rx output
data 2 x 12-bit parallel
ADF4602_
Powerdown.txt
ADF4602
Powerdown
ADF4602 LDO’s
powered up. Receive
and Transmit powered
down. Reference
output buffers powered
down
AD9863_
powerdown.txt
AD9863
Powerdown
AD9863 TxDAC, ADCs,
PLL powered down
Table 1. Coniguration files descriptions

EVAL-ADF4602EB1Z Preliminary Technical Data
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HARDWARE DESCRIPTION
POWER SUPPLIES
The board operates off a single 9V supply which should be
connected at J13. LDO regulators then provide the various
voltages required for each component on the evaluation board.:
a. +1.8V VINT supply for ADF4602
b. +3.3V supply for ADF4602
c. Optional +5V supply for ADF4602 (Jumper LK1 sets
which of 5V or 3.3V is connected to ADF4602 VBAT.
The default setting is position B, +3.3V)
d. +3.3V supply to on-board input/output buffers
e. +5.35V supply to Tx gain stages ADL5542 and
ADL5320
The ADL5320 is supplied from an adjustable regulator. The
supply is set to 5.35V for best ACLR performance from the
device. The ADL5542 is powered from the same regulator for
convenience.
RF FRONT END SECTION
Figure 11 shows the architecture of the RF front end section of
the EVAL-ADF4602EB1Z evaluation board. It is designed to
allow a local class BS operating in band 1, with monitoring of
WCDM/GSM signals in bands 850,900,1800,1900 and
WCDMA band 1.
The board is layed out with the option of a metal can for
shielding the RF section from interference from external
sources, and to prevent unwanted transmissions.
Transmit
On the transmit side, the ADF4602 PA output is amplified by
the ADL5542 and ADL5320 gain stages. The CP0603LGA
coupler couples power back to the ADF4602 power detector
input, and is followed by an isolator and duplexer. An SP6T
(single pole 6 throw) switch selects which of the transmit or
receive monitoring chains is connected to the single antenna.
The signal chain gives +13dBm output power at the antenna
output, while still meeting transmit ACLR specifications as
defined in 3GPP standard TS25.104. Figure 12 shows a typical
ACLR measurement of -47.8dB with +13dBm output power
using test model 5, 8channels. The corresponding EVM is ≈4%.
The ADF4602 output power can be adjusted in software.
Receive
The receive side consists of the necessary saw filters and SPDT
switches for monitoring and receive. The receive matching
consists of a simple series and shunt inductor for each receive
port. Table 2 shows the recommended matching for different
bands.
The evaluation board is populated by default as follows: HB1
matched to 1950MHz, HB2 to 2140MHz and LB to 880MHz.
3GPP
Band
Rx
port
Freq(MHz) Series
L(nH)
Shunt
L(nH)
1 HB1 2140 1.1 1.7
2 HB2 1950 1.9 1.8
3/9 HB2 1830 3 1.7
5/6 LB 880 11 5.6
8 LB 940 9.1 5.1
Table 2. Matching components for receive bands
Figure 11 RF front end section

Preliminary Technical Data EVAL-ADF4602EB1Z
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Switch Control
The ADF4602 general purpose digital outputs [GPO1:4] are
used to control the RF switches. Table 3 shows the truth table
for the various modes of transmit and receive. See the board
schematic for more details of the implementation.
GPO1 GPO2 GPO3 GPO4
BST Tx & Rx Off DC On On
869-894MHz monitoring Off Off On Off
925-960MHz monitoring Off On Off Off
1805-1880MHz monitoring On Off On Off
1930-1990MHz monitoring On On Off Off
2110-2170MHz monitoring On DC Off On
Table 3. Truth table for control of RF switches with GPO1:4. DC =
don't care bits
Figure 12. Transmit ACLR for TM5, 8channels:- Ouput power = +13dBm. ACLR = -47.8dB

EVAL-ADF4602EB1Z Preliminary Technical Data
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Figure 13. Tx EVM performance. TM5, 8 Channels Output Power = +13dBm. EVM = 4%, Peak Code Domain Error = -48dB