The
Bass
Waveshaping
circuits
are
monophonic;
they
may
only
accept
one
waveform
at
a
time.
Square
wave
tones
C2-G3
are
routed
from
the
Upper
Voicing
Board
frequency
dividers
to
one
input
of
a
three
input
nor
gate
for
each
key
(Z33-Z39).
The
outputs
of
these
nor
gates
are
inverted
square
waves
only
when
the
other
two
inputs
are a logic 0 (e.g.
Z33B
pin
6
is
a
square
wave
only
if
pin 4
and
pin 3
are
at
logic
0.).
NOTE:
All
logic gates in the Bass
Low
Note
Priority
section are COSMOS (Complimentary
Symmetry
Metal Oxide Semiconductor) devices. For this
particular application,
they
are operated
between
ground
and
-15
volts. Therefore, a logic 1
is
any
voltage
between
ground
and
-7.5
volts, logic 0
is
any
voltage
between
-7.5
volts
and
-15
volts.
~
LJLJ
(Z33-Z47)
to
transmit
serially a logic 1
state
to
all
keys
higher
than
the
one
depressed.
ENABLE
ENABLE
)-------e
(A)
(C)
0-------------,
KEYING
VOLTAGE
(B)
0------1
Enable (A) is a logic 0
only
when Enable
(C)
and
the
Keying voltage is less than
-7.5V
(logic 0). -
The
release
time
(decay
time
after
keys
are
released)
is
fixed
at
about
2.5
seconds,
however,
an
additional
charge
path
is
provided
through
01-20
for
those
keys
not
depressed
to
shorten
the
release
time.
When
no
keys are
depressed,
01-20
are
off.
The
base
voltage
of
01-20
is
always
held
a full
diode
drop
above
the
keying
(bus rod)
voltage
in
the
reference
generator.
------I~
!
(C)
~~I-----i-
--0
6
,
(A)
~
<)
I
ENABLE
6
(B)
KEYING
VOLTAGE
The
output
(C)
of
the
NOR
gate will
be
a square wave
only
when the Enable (A)
input
is a logic 0 (-15V)
and
when
the Keying voltage is less than -7.5V.
The
"enable"
input
of
the
three
input
nor
gates
(e.g.
Z33B,
pin
3)
will
always
be
a logic 0
(-15
volts)
provided
no
keys
are
depressed
to
the
left
of
the
circuit
under
examination.
When
a
key
is
depressed,
-15
volts
from
the
bus
rod
discharges
a 1
uf
sustain
capacitor
through
keying
transistors
(01-020).
(e.g. Key
2,
Pl-12
discharges
C42
through
R7,
02
and
CR63
to
-15
volts
on
key
depression.)
When
a
key
is
released,
the
voltage
on
the
capacitor
is
allowed
to
charge
back
to
0 volts
through
a
3.3Mohm
resistor
(e.g.
R5).
This
keying
voltage
is
routed
to
an
input
of
the
three
input
nor
gates
(e.g.
Z33B,
pin
4).
Thus
the
keying
voltage
permits
the
square
wave
to
be
transmitted
from
the
input
of
the
three
input
nor
gate
to
the
output
provided
that
A)
the
keying
voltage
is
less
than
-7.5
volts
and
B)
the
enable
input
is
a logic 0
(indicating
no
lower
keys
are being
played).
The
keying
voltage
is
also
processed
through
a
COSMOS
inverter
(Z45-Z47)
and
a
nor
gate
3.2.3
BASS
KEYING
VOLTAGE
(Refer
to
Lower
Voicing
Schematic,
sheet
3
of
3.)
The
T
point
of
the
Bass Keying
Reference
Generator
supplies
a
voltage
to
the
bass
of
01-20
of
the
Bass
Low
Note
Priority
Circuit
which
is
at
least
three
diode
drops
higher
than
the
keying
voltage
supplied
to
the
Lower
keyboard
bus
rod
(P1·14).
The
diode
drops
are
created
using CR
114,
030
and
CR
113.
Th
is
insures
that
01-20
will be biased ON regardless
of
the
bus
voltage
wh
ich
decreases
as
more
keys
are
depressed.
3.2.4
GATE
DETECTOR
CIRCUITS
(Refer
to
Lower
Voicing
Schematic,
sheet
3
of
3.)
There
are
two
bus
rods
in
the
OMN
I,
one
for
the
lowest
20
keys,
one
for
the
upper
29
keys. Splitting
the
bus
rod
in
this
manner
permits
a bass
envelope
(Bass
AR)
to
be
developed
separately
from
the
higher
keys.
CR107
(Upper
Bass
Gate
Detector)
is
the
voltage
source
for
the
upper
bus
rod.
-15
volts
is
suppl
ied
through
CR107
and
R130
to
the
bus
rod.
When
a
key
is
depressed,
comparator
Z52B
switches
from
-15
volts
to
ground
(Gate).
The
current
drawn
through
R130
on
key
depression
results
in
a
voltage
drop
across R
130.
The
voltage
change
across R
130
is
differentiated
by
C86
so
that
the
output
of
comparator
Z52A
momentarily
switches
from
+15
volts
to
-15
volts
and
back
again
(10ms.
typical
duration,
longer
for
multi-key
depressions).
This
7
