Atari 400 User manual

ATARI%oo/8oo-
ATARI'
HOME
COMPUTER
SYSTEM
HARDWARE
MANUAL
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ATAR l' ^,."",
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COPYRIGHT 1982T ATARI ' INC'
ALL RIGHTS RESERVED
TO
ALLPERSONSRTCEIVINCIHISDOCUMENT
Reproductionis forbidden
without the specilicwritten permission
of
ATARI,lNC.Sunnyvale,CA94086.
Nori8hl to reproducethisdocument,
norlhesubiectmatterlhereof,is
granted
unlessbywriltenagreementwith,
orwritten
oermission
fromtheCorporal;on.
Every effort has been made to ensure that this manual accurately
documents this product of Lhe ATAR] Home Computer Division.
However, due to the ongoing irnprovement and update of the computer
software and haralware, ATARI, INC. cannot guarantee the accuracy
of printed naterial alter the date of publication and disclairns
I i r|\i I i +rr T^r ^h.n^6c arr.
, -- -Jrs, or onlsslons.

II.
I.
III.
rv,
TABLEOF CONTENTS
INTRODUCTIoN.
,..
.. . .... .
.. .I. I
DESCRTPTTON
0F HARDWARE.... ,. .. ... .....,.,. ..r1.I
...........
',...rr.
t
B. POKEY......,. .........rr.23
c. SERIAL
PORT........,.............,..,...II.25
D. INTERRUPT
SYSTEM.....,,..............,,.1r.28
E, CONTRoLLERS,, ........ .rr.30
HARDWARE
RECTSTERS.
...... .. .. .,. .. ... .. .....rr1.1
A. PAL.....
.... ... ...
..,IIt.l
B. INTERRUPT
CONTRO1,..
.. .. ..... .....,.,. .III.1
c. Tv L1NE
CONTRoL.....
.. ,.. .. .. .. ,.... .. ,11I.3
D. GMPIIICSCoNTROL.. . . ... . . . .. . ,. . . .. . .. .III. 4
E. PLAYERS
ANDMISSILES,
... ,. .. .,... ......II1.9
F. AlIDfO. .... .. . .. .. ,.. .IIL 12
G. KEYBOARD
and SPEAKXR........ .. .. ... ....I1I.15
11. SERIAL
PORT... .. ...,... .. .. .
.. ,. .. ... ,.Irr.17
I. CONTROLLER
PORTS,......................III. t9
sAltpLE
DISPLAY
pRoeRAM...,...................IV. I
HAIDIIARE
RECISTER
LISTS.
A. A'DRESSORDER.
B. AI,PHABETICAL
ORDER.
...,..,.
...v.
t
........,.....v.1
;.........,...,v,5
vr, FlcuRES...,.
..
,... ......
,..vr.
t
A. MEMoRY
MAp........,.....................vr. 1
B. NTSC
andPAL
DISPLAY..
...., ,.... .... ... .VI.2
c. SCIIEMATICS.,. ,........vI.3
APPENDIX A: USE OF PLAYER/MISSII,E GRAPHICS
WITH BASIC
APPENDIX B: MlXlNG GRAPIIICS MODES
APPENDIX C: PINOUTS
1t

I. INTRODUCTION
The ATARI (R) 800rM and ATARI 400rM Personal conputer systems
colrtaln a 6502 nlcroprocessor' 4 I/O chtps, operating systen ROI'I'expandable
R-Alt, and several MsI chlps for sddress decodlng and data bu8 bufferlrg.
Thls nernral ls prloarlly lntended to descrlbe the 4llo chtps tn sufficent
detall to a11ow experlenced plograd&exs to create assembly tanguage Prograrns'
such as vldeo ganes. A11 four Inpul/Ortp\rt chips are controlled by the
rnlcroprocessor by nrltlng dlrectly lnto thell reglsters $hlch are decoded
to exlst ln Elcroprocessol nenory space Just as RAM
does. These l/o chtps
can also be interrogated by the nlcroprocessor by leadlng slrdlar reglsters'
!,lany reglsters are wllte only and cannot be read after they are
wrltten. In aone ceses, reading fron the same addless glves the value
contalned ln 4 separate read only reglster. Sone wrlte only reglsters are
gtrobes. No data blts are deeded ln thls case slnce lhe presence of the
address on the bus ls \rhat trtggers the requested actlon. The usual
. conventlon 1s to use the STA (Store Accufillator) hstructlon for such
reglsters. For exanple, STAWSYNC
perforrns the ltait for Sync functlon'
STX (Store x) or STY (store Y) vould ltork lust as weL1. In BASIC' a P0KE
could be used (the data could be anythlng). Readlng a reglster ls accoDp-
115hed by using eny of the load instrrcllons (LDA' LDX etc'). Ifl BASIC
a PEEKwould be used. When lhe hardltare register naEes are deflned 1n an
equate llst' the proglaxmer can refer to the registers by name ralher than
uslflg the addresses dtreclly.
It ls rea1ly not rreceasary fot the plograffner to kno{ $hlch
\:,- I/O functlons are perfolrned by lthtch of lhe 4 chlps' however lt
does help ln learnlng these functlofls.
Thls nanual should be used ln conluncllon rlth the Operatlng
Systen (oS) Manual, a 6502 prograoning narNal, and the 4343!]!qgl.g9g
Baslc Referellce I'I4tuaI.
CHIP T{AME fUNCTION
ANTIC DMA(Dlrect llenory Access) control
- NUl(Non-Maskab
1e lnterlupt) control
Vertical and Horlzontal flne scrolllng
I-lght Pen Posltlon reglsters
Vertlcal l1ne counter
WSYNC
(ltatl for hortzonlal sync)
CTIA Prlorlty control (display of overlapplag oblects)
Color-Lumlnance control (colors alrd brlghtness asslgned
to all oblects lttcludlng DMA
objects fron ANTIC)
?LAYER-MISSIIE
obJects (4 players and 4 ldsstles)
cre^h{ r a raoi.rarc
Slze control
l{orlzontal posltlon control
Col11slon detectlon beBteen all objects
S{ltches and lriggers (rnlscellaneous 1/0 functions)

CII1P NAI,IE
POKEY
FI]NCTION
Keyboard scan and conlrol
Ser1a1 com.lnicatlons port (bidtrectlonal)
Pot scan (digitlzes posltion of 8 tndependelt pots)
Audlo generatlon (4 chanllels)
Tlners
IRQ (na6kable inlerrupt) control fron pertpherals
Randon {runber generator
Controller (Joysllck) lacks read ot write
Peripheral control and lnterrupt lines
IRQ (naskable) lnterrupt control from perirherats
PIA
Sectlon II descrtbes rhe hardware in sone deratl, lncludlng the
varlous graphics nodes. Sectlon III lists the hardrrare resisters orle a! a
tlne, describing whar each bit ts used for. It 1s organtzea by functional
groups (lnterruprs, graphlcs, audio, etc.). Section IV contatns a sanple
display plogtafi. Section V conlalns various flgures and block dtagrans of
the system. Sectlons VI and VII 11s! the hard\rare regtsters ln adilress
order and alphabetical order, Sectlon VII includes hex and decfidal
addresses, the OS shadon registers and the page ftrnbers i,,here nore infor_
nation can be found.
r,2

II. DESCRI?TION
OF I{ARDWARE
ANTIC ANDCTIA
TV Dlsplay: The ANTIC and CTIA chips generate the lelevlsi.on
dtsplay at the rate of 50 frardes per second on the NTSC
(US) systein.
The PAL (European) systen ls dlfferent and ts descrtbed in the sectlon
on NTSCvs PAL. Each frame conslsts of 262 horizor.tal TV lines and each
11ne ls nade up of 228 color clocks, as sho\rn 1n figure rt-3, The 5502
Dlcroprocessor runs at 1.79 MHz. Thle rate was chosen so that one
nachine cycle ls equlvalenr ln length to tno color clocks. One clock
ls approxlnately eqral ln width to two TV 1lnes,
In any graphtcs node, the dlsplay is dtvided up lnto soafl sqrares
or rectangles called ptxel8 (plcture elenenle). The highest resolutlon
graphlcs Eode has a plxel slze of I/2 color clock by I Tv llne. A
Bample dlsplay llst la glven 1rl sectlon IV.
The current TV ltne nay be deternined by readlng the vertlcal counter
(VCoIJNT). Ttls reglster glves the llfle count dlvided by 2. 'I}:'ete are 262
l1nes pe! frarne so VCOUNTrufls fron 0 to 130 (0 to 155 on the PAL syste.0).
The 0 potnt occurs near the end of vertical blank (see flgure VI.5),
Verttcal blank (TELANK) 1s the tlne durlng uhlch the electron beaE returns
back to the top of the screen 1n prepaxatlon for lhe flext frane. The
Atarl 800 does not do lnterlaclng, so each frar@ ls ldentical unless
the plogran which ls belng executed changes the dlsplay. verllca1 sync
(vSYNc) occurs durlng the fourth rhrough slxth lines of vertlcdl blank
(VCoUNT
= hex 7D through 7I). thls tel1s lhe TV set where each frane
stAits. AJter vsYNc, there are 16 oore 11nes of VBLANKfot a Lotal of 22
ttnes of \'BLANK. The dleplay 1lst Juop and walt lnstructlofl (to be
descrlbed later) causes the dlsplay llst graphlcs to start at lhe end of
VBLANK.
Operatlnq Svsten (0S): The ATARI 400/800 cones wtth a loK Operatlng
Systen (OS) ln ROM. The 0S affects sone of the hardware registers, so
it !d11 be Eentloned fron tltae to tlltre in lhis nanual. Refer lo the OS
nanual for nore deta11s. The 0S descrlpttons in thls na[ua1 apply to the
verslon lhat was belng dlslrlbuted when thls nanual I'as written.
The Os supports nost of the hardnare graphlcs loodes (BASICS,GRAPHICS'
PLoT, and DRAWTOcoEnands). Tte OS always dtsplays 24 background l1nes after
the erd of vertlcal blank. This conventlon 1s used at Atarl to compensate
for televlslon sets \lhlch overacant Most TV's are deslgned so lhat lhe
edges of the plcture are cut off, Thls ts flne for ordlnary broadcasts'
but ulth a conpuler 1t ls essential for all lnpotlan! infornatlon to be
dlsplayed on the screen. It is fairly cor0mon
for four to elght colot
ctocks at lhe rtght or left edge of the plcture to overscan. A TV set
that has excesslve overscan rnay
have !o readjusted to oblaln a satisfactory
dlaDlav.
II.1

The 0S uses 192 TV llnes for its display and devotes the remalnlng
24 ltnes to overscanr It uses the standard dlsplay irldth of 160 color
clocks, The hard\rare will allo\r displays of any length, but it ts recon-
nended lhat the standards be followed. The exception night be a border
or other lnfornatlon whlch is nerely decota!1ve and not esse[tla1 to use
of the prograno.
.q,q_lleggjglqE: Since nany of the hard\,rare reglsters are write-only
and cannot be read the 0S has a mnber of "shadow registers'i in RAM.
Every TV frarne durlng vertical blank the OS takes lhe values ln sone of
its shadowregisters, and wriles thero ou! to the correspondlng hardware
register. The 0S does attracr color shlfting on all of rhe color registers
ii ATRACT
(on 0S reglsrer) is negatlve. This is to prevent da&age Eo rhe
TV screen phosphors h'trlch can occur 1f the brlghtness 1s turned up too hlgh
and the santehlgh-luninance dlsplay is lef! on for a long tlne. The OS also
reads lhe Joysticks and other conrrollets during vertlcal blank and stores
lhe resulls 1n shadow reglsrers, so rhat user plograns do not have to tnclude
code to unpack the data. Ttere are a few interrupt-related reglsrers $hlch
lhe 0S changes or reads during inlerrupt processing. Prograr0s
usually access
the OS shadow registers instead of accessing the hard\tare directly. Ho\rever,
the OS shadoirlng can be disabled by changtng the vertical blank and lnterrup!
veclors (see OSmarlual).
l{!:Ig: In addirion to a Vertical Blank Interrupt, which allons rhe
I'Ilctoprocessor to s)'nchronlze to the vertical TV display, this systed also
provides a Walt for Horizontal Sync (WSYNC)
cornnand rhat al1ows Ehe
lolcroprocessor to synchronlze ilself to lhe TV horlzontal line rate. Thts
sync takes effect \rhen the processor r.rrites to an I/O location ca11ed
WSYNC,\rhenever it deslres horizontal synchronizat lon. Wriling to thls
address sets a larch which pul1s to zero a pln on the lllctoprocessor
called REAIY. IdhenREADY
goes to zeto the Elcroprocessor stops and \raits.
The lalch is autonatlcally reset (returning REAIY true) at the beglnnlng
of the next horizontal blank interval, releasing the nicroprocessor to
resunoe
progran execution.
Obiect DMA
(Direct Menorv Access): The primary functlon of the Antlc
chip ls to fetch data fron roenoty (independent of the nlcroprocessor) for
display on the TV screen. It does thls lrlth a lechnlqle called "Dlrect
Meoory Access" or Dl4A. It reqrests lhe use of the inenory address and dala
bus by sending a stgnal called HALTto lhe microprocessor, causlng the
processor to becoEe "TRI-STATE" (open circuit) all durlng the next cornputer
cycle. The ANTIC chlp lhen takes over rhe address blrs and reads any data
it r,rishes fron nenory. Another nan€ fo! Lhis rype of DMA
1s "cyc1e stealing".
Once lnitlated, this DMAis conpletely and autonatically conlrolled by lhe
Antlc chip Fithout need for futher microprocessor lnlervention.
There are l\ro types of Dl4A: Playfleld and Player-Missile (see Figure
1I.2). The playfield Dl4Acontrol clrcult on the Antlc chip resernbles a
snall durnbdrlcroprocessor. By halting the main nicroprocessor 1t can
fetch its ol'n instructions fron uernory (lhe dtsplay list) addressed by 1ts
program counter(d1splay llst poln!e.). Each instructlon defines the type
(alpha character or nemory nap), and the resolurlon (slze of bits on the
screen), and the Iolation of the data ln menoryL'hich is to be dtsplayed
group or rlnes.
II.2

Ir ordel to begln thls DI,IAthe natn
dlsplay l1st of lnstructloos ln nenory,
tdenory, tell the ANTIC where the dlspfay
1lst potnter) and enable the DMAcontrol
register).
nlcroprocessor lnrsE sEore a
store data to be dlsplayed ln
ltst ls (hltlallze the display
flags on the ANTIC (D}.IACTL
In addttlon to the playfteld DlttAdescrlbed above, the ANTIC
chlp slDrltaneously colttrols another DMA
channel. Thls type of DMA
addressea PLAYER-MISSILE gr:aphics data stored ln neoory and passes the
graphlc8 dala on to the CTIA chip graphlcs reglsters. Thls type of DMA
(1f enabled) occurs antoDatlcally, lnterspersed nith the playfleld DMA
descrlbed prevlously. This ?LAYER-MISSILE
DMAhas no dtsplay 1lst or
idstructions, and Is therefore rmlch slEpler than the PLAYFIELDDl,lA.
III addltlon to the two rypes of dlsplay DMA, the ANTIC chlp also
generates DMAaddresses for the refresh of rhe dynanlc nenory RrlMused
1n thls systen. Thla ia also coDpletely autollattc and need be constder-
ed by the programer only lf he ls concerned with real-tlue progrardolng
where an exact count of the conputer cycles 1s lrnportant.
Color-lunlnance I A colot-lumlnance register ls used on the CTIA chlp
for each Player-Mlssile and Playfleld type. Each color-lun reglster is
loaded by the nlcroprocessor \'lth a code representlng the deslred color
end lunlnance of lts correspondlng Player-Misslle or Playfleld type. As
the serlal data pss8es lhrough the CTIA chlp 11 1s 'rtmpressed" \rlrh the
color and hrninance values contalned ilr lhese registers, before being seflt
to the TV dlsplay. In areas of the screen where there are no objects lhe
background color (CoLBK)
1s displayed. The CTIA also does collisron
detectlon (to be descrtbed later;.
?rlorltv: ltren novlng oblects, such as playets and Btsslles,
overlap on the TV screen (with each other or wlth playfleld) a dectslon
ttlst be made as to whlch oblect shons 1n fronr of the othex. Objects
\rhlch appear to pa8s 1n flont of others are satd to have prloriry ower
them. Prlorlty ls asslgned ro aLl objecrs by rhe CTIA chlp befoie the
serlal data fron each object 1s conbtned rrtth the other oblects and sent
to the TV screen.
The prlority of objecls can be conlrolLed by the mtcroprocessor by
I'rltlng lnto the control reglster PRIOR. The functtons of the bits in
thls reglster are glven 1n rhe table 1n the ?RIoR regtsrer descrlption in
sectlon III.
Plavers and }llsslles: The players and nlssiles are snall objecLs
whlch car be moved qutckly in the hortzontal dlrecrlon by changing thelr
poeltlotl reglsters. They are called players and Eissiles because they
$ere orlglnally deslgned to be used ln gamesfor objects such as ahplanes
and bullets. Itowever, there are nany other posstble appllcations for
then. The four player-rulsslle color registers, ln conjunclton l'lth the
four playfield color reglsters and the background color teglster, raake
It posslble !o dlsplay 9 different colors ar the sane ttr0e,
II.3

Ftgure 1I.2
= background)
OBJECT DISPI,AY SOURC'S
obj ec!s
MEMORY},IA?
con!!o11ed
by
Displai ltst
lnstructlons
(DI,IACTL
)
Playfleld
Dl,lA Erable
MICRO
PROCESSOR
I'IEMORY

There are a lotal of four players and four nlsslles. The fout
nisstles n0ay
be grouped together and used as a 5rh player, These
objects are posltloned horlzontally by 8 horizonral posltlon regtslers
([PoS (X)). These reglsrers nay be reloaded at any rlne by rhe proces-
sor, allowlng an object to be repllcated nany tiioes across a horizontal
TV 1ine.
The shape of a player-nlsslle is deterElned by lhe data tn lts
graphics reglster (GMF (X)). Players have independent 8 blt graphtcs
reglsters. The four lllsslles have 2 blt regtsters (located wlthln olre
address). These reglsters oay also be reloaded at afly ttne by the
processor, although they ale usually changed during horlzontal bLank
tlme. The data ln each giaphics reglster is placed on the display
rhenever the horizontal sync couflter equaLs the corresponding horlzon-
ta1 posltion tegister. The samedata \1111be displayed every line unless
the graphlc reglsters are reloaded vrith Ire data.
The player-ntssile graphlc registers rnay
be reloaded by the mlclo-
processor (CRAF (X)), or arlonattcally fron nenory with dlrect meDory
access (Dl4A) (see figure II.3). The prograr0ner lrusr place rhe objecr
graphics ln Demory, I1'rlte the player-miss1le base address (PMBASE),
and
enable player-Eissile DI'A (DMACTL, GRACTL). The transfer of object
graphlcs from rneuory to dlsplay ls then fully autornaric.
PMBASE
speciftes the nost slgnificanr byte (MSB)of the address of
the player-nissile graphics. The locatlon of rhe graphics for each
oblect is deternined by addtng an offset to PMBASE *256 (decimal). The
bytes betrseen the base address aod the ntsslle dara are not used by
Antic, so they are available to rhe progranner.
Only the five nost stgnificant bits oI PMBASEare used lrirh
strgle-line resolutlon and the slx nost stgnlftcant blts are useil
wlth two-line resolutior. This !0eansthar the location of the graphlcs
1n nenory 1s restllcted !o certaln page boundartes. Two-llne reso-Lu-
tion neans that each byte of data ls repealed for lqlo Ilnes. (see
DI.{ACTL,
blt 4). 540 (decinal) bytes (5X128) are requlred for rwo-ltne
resolutlon and l28O byres (5x256) tor one-tine resoiur'ion,
Each byte tn rhe player graphics area represenls elght ptxels whtch
are to be displayed on the correspondtng llne(s) of rhe TV screen. A
I indlcates that the player's color-lun ts to be dtsplayed in that ptxel.
The graphics nay be anyrhtng, not Just rectangles like the ones in ftgure
II.3. The player graphlcs may f111 the enttre hetght of rhe screen or
they may be only a couple of lines high if the rest of the dlsplay dara ts
al1 0's. Each byte 1n rhe rolssile dlsplay also represenrs etgi.rt plxels,
trro pixels for each missile. Each ptxel nay be 1, 2, or 4 color clocks,
and is deternined by the SIZE registers.
Plavfleld: Playfle1d ts always generaled by DMA. There axe four
piayfields, each ldenrtfled by its own color-1um reglster and colllstott
detection. Playfleld ls generated by lwo dlfferen! DMA
technioues:
neloory nap and character. Both methods provtde llsts of insE;ctlons 1n
menory, independent of the player-r0issile generatlon.

player-Mlsslle Sase Address (PMBASE)
= ),ISBof address.
Resolutlon ls controlled by bit 4 of DI4ACTL,
PMBASE*100
(hex)
A.DDRESS OFFSET
Tvo-l1ne One-line
resolutlon resolutlon
(hex) (hex)
2I
I
I
I
I
Mlsslle
Nunber TV SCREEN
+180
+200
+280
f300
+380
+400
+300
M
+400
PO
+400
PI
+600
P2
+700
P3
+800
ior each objec! 1s
lndependently by 8
horlzontal positlon
regasrers.
.21 ii
r42
lt
iP2
I'
I
P0l ;i
tl
I
MO
rl
-
I
Pl
|.'i
MI
rP3t M3 I
i-T--
rl
tl
tl
| | Horlzonral Dosirlon
lt
tl
ll
set
Player-Mtssile
Ver!1ca1 screen
Each sectlon of memory
naps dlrectly
onlo total height of TV screen.
Object vertical posltion is deternined
only by lts Iocatlon In lts section
of deDory. one byre of oenory equals
I or 2 television lines vertlcally,
Figure II.2 PLAYER-MISSILE DMA
II.6

Unl1ke players and Elssiles, there are oo horlzontal posltlon regtsrers
for playfleld. Each player can only have one byte of display per llne.
Playfteld, on lhe othet hand, nay requlre up to 48 bytes per line because
1t can fll1 the entire wldth of the screen.
T'here are three dlfferent playfield lrldths: narrow (128 color
clocks), standard (160 color clocks), and wide (192 coLor clocks),
The ddth 1s selected by stortng lnto DMACTL. The advantage of a rarrolrer
nldlh ls that less R.A.lills reql.rlred and fener nachine cycles are stolen for
DMA. The 0S graphlcs modesuse the standald screen wldth.
g!9If3I-!19!: The dlsplay list is a sequence of display instructlons
stored fir rnemory. These lnstructlons are eithe! one (1) byte or rhree (3)
bytes 1ong. The dlsplay llst can be considered a dlsplay progran, and the
Dlsplav Llst Counter that fetches lhese lnstluctlors can be thought of as
a dlsplay progran counler. (10 bit counter plus 6 bit base reglster.)
The dlsplay 1lst counter can be inirlalized by wrirtng ro DLISTITand
DIISTL. (or OS shadowregisters SDLSTEard SDLSTL). once tnltlaltzed
thls counler value ls used to address the dlsplay llst, fetch the lnstruc-
!ton, dlsplay one (l) to slxteen (16) lines of data on lhe TV screen,
lncrenent the Dlsplay l,1st CounLei, fetch the next dlsplay lnstruction,
and so on &.ltonatlcally irlthout Elcroprocessor control (see DLISTI and
DIISTII). DLISTI and DLISTHshould be aLtered only during vertlcal blank
or when DMA1s disabled (see DI,IACTL).
Each lnstructlon deftnes the type (alpha character or nemory map) and
the resolutlon (s1ze of blts on screen) and the locatlon of data ln nerory
to be dlsplayed for a group (I to 16) of l1nes. Each group of lines ts
ca11ed a dlsplay b1ock.
TITEDISPI-AYI-IST CANNOTCROSSA lK BYTEMEMORYBOIINDARYUNLESS
A JUMPINSTRUCTIONIS USED.
Flxed (6 btrs) counter
DISPLAYLIST COUNTER
DI,ISTI,
(10 blts)
tr.7

Dlsplav Inslructlon Fornat: Each lnstruction conslsts of either an
opcode only, or of an opcode followed by tiro (2) bytes of operadd.
lopcodel ------Slngle Byte Display Instructlon
l6'..d.-l \
-.t
loperand| )----Trlple EyLe
DIspIdy Instructlon
-_-t
lOperand
I.,
The opcode ls al{ays fetched flrst and placed ln the leqlggllgg
Reelster. This opcode deflnes the type of lnslructlon (1 o! 3 bytes)
and wll1 cause t\ro 'Iore bytes to be fetched if needed. If fetched,
these next rwo (2) bytes rrill be placed ln lhe l4gggTI-.gSeg-9993!CI,
or ln the Dlsplay I-1st Counter (if the instructlon ts a Jump).
Dlsplay Instructton Reglster (IR)r This register is loaded wlth the
opcode of the current dtsplay 1lst lnstructlon. It cannot be accessed
dlrectly by the prograomer. There axe three bastc lypes oi display lts!
inslruc!1ons: blank, ju!0p, and dlsplay.
Blank
(
t-byte) 6lD5lD4
This lnslnrctlon is used to create I to 8 blank llnes on the
dlsplay (blackground color).
D7 I - display llsr InsLrucclon inEerrupt
t5 - D4 0-7 = r-8 blank lines
D3-D0 0 = blank
(3-bytes )
Dlsplay
(1 or 3 bytes)
D7lD6lXl Xl 0l 0l 0
D2IDlIDO
Thls lnslructlon is used to reload the Dlsplay List Counter.
The next two bytes speclfy lhe address to be loaded (LsB first).
D7 I = dtsplay .I.Lsc
lnscructlon interrupt
D6 0 = junp (creates one blank ltne on dlsplay)
"_i' _:t.I end of nexl vertlcal blank
D5-D4 X = don't care
D3_D0 I = junp
Thls lnstructlon specifles the type of dlsplay for the next
display block.
D7 I = dlsplay list inEtructlon inteErupt
n6 n=l hvts.i^cfr,r.rlon
I - 3 byLe Inscrucclon (reload Memoryscan Counter
uslng address ln next lwo bytes, LSB ftrst).
D5 I = verttcal scroll enable
D4 I - horlzontal scroll enable
D3-D0 2-F = dlsplay node (memory
or character map -
see following pages).
II.8

FH
.rr x
ttl
--! | |
II
-----1 I
,
ts.o6<raoatsl
r&ts]t4l&ht4 I'rE tstrhErEl
F@6<lq(JAln
Fco6<fq{JA[r]
r@6<14()aFr
N.o6<FqL)crrIr
Fco6<rcrJoFt
(co6<F(JAd
Nco6<Fq(j,a
F@6<rC(JAtst
F@6<rO(,)OEl
6ts@o<FOOtsl
ro6<i0<JApl
Fco6<laL)FIIr
ts@6<lqc)A14
tsco6<roooFl
ts@6<laOAF.l
;

Btt 7 of a dtsplay 1lst tnstructlon can be set to create a dlsplay
list tnterrupt 1f btt 7 of NMIEN1s set. The dlsplay 11s! lnternrpt coile
can change the colors or graphics durtng the nlddle of the TV dlsptay.
The lype of lnterrlpt ls derernlned by checklng NMIST. NMIRESclears
NMIST, The current 0S will vecror through VDSLST
(Itex 200 and 2Ol) to
lhe user's dlsplay 1lst lnterrupt rourine. See the OSnanual for proarau-
.olng detatls.
Blts 5 and 4 of a dlsplsy type of dtsplay llst inshuctlons are used
to enable vertlcal and horlzoflta1 scro111[g. The amount of scro1llng
depends on the values ln the VSCRoI and I{SCRO],
reglsters (to be descrtbed
later).
Meoorv Scan Counter! Thls counter is not dlrecrly accesslble by the
progtaEner. It 1s loaded wlth the value in rhe last 2 bytes of a 3 byre
(non-Junp) 1Tlstruction.
Thls counter pohts to the locarlon (address) ln mernory
of data ro be
directly displayed (Eemory
nap dtsplay) or ro the locatlon of characrei
rane strlngs to be tndtrectly displayed (chalacter dlsplay).
A single byEe lnstructlon does not reload thts counter. Thls lnp11es
a contimratlon In rremory of data to be dlsplayed frorn that displayed by
the previous instructlon. Stnce thls counter really conslsts of 4 btts of
reglster and 12 of actual counter, a conttnuous menory block cannot cross
4K bvte rnenorv boulldarles. unless the counter ls reposltloned wlth a 3
byte Load Meinory
Scan Counter instrucllon.
l,lSBthlrd byte of 3 byte
hwrc lnorh!.r l^n
tttl
110
LSB Secondbyte of 3
byte lltstrucllon
2
Menorv Map Dlsplav Instructlons: Data 1n nenory (addressed by the
Memory
Scan Counter) is dlsplayed dtrectly $hen executlng a nenory (btt)
nap dlspfay lnstruction. As data is betng displayed 1t ls also stored 1n
a shlft reglster so that it can be redlsplayed for as nany TV 1lnes as
required bY the lnslructlon.
tttlttttl
15l 14l13lr2 3'2t1
Flxed (4 btts) Counter (
l2 bits)
1r.l0

Menory Scan Counter
Addresses each byte Mernory
one l1ne worth
loaded tnto theof rdenory 1s shlft reglster
7
6t5
4132tt 0| 7 6t5 4 2tt 0
Shlft reglster data 1s dlsplayed for four Tv scan 11nes ln thls exarnple.
In Instructlon Regtster (IR) dtsplay nodes 8 through tr', one or two
blts of nemory are used to spectfy lrhal 1s to be dlsplayed on each plxel
of the screen. Plxel slzes range froE l/2 clock by I TV llne to 4 cLocks
by 8 TV ltnes. The 0S and BASIC support nost of these grephlcs nodes
(BASICGRAPITICScomand). Tvo nodes, C and E, are not supporled by the
OS. Ttese nodes have rectanguLat plxels, lrhlch are approxlmately tlrlce as
wide as they are hlgh,
In IR Eode F, only one color (CoIPI2) can be dlsplayed. T\ro dlfferent
luElnances are avatlable. If a blt 1s a zero. then the lunlnance of the
correspoodlng plxel cones fron COLPI'2. If the btt 1s a one, them the
lunlnance ts deterntned by the contents of CoLPFI (abbrevlated to Pf'l).
In lR modes 9,8, and C, two different colors can be displayed. A
zero lndlcales background color and a one hdlcates ?f0 color. T1le
dlfference between the varlous modes 1s ln the slze of the plxels.
In IR modes 8,A,D, and E, two btts are used to speclfy the color
of each ptxel, This al1ows four dlfferent colors ro be dlsplayed.
l{olrever, only four plxels can be packed llrto each byte, lnstead of elght
aB in the prevlous Ecdes. The bi! asslgnnents are shoqrn
belor.
SHIFT RECISTER
2 blts foro
one plxel
II. I1

l4eoorv }lap Dlsplay ltlodes
oS I lcolors
and l1nst. I per
BASICIRes.
I uode
Plxels lBytes
Iscen lColor I I Blt I
per I per lLlnesI
clocks
I
Btts lvalueslcotor
srd. lstd. I per I per lper I tn I Rec.
odeslHEx | | Line I ritre lPtxel lPlxel lPlxellPixel lselect
| | I | | I | 100 | BAK
s
lAl 4
l80
ltl
ro| 4
I
I 160
I
I 160
I
ttttl
40 l0 814
IPFO
PT'I
BAK
?r0
I Prl
IGIIM)
101 l?30
lr0 lPrl
OI
10
00
0
I
2 I 0l
I r0
BAK
PTO
?r1
0l
10
40320
rt. t2

Character Dlsplav Instructlonst The flrst step 1n ushg the character
map dode 1s to cxeate a character set ln neEory (or the bu1lt-tn OS
character set at hex E000nay be used). The character set contalns elgh!
bytes of !g!g for the graphlcs for each character. The neantng of the
data depends on the hode. The charecter set can contaln 64 or 128 characters,
also depending on the oode. The USB (l,losr Slgntftcant !yte) of rhe
address of the character set ls stored ln CHBASE
(or the OS Shadon CHBAS).
Only the most slgntftcant s1x or seven blts of CHBASare used (see CIIBASE
descrlptlon ln sectlo[ III). The other one or two blts and the LSB of the
addless are assuued to be zero, so lhe character set fitst start aE an
acceptable page boundary.
Tte dext step ls to set up the dtsplay 11st for the destred node.
Then the actual dtsplay 1s set up. Thls constsrs of a strlflg of chatacter
lgggg or codes. Each nane takes one byte. The last 6 or 7 bits of the
nene selects a character. For a 64 charactet set, the naEe would range
froE 0 through 63 (decloal). For a 128 characrer ser, rhe range \rould be
0 through 127 (declnal). The upper one or rwo blts of rhe nane byle are
used to speclfy the color or orher speclal tnfornatlon, dependtng on the
Character nanes (codes) are fetched by the neroory scan counter, and
are placed ln a shtf! reglster. On any glven ltne of dlsplay the shifr
reglster rotates, changing only the nane portlon of the character address,
as shol'n belon.
After a full 1lne of character data has been dlsplayed the line
counter v111 lncrenent. The next l1ne agaln addresses all characrers by
na.oe for lhat ftne rnrmber.
In 20 character f'er ltne modes
CIBASEare used. Th{s requlres that
byte Eenory boundary. The set Inlst
glvlng a rotal of 512 bytes for the
The 40 character per ltne aodes
of CEBASE,forclng the character set
The aet rrust have 128 charactels of
1024 bytes for the set.
the seven nost slgrlflcant birs of
the charactet set !o statt upon a 512
conratn 64 charcters, 8 bytes each,
use the slx most slgnlficant blts
to start on a lK byte rnemory boundary.
8 bytes each. Thls gives a total of
I ltex
lCode Graphlcs
Mode I chars. laytes lNunbe. lnytes
lln
Nunber
of
Ltne Char Set
f4l
II.I3
I28

Character
(20 Characrer
Codes (naines)
Stored ln
Shlft Register
Dlsplay
per llne mode exarnple)
Internal
codes for
shlft
Resls!er
Color
Reglster
Select
Addr:essportlon of
Character nane
Llne
Character Data Address
Char:acter Set
1n llemory
Addresses data in
and displays on the
TV
Color assigned
by color reglsEer
sefected
0
I
2
3
4
5
6
7
TV
Scan
Lines
r1.14

There are slx charcter inapmodes, IR rnodes2 through 7. Modes 2,6
and 7 are supported by the OSand BASIC (GRAPHICS
0,f and 2).
In IR dodes 6 and 7, the upper two bits of each character Iraoe selec!
one of four playfleld colors, For each 3e!g bit that contains a one, tfre
selected playfleld color is dlsplayed. For each zero data btr, the
background color ts dtsplayed. The four characler colors plus the background
color glves a total of flve dlfferent colors. the loode6 characters are
elght lines htgh and the dode 7 characters are slxteen lines htgh (each
data byte ls dlsplayed for two ltnes).
In IR nodes 4 and 5, each character ls only four plxels i{de lnstead
of elght (as ln the olher nodes). Twobtts per pixel of data are used to
select one of three p1ayf1eld colors, or background. Seven
eqEg bits are
used to select lhe character. If the most signlftcant nane blt ls a zero
the[ data of 10 (binary) selects P]I. If the nane blt 7 1s one, rhen data
blts of l0 select PF2. Thls nakes it possible to dlsplay l\no chalaclers
wlth dlfferert colors, uslng the samedata but differenr nane bytes.
.- In IR roodes
2 and 3, each plxel is half of a color clock tn width.
This makes lc posslble to have forty etght-pixe1-wtde characters in a
standard \ddth 11ne. These nodes are slnllar to r0enory loode F h that two
lur0inances can be dlsplayed, but only one color 1s available a! a tllle.
In IR mode 3, each character ls l0 Unes high. This nakes lt posslble to
deflne loner case characters w_ith descender€. Tlle las! fourlh of the
characte! set (naEe blts 5 and 6 equal to one) is lowered. The hardware
takes the flrs! !!r0 dala bytes and noves then to the botron of the characte!,
displaylng two blank l1nes at the rop of the character (see next page).
\- In IR oodes 2 and 3. blt 7 of the characler narne ls uaed for inverse
vldeo or blanklng. This is controlled by CHACTL
(character co$tro1). If
blt 2 of CHACTL ls a one then all of the characlers will be dlsplayed
upslde dolrn, reeardless of node, If CEACTL bil I is set, lhen each
character \.rhich has blt 7 of 1ts nane set l{lll be displayed in inverse
vtdeo (the luBlnances will be reversed). If CHACTI-
blt 0 is set, then
each character whlch has blt 7 set w'l1l be btanked (on1y background wil be
dlsplayed). Characters can be blinked on and off by settlng nane bil 7 to
I and loggltng CEACTI-bit 0. Inverse vldeo and blank apply only to IR
modes 2 ard 3. If both inverse vldeo and blank are set then the character
w111 appear as an lnverse vldeo blank character (solid sqrare).
Ilardware collislon Delectlonr 60 bils of colllslon register are
provlded to delect and store overlap (hits) belreen players, misslles and
playfleld. These collislons can be read by the Dicroprocessol fton
addresses D000 thlough D00I. There are no btts for nisslle to nlssile
co11islons.
16 bits for ulssile to Playfield
16 btts for Player to Playfield
16 blts for }Ilssile to PlaYer
12 bits for Player to Player (P0 io POallr'ays leads as zelo, e!c.)
The l/2 clock lleDory nap node (1R code llll) and lhe l/2 clock chalacter
node (IR codes 0011 and 0010) are both playfleld type 2 coLltsions and w111
be slored in btl 2 of the playfietd colltsion registers.
T1.15