Atmel AT91SAM9G10-EK User manual

6479A–ATARM–26-May-09
AT91SAM9G10-EK Evaluation Board
....................................................................................................................
User Guide

1-2 AT91SAM9G10-EK Evaluation Board User Guide
6479A–ATARM–26-May-09

AT91SAM9G10-EK Evaluation Board User Guide 2-1
6479A–ATARM–26-May-09
AT91SAM9G10-EK Evaluation Board
User Guide
Section 1
Overview.....................................................................................................................1-1
1.1 Scope ................................................................................................................................. 1-1
1.2 Deliverables ....................................................................................................................... 1-1
1.3 The AT91SAM9G10-EK Evaluation Board ........................................................................ 1-1
Section 2
Setting Up the AT91SAM9G10-EK
Evaluation Board ........................................................................................................2-1
2.1 Electrostatic Warning ......................................................................................................... 2-1
2.2 Requirements..................................................................................................................... 2-1
2.3 Layout ................................................................................................................................ 2-2
2.4 Powering Up the Board ...................................................................................................... 2-4
2.5 Backup Power Supply ........................................................................................................ 2-4
2.6 Getting Started ................................................................................................................... 2-4
2.7 AT91SAM9G10-EK Block Diagram.................................................................................... 2-5
Section 3
Board Description .......................................................................................................3-1
3.1 AT91SAM9G10 Microcontroller ......................................................................................... 3-1
3.2 AT91SAM9G10 Block Diagram.......................................................................................... 3-4
3.3 Memory .............................................................................................................................. 3-5
3.4 Clock Circuitry .................................................................................................................... 3-5
3.5 Reset Circuitry.................................................................................................................... 3-5
3.6 Shutdown Controller........................................................................................................... 3-5
3.7 Power Supply Circuitry.......................................................................................................3-5
3.8 Remote Communication..................................................................................................... 3-5
3.9 Audio Stereo Interface .......................................................................................................3-5
3.10 User Interface..................................................................................................................... 3-6
3.11 Debug Interface.................................................................................................................. 3-6
3.12 Expansion Slot ................................................................................................................... 3-6
3.13 PIO Usage ......................................................................................................................... 3-7
Section 4
Configuration Straps...................................................................................................4-1
4.1 Configuration Straps .......................................................................................................... 4-1
Section 5
Schematics .................................................................................................................5-1
5.1 Schematics......................................................................................................................... 5-1

2-2 AT91SAM9G10-EK Evaluation Board User Guide
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Section 6
Errata..........................................................................................................................6-1
6.1 JTAGSEL S5 Footprint Selector ........................................................................................ 6-1
6.2 External Capacitor Values on XIN and XOUT.................................................................... 6-1
Section 7
Revision History..........................................................................................................7-1
7.1 Revision History ................................................................................................................. 7-1

AT91SAM9G10-EK Evaluation Board User Guide 1-1
6479A–ATARM–26-May-09
Section 1
Overview
1.1 Scope
The AT91SAM9G10-EK evaluation kit is an effective platform for evaluating chip performance and
developing code for applications based on the AT91SAM9G10.
This guide is a description of the hardware included in the AT91SAM9G10-EK evaluation kit. Software
files are available embedded into the board’s memory upon delivery.
1.2 Deliverables
The AT91SAM9G10-EK package contains the following items:
an AT91SAM9G10-EK board
one A/B-type USB cable
one serial RS232 cable
one RJ45 crossed Ethernet cable
universal input AC/DC power supply with US and EU plug adapter
1.3 The AT91SAM9G10-EK Evaluation Board
The board is equipped with an AT91SAM9G10 (217-ball LFBGA package) together with the following:
64 Mbytes of SDRAM memory
256 Mbytes of NAND Flash memory
one Atmel®serial DataFlash®
one USB device port interface
two USB host port interfaces
one DBGU serial communication port
JTAG/ICE debug interface
one Ethernet 100-base TX with three status LEDs
one Atmel AT73C213 Audio DAC
one 3.5" 1/4 VGA TFT LCD Module with TouchScreen and backlight
one Power LED and two general-purpose LEDs
four user input pushbuttons
one wakeup input pushbutton
one reset pushbutton
one DataFlash SD/MMC card slot

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two expansion footprint connectors (solder side)
one Lithium Coin Cell Battery Retainer for 12 mm cell size
dual pitch prototyping area

AT91SAM9G10-EK Evaluation Board User Guide 2-1
6479A–ATARM–26-May-09
Section 2
Setting Up the AT91SAM9G10-EK
Evaluation Board
2.1 Electrostatic Warning
The AT91SAM9G10-EK evaluation board is shipped in a protective anti-static package. The board must
not be subjected to high electrostatic potentials. In risky ESD environments (e.g. offices with carpet) a
grounding strap or similar protective device should be worn when handling the board. Also, generally
avoid touching the component pins or any other metallic element of the board.
2.2 Requirements
In order to set up the AT91SAM9G10-EK evaluation board, the following items are required:
the AT91SAM9G10-EK evaluation board itself
AC/DC power adapter (5V at 2A), 2.1 mm by 5.5 mm

2-2 AT91SAM9G10-EK Evaluation Board User Guide
6479A–ATARM–26-May-09
2.3 Layout
C112
R30
R29
BP5
C124
C125
R72
L5
C84 R83
R82 R75
J13
19
20
1
C115
J23
1
J20
BP6
J10
TP2
C4
J2
C3
1
C1
R6
1
MN1
C9
C2
R2
CR1
J1
TP1
R5
Q2 Q1
J3
DS1
k
1
C91
C93
C92
R20
C95C94
MN13
1
J21
1
TP4
MN7
C16
J15
J7
BP2
BP1
MN10
J9
J24
C126
1
S7
S9
Y1
Y2
C20
R12
S8
C17
J18
J4
1
C19
MN3
R11
R9
C11
1
1
R55
A4
B4
MN6B
R19
C59
11
C52
A1
C45
C56
J8
J5
J12
1
R54
A1
B1
MN6A
MN4
C51
C46
C53
R18
C55
C49
MN5
C57
C48
1
TP3
R63
MN2
C10
R66
R65
R64
R62
R4
R3
C60
R32
R28
R27
C68
C44
DS4
C50
DS3 DS2
C47
DS8 DS7
C54
C7
MN14
C8
Q5
J19
R34
C69
1
R23
k k
k
C72
k
k
C110
C102
BP3
C67
C66
MN8
C70
C111
R68
MN15
J6
Y3
R31
C74 C75
C73
R81
R80
R78 R77
R76 R73
C107
RR1
1
2
BP4
TP66
TP65
TP64 TP63
1
MN16
MN11
1
C123
C122
C121
C120
R79
R84
R74
Q6
C113
R26
R25
C87
GND
3.3V
5V ONLY
WARNING
GND
1
POWER
FORCE
3.3V
3.3V
LED
POWER
ON
GND
5V
3.3V
5V
0
GND
DATAFLASH
PORT B
20 16 12
18 14 10
8
6
4
2
2
GND
28 24
4 0
30 26 22
PORT A
22 18 14 10
6
24 20 16 12
8
8 4 0
30 26
6 2
GND
28
PORT C
28 24 20 16 12
26 22 18 14 10
3.3V
VDDBU
NRST
GND
GND GND GND
NC
30
5V
PORT
DEBUG
SERIAL
GND
GND
1
21 17 13
9
19 15 11
7
53
3
29 25
5 1
1
31 27 23
GND
23 19 15 11
7
25 21 17 13
9
9 5
1
31
27
7 3
29
GND
29 25 21 17 13
27 23 19 15 11
NC
31
WKUP SHDN
3.3V
GND
GND
GND GND
5V
EXT. CLOCK
1.2V
BB
VDDBU
ETM TRACE PORT
UP
WAKE
RESET
USB HOST INTERFACE
SELECT
BOOT MODE
VDDOSC+VDDPLL
1.2V
NANDFLASH
VDDCORE
USB DEVICE INTERFACE
SPEED
DUPLEX
FULL
ACT
&
LINK
TOUCH SCREEN
CONTROLLER
CONNECTOR
JTAG/ICE
AT91SAM9261-EK
10/100
ETHERNET
AUDIO OUT
STUDIEL
WWW.STUDIEL.FR
Figure 2-1. AT91SAM9G10-EK Layout - Top View

R15
R1
R53
R52
C58
J16
S21
S12
R17
R16
CR2
C38
C43
C40
R13
C22
C37
C36
C25
C23
C27
C39
C18
C15
C14
C13
R10
R7
R14
C31
C30
C29
C24
C26
C42
C41
C21
C28
R8
C12
R59
R58
R56
C99
C96
R60
C100
S13
C33
C32
C35
C34
S10
F2
F1
R57
C98
C97
R61
C101
C6
S22
C104
J17
C5
C106
C105
C103
S16
S14
S15
R24
R22 R21
R70
S19
R50
S20
R51
C71
C79 S23
R67
L4
S2
S5
R71
C78
L2
C77
C117 C116
C119 C118
C109
C108
C114
R69
S6
C76
S26
S24
S25
L1
S3
S4
J22
C63
C62
C61
C64
119
1
2
120
1
79
2
80
INTERFACE
DATAFLASH CARD
SD CARD/MMC CARD
R85
AT91SAM9G10-EK Evaluation Board User Guide 2-3
6479A–ATARM–26-May-09
Figure 2-2. AT91SAM9G10-EK Layout - Bottom View

2-4 AT91SAM9G10-EK Evaluation Board User Guide
6479A–ATARM–26-May-09
2.4 Powering Up the Board
AT91SAM9G10-EK requires 5V DC (±5%). DC power is supplied to the board via the 2.1 mm by 5.5 mm
socket (J1). The coaxial power plug center pin is positive polarity.
2.5 Backup Power Supply
The user has the possibility to add a battery (3V Lithium Battery CR1225 or equivalent) in order to per-
manently power the backup part of the device. In this case, J9 configuration must to be set in position 1,
2.
Refer to Table 4-1, “Configuration Jumpers and Straps”.
2.6 Getting Started
The AT91SAM9G10-EK evaluation board is delivered with an embedded demo and documentation files
allowing the user to begin evaluating the AT91 ARM Thumb 32-bit microcontroller quickly. Simply power
the board and connect it to the USB port of your PC to open it. Also, please refer to the AT91 web site,
www.atmel.com/products/AT91/, for the most up-to-date information on getting started with the
AT91SAM9G10-EK.

AT91SAM9G10-EK Evaluation Board User Guide 2-5
6479A–ATARM–26-May-09
2.7 AT91SAM9G10-EK Block Diagram
1V2
1V2
1V2
3V3
3V3
POWER SUPPLY
SHUTDOWN
VDDCORE
5 VDC
VDDPLL VDDOSC
VDDBU GNDBU
WKUP
SYSTEM CONTROLLER
DDP
DDM
SHDN
NRST
PIO
EXT CLK INPUT
18.432 MHz
XIN
XOUT
SPI0_NPCS0
DATAFLASH
DEVICE
CS
SPI0
MISO - MOSI - SPCK
AT91SAM9G10
1/4 VGA DISPLAY
LCD CONTROLLER
EBI
SDRAM
16 16
320 x 240
USB HOST
USB DEVICE
HDMA - HDPA
HDMB - HDPB
3V3
VDD3V3
USER'S GREEN LED
EXPANSION CONNECTORS
LCD CONTROL
YELLOW POWER LED
EBI
256 Mb
SDRAM
256 Mb
32
JTAG/ICE
ADM3202A
DBGU
DBGU
DRXD - DTXD TXD
RXD
RS232
VDDIO
ETM
TRACE PORT
PA11..PA31
PIO
LINEAR REGULATOR
REG
1V2
ETHERNET 10/100
EMAC + PHY
RJ45
TFT
WITH TOUCHSCREEN
SD/MMC
DATAFLASH
MCI
CARD READER
SPI0
SPI0_NPCS2
CONTROLLER
TOUCHSCREEN
NANDFLASH
8
SCC1 I2S
OUT
AT73C213
HEADPHONE
SCC1
PA29 / SPI0_NPCS3
STEREO
AUDIO DAC
SHUTDOWN
SPI0_NPCS3 / PA6
1.2V
+
3V
NRST
   
85 764
32
19
5V5V
1
2
3
1
2
3
Figure 2-3. Block Diagram

2-6 AT91SAM9G10-EK Evaluation Board User Guide
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AT91SAM9G10-EK Evaluation Board User Guide 3-1
6479A–ATARM–26-May-09
Section 3
Board Description
3.1 AT91SAM9G10 Microcontroller
Incorporates the ARM926EJ-S™ ARM Thumb Processor
– DSP Instruction Extensions
– ARM Jazelle®Technology for Java®Acceleration
– 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer
– 266 MHz core frequency
– Memory Management Unit
– EmbeddedICE™In-circuit Emulation, Debug Communication Channel Support
– Mid-level implementation Embedded Trace Macrocell™
Additional Embedded Memories
– 32K Bytes of Internal ROM, Single-cycle Access at Maximum Bus Speed
– 160K Bytes of Internal SRAM, Single-cycle Access at Maximum Processor or Bus Speed
External Bus Interface (EBI)
– Supports SDRAM, Static Memory, NAND Flash and CompactFlash®
LCD Controller
– RGB Addressing
– Supports Passive or Active Displays
– Up to 16-bits per Pixel in STN Color Mode
– Up to 16M Colors in TFT Mode (24-bit per Pixel), Resolution up to 2048 x 2048
USB
– USB 2.0 Full Speed (12 Mbits per second) Host Double Port
Dual On-chip Transceivers
Integrated FIFOs and Dedicated DMA Channels
– USB 2.0 Full Speed (12 Mbits per second) Device Port
On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs
Bus Matrix
– Handles Five Masters and Five Slaves
– Boot Mode Select Option
– Remap Command
Fully Featured System Controller (SYSC) for Efficient System Management, including
– Reset Controller, Shutdown Controller, Four 32-bit Battery Backup Registers for a Total of 16
Bytes

3-2 AT91SAM9G10-EK Evaluation Board User Guide
6479A–ATARM–26-May-09
– Clock Generator and Power Management Controller
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer and Real-time Timer
– Three 32-bit PIO Controllers
Reset Controller (RSTC)
– Based on Power-on Reset Cells, Reset Source Identification and Reset Output Control
Shutdown Controller (SHDWC)
– Programmable Shutdown Pin Control and Wake-up Circuitry
Clock Generator (CKGR)
– 32.768 kHz Low-power Oscillator on Battery Backup Power Supply, Providing a Permanent Slow
Clock
– 3 to 20 MHz On-chip Oscillator and two PLLs
Power Management Controller (PMC)
– Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities
– Four Programmable External Clock Signals
Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Three External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
Debug Unit (DBGU)
– 2-wire USART and Support for Debug Communication Channel, Programmable ICE Access
Prevention
Periodic Interval Timer (PIT)
– 20-bit Interval Timer plus 12-bit Interval Counter
Watchdog Timer (WDT)
– Key Protected, Programmable Only Once, Windowed 12-bit Counter, Running at Slow Clock
Real-Time Timer (RTT)
– 32-bit Free-running Backup Counter Running at Slow Clock
Three 32-bit Parallel Input/Output Controllers (PIO) PIOA, PIOB and PIOC
– 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
Nineteen Peripheral DMA (PDC) Channels
Multimedia Card Interface (MCI)
– Compliant with Multimedia Cards and SDCards
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC, MMC and SDCard
Compliant
Three Synchronous Serial Controllers (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
Three Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA®Infrared Modulation/Demodulation

AT91SAM9G10-EK Evaluation Board User Guide 3-3
6479A–ATARM–26-May-09
– Support for ISO7816 T0/T1 Smart Card, Hardware and Software Handshaking, RS485 Support
Two Master/Slave Serial Peripheral Interface (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
One Three-channel 16-bit Timer/Counters (TC)
– Three External Clock Inputs, Two multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
Two-wire Interface (TWI)
– Master Mode Support, All Two-wire Atmel EEPROMs Supported
IEEE®1149.1 JTAG Boundary Scan on All Digital Pins
Required Power Supplies:
– 1.08V to 1.32V for VDDCORE and VDDBU
– 3.0V to 3.6V for VDDOSC and for VDDPLL
– 2.7V to 3.6V for VDDIOP (Peripheral I/Os)
– 1.65V to 1.95V and 3.0V to 3.6V for VDDIOM (Memory I/Os)
Available in a 217-ball LFBGA RoHS-compliant Package

3-4 AT91SAM9G10-EK Evaluation Board User Guide
6479A–ATARM–26-May-09
3.2 AT91SAM9G10 Block Diagram
Figure 3-1. Block Diagram
PIO
ID
ID
SSC0
SSC1
SSC2
Timer Counter
TC0
TC1
TC2
TWI
LCD Controller
DMA
FIFO
LUT
DMA FIFO
USB Host
FIFO
USB Device
ARM926EJ-S Core
JTAG
Boundary Scan ICE
AIC
Fast SRAM
160K bytes
PIO
Instruction Cache
16K bytes
Fast ROM
32K bytes
Peripheral
Bridge
Peripheral
DMA
Controller
PLLA
PLLB
ITCM DTCM
TCM
Interface
PMC
RSTC
OSC
PIOA PIOB PIOC
RTT
SHDWC
POR
OSC
WDT
GPBREG
PIT
POR
EBI
Static
Memory
Controller
PIO
Data Cache
16K bytes
MMU
PIO
5-layer
Matrix
ETM
CompactFlash
NAND Flash
SDRAM
Controller
BIU
PIO PIO
Transceiver
Transceiver
PDC
PDC
PDC
APB
DBGU
MCI
USART0
USART1
USART2
SPI0
SPI1
PDC
PDC
PDC
PDC
PDC
PDC
PDC
System Controller
TF0
TK0
TD0
RD0
RK0
RF0
TF1
TK1
TD1
RD1
RK1
RF1
TF2
TK2
TD2
RD2
RK2
RF2
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
TWD
TWCK
LCDD0-LCDD23
LCDVSYNC
LCDHSYNC
LCDDOTCK
LCDDEN
LCDCC
MCCK
MCCDA
MCDA0-MCDA3
RXD0
TXD0
SCK0
RTS0
CTS0
RXD1
TXD1
SCK1
RTS1
CTS1
RXD2
TXD2
SCK2
RTS2
CTS2
SPI0_NPCS0
SPI0_NPCS1
SPI0_NPCS2
SPI0_NPCS3
SPI0_MISO
SPI0_MOSI
SPI0_SPCK
SPI1_NPCS10
SPI1_NPCS1
SPI1_NPCS12
SPI1_NPCS3
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
D0-D15
A0/NBS0
A2-A15/A18-A21
A16/BA0
A17/BA1
NCS0
NCS1/SDCS
NCS3/NANDCS
NRD/CFOE
NWR0/NWE/CFWE
NWR1/NBS1/CFIOR
NWR3/NBS3/CFIOW
SDCK
SDCKE
RAS-CAS
SDWE
SDA10
A23-A24
NCS5/CFCS1
BMS
NCS2
A25/CFRNW
NCS4/CFCS0
NCS6/NANDOE
NCS7/NANDWE
TSYNC
TCLK
TPS0-TPS2
TPK0-TPK15
D16-D31
A1/NBS2/NWR2
NWAIT
HDMA
HDPB
HDPA
HDMB
DDM
DDP
CFCE1
CFCE2
JTAGSEL
TDI
TDO
RTCK
TMS
TCK
NTRST
FIQ
IRQ0-IRQ2
PLLRCB
PLLRCA
DRXD
DTXD
XIN32
XOUT32
NRST
PCK0-PCK3
SHDN
WKUP
GNDBU
XIN
XOUT
VDDBU
VDDCORE
TST
A22/REG

AT91SAM9G10-EK Evaluation Board User Guide 3-5
6479A–ATARM–26-May-09
3.3 Memory
32 Kbytes of Internal ROM
160 Kbytes of Internal High-speed SRAM
Atmel serial DataFlash
64 Mbytes of SDRAM memory
256 Mbytes of NAND Flash memory
3.4 Clock Circuitry
18.432 MHz standard crystal for the embedded oscillator
32.768 kHz standard crystal for the slow clock oscillator
3.5 Reset Circuitry
Internal reset controller with a bi-directional reset pin
External reset push button
3.6 Shutdown Controller
Programmable shutdown and Wake-Up
Wake-up push button
3.7 Power Supply Circuitry
For dynamic power consumption, the AT91SAM9G10 consumes a maximum of 50 mA on VDDCORE
at maximum speed in typical conditions (1.2V, 25°C), processor running full-performance algorithm
On-board 1.2V high efficiency step-down charge pump regulator with shutdown control
On-board 3.3V linear regulator with shutdown control
3.8 Remote Communication
One Serial interface (DBGU COM Port) via RS-232 DB9 male socket
USB V2.0 Full-speed Compliant, 12 Mbits per second (UDP)
Two USB Host port V2.0 Full-speed Compliant, 12 Mbits per second (UHP)
One Ethernet 100-base TX with three status LEDs
3.9 Audio Stereo Interface
One Atmel stereo audio DAC AT73C213
One 32 Ohm/20 mW Stereo Headset output (J20) with Master Volume and Mute Controls

3-6 AT91SAM9G10-EK Evaluation Board User Guide
6479A–ATARM–26-May-09
3.10 User Interface
Four user input pushbuttons
Two user green LEDs
One yellow power LED (can be also software controlled)
One ¼ VGA display LCD with Touchscreen and white LED backlight
3.11 Debug Interface
20-pin JTAG/ICE interface connector
DBGU COM Port
3.12 Expansion Slot
One DataFlash, SD/MMC card slot
All I/Os of the AT91SAM9G10 are routed to peripheral extension footprint connectors (J16 and J17).
This allows the developer to check the integrity of the components and to extend the features of the
board by adding external hardware components or boards.

AT91SAM9G10-EK Evaluation Board User Guide 3-7
6479A–ATARM–26-May-09
3.13 PIO Usage
Table 3-1. PIO Controller A
I/O Line Peripheral A Peripheral B Comments
PA0 SPI0_MISO MCDA0 SD/MMC/DATAFLASH SOCKET (J9) & DATAFLASH DEVICE &
TOUCH SCREEN CONTROLLER & AUDIO DAC
SPI0_MISO or
MCI0_DA0
PA1 SPI0_MOSI MCCDA SD/MMC/DATAFLASH SOCKET (J9) & DATAFLASH DEVICE &
TOUCH SCREEN CONTROLLER & AUDIO DAC
SPI0_MOSI or
MCI0_CDA
PA2 SPI0_SPCK MCCK SD/MMC/DATAFLASH SOCKET (J9) & DATAFLASH DEVICE &
TOUCH SCREEN CONTROLLER & AUDIO DAC
SPI0_SPCK or
MCCK
PA3 SPI0_NPCS0 DATAFLASH DEVICE or DATAFLASH SOCKET (J9) SPI0_NPCS0
PA4 SPI0_NPCS1 MCDA1 SD/MMC/DATAFLASH SOCKET (J9) MCDA1
PA5 SPI0_NPCS2 MCDA2 SD/MMC/DATAFLASH SOCKET (J9) MCDA2
PA6 SPI0_NPCS3 MCDA3 SD/MMC/DATAFLASH SOCKET (J9) SPI0_NPCS3 or
MCDA3
PA7 TWD PCK0
PA 8 T W C K P C K 1
PA9 DRXD PCK2 SERIAL DEBUG PORT (J15) DRXD
PA10 DTXD PCK3 SERIAL DEBUG PORT (J15) DTXD
PA11 TSYNC SCK1 TOUCH SCREEN CONTROLLER (MN16) BUSY PA11
PA12 TCLK RTS1 TFT PANEL CONTROL (J23) POWER CONTROL IN PA12
PA13 TPS0 CTS1 GREEN USER'S LED 1 (DS8) PA13
PA14 TPS1 SCK2 GREEN USER'S LED 2 (DS7) PA14
PA15 TPS2 RTS2
PA16 TPK0 CTS2
PA17 TPK1 TF1 I2S AUDIO DAC AT73C213 (MN15) LRFS TF1
PA18 TPK2 TK1 I2S AUDIO DAC AT73C213 (MN15) BCLK TK1
PA19 TPK3 TD1 I2S AUDIO DAC AT73C213 (MN15) SDIN TD1
PA20 TPK4 RD1
PA21 TPK5 RK1
PA22 TPK6 RF1
PA23 TPK7 RTS0 YELLOW POWER LED CONTROL (DS1) PA23
PA24 TPK8 SPI1_NPCS1 USER'S PUSH BUTTON INPUT (BP6) PA24
PA25 TPK9 SPI1_NPCS2 USER'S PUSH BUTTON INPUT (BP5) PA25
PA26 TPK10 SPI1_NPCS3 USER'S PUSH BUTTON INPUT (BP4) PA26
PA27 TPK11 SPI0_NPCS1 USER'S PUSH BUTTON INPUT (BP3) PA27
PA28 TPK12 SPI0_NPCS2 TOUCH SCREEN CONTROLLER (MN16) SPI0_NPCS2
PA29 TPK13 SPI0_NPCS3 I2S AUDIO DAC AT73C213 (MN15) SPI0_NPCS3
PA30 TPK14 A23
PA31 TPK15 A24

3-8 AT91SAM9G10-EK Evaluation Board User Guide
6479A–ATARM–26-May-09
Table 3-2. PIO Controller B
I/O Line Peripheral A Peripheral B Comments
PB0 LCDVSYNC
PB1 LCDHSYNC TFT PANEL CONTROL (J23) LCDHSYNC
PB2 LCDDOTCK PCK0 TFT PANEL CONTROL (J23) LCDDOTCK
PB3 LCDDEN TFT PANEL CONTROL (J23) LCDDEN
PB4 LCDCC LCDD2 TFT PANEL CONTROL (J23) BACKLIGHT LCDCC
PB5 LCDD0 LCDD3
PB6 LCDD1 LCDD4
PB7 LCDD2 LCDD5 TFT PANEL CONTROL (J23) LCDD2 RED
PB8 LCDD3 LCDD6 TFT PANEL CONTROL (J23) LCDD3 RED
PB9 LCDD4 LCDD7 TFT PANEL CONTROL (J23) LCDD4 RED
PB10 LCDD5 LCDD10 TFT PANEL CONTROL (J23) LCDD5 RED
PB11 LCDD6 LCDD11 TFT PANEL CONTROL (J23) LCDD6 RED
PB12 LCDD7 LCDD12 TFT PANEL CONTROL (J23) LCDD7 RED
PB13 LCDD8 LCDD13
PB14 LCDD9 LCDD14
PB15 LCDD10 LCDD15 TFT PANEL CONTROL (J23) LCDD10 GREEN
PB16 LCDD11 LCDD19 TFT PANEL CONTROL (J23) LCDD11 GREEN
PB17 LCDD12 LCDD20 TFT PANEL CONTROL (J23) LCDD12 GREEN
PB18 LCDD13 LCDD21 TFT PANEL CONTROL (J23) LCDD13 GREEN
PB19 LCDD14 LCDD22 TFT PANEL CONTROL (J23) LCDD14 GREEN
PB20 LCDD15 LCDD23 TFT PANEL CONTROL (J23) LCDD15 GREEN
PB21 TF0 LCDD16
PB22 TK0 LCDD17
PB23 TD0 LCDD18 TFT PANEL CONTROL (J23) LCDD18 BLUE
PB24 RD0 LCDD19 TFT PANEL CONTROL (J23) LCDD19 BLUE
PB25 RK0 LCDD20 TFT PANEL CONTROL (J23) LCDD20 BLUE
PB26 RF0 LCDD21 TFT PANEL CONTROL (J23) LCDD21 BLUE
PB27 SPI1_NPCS1 LCDD22 TFT PANEL CONTROL (J23) LCDD22 BLUE
PB28 SPI1_NPCS0 LCDD23 TFT PANEL CONTROL (J23) LCDD23 BLUE
PB29 SPI1_SPCK IRQ2 USB DEVICE INTERFACE (J19) USB_CNX PB29
PB30 SPI1_MISO IRQ1
PB31 SPI1_MOSI PCK2 I2S AUDIO DAC AT73C213 (MN15) MCLK PCK2