BBK DL372D User manual

SERVICE MANUAL
DL372D

CONTENTS
1. SAFETY PRECAUTIONS 1
2. PREVENTION OF ELECTRO STATIC DISCHARGE(ESD)TO ELECTROSTATICALLY
SENSITIVE(ES)DEVICES 1
4. PREVERTION OF STATIC ELECTRICITY DISCHARGE 4
5.ELECTRICALCONFIRMATION5
5.1VIDEOOUTPUT(LUMINANCESIGNAL)CONFIRMATION5
5.2VIDEOOUTPUT(CHROMINANCESIGNAL)CONFIRMATION6
6.MPEGBOARDCHECKWAVEFORM7
8.SCHEMATIC&PCBWIRINGDIAGRAM
15
9.SPAREPARTSLIST30
7.2MT13898
7.3HY29LV160 9
7.4HY57V641620HG
14
3. CONTROL BUTTON LOCATIONS AND EXPLANATIONS 2

1.1 GENERAL GUIDELINES
1. When servicing, observe the original lead dress. if a short circuit is found, replace all parts which have
been overheated or damaged by the short circuit.
2. After servicing, see to it that all the protective devices such as insulation barrier, insulation papers
shields are properly installed.
3. After servicing, make the following leakage current checks to prevent the customer from being exposed
to shock hazards.
Some semiconductor(solid state)devices can be damaged easily by static electricity. Such components
commonly are called Electrostatically Sensitive(ES)Devices. Examples of typical ES devices are integrated
circuits and some field-effect transistors and semiconductor chip components. The following techniques
should be used to help reduce the incidence of component damage caused by electro static discharge(ESD).
1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain
off any ESD on your body by touching a known earth ground. Alternatively, obtain and wear a commercially
availabel discharging ESD wrist strap, which should be removed for potential shock reasons prior to
applying power to the unit under test.
2. After removing an electrical assembly equipped with ES devices,place the assembly on a conductive
surface such as alminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES devices.
4. Use only an anti-static solder removal device. Some solder removal devices not classified as anti-static
(ESD protected)can generate electrical charge sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES
devices.
6. Do not remove a replacement ES device from its protective package until immediately before you are
ready to install it.(Most replacement ES devices are packaged with leads electrically shorted together by
conductive foam, alminum foil or comparable conductive material).
7. Immediately before removing the protective material from the leads of a replacement ES device, touch
the protective material to the chassis or circuit assembly into which the device will be installed.
Caution
Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion
such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can
generate static electricity(ESD).
notice (1885x323x2 tiff)

Control Button Locations and Explanations
1Color TFT LCD
2
Speakers
3
4
LEFT direction arrow
5
6
9
IR sensor
7
Power indicator
8
PREV Button
REW Button
10
PLAY button / PAUSE button
11
RIGHT direction arrow
12
UP direction arrow
15
13
14
OPEN/CLOSE button
DOWN direction arrow
17
P/N button
18
20
MENU Button
19
21
SETUP Button
NEXT Button STOP button
PICTURE button
SELECT button
Keyboard Button
16
Forward Button
1
2
3
4
5
6
7
8
9
10
12
21
20
19
18
17
16
15
14
13
11

Remote Control Illustration
3
2
5
6
7
8
9
12
11
13
14
16
33
22
20
18
21
19
23
24
28
27
25
26
15
17
4
31
32
30
29
10
35
34
Switch new user interface.
BROWSER
18
LOGO Button
Change the audio language or
audio channel.
Set the played image as the power-on logo.
AUDIO Button
2
Play from the desired location.
GOTO button
3
Zoom in /out the displayed frame.
ZOOM Button
4
Fast forward play.
FWD Button
14
Change camera angles, MP3/JPEG
playback modes switch.
ANGLE Button
5
Press once to mute, twice to unmute.
6MUTE button
DVD titles.
TITLE button
7
Fast backward play.
REW Button
13
Function setup.
10
SETUP Button
Normal playback.
PLAY Button
11
Stop playback.
STOP Button
12
8CURSOR Buttons
SELECT Button
9
Fall tone.
KEY Button
15
Switch the TV system between
PAL, NTSC and AUTO.
P/N Button
17
Rise tone.
KEY Button
16
Adjusting sound field effects.
SF Button
19
Adjusting equalization effects.
EQ Button
20
Decrease volume.
VOLUME-
21
Increase volume.
VOLUME+
22
Slow play.
SLOW Button
26
Skip forward.
NEXT Button
24
25
PAUSE/STEP Button
Pause or play frame by frame.
Skip backward.
PREV Button
23
A-B Button
28
Repeat the select.
Display DVD menu or open/close PBC.
27 MENU Button
Display or hide disc information.
OSD Button
35
REPEAT Button
29
Repeat play.
27
31
NUMBER Buttons
27
33
Change subtitle languages/
Switch JPEG display modes.
SUBTITLE Button
34
Back to the previous menu/Clearing input
numbers.
30 RETURN Button
Set video.
27
32 PIC Button
Skip the advertisement/warning and play
DVD directly.
Q-PLAY Button

The laser diode in the traverse unit (optical pickup)may brake down due to static electricity of clothes or human
body.Use due caution to electrostatic breakdown when servicing and handling the laser diode.
4.1.Grounding for electrostatic breakdown prevention
Some devices such as the DVD player use the optical pickup(laser diode)and the optical pickup will be damaged
by static electricity in the working environment.Proceed servicing works under the working environment where
grounding works is completed.
4.1.1. Worktable grounding
1. Put a conductive material(sheet)or iron sheet on the area where the optical pickup is placed,and ground the
4.1.2.Human body grounding
1 Use the anti-static wrist strap to discharge the static electricity from your body.
4.1.3.Handling of optical pickup
1. To keep the good quality of the optical pickup maintenance parts during transportation and before
installation, the both ends of the laser diode are short-circuited.After replacing the parts with new ones,
remove the short circuit according to the correct procedure. (See this Technical Guide).
2. Do not use a tester to check the laser diode for the optical pickup .Failure to do so willdamage the laser
diode due to the power supply in the tester.
4.2. Handling precautions for Traverse Unit (Optical Pickup)
1. Do not give a considerable shock to the traverse unit(optical pickup)as it has an extremely high-precise
structure.
2. When replacing the optical pickup, install the flexible cable and cut is short land with a nipper. See the
optical pickup replacement procedure in this Technical Guide. Before replacing the traverse unit, remove
the short pin for preventingstatic electricity and install a new unit.Connect the connector as short times as
possible.
3. The flexible cable may be cut off if an excessive force is applied to it.Use caution when handling the cable.
4. The half-fixed resistor for laser power adjustment cannot be adjusted. Do not turn the resistor.
safety_3 (1577x409x2 tiff)
sheet.

5.1. Video Output (Luminance Signal) Confirmation
DO this confirmation after replacing a P.C.B.
Purpose:To maintain video signal output compatibility.
1.Connect the oscilloscope to the video output terminal and terminate at 75 ohms.
2.Confirm that luminance signal(Y+S)level is 1000mVp-p±30mV
Measurement point
Video output terminal
Color bar 75%
PLAY(Title 46):DVDT-S15
PLAY(Title 12):DVDT-S01
DVDT-S15
or
DVDT-S01
Mode Disc
Measuring equipment,tools
200mV/dir,10 sec/dir 1000mVp-p±30mV
Confirmation value

Do the confirmation after replacing P.C.B.
Purpose:To maintain video signal output compatibility.
1.Connect the oscilloscope to the video output terminal and terminate at 75 ohme.
2.Confirm that the chrominance signal(C)level is 621 mVp-p±30mV
Measurement point
Video output terminal
Color bar 75%
PLAY(Title 46):DVDT-S15
PLAY(Title 12):DVDT-S01
DVDT-S15
or
DVDT-S01
Mode Disc
Measuring equipment,tools Confirmation value
Screwdriver,Oscilloscope
200mV/dir,10 sec/dir 621mVp-p±30mV

MT1389
Progressive-Scan DVD Player SOC
Specifications are subject to change without notice
MediaTek MT1389 is a DVD player system-on-chip (SOC) which incorporates advanced features like high
quality TV encoder and state-of-art de-interlace processing. The MT1389 enables consumer electronics
manufacturers to build high quality, cost-effective DVD players, portable DVD players or any other home
entertainment audio/video devices.
Based on MediaTek’s world-leading DVD player SOC architecture, the MT1389 is the 3rd generation of the DVD
player SOC. It integrates the MediaTek 2nd generation front-end analog RF amplifier and the Servo/MPEG AV
decoder.
The progressive scan of the MT1389 utilized a proprietary advanced motion-adaptive de-interlace algorithm to
achieve the best movie/video playback. It can easily detect 3:2/2:2 pull down source and restore the correct
original pictures. It also supports a patent-pending edge-preserving algorithm to remove the saw-tooth effect.
MT1389E
DVD
PUH
Module
FLASH
SDRAM
CVBS, Y/C,
Component
SDPIF
Front-panel
Remote
Audio L
DVD Player System Diagram Using MT1389
Key Features
 RF/Servo/MPEG Integration
 High Performance Audio Processor
 Motion-Adaptive, Edge-Preserving De-interlace
 108MHz/12-bit, 6 CH TV Encoder
Applications
 Standard DVD Players
 Portable DVD Players
Audio R

KEY FEATURES
nn
nn
nSingle Power Supply Operation
– Read, program and erase operations from
2.7 to 3.6 volts
– Ideal for battery-powered applications
nn
nn
nHigh Performance
– 70, 80, 90 and 120 ns access time
versions
nn
nn
nUltra-low Power Consumption (Typical
Values At 5 Mhz)
– Automatic sleep mode current: 1 µA
– Standby mode current: 1 µA
– Read current: 9 mA
– Program/erase current: 20 mA
nn
nn
nFlexible Sector Architecture:
– One 16 KB, two 8 KB, one 32 KB and
thirty-one 64 KB sectors in byte mode
– One 8 KW, two 4 KW, one 16 KW and
thirty-one 32 KW sectors in word mode
– Top or bottom boot block configurations
available
nn
nn
nSector Protection
– Allows locking of a sector or sectors to
prevent program or erase operations
within that sector
– Sectors lockable in-system or via
programming equipment
– Temporary Sector Unprotect allows
changes in locked sectors (requires high
voltage on RESET# pin)
nn
nn
nFast Program and Erase Times
– Sector erase time: 0.25 sec typical for
each sector
– Chip erase time: 8 sec typical
– Byte program time: 9 µs typical
nn
nn
nUnlock Bypass Program Command
– Reduces programming time when issuing
multiple program command sequences
nn
nn
nAutomatic Erase Algorithm Preprograms
and Erases Any Combination of Sectors
or the Entire Chip
nn
nn
nErase Suspend/Erase Resume
– Suspends an erase operation to allow
reading data from, or programming data
to, a sector that is not being erased
– Erase Resume can then be invoked to
complete suspended erasure
nn
nn
nAutomatic Program Algorithm Writes and
Verifies Data at Specified Addresses
Preliminary
Revision 1.0, June 2000
A[19:0]
20
CE#
OE#
RESET#
BYTE#
WE#
8
7
DQ[7:0]
DQ[14:8]
DQ15/A-1
RY/BY#
LOGIC DIAGRAM
nn
nn
n100,000 Write Cycles per Sector Minimum
nn
nn
nData# Polling and Toggle Bits
– Provide software confirmation of
completion of program and erase
operations
nn
nn
nReady/Busy# Pin
– Provides hardware confirmation of
completion of program and erase
operations
nn
nn
nHardware Reset Pin (RESET#) Resets the
Device to Reading Array Data
nn
nn
nCompliant With Common Flash Memory
Interface (CFI) Specification
– Flash device parameters stored directly
on the device
– Allows software driver to identify and use
a variety of different current and future
Flash products
nn
nn
nCompatible With JEDEC standards
– Pinout and software compatible with
single-power supply Flash devices
– Superior inadvertent write protection
nn
nn
nSpace Efficient Packaging
– 48-pin TSOP and 48-ball FBGA packages
HY29LV160
16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory

3
HY29LV160
Rev. 1.0/Jun 00
BLOCK DIAGRAM
STATE
CONTROL
WE#
CE#
OE#
BYTE#
COMMAND
REGISTER
DQ[15:0]
A[19:0], A-1
V
CC
DETECTOR TIMER
ERASE VOLTAGE
GENERATOR AND
SECTOR SWITCHES
PROGRAM
VOLTAGE
GENERATOR
ADDRESS LATCH
X-DECODER
Y-DECODER
16 Mb FLASH
MEMORY
ARRAY
Y-GATING
DATA LATCH
I/O BUFFERS
I/O CONTROL
RESET#
DQ[15:0]
A[19:0], A-1
RY/BY#
SIGNAL DESCRIPTIONS
emaN epyT noitpircseD
]0:91[AstupnI .hgiHevitca,sserddA nitupni]1-[A/]51[QDehthtiwdenibmoc,stupni02esehT .snoitarepoetirwrodaerrofyarraehtnihtiwnoitacolenotceles,edometyB
,]1-[A/]51[QD ]0:41[QD stuptuO/stupnI etats-irT
hgiHevitca,suBataD daerrofhtapatadtib-61ro-8naedivorpsnipesehT. tib-12ehtfoBSLehtsadesusi]1-[A/]51[QD,edometyBnI.snoitarepoetirwdna .edometyBnidetats-irtniamerdnadesunuera]8:41[QD.tupnisserddaetyb
#ETYBtupnI .woLevitca,edoMetyB .edomdroWstceleshgiH,edometyBstceleswoL
#ECtupnI .woLevitca,elbanEpihC romorfataddaerotdetressaebtsumtupnisihT ehtdnadetats-irtsisubatadeht,hgiHnehW.061VL92YHehtotatadetirw .edomybdnatSehtnidecalpsiecived
#EOtupnI woLevitca,elbanEtuptuO rofdetagendnasnoitarepodaerrofdetressA. gniruddaersidrowaroetybarehtehwsenimreted#ETYB.snoitarepoetirw .noitarepodaereht
#EWtupnI .woLevitca,elbanEetirW secneuqesdnammocrosdnammocfognitirwslortnoC noitarepoetirwA.yarrayromemehtfosrotcesesareroatadmargorpotredroni hgiHsi#EOdnawoLsi#ECelihwdetressasi#EWnehwecalpsekat.
#TESERtupnI
.woLevitca,teseRerawdraH ehtgnitteserfodohtemerawdrahasedivorP yletaidemmiti,tesersiecivedehtnehW.etatsyarradaerehtot061VL92YH ecivedeht,detressasi#TESERelihW.ssergorpninoitarepoynasetanimret .edomybdnatSehtnieblliw
#YB/YR tuptuO niarDnepO
.sutatSysuB/ydaeR nisidnammocesareroetirwarehtehwsetacidnI ylevitcasiecivedehtelihwwoLsniameR.detelpmocneebsahrossergorp .atadyarradaerotydaersitinehwhgiHseogdna,gnisareroatadgnimmargorp
V
CC
-- .ylppusrewop)lanimon(tlov-3
V
SS
-- .dnuorglangisdnarewoP

4
HY29LV160
Rev. 1.0/Jun 00
PIN CONFIGURATIONS
A6 B6 C6 D6 E6 F6 G6
H6
A5 B5 C5 D5 E5 F5 G5 H5
A4 B4 C4
D4
E4 F4 G4 H4
A3 B3 C3
D3
E3 F3 G3 H3
A2 B2 C2 D2 E2 F2 G2 H2
A1 B1 C1 D1 E1 F1 G1
H1
A[13] A[12] A[14] A[15] A[16] BYTE# DQ[15]/A[-1] V
SS
A[9] A[8] A[10] A[11] DQ[7] DQ[14] DQ[13] DQ[6]
WE# RESET# NC A[19] DQ[5] DQ[12] V
CC
DQ[4]
RY/BY# NC A[18] NC DQ[2] DQ[10] DQ[11] DQ[3]
A[7] A[17] A[6] A[5] DQ[0] DQ[8] DQ[9] DQ[1]
A[3] A[4] A[2] A[1] A[0] CE# OE# V
SS
48-Ball FBGA (Bottom View)
Standard
TSOP48
A[11]
A[10] 5 6
A[9]
A[8] 7 8
A[19]
NC 9 10
WE#
RESET# 11 12
NC
NC 13 14
RY/BY#
A[18] 15 16
A[17]
A[7] 17 18
A[6]
A[5] 19 20
A[15]
A[14] 1 2
A[13]
A[12] 3 4
A[4]
A[3] 21 22
A[2]
A[1] 23 24
DQ[7]
DQ[14]
44
43 DQ[6]
DQ[13]
42
41 DQ[5]
DQ[12]
40
39 DQ[4]
V
CC
38
37 DQ[11]
DQ[3]
36
35 DQ[10]
DQ[2]
34
33 DQ[9]
DQ[1]
32
31 DQ[8]
DQ[0]
30
29
A[16]
BYTE#
48
47 V
SS
DQ[15]/A[-1]
46
45
OE#
V
SS
28
27 CE#
A[0]
26
25

HY57V641620HG
4 Banks x 1M x 16Bit Synchronous DRAM
.
DESCRIPTION
The Hyundai HY57V641620HG is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications which
require large memory density and high bandwidth. HY57V641620HG is organized as 4banks of 1,048,576x16.
HY57V641620HG is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchro-
nized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output
voltage levels are compatible with LVTTL.
Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write cycles initiated
by a single control command (Burst length of 1,2,4,8 or Full page), and the burst count sequence(sequential or interleave). A burst of
read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst
read or write command on any cycle. (This pipelined design is not restricted by a `2N` rule.)
FEATURES
•Single 3.3±0.3V power supply Note)
•All device pins are compatible with LVTTL interface
•JEDEC standard 400mil 54pin TSOP-II with 0.8mm
of pin pitch
•All inputs and outputs referenced to positive edge of
system clock
•Data mask function by UDQM or LDQM
•Internal four banks operation
•Auto refresh and self refresh
•4096 refresh cycles / 64ms
•Programmable Burst Length and Burst Type
- 1, 2, 4, 8 or Full page for Sequential Burst
- 1, 2, 4 or 8 for Interleave Burst
•Programmable CAS Latency ; 2, 3 Clocks

HY57V641620HG
PIN CONFIGURATION
PIN DESCRIPTION
PIN PIN NAME DESCRIPTION
CLK Clock The system clock input. All other inputs are registered to the SDRAM on the
rising edge of CLK
CKE Clock Enable Controls internal clock signal and when deactivated, the SDRAM will be one
of the states among power down, suspend or self refresh
CS Chip Select Enables or disables all inputs except CLK, CKE and DQM
BA0,BA1 Bank Address
Selects bank to be activated during RAS activity
Selects bank to be read/written during CAS activity
A0 ~ A11 Address Row Address : RA0 ~ RA11, Column Address : CA0 ~ CA7
Auto-precharge flag : A10
RAS, CAS, WE Row Address Strobe, Column Address Strobe,
Write Enable
RAS, CAS and WE define the operation
Refer function truth table for details
LDQM, UDQM Data Input/Output Mask Controls output buffers in read mode and masks input data in write mode
DQ0 ~ DQ15 Data Input/Output Multiplexed data input / output pin
VDD/VSS Power Supply/Ground Power supply for internal circuits and input buffers
VDDQ/VSSQ Data Output Power/Ground Power supply for output buffers
NC No Connection No connection
VSS
DQ15
VSSQ
DQ14
DQ13
VDDQ
DQ12
DQ11
VSSQ
DQ10
DQ9
VDDQ
DQ8
VSS
NC
UDQM
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
VDD
LDQM
/WE
/CAS
/RAS
/CS
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD
54pin TSOP II
400mil x 875mil
0.8mm pin pitch

HY57V641620HG
FUNCTIONAL BLOCK DIAGRAM
1Mbit x 4banks x 16 I/O Synchronous DRAM
X decoders
State Machine
A0
A1
A11
BA0
BA1
Address buffers
Address
Registers
Mode Registers
Row
Pre
Decoders
Column
Pre
Decoders
Column Add
Counter
Row active
Column
Active
Burst
Counter
Data Out Control
CAS Latency
Internal Row
counter
DQ0
DQ1
DQ14
DQ15
refresh
Self refresh logic
& timer
Pipe Line Control
I/O Buffer & Logic
Bank Select
Sense AMP & I/O Gate
CLK
CKE
CS
RAS
CAS
WE
UDQM
LDQM
1Mx16 Bank 3
X decoders
X decoders
Memory
Cell
Array
Y decoders
X decoders
1Mx16 Bank 0
1Mx16 Bank 1
1Mx16 Bank 2

１ ２ ３ ４ ５６
１２ ３ ４ ５ ６
Ａ Ｂ Ｃ Ｄ Ｅ Ｆ
Ａ Ｂ Ｃ Ｄ Ｅ
Ｆ
广东步步高电子工业有限公司ＡＶ厂
ＢＢＫ
更改 数量 更改单号 签 名 日期
设 计 审 核
批 准
第 ２ 张 共 ５张 版次：
标准化
比例 质量 数量
板号：
1.0
DL369
2 3 4 1 5 6 8 9 10 7 11 12 14 15 16 13 17 18 20 21 22 19 23 24
XS101 24P0.5mm
C107 104 L103 10uH L104 10uH
C112 104
TC101 220uF/10V
C106 104
AVCC
E A
VD104 2SB1132-S
VD105 2SB1132-S
R105 4R7
R106 4R7
TC103 47uF/6.3V
TC104
47uF/6.3V
LDO-AV33
LDO-AV33
LDO2
LDO1
GND
MDI1
GND
F B RFO IOA D C V20
R102 10K
R101 100K
R103 10K R104 100K
VD102
2SK3018-S
VD103
2SK3018-S
VD101 3904-S
IOA
AVCC
GND
DV33
L102 102BED
R122
20K
R120 10K
R121 20K
C111 151
C110 104
C114 104
C108 104
TC106 220uF/10V
GND
R118 1R
R119 1R
R116 20K
R115 1R
R114 1R
C109 151
VINFC 1
CF1 2 CF2 3
VINSL+ 4 VINSL- 5
VOSL 6
VINFFC 7
GND 30
VCC 8
PVCC1 9
PGND 10
VOSL- 11
VO2+ 12
VOFC- 13 VOFC+ 14
VOTK+
15
VOTK-
16
VOLD+
17
VOLD-
18
PGND
19
VNFTK
20
PVCC2
21
GND 29
PREGND
22
VINLD
23
CTK2
24
CTK1
25
VINTK
26
BIAS
27
STBY
28
U101 BA5954
TRSO V1P4 STBY
SL+ SL- FMSO
MO_VCC
MO_VCC
SP- USP+
V1P4 FOSO
DMSO
L105 10UH
+5.5V
R117 10K R108 DNS
R111 150K
R107 150K
R113 680K
R110 680K R112 0R C104 222
C113 222
R109 1R
ADIN OP- OP+ V1P4 OPO
C105
DNS
GND
T-
T- T+
T+ F+
F+ F-
F-
TC102 220uF/10V
GND
USP-
SP+ LIMIT SL- SL+
R702 10R
GND
2
VCC
3
OUT
1
U701 HS0038B
C702 104
R703 100R
IR
TC701 47uF/6.3V
IR遥控 输入电路
DC/NC
1
RST_/NC
2
WP/RST_
3
VSS
4
VCC 8
RST/WP 7
SCL 6
SDA 5
U204
AT24C16X4050
SDA SCL
C264 104
DV33
GND
GND
R230 680R
R231 680R
EEPROM
DV33
HD62接口电路
GND
L101 601BEDAVCC VCC
C101 104
GND
R123 10K
DV33
仓门开关检测
GND
COVER_SW
GND
S
G
D
12
3
2SK3018
1
2
33
1
2
EB
C
12
3
3904/3906
123
2SB1132
SOT89
TC105 220uF/10V
GND
GND
Notice!
2369-0
KEY8 KEY7 KEY6 KEY5 KEY4 KEY3 KEY2 KEY1
R701 DNS
C701 DNS
+5.5V
键盘接口
R451 330R
1A 2
K
LED401 LED
GND
+5.5V
电源指示灯
DV33
GND
DV33 GND
A B C D E F
V20
V1P4
RFO IOA
LDO2 LDO1
TRSO
FMSO DMSO FOSO
OPO
ADIN
OP- OP+
LIMIT COVER_SW
SCL
SDA
IR
VCC
VCC +5.5V +5.5V
SCL SDA IR
A B C D E F V20 V1P4 RFO IOA LDO2 LDO1 TRSO DMSO FMSO FOSO OPO ADIN OP- OP+ LIMIT COVER_SW
KEY1 KEY2 KEY3 KEY4 KEY5 KEY6 KEY7 KEY8
KEY1 KEY2 KEY3 KEY4 KEY5 KEY6 KEY7 KEY8
STBY
STBY MDI1 MDI1
2 3 4 1XS102
XS04
2 1XS103
XS02
2 3 4 1 6 7 8 5 10 9
XS202 XS10
GND
+5.5V vout 1
vout 5
GND
2
ce
4
vin
3
U402 RT9701
KEY5V
GND
KEY_LED
R238 10K
R239 10K
R240 10K
R241 10K
R234 10K
R235 10K
R236 10K
R237 10K
DV33
SW102 SW-PB SW101 SW-PB
KEY_LED
KEY_LED
R411 300R
1
1
2
2
3
344
55 66
T3 SMF05C
1
1
2
2
3
344
55 66
T4 SMF05C
KEY5
KEY6 KEY7
KEY8
KEY1 KEY2
KEY3 KEY4
GND GND

１ ６
１２ ３ ４ ５ ６
Ａ Ｂ Ｃ Ｄ Ｅ Ｆ
Ａ Ｂ Ｃ Ｄ Ｅ
Ｆ
广东步步高电子工业有限公司ＡＶ厂
ＢＢＫ
更改 数量 更改单号 签 名 日期
设 计
第 ５张 共 ５张 版次： 比例 质量 数量
1.0
DL369
TC516 10uF/16V
GND
L511 10UH
+9VIN BL_9V
L215 120 BED
IN
3
GND
1
OUT
2
U206
LM1117MP-1.8
TC214
106/16V
R232 1.8K R233 1K
V18
DV33
2369-0
L303 33UH
TC312 220uF/10V
L304 120 BED
L503 120 BED
TC508 220uF/10V
+9VIN
DV33
POWER_OFF
电池电压检测电路
R601 27K R602 1.2k R603 18k
R604 47K R606 47K
R607 4.7K
R608 4.7K
3 2
1
4 8
U601A
LM393
5 6
7
4 8
U601B
LM393
LOW_BAT
电池电压低；
停止；
6.2V;理论定义：
6.0V理论定义： ；
VCC
VIN
1
/CE
2
VOUT
3
NC
4
GND
5
U503 PQ05DZ01
VIN
1
/CE
2
VOUT
3
NC
4
GND
5
U304 PQ05DZ01
A5V
AGND
SPGND
+5.5V SP5V
GND
+5.5V VCC
TC311
220uF/10V
A5V
SP5V
VCC
DV33
V18
BL_9V
LOW_BAT
POWER_OFF
A5V SP5V VCC DV33 V18 BL_9V
LOW_BAT POWER_OFF
+5.5V +5.5V
GND GND
VIN
1
V5/PWON
2
VREF/SS
3
CC
4FB 5
GND 6
EXT 7
CS 8
U501 AL1012
VIN
1
V5/PWON
2
VREF/SS
3
CC
4FB 5
GND 6
EXT 7
CS 8
U502 AL1012
C504 104
C505 104
C506 104
C508 27P C509 27P
C507 104
C510 104
C502 104 C503 104
C511 104
R502 10K R503 10K
R504 33mohm 1/4W
R508 10K R506 20K
R509 10K R507 20K
R505 33mohm 1/4W
GND
GND
L501 22UH L502 22UH
TC502
100uF/16V
GND
+9VIN
GND
TC504
220uF/10V
TC505
220uF/10V
+5.5V
VD502
MBR340
VD503
MBR340
GND
GND
TC503
100uF/16V
GND
+9VIN
GND GND
GND
DV33
1 2 3 4JK501
BA-CON
C501 104
GND
9VIN
GND
2 1
JK502 XS02
+9VIN
R501 10K
GND
TC506
10uF/16V
TC507 10uF/16V
VD501 MBR340
QB502 RTR030P02 QB503 RTR030P02
SW501
SW SPDT
G1
D1S1 D1
QB501A IRF7316
TC509
220uF/10V
TC510
220uF/10V
VIN
1
/CE
2
VOUT
3
NC
4
GND
5
U504 PQ05DZ01
1 2 3
JK503 CON3
GND
SELECT
+5.5V
TC511 10uF/10V
R510 11K
R511 39K
V310
8050
V309 8550
GND
R329 1K
SELECT R339
1K
R512 10R R513 10R
T2T1
GND

１ ２ ３ ４ ５６
１２３４５ ６
Ａ Ｃ
Ｄ
Ｅ
Ｆ
Ａ Ｂ Ｃ Ｄ Ｅ
Ｆ
广东步步高电子工业有限公司ＡＶ厂
ＢＢＫ
更改 数量 更改单号 签 名 日期
设 计 审 核
批 准
第 ３ 张 共５张 版次：
标准化
比例 质量 数量
板号：
DL369
1.0
2369-0
A C D B
D
V1P4
V1P4
FOO FMO DMO TRO
FOSO DMSO TRSO FMSO
A5
A11
DQ13
A19
AD7
V20 LDO1 B
BA0 DCLK DMA11 DMA9 DMA5
AD0
TEZISLV ADIN
KEY3
A7
KEY4 WE# RAS# DMA6
PCE#
TEO
KEY6
AVDD3
AD6
CS#
A16
A13
A10
FMO
RFON
C
DMA7 DMA4
OP+ F E
DMA3
A6
DMO
DQ8 BA1 DMA0 DCKE
PRD#
AD3
V2P8
DQM1 DMA1
A1
AD1
A12
FOO
CAS# DMA10
RFVDD3
AD2
AD5
A14
A9
TRO
PWR#
A20
A18 OP- OPO
A4 A8
FEO
LDO2 A
A2
A0
AD4
A15
RFV18
DMA2 DMA8
A3
V1P4
PLLVDD3
A17
RFO
SDA
MDI1
RFOP
A21
SCL
KEY8
RXD
TXD
ICE
URST#
IR
INT0#
DQ12 DQ10 DQ11 DQ9 DQ2 DQ0 DQ15 DQ14 DQ1 DQ4 DQ3
DACVDD3
FS VREF COVER_SW
ADCVDD3
JITFO
JITFN
XI
XO
APLLVDD3
AL
AR
SC
CVBS1
STBY
IOA
LIMIT
DQ7
DQM0
DQ6
DQ5
KEY2
KEY1
SHUTDOWN BL_CTL# SPDIF#
ADVCM
AKIN2
AKIN1
AADVDD3
ARS
ALS
ACENTER
ASUBW
MT1389E
Pin Assignment v1.4
LQFP216/SMD
DVDA
2
CRTPLP 210
DVDB
3
DVDC
4
DVDD
5
AGND
1
OSP 212
OSN 213
DVDRFIP
6
DVDRFIN
7
MA
8
MB
9
MC
10
MD
11
SA
12
SB
13
SC
14
SD
15
CDFON
16
CDFOP
17
TNI
18
TPI
19
MDI1
20
MDI2
21
LDO2
22
LDO1
23
AVDD3 216
V2REFO
28 SGND 27
VREFO
30 V20 29
TEO
32 FEO 31
FG/ADIN1
43
RFLVL/RFON
26 CSO/RFOP 25
TEZISLV
33
OP_OUT
34
OP_INN
35
OP_INP
36
FOO
42 TRO 41
GPIO1/HSYNC#
45
TROPENPWM
39
PWMOUT1/ADIN0
40
GPIO2
46
FMO
38 DMO 37
HIGHA2
65 HIGHA3
64
HIGHA5
62 HIGHA6
61 DVDD3
60 HIGHA7
59 A16
58
IOA6
52
AD7
81
AD5
77 AD4
76
IOA18
55
DVSS
74 AD2
73 AD1
72 AD0
71
HIGHA4
63
IOA0
83
IOA7
53
HIGHA0
54
IOOE#
70
IOWR#
57
A17
82
AD3
75
HIGHA1
66
IOCS#
68
ALE
80
IOA1
69
IOA19
56
IOA20
67
DVDD18
84
UWR#
85
URD#
86
DVDD3
87
UP1_2
88
UP1_3
89
GPIO6
90
UP1_4
91
UP1_5
92
UP1_6
93
UP1_7
94
UP3_0
95
RD6
106
UP3_1
96
UP3_4
97
ADCVDD3 204
ADCVSS 205
UP3_5
98
GPIO7
99
ICE
100
PRST#
101
IR
102
INT0#
103
DQM0#
104
RD7
105
RD5
107
DVDD3
108
FS 162
VREF 161
DACVDDC 160
SPDIF 159
MC_DATA 158 ASDATA3 157 ASDATA2 156 ASDATA1 155 ASDATA0 154
ALRCK 153
ACLK 152 ABCK 151
GPIO5 150
DVSS 149
GPIO4 148 GPIO3 147
DVDD18 146
RA4 145 RA5 144 RA6 143 RA7 142 RA8 141 RA9 140
RA11 139
DVDD3 137
CKE 138
RCLK 136
RA3 135 RA2 134 RA1 133
DVDD18 132
RA0 131
RA10 130
BA1 129 BA0 128
RAS# 126
RCS# 127
CAS# 125
RWE# 124
DQM1 123
RD8 122 RD9 121
DVSS 120
RD11 118 RD10 119 RD12 117 RD13 116 RD14 115 RD15 114
RD0 113 RD2 111 RD1 112 RD3 110 RD4 109
HRFZC 209
IREF 215
SVDD3
24
RFGC 214
RFGND18 191
ADACVDD1 189
IDACEXLP 198
PLLVSS 197
RFRPAC 208
RFRPDC 207
JITFN 196
RFGND 211
RFVDD3 206
LPFOP 203
LPFIP 201
LPFIN 202
LPFON 200
PLLVDD3 199
XTALI 194
JITFO 195
RFVDD18 192
AR/SDATA1 184
AVCM 185
ARF(SW) 182
ADACVSS2 181
ADACVSS1 180
APLLVSS 179
AL/SDATA2 186
APLLCAP 178
APLLVDD 177
AKIN1 175
AKIN2 173
ADVCM 174
CVBS 164
R/Cr/CVBS/SY 171
B/Cb/SC 170
DACVSSA 169
G/Y/SY/CVBS 168
AADVSS 172
DACVDDA 167
DACVSSB 166
DACVDDB 165
DACVSSC 163
XTALO 193
GPIO0/VSYNC#
44
IOA2
47
DVDD18
48
IOA3
49
IOA4
50
IOA5
51
AD6
78
IOA21
79
AADVDD 176
ARS 183
ALF(CTR) 188
ADACVDD2 190
ALS/SDATA0 187
U201 MT1389E
V18
DV33
V18
GND
GND
GND
GND
GND
GND
C212 105
C213 105
C214 105
C215 105
C216 105
C217 DNS
GND
RFSVDD3
C234 104
R207 18K R208 20K R206 15K R205 10K C233 331
C232 331
C231 104
C230 153 V1P4
R203 DNSC235
DNS
V18
DV33
R209 10K
DV33
R221 560R
C246 104
R218 10K
DV33
C247 104
TC209 106/16V
C248 104
C249 104
L213 601BED
DV33
SY
X201 27MHz
R229 100K
C209
33pF C210
33pF
GNDGND
XI XO
ADACVDD3
L209 102BED
C211
104
GND
V18 RFV18 RFV18
C250 390pF
R226 750K
JITFNJITFO
C253 474
TC212
106/16V
TC211 106/16V
TC210 106/16V
C252 152
C251 104
GND
L201 10R
L202 601BED
L203 601BED L204 601BED
C201 104
C202 104
C203 104 C204 104
DV33
TC201
47uF/6.3V
TC202
106/16V
GND
RFSVDD3
RFVDD3
PLLVDD3
ADACVDD3
L206 601BED L205 601BED
C205 104 C206 104
AADVDD3 APLLVDD3
C256 473
C257 473
L207 601BED
C207 104
ADCVDD3
L208 601BED
C208
104
AVDD3
C263 104
R228 15K
GND
C260 104
C261 333
C262 104
C259 102
R227 100K
C258 20pF
C255 102
C254 103
C236 104
TC205 47uF/6.3V
GND
V20
C219 104
TC204 47uF/6.3V
GND
V1P4
2 3 4 1
XS201 XS04(DNS)
RXD TXD
GND
DV33
C226 104
C228 104
GND
V18
C225 104
C227 104
C221 104
C222 104
C223 104
DV33
GND
C224 104
C220 104
PWR# PCE# PRD#
DWR# DCE# DRD#
A6
19
A17
17
RY/BY
15
A18
16
NC
14
A12
4
NC
10
NC
13
A9
7
A15
1
A14
2
A13
3
A11
5
A10
6
A8
8
A19
9
WE
11
RESET
12
A5
20
A4
21
A3
22
A7
18
DQ8 30 DQ9 32
DQ10 34
DQ2 33 DQ3 35
DQ15/A-1 45
DQ12 39 DQ11 36
DQ6 42
A16 48
BYTE 47
Vss 46
DQ7 44
DQ14 43 DQ13 41
DQ5 40 DQ4 38
Vcc 37
DQ0 29
OE 28
Vss 27
DQ1 31
A2
23
A1
24 CE 26
A0 25
U203 8M_FLASH(TSOP)
A15 A14 A13 A12 A11 A10 A9 A18 A7 A6 A5 A4 A3 A2 A16
GND A0 AD7 AD14 AD6 AD13 AD5 AD12 AD4 VD AD11 AD3 AD10 AD2 AD9 AD1 AD8 AD0 DRD# GND DCE# A1
A8
R215 10K
R214 10K
R213 10K
VD
A17
A19 A20 AA21
R216 10k
DWR#
C237 104
GND
TC207 47uF/6.3V
VD
L210 102BED
DV33
TC208
106/16V
C242 104
C243
104
SD33
L212 102BED
DV33
A0
23
A1
24
A2
25
A3
26
A4
29
A5
30
A6
31
A7
32
A8
33
A9
34
A10/AP
22
A11
35
BA0/A13
20
BA1/A12
21
CLK
38
CKE
37
/CS
19
/RAS
18
/CAS
17
/WE
16
DQML
15
DQMH
39
NC
36
NC
40
VSS
54
VSS
41
VSS
28
DQ0 2 DQ1 4 DQ2 5 DQ3 7 DQ4 8 DQ5 10 DQ6 11 DQ7 13 DQ8 42 DQ9 44
DQ10 45 DQ11 47 DQ12 48 DQ13 50 DQ14 51 DQ15 53
VCC 1 VCC 14 VCC 27
VCCQ 3 VCCQ 9 VCCQ 43 VCCQ 49 VSSQ 6 VSSQ 12 VSSQ 46 VSSQ 52
U202 SDRAM 64M
DMA0 DMA1 DMA2 DMA3 DMA4 DMA5 DMA6 DMA7 DMA8 DMA9 DMA10 BA0
SDCLK SDCKE
DCS# DRAS# DCAS# DWE#
DQM0 DQM1
DQ0 DQ1 DQ2 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ3
GND
SD33
DMA11 BA1
C244 104
R223 33R R222 33RDCLK
DCKE
CS# RAS# CAS# WE#
C245
104
C241
104
C240
104
C239
104
GND
1 2 3 4
8 7 6 5
RN202 33R
C238 10pf
GND
SDCLK
TC206 106/16V VD201 1N4148
R211 10K
R212 33R
URST#
DV33
GND 复位电路
DV33
DV33 A
B C
D
E F
V1P4
RFO
A B C D E F
V20
V1P4 RFO V20
LDO2 LDO1
LDO2 LDO1
OPO OP- OP+
OPO OP- OP+
DMSO FMSO
TRSO
FOSO
DMSO FMSO TRSO FOSO
ADIN
ADIN
IOA
IOA
STBY
STBY
CVBS1
SY
SC
AL AR
CVBS1 SY SC AL AR
COVER_SW
COVER_SW
GND
GND
V18
V18
LIMIT
LIMIT
KEY5
KEY7
STBT
TRCLOSE
SELECT KEY_LED MUTE_DAC
KEY1 KEY2 KEY3 KEY4 KEY5 KEY6 KEY7 KEY8
KEY1 KEY2 KEY3 KEY4 KEY5 KEY6 KEY7 KEY8
SCL SDA
STBT
RESET
SCL SDA STBT RESET
SELECT SELECT
BL_CTL# BL_CTL#
MUTE_DAC MUTE_DAC
LOW_BAT
POWER_OFF
LOW_BAT POWER_OFF
SHUTDOWN SHUTDOWN
SPDIF# SPDIF#
CVBS2
IR
IR
MDI1
MDI1
R219 10k
R217 33R R220 33R R224 33R
LOW_BAT POWER_OFF
KEY_LED
KEY_LED
TC213 220u/10V
L214 100uH
GND

１ ２ ３ ４ ５６
１２３４５ ６
Ａ Ｃ
Ｄ
Ｅ
Ｆ
Ａ Ｂ Ｃ Ｄ Ｅ
Ｆ
广东步步高电子工业有限公司ＡＶ厂
ＢＢＫ
更改 数量 更改单号 签 名 日期
设 计 审 核
批 准
第 ３ 张 共６张 版次：
标准化
比例 质量 数量
板号：
DL369
1.0
R306 4.7K
R304 4.7K
C304 122
C306 82P
R308 36K
R307 36K
C305 82P
C303 122
R303 4.7K
R305 4.7K
A5V A5V
5 6
7
4 8
U301B 4580
3 2
1
4 8
U301A 4580
AGND AGND
TC303 10uF/16V
TC304 10uF/16V
AGND
C308 102
C307 102
L302 102BED L301 102BED
R310 330R R309 330R R314
560R
R313
560R
R311 100K R312 100K
V301 2SC1815-Y V302 2SC1815-Y
LOUT ROUT
MUTE-1
R315 39K
R316 47K
A5V
R336 10K(DNS)R332
1K
VD304 1N4148
R334 1K
AGND
AGND
MUTE-1
V304
8050
V305 8550
MUTEC
V303
8550
R330 10K
R331
10K
VCC
R333 1k
VD303 1N4148
AGND
TC305 10uF/16V
R335 10K
AGND
+9VIN
SPDIF# R337 33R(DNS)
DV33
GND
C315 104
TC310
47uF/6.3V
C314 27pF
AL AR
1
0
DA音频 转换电路
LLOUT
MUTE_DAC
RROUT
2369-0
4 2 1 3
JK302 HP
SPGND
VR301 50K*2
LOUT ROUT
SPGND
C309 105
C323 104
C322 105
LSOUT+ LSOUT- RSOUT- RSOUT+
SP5V
HP-L HP-R
HP-V1
SPGND
VD301
1N4148
VD302
1N4148
R318 10K R317 10K TC306
10uF/16V TC307 10uF/16V
LOUT ROUTARIN
ALIN
C407
20pF
VGND
4 2 1 3
JK403 VIDEO-OUT
DV33
ALIN ARIN LLOUT RROUT
1.内部音视频信号和外部输入信号进行切换； 2.音视频地线分开布； 3.音视频模拟信号线尽可能加粗。
L404 102BED
GND
R410 560R
SELECT
1
2
3 4
5
6 7
8
9 10
11
12
SW401 16PARTS
CVBS_0
SELECT.图示中： 信号为低电平
视频信号
INTER-CVBS
SK-42D01-PG4此开关型号：
R401 75R C401
47PF
C404 47PF
L401 1.8uH
CVBS1
R403 75R C403
47PF
C406 47PF
L403 1.8uH
VGND
SY
R402 75R C402
47PF
C405 47PF
L402 1.8uH
VGND
SC
VGND
V5V
2
1
3
VD401 MMBD4148SE
INTER-CVBS
C408 20pF
L405 102BED C_TFT
VGND VGND
L406 102BED
C409 20pF
Y_TFT
AV外部 输入信号
AV内部 输入信号
视频信号 音频信号
视频信号 音频信号
CVBS_0
VGND
ARIN ALIN
RROUT LLOUT Y# C#
高电平时，为输入模式；
低电平时，为输出模式；
SELECT
C_TFT Y_TFT
L418 102BED L417 102BED
SCL SDA
V801 8050
V802 8050
R804 1K
R803 1K
GND
BL_CTL#
VCC
IN
8
VCC
7
GND
6
L2
GND 4
5
R
3
1
JK301
AUDIO-L AUDIO-R
R341 0R R342 0R(DNS)
AGND
R338 33R
VCC
BL_CTL
R801 1K
VCC
GND
STBT
SW801
SW2
R802 10K
关屏检测及控制
/扬声器 耳机放大
静音电路
驱动板接口
C321 104
C320 105
CVBS_OUT
L407 10UH
VCC V5V
TC301 10uF/16V TC302 10uF/16V
R301 6.8K
R302 6.8K
C301 102
C302 102
4 2 1 3
JK303 HP
SPGND
AL AR
MUTE_DAC
CVBS1
SY SC
SP5V
A5V VCC
SPDIF#
DV33
SELECT
BT_CTL#
BL_9V
STBT
RESET
SCL
SDA
+5.5V
AR AL MUTE_DAC
RESET SCL SDA
CVBS1 SY SC SP5V A5V VCC DV33 +5.5V SPDIF# BL_CTL# BL_9V STBT SELECT
GND
GND SHUTDOWN
SHUTDOWN
STBT
1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19 20
XS402 CON20
L428 102BED
GND GND BL_CTL BL_9V
PVDD 1
SYNCH_OUT 2
SCL 3
SDA 4
BIAS 5
SYNC 6
CPVDD 7
C1P
8
CPGND
9
C1N
10
CPVSS
11
VSS
12
HPL
13
HPR
14
VDD
15
GND
16
INR
17
INL
18
INM
19
HPS
20
/SHDN
21
PVDD 22
OUTR+ 23
OUTR- 24
PGND 25 PGND 26
OUTL- 27
OUTL+ 28
U302 MAX9702
HP-V2
V306 8050
R324 4.7K
SHUTDOWN
SPGND
SPGND
SP5V
SCL
SDA
C312 105
C310
105
C313 105
C318 104
SPGND
C316 105
C317 105
SP5V
SP5V
C311 104
C319 105
TC308 10uF/16V
EXTER-CVBS
EXTER-CVBSL429 102BED VGND
R805 1K
R322 0R
R319 15K
R320 15K
R321 0R
SP5V
SPGND
R323
100K
SP5V
R325 10K
SPGND
V308 8050
V307 8050
R326 100K
R327 0R R328 0R(DNS)
MUTE_DAC