Blackrock Microsystems Cerebus User manual

630 Komas Drive |Suite 200
Salt Lake City |UT 84108 |USA
P +1 801.582.5533 |F +1 801.582.1509
www.blackrockmicro.com
Revision 15.00 / LB-0028 –Cerebus Instructions for Use
Cerebus, CerePlex, CerePort, and NeuroPort are registered and unregistered trademarks of Blackrock
Microsystems
Cerebus
Instructions for Use

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
2
Contents
Introduction................................................................................... 4
System Description ................................................................................... 4
Cerebus Models ........................................................................................ 4
Host PC Requirements .............................................................................. 4
Packing Contents....................................................................................... 5
Setup Overview......................................................................................... 5
Cerebus System Hardware ............................................................ 6
Front End Amplifier................................................................................... 7
Amplifier Input .......................................................................................... 7
Analog Headstages.................................................................................... 8
Amplifier Power Supply (APS) ................................................................... 8
Cables ....................................................................................................... 9
Digital Cerebus System Hardware ............................................... 10
Digital Hub 128........................................................................................ 10
Digital Hub Inputs ................................................................... 10
CerePlexTM Digital Headstages................................................................. 11
Neural Signal Processor (NSP) ..................................................... 12
NSP Front Panel ...................................................................................... 13
NSP Back Panel........................................................................................ 15
Quick Setup Guide ....................................................................... 17
Setting up the Cerebus System ............................................................... 17
Setting up the Digital Cerebus System..................................................... 17
Setting up the Ethernet Link.................................................................... 17
Troubleshooting...................................................................................... 18
The NSP is stuck in the initializing step. .................................. 18
How can I update the Cerebus firmware on the NSP to the
latest version? ........................................................................ 19

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
3
The Front End Amplifier power supply red error LED is on..... 20
The analog headstage attached to the Front End Amplifier is
not receiving power................................................................ 20
The fiber optic LED indicator is illuminating red. .................... 21
The source status LED on Digital Hub is illuminating red. ....... 21
The Central application fails to start....................................... 22
Warranty ..................................................................................... 23
Support........................................................................................ 23
Appendix 1................................................................................... 24
Warnings ................................................................................ 24
Cautions.................................................................................. 24
Specifications.......................................................................... 24
Symbols of Contraindications, Warnings, Cautions ................ 25
Appendix 2................................................................................... 26
Electromagnetic Immunity ..................................................... 26

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
4
Introduction
The Blackrock Cerebus Neural Processing System supports recording, processing and displaying bio-
potential signals from various types of electrodes. Bio-potential signals may include Electrocorticography
(ECoG), electroencephalography (EEG), electromyography (EMG), electrocardiography (ECG),
electrooculography (EOC), action potentials (AP), and evoked potentials (EP).
System Description
The Cerebus System records and processes neural signals from up to 128 surface or penetrating
electrodes in addition to auxiliary analog signals and digital experimental events. Multiple systems can be
synchronized to achieve higher input channel counts.
The system can perform real-time signal processing algorithms including noise cancellation, digital
filtering, simultaneous extraction of spike and field potentials, manual and automatic online spike sorting.
Functionality can be further increased with custom user-defined scripts.
Cerebus Models
The Cerebus System is offered in the following two versions.
1. Cerebus System:
The Cerebus System is packaged with a Front End Amplifier (FEA). The Front End Amplifier is
compatible with Blackrock’s analog headstages which provide an isolated low-impedance output
that ensures signal integrity and minimizes tether artifact.
2. Digital Cerebus System:
The Digital Cerebus System includes a Digital Hub. The Digital Hub allows the Cerebus System to
be used with CerePlex™ digital headstages which digitize and multiplex neural signals to reduce
lead wire size and noise acquisition.
Host PC Requirements
The recommended specifications for a Cerebus System host PC are mentioned below.
•Microsoft Windows 7 or 10 professional
•Intel Core i-series processor
•8 GB RAM
•250 GB SSD for operating system
•Separate SSD for data storage
•Discrete video/graphics card
•2 gigabit Ethernet Ports
A Host PC that is configured and tested by our engineers is available. Please contact
sales@blackrockmicro.com for more information.

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
5
Packing Contents
The Cerebus System is shipped with components listed below. The exact type and quantity of the
components can vary depending on the Cerebus model, line voltage (110v or 220v), and total input
channel count.
•Neural Signal Processor (NSP) and rubber feet
•Rack mounting ears and screws
•For Cerebus System only: Front End Amplifier (FEA) and isolated Amplifier Power Supply
(APS).
•For Digital Cerebus System only: Digital Hub 128 and isolated power supply.
•Alligator clip to touch proof ground cable
•Power cables and connectors
•Crossover Ethernet cable
•Cerebus user’s manual & Central Suite software installation CD
Setup Overview
The following diagrams depict overall views of how the Cerebus and the Digital Cerebus Systems are
integrated within a typical laboratory environment. The experiment subject area is both electrically and
optically isolated from the experiment operation and control area. In the Cerebus System, digitization and
amplification takes place inside the Front End Amplifier. The amplifier receives analog signals either
directly from electrodes or via analog headstages then performs differential amplification and digitization.
In the Digital Cerebus System, the neural signals are digitized by the CerePlex digital headstages before
they enter the Digital Hub. Both the Digital Hub and Front End Amplifier are also responsible for
converting the digitized signals into fiber optic data and transferring them to the processor via a fiber
optic link.

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
6
Figure 1 (lower panel) also depicts a simplified flowchart to describe the signal processing stages that take
place inside the Cerebus system. The signals on both the electrode and reference wire are initially
buffered using unity gain amplifiers. The buffered signals then enter a differential amplifier which
subtracts the neural signal from the reference to suppress common noise and achieve a bipolar recording.
The resultant signal then goes through the gain and filtering stage. The amplified signal is then digitized,
converted to fiber optic signal, and transferred to the processor for further analysis, display or storage.
Cerebus System Hardware
The Cerebus System components are depicted inside the following block diagram. The architecture
generally consists of analog headstages, Front End Amplifier, and the Neural Signal Processor which are
described in the following sections.
Figure 1- Setup schematics showing the Cerebus and Digital Cerebus Systems (top). Overview of signal
processing stages in Cerebus data acquisition system (bottom).

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
7
Figure 2- Simplified block diagram of the Cerebus system
Front End Amplifier
The Front End Amplifier (FEA), depicted in Figure 3, receives analog signals either directly from the
electrodes or via headstages (unity-gain voltage followers) depending on the impedance of the
electrodes. The analog signals are amplified (unity gain), filtered (1st-order high- pass at 0.3 Hz and 3rd-
order low-pass at 7,500 Hz), and digitized (30 kHz, 16-bits at 250 nV resolution), converted into the optical
domain and then transmitted to the NSP via a fiber-optic link, which is immune to electromagnetic field
interference.
The Amplifier ground is not connected to the earth ground. The Amplifier ground is isolated and floating.
There are ESD shunt circuits that will conduct differences of 1000 V or more. The Amplifier can be
connected to earth ground via any one of the four ground pins located on the input side of the Amplifier.
Amplifier Input
Figure 3-Isometric views of the Front End Amplifier showing the front (left) and back side
(right).

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
8
Figure 4- Front End Amplifier front view and pinout
The Amplifier has four 34-pin banks as shown in Figure 4. Each bank consists of 32 channels, a bank
reference pin, and a ground pin. The electrodes within each bank are differentially amplified with respect
to the reference input of the same bank. Connect one reference channel to all banks to use a single
reference for all measurement channels. Four 6-pin Amplifier Power Supply banks provide power (±5V) to
the analog headstages and can deliver up to 130 mA of combined current. The ground pins on every bank
are internally tied together and should be used as the primary experimental ground.
Analog Headstages
Blackrock analog headstages acquire neural signals from electrodes and provide an isolated low-
impedance output to the Front End Amplifier via direct cable connections for each channel. Blackrock
analog headstages ensure maximum common-mode noise rejection by the Front End Amplifier. The high
input impedance and low bias current of the Front End Amplifier inputs make it possible to connect
microelectrodes with 20 kΩ(at 1kHz) or lower impedance values directly to the Front End Amplifier
inputs without the need for a headstage. This configuration makes the application more susceptible to
environmental electromagnetic noise.
To minimize environmental noise, it is recommended to keep direct electrode connections shorter than
20 cm (8 inches). For longer connections, headstages from Blackrock Microsystems are recommended.
Headstages allow microelectrodes with impedances up to 5 MΩ(at 1kHz), and cables up to 6 feet or 3
meters in length.
Amplifier Power Supply (APS)
The APS consists of five analog and digital supply channels with monitoring, sequencing, and emergency
shutdown controls. The On/Off switch is located on the back of the unit. Once it is switched on, the APS

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
9
will start a power-up sequence of analog and digital supplies ending with the green ON LED illuminating.
When the power switch is turned off, this sequence is reversed and the output of the APS is tied to
ground. In the event of an error in voltage or power delivery, the APS will shut down and a red error LED
will turn on. After checking all amplifier and patient cable connections for any inadvertent shorting, turn
off the APS and turn it back on to reset the error.
Cables
Included with the system is a power cable for the NSP (not shown), a power cable for the APS (not
shown), a fiber-optic link that connects the Front End Amplifier to the NSP, a crossover Ethernet cable
that connects the NSP to the Host PC, and a cable that connects the APS to the Front End Amplifier.
Note: The fiber-optic cable is very delicate. Do not bend the cable (with a smaller
bend radius than 5.0 cm) or crush it!
Figure 6- Fiber-optic Cable (Left) and Amplifier Power Supply Cable (Right).
Figure 5- Amplifier Power Supply

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
10
Digital Cerebus System Hardware
The Digital Cerebus System is compatible with the whole family of the Blackrock CerePlex digital
headstages. Blackrock digital headstages enable low noise transmission in a minimally invasive package.
The output of the CerePlex digital headstages are multiplexed, meaning that only a reduced set of wires
are needed to transmit the already digitized data from all the input channels. The following block diagram
depicts the different components and their roles within a Digital Cerebus System.
Digital Hub 128
The Blackrock Digital Hub provides an interface between the NSP and CerePlex digital
headstages. The Digital Hub converts digital signal to an optic-digital format which is sent directly
to the NSP. This dramatically reduces the noise introduced to the signal during transmission. The
Digital Hub can handle many possible configurations when it is connected to multiple CerePlex
digital headstages provided that the total number of channels does not exceed maximum 128
channels.
For more information about different models of CerePlex family of products, please
refer to the Blackrock Microsystems website.
Digital Hub Inputs
Figure 7- Simplified block diagram showing different components of the Digital Cerebus and their
intended function within the system.

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
11
The inputs of the Digital Hub consist of consist of four HDMI-A connectors located on back side
of the device (see Figure 8, top panel). These inputs can provide power to the CerePlex
headstages and receive multiplexed and digitized data from these headstages. The digital data
are then transferred to the NSP via an Fiber Optic link also found on the back panel. For more
detailed information on Digital Hub 128, please refer to the Digital Hub user manual found at
www.blackrockmicro.com
CerePlexTM Digital Headstages
Blackrock Microsystems manufactures a range of different models of CerePlex digital headstages
which are characterized by their low noise, light weight and small physical profile. These
headstages are all compatible with the Digital Hub 128. For more detailed information on each
type of the headstage please refer to www.blackrockmicro.com
Figure 8- Front (top) and back side (bottom) of the Digital Hub 128. The inputs of the
Digital Hub consist of four HDMI-A connectors on the back side.

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
12
Neural Signal Processor (NSP)
The NSP is a real-time processor of the Cerebus System which performs all the digital processing,
including filtering, spike extraction, spike sorting, and so on. The NSP is built upon a real-time Linux
system capable of onboard closed loop processing and rapid data transmission to the Host PC through
Ethernet UDP protocol. The NSP has multiple auxiliary analog and digital inputs and outputs that can be
programmed through the Cerebus Central Software Suite or one of the supplied Software Development
Kits (SDKs). The NSP can also perform real-time closed loop analysis via the Extension Code user-
developed applications and communicate the results via the auxiliary ports to third-party equipment or
via the Ethernet link to the host PC. Multiple NSPs may also be synchronized for recording signals from
more electrodes.
The hardware and architecture inside the NSP are both periodically optimized to improve the overall
performance and reliability of the system. Blackrock Microsystems has so far released four different
versions of the NSP mentioned below:
•NSP 1.0 (Part number 4176)
•NSP 1.5 (Part number 7530)
•NSP 1.75 (Part number 9650)
•NSP 2.0 (Part number 10411)
NSP 1.0 architecture was based on an Intel®Pentium 4 processor. The processor in the NSP 1.5 was
upgraded to multi-core Intel®i7 technology. The mentioned upgrade provides users with the NSP versions
1.5 and above an option to directly upload their custom-built software into the NSP for real-time
execution via the Blackrock’s Extension Software package. For detailed information about Extension
software and example application notes, please refer to www.blackrockmicro.com .
NSP 2.0 is equipped with an additional fiber optic input link therefore it can receive and process 256
channels of neural data simultaneously. All previous versions of the NSP can handle maximum 128
channels via a single fiber optic link.

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
13
The available input and output connection ports on the NSP are detailed in the following sections.
NSP Front Panel
The front panel of the NSP (see picture above) consists of the following input and output ports:
1. Power switch:
The power switch turns the NSP on and off. The LED above the switch will illuminate
when the unit is on.
2. LCD Display:
The LCD displays the current operating status of the unit. The statuses include
“Initializing”, “NSP Startup”, “NSP Running”, “NSP Standby”, and “Synchronized”.
3. Analog Inputs:
Auxiliary analog signals can be recorded through 16 BNC ports. The analog source may
range ±5.0 V and should come from a source impedance of less than 100 Ω. The
coupling of each input channel can be manually selected in the software. By default,
channels 1-8 are AC-coupled and channels 9-16 are DC-coupled.
Figure 9- Front side of the NSP 1.75 showing the power switch (1), LCD display (2), analog inputs (3),
digital inputs (4), serial I/O (5), analog outputs (6), audio outputs (7), digital outputs (8), and sync port
(9).
Note: The fiber optic link input connector has been relocated to the back panel in NSP versions 1.75 and
above. The location of this port was previously under the sync port on the front panel.

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
14
4. Digital Input:
Digital events can be recorded through the 16-bit DB37 input port. The pinout is shown
below. DS is a digital strobe pin. D0-15 are data pins. EOP is reserved. SYNC is an output
pin and can be used with external equipment to indicate when the port is scanned.
Input range is 0V-5V TTL levels. The port is polled every 1/30000 of a second. Strobed
data is buffered up to 10 strobes per 1/30000 of a second and is latched on the rising
edge of the DS pin.
5. Serial I/O:
The port is an RS232 DB9 digital input/output port. The pin diagram is shown below.
Currently, the NSP firmware software only supports this port as an input.
Pin 2 is “Receive Data”, pin 3 is “Transmit Data”, and pin 5 is “Ground”. The
configuration of the port is: Baud rate: 115200, Data bits: 8, Parity: none, Stop bits: 1,
Flow control: disabled.
6. Analog Outputs:
Four ±5.0 V analog output BNC connectors can be used to send monitoring signals or
stimulus waveforms to other connectors.
7. Audio Output:
The system sends a ±1.5 V line-level audio signal of the selected data channel to two
BNC ports and one 3.5mm female stereo audio connector simultaneously.
8. Digital Outputs:
Four single-bit digital BNC outputs can be programmed for monitoring or timing
functions. These ports can be setup to send a TTL signal if spike activity is detected on
any channel. They can also be configured to output a digital pulse train at a user-defined
frequency and duty cycle. Digital Output 1 can also be used for syncing external
equipment by sending a unique pulse every 14 seconds. The entire sync pattern will
repeat every hour. See the Central Software Suite User Manual for more details.
9. Sync Port:
A synchronization pulse can be set as an optional line to inform external equipment
when the NSP neural signal inputs and front panel ports are scanned. It is active on the
Figure 10- Digital input pin diagram.
Figure 11- Serial I/O pin diagram.

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
15
rising edge of the signal.
NSP Back Panel
The back panel of the NSP includes the following ports and connectors:
10. Line Noise Cancellation Port:
On NSP 1.5 and higher versions, the adaptive line noise cancellation port is separated
from the NSP’s main power input connector. To use the adaptive line noise cancellation,
plug a standard power cable into this port and enable the feature in software as
described in the Central Software Suite User Manual which is available for download
from the Blackrock Microsystems website.
11. Synchronization Port:
This DB9 port is located on the back of the NSP and it is used to synchronize two or
more NSPs. Once the sync cable (Blackrock PN 5584) is properly connected between
NSPs, they will automatically synchronize. Some older NSP models may not have this
port. To add synchronization capability to your NSP, please contact Blackrock
12. Fiber Optic Link:
This port connects to the Front End Amplifier or the Digital Hub using a fiber optic cable.
A LED to the right of the connector turns green when an optical link is established and,
in the newest model of the Neural Signal Processor (NSP 2.0 and above) turns yellow
when the link is broken. Older models of the device have a red LED when the link is
broken. The Fiber Optic connector is located on the front side in NSP models 1.5 and
1.0. The NSP 2.0 is equipped with an additional fiber optic input connector which
enables the NSP 2.0 to communicate with more than one Front End Amplifier or Digital
Hub.

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
16
NSP 1.0
NSP 1.5
NSP 1.75
NSP 2.0
Figure 12- Back panel view of different versions of NSP showing the adaptive Line Noise Cancellation
plug (10), Synchronization Port (11), and the Fiber Optic input connector(s) (12).

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
17
Quick Setup Guide
Setting up the Cerebus System
1. Remove the NSP, Amplifier and APS from the shipping boxes.
2. Attach the manifold to the Front End Amplifier.
3. Attach the NSP rack-mount brackets to install it in an equipment rack, or rubber feet to
place it on a table.
4. Plug in the NSP and APS to electrical outlets. It is recommended to use a power
conditioner to remove any line noise.
5. Connect one end of the APS cable to the APS and the other end to the Amplifier. The
cable needs to click and lock in place.
6. Connect one end of the fiber-optic cable to the NSP and the other end to the Amplifier.
7. Turn on the NSP and the APS.
8. The LED on the APS, Amplifier, and the NSP should turn green if everything is connected
properly.
Setting up the Digital Cerebus System
1. Remove the NSP, Digital Hub and Digital Hub’s power supply from the shipping boxes.
2. Attach the NSP rack-mount brackets to install it in an equipment rack, or rubber feet to
place it on a table.
3. Plug in the NSP and the Hub power supply to electrical outlets.
4. Connect the power supply to the Digital Hub.
5. Connect one end of the fiber-optic cable to the NSP and the other end to the Digital
Hub.
6. Turn on the NSP, then the Digital Hub.
7. If available, connect a CerePlex headstage to the Digital Hub via an appropriate HDMI
cable.
8. The LEDs on the Hub and the NSP should turn green if everything is connected properly.
Setting up the Ethernet Link
The network interface card on the Host PC needs to be configured as follows for connecting the
Host PC to the NSP:
1. In Windows click on Start and search for “View Network Connections”.
2. Right click on the correct Ethernet Adaptor (usually, Local Area Connection) and click on
Properties.
3. Uncheck all services except for Internet Protocol (TCP/IP) or Internet Protocol Version 4
(TCP/IPv4).
4. Click on Internet Protocol (TCP/IP) and click on Properties
5. For IP Address enter 192.168.137.1, for Subnet Mask enter 255.255.255.0 and leave the
rest blank.
6. Click on OK to save changes.

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
18
Up to 16 PCs can be connected to the same NSP using a business class 1-Gbps network switch. For other
PCs connected using a network switch, IP addresses should increment, such as 192.168.137.2,
192.168.137.3, etc. The NSP’s IP address is currently fixed at 192.168.137.128.
Troubleshooting
For latest troubleshooting articles please visit support.blackrockmicro.com and click on the Knowledge
Base. Below you can find more information on some of the commonly asked questions.
The NSP is stuck in the initializing step.
In this case, the NSP does not boot up correctly after being turned on and “Initializing Step 2” is displayed
on the LCD panel.
Figure 13- Setting the network properties on the Host PC.

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
19
Potential cause:
•Internal boards dislodged from their slots on the motherboard.
•Loose internal cables and connectors.
•Other hardware error on the motherboard.
Troubleshooting:
An internal board, memory card, or cable might have become loose or dislodged. Unplug the system from
the power, open the case, and check for any loose cards (memory, NSPIF, etc.) or cables. Make sure they
are seated well and then power the NSP back on. Please contact support for detailed step-by-step
instructions. If that doesn’t fix the problem then the NSP must be sent back as RMA for further
inspections.
How can I update the Cerebus firmware on the NSP to the latest
version?
If your current NSP firmware which is normally displayed on the NSP's LCD panel is below version 4.00 do
not perform this upgrade and contact support for more information. Otherwise, follow every step of
these instructions and read all the notes.
To install the firmware:
1. Download the latest Firmware for the NSP from our website:
http://blackrockmicro.com/technical-support/software-downloads/
2. Turn the NSP on.
3. Wait for the NSP to go through initialization. Once the NSP says "NSP Startup" then it is ready.
4. Double click on the UpdateNSPFirmware file you downloaded in step 1.
5. Click on Setup.
6. Press "y" and then hit enter.
7. Wait for the upgrade to finish. This may take about a minute. Do not turn off the NSP during
programming.
8. Press any key to exit the update utility and to restart the NSP.
To install Central Windows Suite:
1. Before installing the new software, the old version of Central needs to be uninstalled. Click on
Start and navigate to Control Panel. Click on start, type "uninstall a program". Click on "Uninstall
a Program". Find Central Windows Suite, right click on it and click on Uninstall.
2. Download the latest Central Windows Suite from our website:
http://blackrockmicro.com/technical-support/software-downloads/
3. Run the Installer and follow the instructions to finish the installation.
4. A shortcut will be placed on the desktop.
Some additional notes about upgrading the firmware:
•The windows firewall may prevent the firmware programmer to communicate with the NSP.
Disable the windows firewall temporary before running the downloaded UpdateNSPFirmware
file. To disable the windows firewall:
oPress Windows Start and type “Windows Firewall” in search area.
oSelect the “Windows Firewall with Advanced Security”.
oClick on the “Windows Firewall Properties” in the main “Overview” window.
oTurn off the firewall under all the Doman / Private / Public tabs.
oPress OK
oAfter the Firmware is updated then turn the firewall back on.

Revision 15.00 / LB-0028 –Cerebus Instructions for Use
20
•The Firmware installer can only communicate with the NSP attached to the ethernet port with
192.168.137.1-16 IP address block. So if there are multiple NSPs connected to a single host PC,
then the firmware update procedure must be performed individually by connecting each NSP to
the Ethernet port with mentioned IP address.
•In case the firmware upgrade process is disrupted during the programming, then simply repeat
the installation process from the beginning.
The Front End Amplifier power supply red error LED is on.
Potential causes:
•Bad fuse in the power receptacle of the supply.
•Internal damage to the power supply board assembly.
•Short circuit in power cable connector on power supply.
•Short in power path external to the supply which can be the cable, amplifier itself,
headstages connected to amplifier.
Troubleshooting steps:
1. Connect the power supply to mains power, but do not connect the grey power cable that goes to
the Front End Amplifier.
•If supply doesn’t turn on at all, check fuses in power receptacle.
•If supply goes into error mode, then there is either a short in the connector for the amp
power cable, or the internal fuses are bad. It would need to come back to Blackrock for
further diagnostics and repair
2. Connect the power supply to the amplifier, but disconnect any inputs to the amplifier e.g. patient
cable, manifold, etc. Power up the power supply.
•If the supply doesn’t go into error mode, then the problem is likely a short in something that
gets connected to the inputs of the Front End Amplifier.
•If the supply does go into error mode, then there is a short in the cable to the amplifier or in
the power connector on the amplifier. Try swapping out with different cable or amplifier if
possible to isolate the faulty part.
The analog headstage attached to the Front End Amplifier is not
receiving power.
Potential cause:
•The Front End Amplifier power supply is in error mode.
•Internal hardware issue with the analog headstage
Troubleshooting steps:
•The Front End Amplifier power supply must always be switched off before connecting or
disconnecting components to the Front End Amplifier. Otherwise the power supply can
enter the error mode. If this happens, simply restart the power supply to see if the problem
is resolved.
•If the problem still not resolved, then follow the diagnostic steps mentioned in “The red
error LED on the Front End Amplifier power supply” section above.
Other manuals for Cerebus
1
Table of contents