Bridgetek FT801 Operating instructions

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FT800 Series Programmer Guide
Version 2.1
Issue Date: 2016-09-19
This document is a programmer guide for the FT800 series chip. This guide details the
chip features and procedures for use. For FT801 specific features and procedures,
please see the chapter FT801.

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Table of Content
1Introduction .............................................................. 9
1.1 Overview .............................................................................9
1.2 Scope ..................................................................................9
1.3 API reference definitions.....................................................9
2Programming Model ................................................ 11
2.1 General Software architecture ..........................................11
2.2 Display configuration and initialization .............................12
2.2.1 Horizontal timing..................................................................... 13
2.2.2 Vertical timing ........................................................................ 14
2.2.3 Signals updating timing control ................................................. 14
2.2.4 Timing example: 480x272 at 60Hz ............................................ 15
2.2.5 Initialization Sequence ............................................................. 16
2.3 Sound Synthesizer.............................................................17
2.4 Audio playback ..................................................................18
2.5 Graphics routines ..............................................................19
2.5.1 Getting started........................................................................ 19
2.5.2 Coordinate Plane ..................................................................... 20
2.5.3 Drawing pattern ...................................................................... 21
2.5.4 Writing display lists ................................................................. 26
2.5.5 Bitmap transformation matrix ................................................... 27
2.5.6 Color and transparency ............................................................ 27
2.5.7 VERTEX2II and VERTEX2F ........................................................ 28
2.5.8 Screenshot ............................................................................. 30
2.5.9 Performance ........................................................................... 30
3Register Description ................................................ 32
3.1 Graphics Engine Registers .................................................32

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3.2 Touch Engine Registers (FT800 only) ................................47
3.3 Audio Engine Registers......................................................62
3.4 Co-processor Engine Registers ..........................................68
3.5 Miscellaneous Registers ....................................................70
4Display list commands............................................. 81
4.1 Graphics State ...................................................................81
4.2 Command encoding ...........................................................82
4.3 Command groups ..............................................................83
4.3.1 Setting Graphics state.............................................................. 83
4.3.2 Drawing actions ...................................................................... 84
4.3.3 Execution control..................................................................... 84
4.4 ALPHA_FUNC.....................................................................85
4.5 BEGIN................................................................................86
4.6 BITMAP_HANDLE...............................................................88
4.7 BITMAP_LAYOUT...............................................................89
4.8 BITMAP_SIZE ....................................................................94
4.9 BITMAP_SOURCE...............................................................97
4.10 BITMAP_TRANSFORM_A .................................................99
4.11 BITMAP_TRANSFORM_B ...............................................101
4.12 BITMAP_TRANSFORM_C ...............................................102
4.13 BITMAP_TRANSFORM_D ...............................................103
4.14 BITMAP_TRANSFORM_E ...............................................104
4.15 BITMAP_TRANSFORM_F ...............................................106
4.16 BLEND_FUNC ................................................................107
4.17 CALL .............................................................................110
4.18 CELL..............................................................................111
4.19 CLEAR ...........................................................................112

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4.20 CLEAR_COLOR_A ..........................................................114
4.21 CLEAR_COLOR_RGB ......................................................115
4.22 CLEAR_STENCIL............................................................117
4.23 CLEAR_TAG ...................................................................118
4.24 COLOR_A ......................................................................119
4.25 COLOR_MASK................................................................120
4.26 COLOR_RGB ..................................................................122
4.27 DISPLAY .......................................................................123
4.28 END...............................................................................124
4.29 JUMP.............................................................................125
4.30 LINE_WIDTH ................................................................126
4.31 MACRO..........................................................................127
4.32 POINT_SIZE..................................................................128
4.33 RESTORE_CONTEXT ......................................................129
4.34 RETURN ........................................................................130
4.35 SAVE CONTEXT .............................................................131
4.36 SCISSOR_SIZE ..............................................................132
4.37 SCISSOR_XY .................................................................134
4.38 STENCIL_FUNC .............................................................135
4.39 STENCIL_MASK.............................................................137
4.40 STENCIL_OP .................................................................138
4.41 TAG...............................................................................140
4.42 TAG_MASK ....................................................................141
4.43 VERTEX2F .....................................................................142
4.44 VERTEX2II ....................................................................143
5Co-Processor Engine commands ............................ 144

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5.1 Co-processor handling of Display list commands.............146
5.2 Synchronization ..............................................................146
5.3 ROM and RAM Fonts ........................................................147
5.4 Cautions ..........................................................................148
5.5 Fault Scenarios................................................................149
5.6 widgets physical dimension.............................................149
5.7 widgets color settings .....................................................149
5.8 Co-processor engine graphics state ................................150
5.9 Definition of parameter OPTION......................................151
5.10 Co-processor engine resources .....................................153
5.11 Command groups..........................................................153
5.12 CMD_DLSTART - start a new display list .......................155
5.13 CMD_SWAP - swap the current display list ...................156
5.14 CMD_COLDSTART - set co-processor engine state to
default values .........................................................................156
5.15 CMD_INTERRUPT - trigger interrupt INT_CMDFLAG......158
5.16 CMD_APPEND - append memory to display list .............159
5.17 CMD_REGREAD - read a register value..........................160
5.18 CMD_MEMWRITE - write bytes into memory.................161
5.19 CMD_INFLATE - decompress data into memory ............163
5.20 CMD_LOADIMAGE - load a JPEG image .........................164
5.21 CMD_MEMCRC - compute a CRC-32 for memory............166
5.22 CMD_MEMZERO - write zero to a block of memory........167
5.23 CMD_MEMSET - fill memory with a byte value ..............168
5.24 CMD_MEMCPY - copy a block of memory.......................169
5.25 CMD_BUTTON - draw a button ......................................170
5.26 CMD_CLOCK - draw an analog clock..............................173

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5.27 CMD_FGCOLOR - set the foreground color ....................178
5.28 CMD_BGCOLOR - set the background color ...................179
5.29 CMD_GRADCOLOR - set the 3D button highlight color ..181
5.30 CMD_GAUGE - draw a gauge .........................................183
5.31 CMD_GRADIENT - draw a smooth color gradient ..........190
5.32 CMD_KEYS - draw a row of keys ...................................194
5.33 CMD_PROGRESS - draw a progress bar.........................199
5.34 CMD_SCROLLBAR –draw a scroll bar............................202
5.35 CMD_SLIDER –draw a slider ........................................205
5.36 CMD_DIAL –draw a rotary dial control.........................208
5.37 CMD_TOGGLE –draw a toggle switch ...........................211
5.38 CMD_TEXT - draw text ..................................................214
5.39 CMD_NUMBER - draw a decimal number.......................218
5.40 CMD_SETMATRIX - write the current matrix to the display
list 221
5.41 CMD_GETMATRIX - retrieves the current matrix
coefficients .............................................................................221
5.42 CMD_GETPTR - get the end memory address of inflated
data 223
5.43 CMD_GETPROPS - get the image properties decompressed
by CMD_LOADIMAGE...............................................................224
5.44 CMD_SCALE - apply a scale to the current matrix .........224
5.45 CMD_ROTATE - apply a rotation to the current matrix ..227
5.46 CMD_TRANSLATE - apply a translation to the current
matrix .....................................................................................229
5.47 CMD_CALIBRATE - execute the touch screen calibration
routine ....................................................................................231
5.48 CMD_SPINNER - start an animated spinner ..................232

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5.49 CMD_SCREENSAVER - start an animated screensaver...236
5.50 CMD_SKETCH - start a continuous sketch update .........237
5.51 CMD_STOP - stop any of spinner, screensaver or sketch
239
5.52 CMD_SETFONT - set up a custom font...........................240
5.53 CMD_TRACK - track touches for a graphics object ........241
5.54 CMD_SNAPSHOT - take a snapshot of the current screen
245
5.55 CMD_LOGO - play FTDI logo animation .........................246
6FT801 operation .................................................... 247
6.1 FT801 introduction ..........................................................247
6.2 FT801 touch engine .........................................................247
6.3 FT801 touch registers .....................................................247
6.4 Register summary ...........................................................253
6.5 Calibration.......................................................................253
6.6 CMD_CSKETCH –Capacitive touch specific sketch ...........254
7Contact Information .............................................. 256
Appendix A –References ........................................... 257
Document References .............................................................257
Acronyms & Abbreviations ......................................................257
Appendix B –List of Figures & Tables ........................ 258
List of Figures .........................................................................258
List of Tables...........................................................................258
Appendix C –Memory Map ......................................... 259
Appendix D - List of Code Snippet .............................. 260
Appendix E - List of Registers .................................... 261

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Appendix F –Revision History ................................... 263

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1Introduction
This document captures programming details of FT800 series chips including graphics
commands, widget commands and configurations to control FT800 series chips for
smooth and vibrant screen effects.
The FT800 series chips are graphics controllers with add-on features such as audio
playback and touch capabilities. They consist of a rich set of graphics objects (primitive
and widgets) that can be used for displaying various menus and screen shots for a range
of products including home appliances, toys, industrial machinery, home automation,
elevators, and many more.
1.1 Overview
This document will be useful to understand the command set and demonstrate the ease
of usage in the examples given for each specific instruction. In addition, it also covers
various power modes, audio, and touch features as well as their usage.
Information on pin settings, hardware model and hardware configuration can be found in
the FT800 data sheet (DS_FT800_Embedded_Video_Engine) or FT801 datasheet
(DS_FT801).
1.2 Scope
This document is targeted for software programmers and system designers to develop
graphical user interface (GUI) applications on any system processor with either an SPI or
I2C master port.
1.3 API reference definitions
Functionality and nomenclature of the APIs used in this document.
wr8() –write 8 bits to intended address location
wr16() –write 16 bits to intended address location
wr32() –write 32 bits to intended address location
wr8s() –write 8 bits string to intended address location
rd8() –read 8 bits from intended address location
rd16() –read 16 bits from intended address location
rd32() –read 32 bits from intended address location
rd8s() –read 8 bits string from intended address location
cmd() –write 32 bits command to co-processor engine FIFO RAM_CMD

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cmd_*() –Write 32 bits co-processor engine command with its necessary parameters to
the co-processor engine FIFO (RAM_CMD).
dl() –Write the specified 32 bits display list command to RAM_DL. Refer to section 2.5.4
Writing display lists for more information.
host_command() –send host command to FT800. Refer to the FT800 data sheet for
more information.

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2Programming Model
The FT800 appears to the host MCU as a memory-mapped SPI or I2C device. The host
communicates with the FT800 using Read or Write to 8MB address space.
Within this document, endianness of DL commands, co-processor engine commands,
register values read/write, input RGB bitmap data and ADPCM input data are in ‘Little
Endian’format.
2.1 General Software architecture
The software architecture can be broadly classified into layers such as custom
applications, graphics/GUI manager, video manger, audio manager, drivers etc. FT800
higher level graphics engine commands and co-processor engine widget commands are
part of the graphics/GUI manager. Control & data paths of video and audio are part of
video manager and audio manager. Communication between graphics/GUI manager and
the hardware is via the SPI or I2C driver.
Typically the display screen shot is constructed by the custom application based on the
framework exposed by the graphics/GUI manager.

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2.2 Display configuration and initialization
To configure the display, load the timing control registers with values for the particular
display. These registers control horizontal timing:
REG_PCLK
REG_PCLK_POL
REG_HCYCLE
REG_HOFFSET
REG_HSIZE
REG_HSYNC0
REG_HSYNC1
These registers control vertical timing:
MPU
FT800
Custom
APP0
Graphics/GUI manager
Video Manager
Audio Manager
SPI/I2C Driver
Hardware
Custom
APP1
Custom
APP2
Host
software
stack
FT800 graphics
objects &
widgets to be
part of
graphics
manager
Figure 1: Software Architecture

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REG_VCYCLE
REG_VOFFSET
REG_VSIZE
REG_VSYNC0
REG_VSYNC1
And the REG_CSPREAD register changes color clock timing to reduce system noise.
GPIO bit 7 is used for the display enable pin of the LCD module. By setting the direction
of the GPIO bit to out direction, the display can be enabled by writing value of 1 into
GPIO bit 7 or the display can be disabled by writing a value of 0 into GPIO bit 7. By
default GPIO bit 7 direction is output and the value is 0.
Note: Refer to FT800 data sheet for information on display register set.
2.2.1 Horizontal timing
Figure 2: Horizontal Timing
REG_PCLK controls the frequency of PCLK. The register specifies a divisor for the main
48 MHz clock, so a value of 4 gives a 12 MHz PCLK. If REG_PCLK is zero, then all display
output is suspended. REG_PCLK_POL controls the polarity of PCLK. Zero means that
display data is clocked out on the rising edge of PCLK. One means data is clocked on the
falling edge.
The total number of PCLKs in a horizontal line is REG_HCYCLE. Within this horizontal line
are the scanned out pixels, REG_HSIZE in total. They start after REG_HOFFSET cycles.
Signal DE is high while pixels are being scanned out.
Horizontal sync timing on signal HSYNC is controlled by REG_HSYNC0 and REG_HSYNC1.
They specify the time at which HSYNC falls and rises respectively.

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2.2.2 Vertical timing
Figure 3: Vertical Timing
Vertical timing is specified in number of lines. The total number of lines in a frame is
REG_VCYCLE. There are REG_VSIZE rows of pixels in total. They start after
REG_VOFFSET cycles.
Vertical sync timing on signal VSYNC is controlled by REG_VSYNC0 and REG_VSYNC1.
They specify the lines at which VSYNC falls and rises respectively.
2.2.3 Signals updating timing control
With REG_CSPREAD disabled, all color signals are updated at the same time:
Figure 4: Pixel clocking with no CSPREAD
But with REG_CSPREAD enabled, the color signal timings are adjusted slightly so that
fewer signals change simultaneously:
Figure 5: Pixel clocking with CSPREAD

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2.2.4 Timing example: 480x272 at 60Hz
For a display updating at 60Hz, there are 48000000/60= 800000 fast clocks per frame.
Setting the PCLK divisor REG_PCLK to 5 gives a PCLK frequency of 9.6 MHz and
800000/5= 160000PCLKs per frame.
For a 480 x 272 display, the typical horizontal period is 525 clocks, and vertical period is
286 lines. A little searching shows that a 548 x 292 size gives a period of 160016 clocks,
very close to the target. So with a REG_HCYCLE=548 and REG_VCYCLE=292 the display
frequency is almost exactly 60Hz. The other register settings can be set directly from the
display panel datasheet.

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2.2.5 Initialization Sequence
This section describes the initialization sequence in the different scenario.
Initialization Sequence during the boot up:
1. Use MCU SPI clock not more than 11MHz
2. Send Host command “CLKEXT” to FT800
3. Send Host command “ACTIVE”to enable clock to FT800.
4. Configure video timing registers, except REG_PCLK
5. Write first display list
6. Write REG_DLSWAP, FT800 swaps display list immediately
7. Enable back light control for display
8. Write REG_PCLK, video output begins with the first display list
9. Use MCU SPI clock not more than 30MHz
MCU_SPI_CLK_Freq(<11MHz);//use the MCU SPI clock less than 11MHz
host_command(CLKEXT);//send command to "CLKEXT" to FT800
host_command(ACTIVE);//send host command "ACTIVE" to FT800
/* Configure display registers - demonstration for WQVGA resolution */
wr16(REG_HCYCLE,548);
wr16(REG_HOFFSET,43);
wr16(REG_HSYNC0,0);
wr16(REG_HSYNC1,41);
wr16(REG_VCYCLE,292);
wr16(REG_VOFFSET,12);
wr16(REG_VSYNC0,0);
wr16(REG_VSYNC1,10);
wr8(REG_SWIZZLE,0);
wr8(REG_PCLK_POL,1);
wr8(REG_CSPREAD,1);
wr16(REG_HSIZE,480);
wr16(REG_VSIZE,272);
/* write first display list */
wr32(RAM_DL+0,CLEAR_COLOR_RGB(0,0,0));
wr32(RAM_DL+4,CLEAR(1,1,1));
wr32(RAM_DL+8,DISPLAY());
wr8(REG_DLSWAP,DLSWAP_FRAME);//display list swap
wr8(REG_GPIO_DIR,0x80 |Ft_Gpu_Hal_Rd8(phost,REG_GPIO_DIR));
wr8(REG_GPIO,0x080 |Ft_Gpu_Hal_Rd8(phost,REG_GPIO));//enable display bit
wr8(REG_PCLK,5);//after this display is visible on the LCD
MCU_SPI_CLK_Freq(<30Mhz);//use the MCU SPI clock upto 30MHz
Code snippet 1 Initialization sequence
Initialization Sequence from Power Down using PD_N pin:

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1. Drive the PD_N pin high
2. Wait for at least 20ms
3. Execute ”Initialization Sequence during the Boot UP” from steps 1 to 9
Initialization Sequence from Sleep Mode:
1. Send Host command “ACTIVE”to enable clock to FT800
2. Wait for at least 20ms
3. Execute “Initialization Sequence during Boot Up” from steps 5 to 8
Initialization sequence from standby mode:
Execute all the steps mentioned in “Initialization Sequence from Sleep Mode”
except waiting for at least 20ms in step 2.
Note: Refer to FT800 data sheet for information on power modes. Follow section 2.3 for
audio management during power down and reset operations.
2.3 Sound Synthesizer
Sample code to play C8 on the xylophone:
wr8(REG_VOL_SOUND,0xFF); //set the volume to maximum
wr16(REG_SOUND,(0x6C<< 8)|0x41); // C8 MIDI note on xylophone
wr8(REG_PLAY,1); // play the sound
Code snippet 2 sound synthesizer play C8 on the xylophone
Sample code to check the status of sound play:
Sound_status =rd8(REG_PLAY);//1-play is going on, 0-play has finished
Code snippet 3 sound synthesizer check the status of sound playing
Sample code to stop sound play:
wr16(REG_SOUND,0x0);//configure silence as sound to be played
wr8(REG_PLAY,1);//play sound
Sound_status =rd8(REG_PLAY);//1-play is going on, 0-play has finished
Code snippet 4 sound synthesizer stop playing sound
To avoid an audio pop sound on reset or power state change, trigger a "mute" sound,
and wait for it to complete (completion of sound play is when REG_PLAY contains a value
of 0). This sets the output value to 0 level. On reboot, the audio engine plays back the
"unmute" sound to drive the output to the half way level.
Note: Refer to FT800 data sheet for more information on sound synthesizer and audio
playback.

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2.4 Audio playback
FT800 supports three types of audio format: 4 Bit IMA ADPCM, 8 Bit signed PCM, 8 Bit u-
Law. For IMA ADPCM format, please note the byte order: within one byte, first sample
(4 bits) shall locate from bit 0 to bit 3, while the second sample (4 bits) shall locate from
bit 4 to bit 7.
For the audio data in FT800 RAM to play, FT800 requires the start address in
REG_PLAYBACK_START to be 64 bit (8 Bytes) aligned. In addition, the length of audio
data specified by REG_PLAYBACK_LENGTH is required to be 64 bit (8 Bytes) aligned.
To learn how to play back the audio data, please check the sample code below:
wr8(REG_VOL_PB,0xFF);//configure audio playback volume
wr32(REG_PLAYBACK_START,0);//configure audio buffer starting address
wr32(REG_PLAYBACK_LENGTH,100*1024);//configure audio buffer length
wr16(REG_PLAYBACK_FREQ,44100);//configure audio sampling frequency
wr8(REG_PLAYBACK_FORMAT,ULAW_SAMPLES);//configure audio format
wr8(REG_PLAYBACK_LOOP,0);//configure once or continuous playback
wr8(REG_PLAYBACK_PLAY,1);//start the audio playback
Code snippet 5 Audio playback
AudioPlay_Status =rd8(REG_PLAYBACK_PLAY);//1-audio playback is going on,
0-audio playback has finished
Code snippet 6 Check the status of audio playback
wr32(REG_PLAYBACK_LENGTH,0);//configure the playback length to 0
wr8(REG_PLAYBACK_PLAY,1);//start audio playback
Code snippet 7 Stop the audio playback

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2.5 Graphics routines
This section describes graphics features and captures a few of examples.
2.5.1 Getting started
This short example creates a screen with the text "FTDI" on it, with a red dot.
Figure 6: Getting Start Example Image
The code to draw the screen is:
wr32(RAM_DL +0,CLEAR(1,1,1)); // clear screen
wr32(RAM_DL +4,BEGIN(BITMAPS)); // start drawing bitmaps
wr32(RAM_DL +8,VERTEX2II(220,110,31,'F')); // ascii F in font 31
wr32(RAM_DL +12,VERTEX2II(244,110,31,'T')); // ascii T
wr32(RAM_DL +16,VERTEX2II(270,110,31,'D')); // ascii D
wr32(RAM_DL +20,VERTEX2II(299,110,31,'I')); // ascii I
wr32(RAM_DL +24,END());
wr32(RAM_DL +28,COLOR_RGB(160,22,22)); // change color to red
wr32(RAM_DL +32,POINT_SIZE(320)); // set point size to 20 pixels in
radius
wr32(RAM_DL +36,BEGIN(POINTS)); // start drawing points
wr32(RAM_DL +40,VERTEX2II(192,133,0,0)); // red point
wr32(RAM_DL +44,END());
wr32(RAM_DL +48,DISPLAY()); // display the image
Code snippet 8 Getting Started

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After the above drawing commands are loaded into display list RAM, register
REG_DLSWAP is required to be set to 0x02 in order to make the new display list active
on the next frame refresh.
Note:
The display list always starts at address RAM_DL
The address always increments by 4(bytes) as each command is 32 bit width.
Command CLEAR is recommended to be used before any other drawing
operation, in order to put FT800 graphics engine in a known state.
The end of the display list is always flagged with the command DISPLAY
2.5.2 Coordinate Plane
The figure below illustrates the graphics coordinate plane and its visible area.
The valid X and Y coordinate ranges from -1024 to 1023 in pixel precision, i.e., from
-16384 to 16383 in 1/16th pixel precision.
Visible Area
(511,511)
511
(0,0)
511
Y
Figure 7: FT800 graphics coordinates plane in pixel precision
X
-1024
-1024
1023
1023