Compal SAPPORO M Quick start guide

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Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
153,
星期二 一月 07, 2003
Compal Electronics, inc.
LA-1691 REV0.4 Schematic Document
MCH-M(845MZ)+ICH3-M+M6-C(16MB VRAM)
Intel Mobile P4 uFCBGA/uFCPGA Northwood Celeron
2002-12-12
SAPPORO M (BTW20)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

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Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
253,
星期二 一月 07, 2003
Compal Electronics, inc.
PAGE 38
Embedded
Controller
PAGE 44
SO-DIMM x 2(DDR)
PSB
PAGE 7,8,9
PAGE 4,5,6
PAGE 14,15,16,17
PAGE 20,21,22
625 BGA
ICS9508-10
ATA 66/100
LPC BUS 33MHz (3.3V)
BATTERY
NS PC87591L
PAGE13
Charger
PAGE 42
Brookdale-M
Power Interface &
TEMP. sensing circuit
Mobile
Thermal Sensor
HUB Interface
ICH3-M
AGP
Memory Bus
BANK 0,1,2,3
PAGE 4
ClockGenerator
LPC47N227
(uFCBGA/uFCPGA)
PAGE 46,47,48
DC/DC Interface
RTC Battery
PAGE 10,11,12
48MHz (3.3V)
BTW20 LA-1691 BLOCK DIAGRAM
421 BGA
PAGE 32
Super I/O
AGP Bus
PAGE 5
CPU VID
PAGE 40
MCH-M 845MZ
ATI-M6-C
PAGE 18
CRT&LVDS
Connector
OZ168T
Audio CD-DJ
PAGE 29
PAGE 25
Slot 0/1
Northwood
SD Reader
Winbond
400MHz
200MHz
(2.5V)
266MHz
(1.8V)
FANController
PAGE 27
RJ-45
PAGE 34
Audio Hardware
PAGE 35
AC97 CODEC
PAGE 28
Mini PCI
IEEE1394
TSB43AB21
PAGE 23
PAGE 33
PAGE 30
IDE HDD
CD-ROM/DVD
USB 1.1 Port *4
33MHz (3.3V)
PCIBUS
RTL8100-B(L)
LAN
PAGE 26
PAGE 24
OZ6933
CARDBUS
EQ
MDC
PAGE 31
AC-LINK
24.576MHz
(3.3V)
Parallel
PAGE 38
BIOS & I/O PORTScan KB
PAGE 39
ALC 202
Connector
PAGE 31
REV B
REV B1
REV B1
RJ-11
PAGE 27
PAGE 30
ADM1032
PAGE 33
BlueTooth Connector
Connector
TV-OUT
PAGE 19
W83L518D
PAGE 37
2nd IDE
TPA0232
PAGE 36
AudioAmplifier
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

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Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
353,
星期二 一月 07, 2003
Compal Electronics, inc.
Voltage Rails
VIN
B+
+CPU_VCC
+1.2VP
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
1.2Vswitched power rail for CPU AGTL Bus
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
CardBus
Mini-PCI
LAN
AD20
AD18
AD17
EC SM Bus1 address
Device
ADM1032
OZ168
Docking
S1 S3 S5
ON OFF
ON OFF
N/A N/A N/A
N/AN/AN/A
Power Plane Description
OFF
OFF
Note :ON* means thatthis power plane is ON only with AC power available, otherwise it is OFF.
EC SM Bus2 address
Device
Smart Battery
2
1/4
PIRQA/PIRQB(PIRQE/PIRQF)
PIRQC/PIRQD(PIRQG/PIRQH)
EEPROM(24C16/02)
DOT Board
0011 0100 b
1001 110X b
0011 011X b
XXXX XXXXb
0001 011X b
1010 000X b
AGP 4X ON OFF OFF+1.5VS
3 PIRQB(PIRQD)
(24C04)
1011 000Xb Smart Battery 0001 011X b
ICH3 SM Bus address
Device
Clock Generator (
ICS-950810)
Address
Address Address
1101 001X
+1.25VS 1.25V switched power rail ON OFF OFF
1394
AD16 0
PIRQA
STATE SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW LOW LOW
LOWLOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
+1.2VS 1.2V switched power rail for Montara core ON OFF OFF
1394
CardBus
LAN
MINIPCI
Topology
Mount R458 RP122
Unmount R474 RP125 R533
Trace: PIRQA#_1394
Use IRQA
Trace:PIRQA#/E#
PIRQB#/F#/D#
Use IRQA IRQB
Trace:PIRQB#/F#/D#
Use IRQB
Trace:PIRQC#/G#
PIRQD#/H#
Use IRQC IRQD
Board ID Table for AD channel
Vcc 3.3V +/- 5%
100K +/- 5%Ra
Board ID
Rb V min
0
1
2
3
0
8.2K +/- 5% 0 V 0.216 V 0.250 V 0.289 V
0.436 V
0.712 V 0.503 V 0.819 V 0.538 V 0.875 V
AD_BID
V typ
AD_BID
V
AD_BID
max
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5% 3.300 V
0 V 0 V
4
5
6
7NC
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V 2.200 V 3.300 V 2.341 V
1.185 V 1.264 V
Board ID
0
1
2
3
4
5
6
7
PCB Revision
0.1 , 0.2
OFF
ON
+5V
ON
OFF
OFF
+3V
2.5V power rail
ON
ON
ON
ON
OFF
RTCVCC
3.3V power rail
OFF
ON
5V power rail
ON*
OFF
5V switched power rail
+2.5V
OFF
RTC power
3.3V switched power rail
ON
OFF
ON
ON
+12VALW
+3VS
ON
+5VALW
ON
+5VS
ON
ON
2.5V switched power rail+2.5VS
ON*ON
ON*
ON
12V always on power rail
+3VALW
OFF
ON
5V always on power rail
3.3V always on power rail
ON
OFF1.8V switched power rail ON OFF
1.8V always power rail ON ON
+1.8VS
ON*+1.8VALW
**
**
0.3
NO DIRECT CD PLAY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

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C
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D
D
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1 1
2 2
3 3
4 4
HA#[3..31]
H_THERMDA
H_THERMDC
HD#44
HD#39
HD#35
HD#2
HA#13
HA#7
HD#24
HD#15
HD#23
HD#12
HD#51
HD#49
HD#31
HD#17
HD#8
HREQ#2
HA#12
HD#57
HD#52
HD#40
HD#36
HD#25
HD#9
HD#4
HA#15
HD#33
HD#19
HD#14
HA#11
HD#32
HA#14
HA#5
HD#62
HD#53
HD#27
HD#20
HA#29
HA#27
HA#20
HD#38
HD#37
HD#7
HA#30
HA#28
HA#26
HA#17
HA#3
HD#45
HD#1
HA#19
HA#10
HA#4
HD#42
HA#9
HD#61
HD#54
HD#21
HD#10
HD#6
HA#31
HA#22
HA#18
CLK_CPU_BCLK
HD#60
HD#47
HD#28
HD#16
HREQ#3
HREQ#0
HA#23
HD#59
HD#46
HD#34
HD#29
HD#18
HREQ#4
HA#25
HA#6
HD#56
HD#50
HD#41
HD#26
HD#5HA#8
CLK_CPU_BCLK#
HD#63
HD#55
HD#43
HD#22
HD#3
HA#24
HA#21
HA#16
HREQ#[0..4]
HD#[0..63]
HD#58
HD#48
HD#30
HD#13
HD#11
HD#0
HREQ#1
HA#[3..31]7
HREQ#[0..4]7
HD#[0..63] 7
H_ADS#7
H_BPRI#7
H_LOCK#7 H_BNR#7
H_HIT#7
H_HITM#7
H_DEFER#7
H_BREQ0#7
CLK_CPU_BCLK#13 CLK_CPU_BCLK13
EC_SMC229,38
EC_SMD229,38
H_THERMDA5 H_THERMDC5
+CPU_CORE
+CPU_CORE
+3VS
+CPU_CORE
+3VS
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
453,
星期二 一月 07, 2003
Compal Electronics, inc.
Thermal Sensor
ADM1032AR
W=15mil
Address:1001_100X
MAYBEUSEDBYORDISCLOSEDTOANYTHIRD PARTYWITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THISSHEETOFENGINEERINGDRAWINGISTHE PROPRIETARYPROPERTY OFCOMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENTEXCEPTASAUTHORIZEDBY COMPALELECTRONICS,INC. NEITHERTHIS SHEET NOR THE INFORMATION IT CONTAINS
ANDTRADESECRETINFORMATION.THIS SHEET MAYNOTBETRANSFEREDFROMTHE CUSTODYOF THE COMPETENTDIVISIONOF R&D
R91 Close to U37 pinM23
**
NorthWood
Mobile
U37A
NorthWood
A#3
K2 A#4
K4 A#5
L6 A#6
K1 A#7
L3 A#8
M6 A#9
L2 A#10
M3 A#11
M4 A#12
N1 A#13
M1 A#14
N2 A#15
N4 A#16
N5 A#17
T1 A#18
R2 A#19
P3 A#20
P4 A#21
R3 A#22
T2 A#23
U1 A#24
P6 A#25
U3 A#26
T4 A#27
V2 A#28
R6 A#29
W1 A#30
T5 A#31
U4 A#32
V3 A#33
W2 A#34
Y1 A#35
AB1
REQ#0
J1 REQ#1
K5 REQ#2
J4 REQ#3
J3 REQ#4
H3 ADS#
G1
AP#0
AC1 AP#1
V5 BINIT#
AA3 IERR#
AC3
BNR#
G2 BPRI#
D2 BR0#
H6
LOCK#
G4
DEFER#
E2 HITM#
E3 HIT#
F3
D#0 B21
D#1 B22
D#2 A23
D#3 A25
D#4 C21
D#5 D22
D#6 B24
D#7 C23
D#8 C24
D#9 B25
D#10 G22
D#11 H21
D#12 C26
D#13 D23
D#14 J21
D#15 D25
D#16 H22
D#17 E24
D#18 G23
D#19 F23
D#20 F24
D#21 E25
D#22 F26
D#23 D26
D#24 L21
D#25 G26
D#26 H24
D#27 M21
D#28 L22
D#29 J24
D#30 K23
D#31 H25
D#32 M23
D#33 N22
D#34 P21
D#35 M24
D#36 N23
D#37 M26
D#38 N26
D#39 N25
D#40 R21
D#41 P24
D#42 R25
D#43 R24
D#44 T26
D#45 T25
D#46 T22
D#47 T23
D#48 U26
D#49 U24
D#50 U23
D#51 V25
D#52 U21
D#53 V22
D#54 V24
D#55 W26
D#56 Y26
D#57 W25
D#58 Y23
D#59 Y24
D#60 Y21
D#61 AA25
D#62 AA22
D#63 AA24
VCC_0 A10 VCC_1 A12 VCC_2 A14 VCC_3 A16 VCC_4 A18 VCC_5 A20 VCC_6 A8 VCC_7 AA10 VCC_8 AA12 VCC_9 AA14
VCC_10 AA16 VCC_11 AA18 VCC_12 AA8 VCC_13 AB11 VCC_14 AB13 VCC_15 AB15 VCC_16 AB17 VCC_17 AB19 VCC_18 AB7 VCC_19 AB9 VCC_20 AC10 VCC_21 AC12 VCC_22 AC14 VCC_23 AC16 VCC_24 AC18 VCC_25 AC8 VCC_26 AD11 VCC_27 AD13 VCC_28 AD15 VCC_29 AD17 VCC_30 AD19 VCC_31 AD7 VCC_32 AD9 VCC_33 AE10 VCC_34 AE12 VCC_35 AE14 VCC_36 AE16 VCC_37 AE18 VCC_38 AE20 VCC_39 AE6 VCC_40 AE8 VCC_41 AF11 VCC_42 AF13 VCC_43 AF15 VCC_44 AF17 VCC_45 AF19 VCC_46 AF2 VCC_47 AF21 VCC_48 AF5 VCC_49 AF7 VCC_50 AF9 VCC_51 B11 VCC_52 B13 VCC_53 B15 VCC_54 B17 VCC_55 B19 VCC_56 B7 VCC_57 B9 VCC_58 C10 VCC_59 C12 VCC_61 C14 VCC_62 C16 VCC_63 C18 VCC_64 C20 VCC_65 C8 VCC_66 D11 VCC_67 D13 VCC_68 D15 VCC_69 D17 VCC_70 D19 VCC_71 D7 VCC_72 D9
VCC_74
E12 VCC_75 E14 VCC_76 E16 VCC_77 E18 VCC_78 E20 VCC_79
E8 VCC_80
F11
VSS_0
H1 VSS_1 H4 VSS_2
H23 VSS_3 H26 VSS_4
A11 VSS_5 A13 VSS_6 A15 VSS_7 A17 VSS_8 A19 VSS_9 A21 VSS_10 A24 VSS_11 A26 VSS_12
A3 VSS_13 A9 VSS_14
AA1 VSS_15
AA11 VSS_16 AA13 VSS_17 AA15 VSS_18 AA17 VSS_19 AA19 VSS_20 AA23 VSS_21 AA26 VSS_22
AA4 VSS_23 AA7 VSS_24 AA9 VSS_25
AB10 VSS_26 AB12 VSS_27 AB14 VSS_28 AB16 VSS_29 AB18 VSS_30 AB20 VSS_31 AB21 VSS_32 AB24 VSS_33
AB3 VSS_34 AB6 VSS_35 AB8 VSS_36
AC11 VSS_37 AC13 VSS_38 AC15 VSS_39 AC17 VSS_40 AC19 VSS_41
AC2 VSS_42
AC22 VSS_43 AC25 VSS_44
AC5 VSS_45 AC7 VSS_46 AC9 VSS_47 AD1 VSS_48
AD10 VSS_49 AD12 VSS_50 AD14 VSS_51 AD16 VSS_52 AD18 VSS_53 AD21 VSS_54 AD23 VSS_55
AD4 VSS_56 AD8
BCLK0
AF22 BCLK1
AF23
VCC_81
F13 VCC_82 F15 VCC_83 F17 VCC_84 F19 VCC_85
F9
VCC_73 E10
C534
2200P_0402_25V7K
R31 10K_0402_5%
C537
0.1U_0402_16V4Z
R74 220_0402_5%
U34
ADM1032AR_SOP-8
VDD1 1
ALERT 6
THERM 4
GND 5
D+
2
D-
3
SCLK
8
SDATA
7
R369
4.7K_0402_5%
R370
4.7K_0402_5%

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
H_DSTBP#[0..3]
H_VSSA
TP2
H_THERMDA H_DSTBN#[0..3]
COMP0
H_SMI#
H_DSTBN#2
H_DSTBN#1
H_DPSLP#
CLK_CPU_ITP#
H_DBI#3
H_DSTBN#3
H_THERMDC
H_IGNNE#
H_THERMTRIP#
CLK_CPU_ITP
H_DBI#0
GHI#
+H_VCCIOPLL
H_DBI#2
H_DSTBN#0
H_FERR#
H_VSSA
TP1
H_DSTBP#1
TESTTHI0_1
H_RESET#
H_A20M#
TP1
ITP_TMS
COMP1
+H_VCCA
H_DSTBP#3
H_DSTBP#2
H_DSTBP#0
ITP_PREQ#
ITP_TRST#
H_PROCHOT#
TESTTHI8_10
H_DBI#[0..3]
TP2
H_INIT#
+GTLREF
H_DBI#1
ITP_PRDY#
H_INTR
H_STPCLK#
H_NMI
ITP_TCK
ITP_TDI
ITP_BPM0
ITP_BPM1
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK
ITP_PREQ#
ITP_PRDY#
ITP_BPM1
ITP_BPM0
H_PWRGD
H_RESET#
H_PWRGD
H_SMI#
H_IGNNE#
H_STPCLK#
H_DPSLP#
H_NMI
H_INTR
H_FERR#
H_A20M#
H_INIT#
H_CPUSLP#
H_THERMTRIP#
H_RS#07 H_RS#17 H_RS#27
H_TRDY#7
H_A20M#20
H_PWRGD20
H_FERR#20
H_CPURST#7
H_IGNNE#20
H_STPCLK#20
H_INTR20
H_DPSLP#20
H_DBSY#7H_DRDY#7H_BSEL013 H_BSEL113
H_DSTBP#[0..3] 7
H_ADSTB#0 7
H_ADSTB#1 7
H_DBI#[0..3] 7
H_CPUSLP# 20
H_DSTBN#[0..3] 7
CLK_CPU_ITP#13
CLK_CPU_ITP13
H_INIT#20
H_SMI#20
CPU_VID1 48
CPU_VID2 48
CPU_VID4 48
CPU_VID0 48
CPU_VID3 48
H_NMI20
PM_CPUPERF# 20
H_THERMDA4 H_THERMDC4
EC_CPUPD#38
+1.2VP
+1.2VP
+CPU_CORE
+CPU_CORE
+3VS
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+5V
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
553,
星期二 一月 07, 2003
Compal Electronics, inc.
Murata
LQG21F4R7N00
R84 R87 placed with in 0.5" of processor,
and at least 25mils away from other signals
Place pull up resistors near processor
2/3VCORE
CPU Voltage ID
2. Place decoupling cap 220PF near CPU.(Within 500mils)
1. Place R381 and R382 within 0.5" of processor pin F20
Layout note :
Place R65 near to U40 pinAB23
Place R420 near to U12 pinW20
TP1 and TP2 must have test points
3. GTLREF trace width 7 mils, and keep 10mils separated
from other signals
***
**
+
C473
33UF_D2_16V
12
R62 51_0603
12
C24
0.1U_0402_16V4Z
R164 200_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R181 56_0402_5%
R39 56_0402_5%
R40 56_0402_5%
R174 200_0402_5%
R381
100_0402_1%
R21 51.1_1%_0603
12
R378
49.9_0402_1%
R324
1K_0402_5%
L3 4.7UH_80mA_0805
1 2
R67
51.1_1%_0603
1 2
R48 300_0402_5%
R49 56_0402_5%
R551
10K
12
R85
56_0402_5%
R546
200_0402_5%
R79
300_0402_5%
R350 56_0402_5%
R162 200_0402_5%
C544
220P_0402_25V8K
R68 51_0603
12
R86
@0_0402_5%
Q47
3904 2
3 1
R351 56_0402_5%
R552
470
12
Mobile
NorthWood
U37B
NorthWood
RS#0
F1 RS#1
G5 RS#2
F4 RSP#
AB2 TRDY#
J6
A20M#
C6 FERR#
B6 IGNNE#
B2 SMI#
B5 PWRGOOD
AB23 STPCLK#
Y4 DPSLP#
AD25 LINT0
D1 LINT1
E5 INIT#
W5 RESET#
AB25
DRDY#
H2 DBSY#
H5
THERMDC
C4 THERMDA
B3
TDI
C1 TCK
D4
TDO
D5 TMS
F7 TRST#
E6
COMP1
P1 COMP0
L24
DP#0 J26
DP#1 K25
DP#2 K26
DP#3 L25
VSS_57 AE11 VSS_58 AE13 VSS_59 AE15 VSS_60 AE17 VSS_61 AE19 VSS_62 AE22 VSS_63 AE24 VSS_64 AE26 VSS_65 AE7 VSS_66 AE9 VSS_67 AF1 VSS_68 AF10 VSS_69 AF12 VSS_70 AF14 VSS_71 AF16 VSS_72 AF18 VSS_73 AF20
SKTOCC# AF26
VSS_75 AF6 VSS_76 AF8 VSS_77 B10 VSS_78 B12 VSS_79 B14 VSS_80 B16 VSS_81 B18 VSS_82 B20 VSS_83 B23 VSS_84 B26 VSS_85 B4 VSS_86 B8 VSS_87 C11 VSS_88 C13 VSS_89 C15 VSS_90 C17 VSS_91 C19 VSS_92 C2 VSS_93 C22 VSS_94 C25 VSS_95 C5 VSS_96 C7 VSS_97 C9 VSS_98 D10 VSS_99 D12
VSS_100 D14 VSS_101 D16 VSS_102 D18 VSS_103 D20 VSS_104 D21 VSS_105 D24 VSS_106 D3 VSS_107 D6 VSS_108 D8 VSS_109 E1 VSS_110 E11 VSS_111 E13 VSS_112 E15 VSS_113 E17 VSS_114 E19 VSS_115 E23 VSS_116 E26 VSS_117 E4 VSS_118 E7 VSS_119 E9 VSS_120 F10 VSS_121 F12 VSS_122 F14 VSS_123 F16 VSS_124 F18 VSS_125 F2 VSS_126 F22 VSS_127 F25 VSS_128 F5
VID0
AE5 VID1 AE4 VID2 AE3 VID3 AE2 VID4 AE1
GTLREF0 AA21
GTLREF1 AA6
GTLREF2 F20
GTLREF3 F6
NC1 A22
NC2 A7
TESTHI0 AD24
TESTHI1 AA2
TESTHI2 AC21
TESTHI3 AC20
TESTHI4 AC24
TESTHI5 AC23
TESTHI6 AA20
TESTHI7 AB22
TESTHI8 U6
TESTHI9 W4
TESTHI10 Y3
GHI# A6
VSS_129
F8 VSS_130
G21 VSS_131 G24 VSS_132
G3 VSS_133 G6 VSS_134
J2 VSS_135
J22 VSS_136 J25 VSS_137
J5 VSS_138
K21 VSS_139 K24 VSS_140
K3 VSS_141 K6 VSS_142
L1 VSS_143
L23 VSS_144 L26 VSS_145
L4 VSS_146
M2 VSS_147
M22 VSS_148 M25 VSS_149
M5 VSS_150
N21 VSS_151 N24 VSS_152
N3 VSS_153 N6 VSS_154
P2 VSS_155
P22 VSS_156 P25 VSS_157
P5 VSS_158
R1 VSS_159
R23 VSS_160 R26 VSS_161
R4 VSS_162
T21 VSS_163 T24 VSS_164
T3 VSS_165 T6 VSS_166
U2 VSS_167
U22 VSS_168 U25 VSS_169
U5 VSS_170
V1 VSS_171
V23 VSS_172 V26 VSS_173
V4 VSS_174
W21 VSS_175 W24 VSS_176
W3 VSS_177 W6 VSS_178
Y2 VSS_179
Y22 VSS_180 Y25 VSS_181
Y5
BSEL0
AD6 BSEL1
AD5
BPM#0
AC6 BPM#1
AB5 BPM#2
AC4 BPM#3
Y6 BPM#4
AA5 BPM#5
AB4
DSTBN#0 E22
DSTBN#1 K22
DSTBN#2 R22
DSTBN#3 W22
DSTBP#0 F21
DSTBP#1 J23
DSTBP#2 P23
DSTBP#3 W23
ITP_CLK0
AC26 ITP_CLK1
AD26
ADSTB#0 L5
ADSTB#1 R5
DBI#0 E21
DBI#1 G25
DBI#2 P26
DBI#3 V21
DBR# AE25
VCCA
AD20 VCCSENSE
A5 VCCIOPLL
AE23
VCCVID
AF4
THERMTRIP#
A2
PROCHOT# C3
MCERR# V6
SLP# AB26
VSSA AD22
VSSSENSE A4
NC3 AD2
NC4 AD3
NC5
AE21 NC6
AF24
NC7
AF25 NC8
AF3
R349 56_0402_5%
R83
@0_0402_5%
R469 470
12
R177 200_0402_5%
L2 4.7UH_80mA_0805
1 2
RP6
1.5K_8P4R_0804_5%
1 8
2 7
3 6
4 5
R359 56_0402_5%
C149
1U_0603_10V6K
R45 56_0402_5%
R165 200_0402_5%
R56 51_0603
12
RP118
1K_8P4R_0804_5%
1 8 2 7 3 6 4 5
R36 56_0402_5%
+
C3
33UF_D2_16V
12
R69
51.1_1%_0603
1 2
R66 51_0603
12
R171 200_0402_5%
R167 200_0402_5%
R352 56_0402_5%
R169 200_0402_5%
Q53
3904 2
3 1
R357 56_0402_5%
R78
56_0402_5%

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
653,
星期二 一月 07, 2003
Compal Electronics, inc.
Layout note :
Place .22uF caps underneath balls on solder side.
Use 2~3 vias per PAD.
Place 10uF caps on the peripheral near balls.
Place close to CPU, Use 2~3 vias per PAD.
Please place these cap in the socket cavity area
Please place these cap on the socket north side
Please place these cap on the socket south side
Used ESR 25m ohm cap total ESR=2.5m ohm
Layout note :
Place close to CPU power and
ground pin as possible
(<1inch)
C16
10U_1206_6.3V6M
+
C54
220UF_D2_4V_25m
12
C75
0.22U_0603_16V7K_V1
+
C80
220UF_D2_4V_25m
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C511
0.22U_0603_16V7K_V1
C148
10U_1206_6.3V6M
+
C53
220UF_D2_4V_25m
12
C26
10U_1206_6.3V6M
+
C103
220UF_D2_4V_25m
12
C509
0.22U_0603_16V7K_V1
C173
10U_1206_6.3V6M
C25
10U_1206_6.3V6M
C174
10U_1206_6.3V6M
C36
10U_1206_6.3V6M
C30
10U_1206_6.3V6M
C191
10U_1206_6.3V6M
C122
0.22U_0603_16V7K_V1
C6
10U_1206_6.3V6M
C178
10U_1206_6.3V6M
+
C153
220UF_D2_4V_25m
12
C74
0.22U_0603_16V7K_V1
C70
10U_1206_6.3V6M
C512
0.22U_0603_16V7K_V1
C68
10U_1206_6.3V6M
+
C84
220UF_D2_4V_25m
12
C147
10U_1206_6.3V6M
C199
10U_1206_6.3V6M
C66
10U_1206_6.3V6M
C175
10U_1206_6.3V6M
C540
10U_1206_6.3V6M
+
C128
220UF_D2_4V_25m
12
C179
10U_1206_6.3V6M
C160
10U_1206_6.3V6M
C31
10U_1206_6.3V6M
C42
10U_1206_6.3V6M
+
C106
220UF_D2_4V_25m
12
C33
10U_1206_6.3V6M
C13
10U_1206_6.3V6M
C67
10U_1206_6.3V6M
C150
10U_1206_6.3V6M
C187
10U_1206_6.3V6M
C69
10U_1206_6.3V6M
C541
0.22U_0603_16V7K_V1
C32
10U_1206_6.3V6M
C144
0.22U_0603_16V7K_V1
+
C140
220UF_D2_4V_25m
12
C163
10U_1206_6.3V6M
C170
10U_1206_6.3V6M
C15
10U_1206_6.3V6M
+
C155
220UF_D2_4V_25m
12
C510
0.22U_0603_16V7K_V1
C151
10U_1206_6.3V6M
C14
10U_1206_6.3V6M
C34
10U_1206_6.3V6M
C158
10U_1206_6.3V6M
C183
10U_1206_6.3V6M
C208
10U_1206_6.3V6M
C530
0.22U_0603_16V7K_V1

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HREQ#[0..4]
HA#[3..31] HD#[0..63]
H_DBI#[0..3]
AGP_AD[0..31] HUB_PD[0..10]
HA#27
HA#14
HA#11
HA#22
HA#20
HA#12
HREQ#4
HA#23
HA#17
HA#30
HA#21
HA#9
HA#3
HA#16
HA#26
HA#24
HA#18
HA#31
HA#29
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HA#28
HA#15
HA#7
HA#6
HA#4
HA#25
HA#10
HA#5
HA#13
HA#8
HA#19
HD#52
HD#43
HD#14
HD#41
HD#40
HD#39
HD#38
HD#9
HD#26
HD#25
HD#63
HD#19
HD#15
HD#10
HD#33
HD#16
HD#51
HD#50
HD#42
HD#32
HD#31
HD#30
HD#12
HD#62
HD#8
HD#6
HD#11
HD#5
HD#3
HD#57
HD#56
HD#55
HD#54
HD#53
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#18
HD#29
HD#1
HD#0
HD#28
HD#27
HD#24
HD#23
HD#22
HD#21
HD#20
HD#17
HD#13
HD#2
HD#61
HD#60
HD#7
HD#4
HD#59
HD#58
HD#37
HD#36
HD#35
HD#34
CLK_GHT
H_DSTBN#3
H_DSTBN#0
H_DSTBN#1
H_DSTBP#0
H_DSTBP#2
H_DSTBP#1
H_DSTBN#2
H_DSTBP#3
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
AGP_FRAME#
AGP_DEVSEL#
AGP_IRDY#
AGP_TRDY#
AGP_STOP#
AGP_PAR
AGP_REQ#
AGP_GNT#
AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3
AGP_PIPE#
AGP_ST0
AGP_ADSTB0
AGP_ADSTB0#
AGP_ADSTB1
AGP_ADSTB1#
AGP_ST1
AGP_ST2
CLK_MCH_66M
AGP_RBF#
AGP_WBF#
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
HLRCOMP
H_DSTBP#[0..3]
H_DSTBN#[0..3]
H_SWNG0
H_SWNG1
AGP_FRAME#
AGP_TRDY#
AGP_PAR
AGP_STOP#
AGP_GNT#
AGP_REQ#
AGP_IRDY#
AGP_DEVSEL#
AGP_WBF#
AGP_PIPE#
AGP_RBF#
AGP_ST2
AGP_ADSTB0
AGP_ADSTB1
AGP_SBSTB
AGP_ADSTB0#
AGP_ADSTB1#
AGP_SBSTB#
AGP_ST0 AGP_ST1
AGP_SBSTB#
AGP_SBSTB
AGP_SBA2
AGP_SBA7
AGP_SBA3
AGP_SBA[0..7]
AGP_SBA4
AGP_SBA5
AGP_SBA0
AGP_SBA1
AGP_SBA6
CLK_GHT#
CLK_MCH_66M
HA#[3..31]4
HREQ#[0..4]4
HD#[0..63] 4
H_ADS#4
H_BPRI#4H_LOCK#4
H_BNR#4
H_HIT#4
H_HITM#4
H_DEFER#4
H_RS#05H_RS#15H_RS#25
H_TRDY#5
PCIRST#
3
,24,25,26,28,30,32,37,38
H_DBSY#5H_DRDY#5
H_ADSTB#05 H_ADSTB#15
H_DBI#[0..3]5
H_BREQ0#4
AGP_AD[0..31]14
AGP_C/BE#[0..3]14
AGP_ST[0..2]14
AGP_ADSTB014
AGP_REQ#14
F_AGP_ADSTB0#14 AGP_ADSTB114 F_AGP_ADSTB1#14
AGP_FRAME#14 AGP_DEVSEL#14 AGP_IRDY#14 AGP_TRDY#14 AGP_STOP#14 AGP_PAR14
AGP_GNT#14
CLK_MCH_66M 13
AGP_RBF# 14
HUB_PD[0..10] 20
HUB_PSTRB 20
HUB_PSTRB# 20
CLK_MCH_BCLK13
H_DSTBP#[0..3] 5
H_DSTBN#[0..3] 5
AGP_SBSTB14 F_AGP_SBSTB#14
AGP_SBA[0..7] 14
CLK_MCH_BCLK#13
H_CPURST#5
+AGP_REF
+VS_HUBREF
+CPU_CORE
+V_MCH_GTLREF
+1.8VS
+1.8VS
+VS_HUBREF
+CPU_CORE
+CPU_CORE
+1.5VS
+1.5VS
+1.5VS
+AGP_REF
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
753, 星期二 一月 07, 2003
Compal Electronics, inc.
Place this cap near MCH
R_E
R_F
1. Place R_E and R_F near MCH
2. Place decoupling cap 220PF near MCH pin.(Within
500mils)
GTL Reference Voltage
Layout note :
HUB Interface Reference
1. Place R_C and R_D in middle of Bus.
2. Place capacitors near MCH.
Layout note :
R_C
R_D
Place closely pin P22
Place closely
ball P26
Trace
width>=7mila
AGP_ST1
0=533Mhz
1=400Mhz
AGP_ST0
0=System memory is DDR
1=System memory is SDR
R18
150_1%_0603
12
R368 36.5_1%_0603
1 2
AGP
HUB
U33B
BROOKDALE(MCH-M)
G_AD0
R27 G_AD1
R28 G_AD2
T25 G_AD3
R25 G_AD4
T26 G_AD5
T27 G_AD6
U27 G_AD7
U28 G_AD8
V26 G_AD9
V27 G_AD10
T23 G_AD11
U23 G_AD12
T24 G_AD13
U24 G_AD14
U25 G_AD15
V24 G_AD16
Y27 G_AD17
Y26 G_AD18
AA28 G_AD19
AB25 G_AD20
AB27 G_AD21
AA27 G_AD22
AB26 G_AD23
Y23 G_AD24
AB23 G_AD25
AA24 G_AD26
AA25 G_AD27
AB24 G_AD28
AC25 G_AD29
AC24 G_AD30
AC22 G_AD31
AD24
G_C/BE#0
V25 G_C/BE#1
V23 G_C/BE#2
Y25 G_C/BE#3
AA23
G_FRAME#
Y24 G_DEVSEL#
W28 G_IRDY#
W27 G_TRDY#
W24 G_STOP#
W23 G_PAR
W25 G_REQ#
AG24 G_GNT#
AH25 PIPE#
AF22
AD_STB0
R24 AD_STB#0
R23 AD_STB1
AC27 AD_STB#1
AC28 SB_STB
AF27 SB_STB#
AF26
ST0
AG25 ST1
AF24 ST2
AG26
HI_0 P25
HI_1 P24
HI_2 N27
HI_3 P23
HI_4 M26
HI_5 M25
HI_6 L28
HI_7 L27
HI_8 M27
HI_9 N28
HI_10 M24
HI_STB N25
HI_STB# N24
HLRCOMP P27
HI_REF P26
SBA0 AH28
SBA1 AH27
SBA2 AG28
SBA3 AG27
SBA4 AE28
SBA5 AE27
SBA6 AE24
SBA7 AE25
RBF# AE22
WBF# AE23
66IN P22
GRCOMP AD25
AGPREF AA21
VSS0
N22 VSS1
K27 VSS2
K5 VSS3
L24 VSS4
M23 VSS5
K7 VSS6
J26 VSS7
A3 VSS8
A7 VSS9
A11 VSS10
A15
VSS11 A19
VSS12 A23
VSS13 A27
VSS14 D5
VSS15 D9
VSS16 D13
VSS17 D17
VSS18 D21
VSS19 E1
VSS20 E4
VSS21 E26
VSS22 E29
VSS23 F8
VSS24 F12
VSS25 F16
VSS26 F20
VSS27 F24
VSS28 G26
VSS29 H9
VSS30 H11
VSS31 H13
VSS32 H15
VSS33 H17
VSS34 H19
VSS35 H21
VSS36 J1
VSS37 J4
VSS38 J6
VSS39 J22
VSS40 J29
C102
@10PF
C94
.01UF
12
R33 8.2K
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HOST
U33A
BROOKDALE(MCH-M)
HD#0 AA2
HD#1 AB5
HD#2 AA5
HD#3 AB3
HD#4 AB4
HD#5 AC5
HD#6 AA3
HD#7 AA6
HD#8 AE3
HD#9 AB7
HD#10 AD7
HD#11 AC7
HD#12 AC6
HD#13 AC3
HD#14 AC8
HD#15 AE2
HD#16 AG5
HD#17 AG2
HD#18 AE8
HD#19 AF6
HD#20 AH2
HD#21 AF3
HD#22 AG3
HD#23 AE5
HD#24 AH7
HD#25 AH3
HD#26 AF4
HD#27 AG8
HD#28 AG7
HD#29 AG6
HD#30 AF8
HD#31 AH5
HD#32 AC11
HD#33 AC12
HD#34 AE9
HD#35 AC9
HD#36 AE10
HD#37 AD9
HD#38 AG9
HD#39 AC10
HD#40 AE12
HD#41 AF10
HD#42 AG11
HD#43 AG10
HD#44 AH11
HD#45 AG12
HD#46 AE13
HD#47 AF12
HD#48 AG13
HD#49 AH13
HD#50 AC14
HD#51 AF14
HD#52 AG14
HD#53 AE14
HD#54 AG15
HD#55 AG16
HD#56 AG17
HD#57 AH15
HD#58 AC17
HD#59 AF16
HD#60 AE15
HD#61 AH17
HD#62 AD17
HD#63 AE16
HA#3
T4 HA#4
T5 HA#5
T3 HA#6
U3 HA#7
R3 HA#8
P7 HA#9
R2 HA#10
P4 HA#11
R6 HA#12
P5 HA#13
P3 HA#14
N2 HA#15
N7 HA#16
N3 HA#17
K4 HA#18
M4 HA#19
M3 HA#20
L3 HA#21
L5 HA#22
K3 HA#23
J2 HA#24
M5 HA#25
J3 HA#26
L2 HA#27
H4 HA#28
N5 HA#29
G2 HA#30
M6 HA#31
L7
CPURST#
AE17
HIT#
Y5 HITM#
Y3
RS#0
W2 RS#1
W7 RS#2
W6
HREQ#0
U6 HREQ#1
T7 HREQ#2
R7 HREQ#3
U5 HREQ#4
U2
HDSTBN#0 AD4
HDSTBN#1 AE6
HDSTBN#2 AE11
HDSTBN#3 AC15
HDSTBP#0 AD3
HDSTBP#1 AE7
HDSTBP#2 AD11
HDSTBP#3 AC16
HADSTB#0
R5 HADSTB#1
N6
HTRDY#
U7 DEFER#
Y4 BPRI#
Y7 HLOCK#
W5 RSTIN#
J27 TESTIN#
H26 DBSY#
V5 DRDY#
V4
ADS#
V3 BNR#
W3
BREQ#0
V7
BCLK
J8 BCLK#
K8
HSWNG0
AA7 HSWNG1
AD13
DBI#0
AD5 DBI#1
AG4 DBI#2
AH9 DBI#3
AD15
HVREF0 M7
HVREF1 R8
HVREF2 Y8
HVREF3 AB11
HVREF4 AB17
HRCOMP0
AC2 HRCOMP1
AC13
R44
301_1%_0603
12
R34 @8.2K
12
R35
24.9_0603_1%
12
R20 36.5_1%_0603
12
C533
@470PF_0603
12
R43
100_1%_0603
12
C50
.01UF
12
R17
301_1%_0603
12
R313 2K
12 R311 8.2K 12
RP120 @8P4R_8.2K
1 8
2 7
3 6
4 5
C504
.1UF
12
C19
.01UF
12
RP121 @8P4R_8.2K
1 8
2 7
3 6
4 5
C52
.1UF
12
R346
1K_1%_0603
12
R63
@33
1 2
C57
1UF_0603
R316 @8.2K
12
R340
1K_1%_0603
12
R376
@56.2_1%_0603
12
R59 8.2K
12
R429
301_1%_0603
12
R428
301_1%_0603
12
R54 @8.2K
12
R37
24.9_0603_1%
12
R317 8.2K
12 R318 @8.2K 12
C55
220PF
R51
150_1%_0603
12
R42
49.9_1%_0603
12
R312 8.2K
12
R64
0
12
RP119 @8P4R_8.2K
1 8
2 7
3 6
4 5
C97
.01UF
12

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
VSS_MCH_PLL0
DDR_SDQ[0..63]
DDR_SMA[0..12]
DDR_SDQ0
DDR_SDQ1
DDR_SDQ2
DDR_SDQ3
DDR_SDQ4
DDR_SDQ5
DDR_SDQ6
DDR_SDQ7
DDR_SDQ8
DDR_SDQ9
DDR_SDQ10
DDR_SDQ11
DDR_SDQ12
DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
DDR_SDQ16
DDR_SDQ17
DDR_SDQ18
DDR_SDQ19
DDR_SDQ20
DDR_SDQ21
DDR_SDQ22
DDR_SDQ23
DDR_SDQ24
DDR_SDQ25
DDR_SDQ26
DDR_SDQ27
DDR_SDQ28
DDR_SDQ29
DDR_SDQ30
DDR_SDQ31
DDR_SDQ32
DDR_SDQ33
DDR_SDQ34
DDR_SDQ35
DDR_SDQ36
DDR_SDQ37
DDR_SDQ38
DDR_SDQ39
DDR_SDQ40
DDR_SDQ41
DDR_SDQ42
DDR_SDQ43
DDR_SDQ44
DDR_SDQ45
DDR_SDQ46
DDR_SDQ47
DDR_SDQ48
DDR_SDQ49
DDR_SDQ50
DDR_SDQ51
DDR_SDQ52
DDR_SDQ53
DDR_SDQ54
DDR_SDQ55
DDR_SDQ56
DDR_SDQ57
DDR_SDQ58
DDR_SDQ59
DDR_SDQ60
DDR_SDQ61
DDR_SDQ62
DDR_SDQ63
DDR_SCS#3
DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SDQS0
DDR_SDQS1
DDR_SDQS2
DDR_SDQS3
DDR_SDQS4
DDR_SDQS5
DDR_SDQS6
DDR_SDQS7
DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12
DDR_SBS0
DDR_SBS1
DDR_CKE0
DDR_CKE1
DDR_CKE2
DDR_CKE3
DDR_SCAS#
DDR_SRAS#
DDR_SWE#
DDR_SMA7
VSS_MCH_PLL1
VCC_MCH_PLL1
VCC_MCH_PLL0
+SM_RCOMP
RCVOUT#
RCVIN#
DDR_SDQ[0..63]10
DDR_SDQS2 10
DDR_SDQS3 10
DDR_SDQS1 10
DDR_SDQS0 10
DDR_SDQS7 10
DDR_SDQS6 10
DDR_SDQS5 10
DDR_SDQS4 10
DDR_SMA[0..12] 10,11,12
DDR_SBS0 10,11,12
DDR_SBS1 10,11,12
DDR_CKE2 11,12
DDR_CKE3 11,12
DDR_CKE1 10,12
DDR_CKE0 10,12
DDR_SCS#1 10,12
DDR_SCS#3 11,12
DDR_SCS#0 10,12
DDR_SCS#2 11,12
DDR_SCAS# 10,11,12
DDR_SWE# 10,11,12
DDR_SRAS# 10,11,12
DDR_CLK0 10
DDR_CLK0# 10
DDR_CLK1 10
DDR_CLK1# 10
DDR_CLK3 11
DDR_CLK3# 11
DDR_CLK4 11
DDR_CLK4# 11
+CPU_CORE
+2.5V
+1.5VS
+1.8VS
+1.25VS
+1.5VS
+SDREF
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
853, 星期二 一月 07, 2003
Compal Electronics, inc.
Layout note :
Trace width 5mil ; Spacing 10mil
Trace A to ball U7/T13 or U7/T7 =1.5" Max
"Trace A"
"Trace A" "Trace A"
"Trace A"
Layout note
Please closely pinJ21 and J9
Murata
LQG21N4R7K10
Layout note
Place R_J closely Ball H3<40mil,Ball H3 to G3 trace must
routing 1"
R_J
Layout note
Place R563 closely
pinJ28
POWER/GND
U33D
BROOKDALE(MCH-M)
VTT_0
M8 VTT_1
U8 VTT_2
AA9 VTT_3
AB8 VTT_4
AB18 VTT_5
AB20 VTT_6
AC19 VTT_7
AD18 VTT_8
AD20 VTT_9
AE19 VTT_10
AE21 VTT_11
AF18 VTT_12
AF20 VTT_13
AG19 VTT_14
AG21 VTT_15
AG23 VTT_16
AJ19 VTT_17
AJ21 VTT_18
AJ23
VCCSM1
A5 VCCSM2
A9 VCCSM3
A13 VCCSM4
A17 VCCSM5
A21 VCCSM6
A25 VCCSM7
C1 VCCSM8
C29 VCCSM9
D7 VCCSM10
D11 VCCSM11
D15 VCCSM12
D19 VCCSM13
D23 VCCSM14
D25 VCCSM15
F6 VCCSM16
F10 VCCSM17
F14 VCCSM18
F18 VCCSM19
F22 VCCSM20
G1 VCCSM21
G4 VCCSM22
G29 VCCSM23
H8 VCCSM24
H10 VCCSM25
H12 VCCSM26
H14 VCCSM27
H16 VCCSM28
H18 VCCSM29
H20 VCCSM30
H22 VCCSM31
H24 VCCSM32
K22 VCCSM33
K24 VCCSM34
K26 VCCSM35
L23 VCCSM36
K6 VCCSM37
J5 VCCSM38
J7
VCC1_5_0 R22
VCC1_5_1 R29
VCC1_5_2 U22
VCC1_5_3 U26
VCC1_5_4 W22
VCC1_5_5 W29
VCC1_5_6 AA22
VCC1_5_7 AA26
VCC1_5_8 AB21
VCC1_5_9 AC29
VCC1_5_10 AD21
VCC1_5_11 AD23
VCC1_5_12 AE26
VCC1_5_13 AF23
VCC1_5_14 AG29
VCC1_5_15 AJ25
VCC1_5_16 N14
VCC1_5_17 N16
VCC1_5_18 P13
VCC1_5_19 P15
VCC1_5_20 P17
VCC1_5_21 R14
VCC1_5_22 R16
VCC1_5_23 T15
VCC1_5_24 U14
VCC1_5_25 U16
VCC1_8_0 L29
VCC1_8_1 N26
VCC1_8_2 L25
VCC1_8_3 M22
VCC1_8_4 N23
VCCGA1 T17
VCCHA1 T13
VSSGA2 U17
VSSHA2 U13
VSS41
L1 VSS42
L4 VSS43
L6 VSS44
L8 VSS45
L22 VSS46
L26 VSS47
N1 VSS48
N4 VSS49
N8 VSS50
N13 VSS51
N15 VSS52
N17 VSS53
N29 VSS54
P6 VSS55
P8 VSS56
P14 VSS57
P16 VSS58
R1 VSS59
R4 VSS60
R13 VSS61
R15 VSS62
R17 VSS63
R26 VSS64
T6 VSS65
T8 VSS66
T14 VSS67
T16 VSS68
T22 VSS69
U1 VSS70
U4 VSS71
U15 VSS72
U29 VSS73
V6 VSS74
V8 VSS75
V22 VSS76
W1 VSS77
W4 VSS78
W8 VSS79
W26 VSS80
Y6 VSS81
Y22 VSS82
AA1
VSS83 AA4
VSS84 AA8
VSS85 AA29
VSS86 AB6
VSS87 AB9
VSS88 AB10
VSS89 AB12
VSS90 AB13
VSS91 AB14
VSS92 AB15
VSS93 AB16
VSS94 AB19
VSS95 AB22
VSS96 AC1
VSS97 AC4
VSS98 AC18
VSS99 AC20
VSS100 AC21
VSS101 AC23
VSS102 AC26
VSS103 AD6
VSS104 AD8
VSS105 AD10
VSS106 AD12
VSS107 AD14
VSS108 AD16
VSS109 AD19
VSS110 AD22
VSS111 AE1
VSS112 AE4
VSS113 AE18
VSS114 AE20
VSS115 AE29
VSS116 AF5
VSS117 AF7
VSS118 AF9
VSS119 AF11
VSS120 AF13
VSS121 AF15
VSS122 AF17
VSS123 AF19
VSS124 AF21
VSS125 AF25
VSS126 AG1
VSS127 AG18
VSS128 AG20
VSS129 AG22
VSS130 AH19
VSS131 AH21
VSS132 AH23
VSS133 AJ3
VSS134 AJ5
VSS135 AJ7
VSS136 AJ9
VSS137 AJ11
VSS138 AJ13
VSS139 AJ15
VSS140 AJ17
VSS141 AJ27
R73 30.1_1%
12
R75 0_0402
12
+
C95
33UF_D2_16V
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C117
.1UF_0402_X5R
12
C120 .1UF_0402_X5R
C146 @47PF
+
C96
33UF_D2_16V
12
L10
4.7UH_30mA
12
MEMORY
U33C
BROOKDALE(MCH-M)
SDQ0
G28 SDQ1
F27 SDQ2
C28 SDQ3
E28 SDQ4
H25 SDQ5
G27 SDQ6
F25 SDQ7
B28 SDQ8
E27 SDQ9
C27 SDQ10
B25 SDQ11
C25 SDQ12
B27 SDQ13
D27 SDQ14
D26 SDQ15
E25 SDQ16
D24 SDQ17
E23 SDQ18
C22 SDQ19
E21 SDQ20
C24 SDQ21
B23 SDQ22
D22 SDQ23
B21 SDQ24
C21 SDQ25
D20 SDQ26
C19 SDQ27
D18 SDQ28
C20 SDQ29
E19 SDQ30
C18 SDQ31
E17 SDQ32
E13 SDQ33
C12 SDQ34
B11 SDQ35
C10 SDQ36
B13 SDQ37
C13 SDQ38
C11 SDQ39
D10 SDQ40
E10 SDQ41
C9 SDQ42
D8 SDQ43
E8 SDQ44
E11 SDQ45
B9 SDQ46
B7 SDQ47
C7 SDQ48
C6 SDQ49
D6 SDQ50
D4 SDQ51
B3 SDQ52
E6 SDQ53
B5 SDQ54
C4 SDQ55
E5 SDQ56
C3 SDQ57
D3 SDQ58
F4 SDQ59
F3 SDQ60
B2 SDQ61
C2 SDQ62
E2 SDQ63
G5
SDQ64/CB0
C16 SDQ65/CB1
D16 SDQ66/CB2
B15 SDQ67/CB3
C14 SDQ68/CB4
B17 SDQ69/CB5
C17 SDQ70/CB6
C15 SDQ71/CB7
D14
SCK0 E14
SCK#0 F15
SCK1 J24
SCK#1 G25
SCK2 G6
SCK#2 G7
SCK3 G15
SCK#3 G14
SCK4 E24
SCK#4 G24
SCK5 H5
SCK#5 F5
SDQS0 F26
SDQS1 C26
SDQS2 C23
SDQS3 B19
SDQS4 D12
SDQS5 C8
SDQS6 C5
SDQS7 E3
SDQS8 E15
SMA0/CS#11 E12
SMA1/CS#10 F17
SMA3/CS#9 G18
SMA4/CS#5 G19
SMA5/CS#8 E18
SMA6/CS#7 F19
SMA7/CS#4 G21
SMA8/CS#3 G20
SMA9/CS#0 F21
SMA10 F13
SMA11/CS#2 E20
SMA12/CS#1 G22
SBS0 G12
SBS1 G13
SCKE0 G23
SCKE1 E22
SCKE2 H23
SCKE3 F23
SCKE4 J23
SCKE5 K23
SCK6 K25
SCK#6 J25
SCK7 G17
SCK#7 G16
SCK8 H7
SCK#8 H6
SCS#0 E9
SCS#1 F7
SCS#2 F9
SCS#3 E7
SCS#4 G9
SCS#5 G10
SMRCOMP J28
SMA2/CS#6 E16
RCVENIN# G3
RCVENOUT# H3
SSI_ST H27
SRAS# F11
SWE# G11
SCAS# G8
SDREF0
J21 SDREF1
J9 NC0 AD26
NC1 AD27
L7
4.7UH_30mA
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+CPU_CORE
+CPU_CORE
+CPU_CORE
+1.5VS
+1.5VS
+1.8VS
+2.5V
+2.5V
+2.5V
+2.5V
Title
Size Document Number R ev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
953¬P , 07, 2003 期二 一月
Compal Electronics, inc.
Layout note :
Distribute as close as possible
to MCH Processor Quadrant.(between VTTFSB and VSS pin)
Layout note :
Distribute as close as possible
to MCH Processor Quadrant.(between VCCAGP/VCCCORE
and VSS pin)
Layout note :
Distribute as close as possible
to MCH Processor Quadrant.(between VCCHL and VSS pin)
Hub-Link
AGP/CORE
Processor system bus
Layout note :
Distribute as close as possible
to MCH Processor Quadrant.(between VCCSM and VSS pin)
DDR Memory interface
C9
10UF_6.3V_1206_X5R
12
C145
.1UF_0402_X5R
12
C28
.1UF_0402_X5R
12
C156
.1UF_0402_X5R
12
C10
10UF_6.3V_1206_X5R
12
C109
.1UF_0402_X5R
12
C47
.1UF_0402_X5R
12
C123
22UF_10V_1206
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C130
.1UF_0402_X5R
12
C110
.1UF_0402_X5R
12
C51
.1UF_0402_X5R
12
C93
.1UF_0402_X5R
12
C12
10UF_6.3V_1206_X5R
12
C126
.1UF_0402_X5R
12
C121
.1UF_0402_X5R
12
C111
.1UF_0402_X5R
12
C45
.1UF_0402_X5R
12
C20
.1UF_0402_X5R
12
C142
.1UF_0402_X5R
12
C46
.1UF_0402_X5R
12
C11
10UF_6.3V_1206_X5R
12
C127
.1UF_0402_X5R
12
C8
10UF_6.3V_1206_X5R
12
C546
10UF_6.3V_1206_X5R
12
C161
.1UF_0402_X5R
12
C27
.1UF_0402_X5R
12
C162
.1UF_0402_X5R
12
C129
.1UF_0402_X5R
12
C101
.1UF_0402_X5R
12
C114
.1UF_0402_X5R
12
C108
.1UF_0402_X5R
12
C78
.1UF_0402_X5R
12
C116
.1UF_0402_X5R
12
+
C181
150UF_D2_6.3V
12
C124
22UF_10V_1206
12
C131
.1UF_0402_X5R
12
C18
.1UF_0402_X5R
12
C49
.1UF_0402_X5R
12
+
C23
150UF_D2_6.3V
12
C17
.1UF_0402_X5R
12
C113
.1UF_0402_X5R
12
C152
.1UF_0402_X5R
12
C71
.1UF_0402_X5R
12
C119
.1UF_0402_X5R
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_SMA8
DDR_SMA0 DDR_F_SMA0
DDR_F_SMA8
DDR_DQ[0..63]
DDR_SMA[0..12]
DDR_DQS[0..7]
DDR_SBS[0..1]
DDR_SDQ5 DDR_DQ5
DDR_DQ2
DDR_SDQ13 DDR_DQ13
DDR_SDQ18
DDR_SDQ22
DDR_SDQ24
DDR_SDQ30
DDR_SDQ33
DDR_SDQ39 DDR_DQ39
DDR_DQ44DDR_SDQ44
DDR_DQ43DDR_SDQ43
DDR_DQ52DDR_SDQ52
DDR_DQ48DDR_SDQ48
DDR_SDQ60 DDR_DQ60
DDR_DQ63DDR_DQ62
DDR_SDQ42 DDR_DQ42
DDR_SDQ29 DDR_DQ29
DDR_SDQ0 DDR_DQ0
DDR_SDQ1 DDR_DQ1
DDR_SDQ55 DDR_DQ55
DDR_DQ16
DDR_SDQ26 DDR_DQ26
DDR_SDQ37 DDR_DQ38DDR_SDQ38 DDR_DQ37
DDR_DQ23DDR_SDQ23
DDR_SDQ54 DDR_DQ54
DDR_DQ34
DDR_SDQ6 DDR_DQ6
DDR_SDQ7 DDR_DQ7
DDR_SDQ58 DDR_DQ58
DDR_DQ46DDR_SDQ46
DDR_DQ15DDR_SDQ15
DDR_F_SMA11
DDR_F_SMA6DDR_SMA6
DDR_SDQS4 DDR_DQS4
DDR_DQS7DDR_SDQS7
DDR_DQS6DDR_SDQS6
DDR_DQS5DDR_SDQS5
DDR_SDQS2 DDR_DQS2
DDR_SDQS1 DDR_DQS1
DDR_SDQS3 DDR_DQS3
DDR_DQS0DDR_SDQS0
DDR_SDQ16
DDR_SDQ34
DDR_SDQ62
DDR_SDQ2
DDR_DQ33
DDR_DQ24
DDR_DQ22
DDR_DQ30
DDR_DQ18
DDR_SWE# DDR_F_SWE#
DDR_SBS0 DDR_F_SBS0
DDR_SBS1 DDR_F_SBS1
DDR_SMA11
DDR_DQ12DDR_SDQ12
DDR_SDQ11 DDR_DQ11
DDR_SDQ14 DDR_DQ14
DDR_DQ20DDR_SDQ20
DDR_SDQ21 DDR_DQ21
DDR_DQ28DDR_SDQ28
DDR_DQ27DDR_SDQ27
DDR_DQ35DDR_SDQ35
DDR_SDQ40 DDR_DQ40
DDR_SDQ41 DDR_DQ41
DDR_SDQ53 DDR_DQ53
DDR_SDQ50 DDR_DQ50
DDR_DQ57DDR_SDQ57
DDR_DQ59DDR_SDQ59
DDR_SDQ4 DDR_DQ4
DDR_DQ3DDR_SDQ3
DDR_DQ9DDR_SDQ9
DDR_SDQ8 DDR_DQ8
DDR_SDQ10 DDR_DQ10
DDR_SDQ17 DDR_DQ17
DDR_DQ19DDR_SDQ19
DDR_SDQ25 DDR_DQ25
DDR_SDQ31 DDR_DQ31
DDR_DQ32DDR_SDQ32
DDR_SDQ36 DDR_DQ36
DDR_DQ45DDR_SDQ45
DDR_SDQ47 DDR_DQ47
DDR_DQ49DDR_SDQ49
DDR_DQ51DDR_SDQ51
DDR_SDQ56 DDR_DQ56
DDR_DQ61
DDR_SDQ63
DDR_SDQ61
DDR_SMA10 DDR_F_SMA10
DDR_F_SMA9DDR_SMA9
DDR_F_SMA3DDR_SMA3
DDR_F_SRAS#DDR_SRAS#
DDR_SMA12 DDR_F_SMA12
DDR_F_SMA7DDR_SMA7
DDR_SCAS# DDR_F_SCAS#
DDR_F_SMA1 DDR_F_SMA2
DDR_F_SMA4DDR_F_SMA5
DDR_SCS#0 DDR_SCS#1
DDR_DQ1
DDR_DQ0
DDR_CKE0DDR_CKE1
DDR_F_SMA7
DDR_F_SMA10
DDR_F_SMA3
DDR_F_SMA9
DDR_F_SMA12
DDR_F_SBS1
DDR_F_SBS0
DDR_F_SMA6
DDR_F_SMA8
DDR_F_SMA11
DDR_F_SMA0
DDR_DQ14
DDR_DQ13
DDR_DQ3
DDR_DQ30
DDR_DQ7
DDR_DQ4
DDR_DQ17
DDR_DQ16
DDR_DQ23 DDR_DQ25
DDR_DQ8
DDR_DQ22
DDR_DQ31
DDR_DQ34
DDR_DQ36
DDR_DQ9
DDR_DQS3
DDR_DQ27
DDR_DQ32
DDR_DQ52
DDR_DQ41
DDR_DQ37
DDR_DQ48
DDR_DQ46
DDR_DQ47
DDR_DQ55
DDR_DQ58
DDR_DQ45
DDR_DQ57
DDR_DQ50
DDR_DQ60
DDR_DQ2
DDR_DQ6
DDR_DQ62
DDR_DQ19
DDR_DQ5
DDR_DQ12
DDR_DQ15
DDR_DQ11
DDR_DQ20
DDR_DQ28
DDR_DQ18
DDR_DQ10
DDR_DQ21
DDR_DQ38
DDR_DQ26
DDR_DQ35
DDR_DQ33
DDR_DQ24
DDR_DQ39
DDR_DQ44
DDR_DQ53
DDR_DQ29
DDR_DQ49
DDR_DQ42
DDR_DQ63
DDR_DQ43
DDR_DQ54
DDR_DQ40
DDR_DQ61
DDR_DQ51
DDR_DQ59
DDR_DQ56
DDR_DQS1
DDR_DQS5
DDR_DQS4
DDR_DQS0
DDR_DQS2
DDR_DQS6
DDR_DQS7
SMB_DATA
SMB_CLK
DDR_F_SCAS#
DDR_F_SRAS#
DDR_F_SWE#
DDR_SDQ[0..63]
DDR_SDQS[0..7]
DDR_F_SMA1DDR_SMA1
DDR_SMA2 DDR_F_SMA2
DDR_F_SMA4DDR_SMA4 DDR_F_SMA5DDR_SMA5
DDR_DQ[0..63] 11,12
DDR_SMA[0..12] 8,11,12
DDR_DQS[0..7] 11,12
DDR_SBS[0..1] 8,11,12
DDR_SWE#8,11,12
DDR_SRAS#8,11,12
DDR_SCAS#8,11,12
DDR_CLK1 8
DDR_CLK1# 8
DDR_CKE0 8,12DDR_CKE18,12
DDR_SCS#08,12 DDR_SCS#1 8,12
DDR_CLK08DDR_CLK0#8
DDR_SDQ[0..63] 8
DDR_SDQS[0..7] 8
SMB_CLK11,13,20,22 SMB_DATA11,13,20,22
+2.5V
+3VS
+SDREF
+2.5V
+SDREF_R
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
10 53,
星期二 一月 07, 2003
Compal Electronics, inc.
DIMM0
Bottom Side
RP45 4P2R_10
1 4
2 3
RP11 4P2R_10
1 4
2 3
RP35 4P2R_10
1 4
2 3
L17
MurataBLM21A601S_0805
1 2
RP29 4P2R_10
1 4
2 3
RP49 4P2R_10
1 4
2 3
RP50 4P2R_10
1 4
2 3
RP26 4P2R_10
1 4
2 3
RP17 4P2R_10
1 4
2 3
RP37 4P2R_10
1 4
2 3
RP32 4P2R_10
1 4
2 3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R146 10_0402_5%
RP24 4P2R_10
1 4
2 3
RP46 4P2R_10
1 4
2 3
R145 10_0402_5%
RP9 4P2R_10
1 4
2 3
RP22 4P2R_10
1 4
2 3
RP20 4P2R_10
1 4
2 3
R147 10_0402_5%
RP27 4P2R_10
1 4
2 3
RP38 4P2R_10
1 4
2 3
RP10 4P2R_10
1 4
2 3
RP14 4P2R_10
1 4
2 3
RP40 4P2R_10
1 4
2 3
RP15 4P2R_10
1 4
2 3
RP47 4P2R_10
1 4
2 3
RP48 4P2R_10
1 4
2 3
RP33 4P2R_10
1 4
2 3
RP18 4P2R_10
1 4
2 3
RP34 4P2R_10
1 4
2 3
RP12 4P2R_10
1 4
2 3
RP44 4P2R_10
1 4
2 3
RP39 4P2R_10
1 4
2 3
R144 10_0402_5%
R149 10_0402_5%
JP22
AMP1376408_STANDARD
VREF
1VSS
3DQ0
5DQ1
7VDD
9DQS0
11 DQ2
13 VSS
15 DQ3
17 DQ8
19 VDD
21 DQ9
23 DQS1
25 VSS
27 DQ10
29 DQ11
31 VDD
33 CK0
35 CK0#
37 VSS
39
DQ16
41 DQ17
43 VDD
45 DQS2
47 DQ18
49 VSS
51 DQ19
53 DQ24
55 VDD
57 DQ25
59 DQS3
61 VSS
63 DQ26
65 DQ27
67 VDD
69 CB0
71 CB1
73 VSS
75 DQS8
77 CB2
79 VDD
81 CB3
83 DU
85 VSS
87 CK2
89 CK2#
91 VDD
93 CKE1
95 DU/A13
97 A12
99 A9
101 VSS
103 A7
105 A5
107 A3
109 A1
111 VDD
113 A10/AP
115 BA0
117 WE#
119 S0#
121 DU
123 VSS
125 DQ32
127 DQ33
129 VDD
131 DQS4
133 DQ34
135 VSS
137 DQ35
139 DQ40
141 VDD
143
VREF 2
VSS 4
DQ4 6
DQ5 8
VDD 10
DM0 12
DQ6 14
VSS 16
DQ7 18
DQ12 20
VDD 22
DQ13 24
DM1 26
VSS 28
DQ14 30
DQ15 32
VDD 34
VDD 36
VSS 38
VSS 40
DQ20 42
DQ21 44
VDD 46
DM2 48
DQ22 50
VSS 52
DQ23 54
DQ28 56
VDD 58
DQ29 60
DM3 62
VSS 64
DQ30 66
DQ31 68
VDD 70
CB4 72
CB5 74
VSS 76
DM8 78
CB6 80
VDD 82
CB7 84
DU/RESET# 86
VSS 88
VSS 90
VDD 92
VDD 94
CKE0 96
DU/BA2 98
A11 100
A8 102
VSS 104
A6 106
A4 108
A2 110
A0 112
VDD 114
BA1 116
RAS# 118
CAS# 120
S1# 122
DU 124
VSS 126
DQ36 128
DQ37 130
VDD 132
DM4 134
DQ38 136
VSS 138
DQ39 140
DQ44 142
VDD 144
DQ41
145 DQS5
147 VSS
149 DQ42
151 DQ43
153 VDD
155 VDD
157 VSS
159 VSS
161 DQ48
163 DQ49
165 VDD
167 DQS6
169 DQ50
171 VSS
173 DQ51
175 DQ56
177 VDD
179 DQ57
181 DQS7
183 VSS
185 DQ58
187 DQ59
189 VDD
191 SDA
193 SCL
195 VDD_SPD
197 VDD_ID
199
DQ45 146
DM5 148
VSS 150
DQ46 152
DQ47 154
VDD 156
CK1# 158
CK1 160
VSS 162
DQ52 164
DQ53 166
VDD 168
DM6 170
DQ54 172
VSS 174
DQ55 176
DQ60 178
VDD 180
DQ61 182
DM7 184
VSS 186
DQ62 188
DQ63 190
VDD 192
SA0 194
SA1 196
SA2 198
DU 200
R148 10_0402_5%
RP28 4P2R_10
1 4
2 3
RP25 4P2R_10
1 4
2 3
R151 10_0402_5%
RP43 4P2R_10
1 4
2 3
RP36 4P2R_10
1 4
2 3
RP19 4P2R_10
1 4
2 3
RP21 4P2R_10
1 4
2 3
RP16 4P2R_10
1 4
2 3
R150 10_0402_5%
RP31 4P2R_10
1 4
2 3
RP23 4P2R_10
1 4
2 3
RP13 4P2R_10
1 4
2 3
C241
0.1U_0402_16V4Z
RP41 4P2R_10
1 4
2 3
RP42 4P2R_10
1 4
2 3

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_DQ45
DDR_SCAS#
DDR_DQ63
DDR_DQ18
DDR_DQ9
DDR_DQS4
DDR_SMA7
DDR_SMA[0..12]
DDR_DQ48
DDR_DQ62
DDR_SMA11
DDR_DQ13
DDR_DQS7
DDR_SMA10
DDR_SMA3
DDR_DQ49
DDR_DQ44
DDR_DQ59
DDR_DQ57
DDR_DQ19
DDR_DQ26
DDR_DQ14
DDR_DQ58
DDR_SRAS#
DDR_DQ34
DDR_DQ43
DDR_DQ41
DDR_DQ33
DDR_DQ22
DDR_DQ10
DDR_DQS2
DDR_DQS0
DDR_DQ50
DDR_DQ32
DDR_SMA0
DDR_SMA9
DDR_DQ56
DDR_DQ53
DDR_DQ46
DDR_DQS3
DDR_DQS[0..7]
DDR_DQ[0..63]
DDR_DQ60
DDR_DQ39
DDR_DQ38
DDR_DQ12
DDR_CKE[0..3]
DDR_SMA6
DDR_DQ27
DDR_DQ23
DDR_DQ20
DDR_DQ61
DDR_DQ54
DDR_DQ55
DDR_DQ24
DDR_DQ37
DDR_SBS0
DDR_DQ16
DDR_DQS1
DDR_DQ47
DDR_SWE#
DDR_DQS6
DDR_DQS5
DDR_DQ31
DDR_DQ29
DDR_DQ52
DDR_CKE3
DDR_DQ28
DDR_DQ15
DDR_DQ36
DDR_SMA8
DDR_DQ17
DDR_DQ8
DDR_SBS1
DDR_DQ51
DDR_DQ42
DDR_CKE2
DDR_DQ30
DDR_DQ25
DDR_DQ40
DDR_DQ35
DDR_SMA12
DDR_DQ21
DDR_DQ11
DDR_SMA1 DDR_SMA2
DDR_SMA4DDR_SMA5
DDR_DQ0
DDR_DQ1
DDR_DQ7
DDR_DQ6
DDR_DQ4
DDR_DQ5
DDR_DQ3
DDR_DQ2
DDR_SCS#2 DDR_SCS#3
DDR_SWE#8,10,12 DDR_SBS08,10,12
DDR_SMA[0..12] 8,10,12
DDR_CKE38,12
DDR_CKE[0..3] 8,10,12
DDR_SCAS# 8,10,12
DDR_DQ[0..63] 10,12
DDR_DQS[0..7] 10,12
DDR_CKE2 8,12
DDR_SRAS# 8,10,12
SMB_CLK10,13,20,22
DDR_SBS1 8,10,12
SMB_DATA10,13,20,22
DDR_CLK3#8 DDR_CLK38
DDR_CLK4 8
DDR_CLK4# 8
DDR_SCS#28,12 DDR_SCS#3 8,12
+2.5V
+SDREF_R
+3VS
+3VS
+2.5V
+SDREF
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
11 53,
星期二 一月 07, 2003
Compal Electronics, inc.
Bottom Side
DIMM1
JP24
AMP1376408_REVERSE
VREF
1VSS
3DQ0
5DQ1
7VDD
9DQS0
11 DQ2
13 VSS
15 DQ3
17 DQ8
19 VDD
21 DQ9
23 DQS1
25 VSS
27 DQ10
29 DQ11
31 VDD
33 CK0
35 CK0#
37 VSS
39
DQ16
41 DQ17
43 VDD
45 DQS2
47 DQ18
49 VSS
51 DQ19
53 DQ24
55 VDD
57 DQ25
59 DQS3
61 VSS
63 DQ26
65 DQ27
67 VDD
69 CB0
71 CB1
73 VSS
75 DQS8
77 CB2
79 VDD
81 CB3
83 DU
85 VSS
87 CK2
89 CK2#
91 VDD
93 CKE1
95 DU/A13
97 A12
99 A9
101 VSS
103 A7
105 A5
107 A3
109 A1
111 VDD
113 A10/AP
115 BA0
117 WE#
119 S0#
121 DU
123 VSS
125 DQ32
127 DQ33
129 VDD
131 DQS4
133 DQ34
135 VSS
137 DQ35
139 DQ40
141 VDD
143
VREF 2
VSS 4
DQ4 6
DQ5 8
VDD 10
DM0 12
DQ6 14
VSS 16
DQ7 18
DQ12 20
VDD 22
DQ13 24
DM1 26
VSS 28
DQ14 30
DQ15 32
VDD 34
VDD 36
VSS 38
VSS 40
DQ20 42
DQ21 44
VDD 46
DM2 48
DQ22 50
VSS 52
DQ23 54
DQ28 56
VDD 58
DQ29 60
DM3 62
VSS 64
DQ30 66
DQ31 68
VDD 70
CB4 72
CB5 74
VSS 76
DM8 78
CB6 80
VDD 82
CB7 84
DU/RESET# 86
VSS 88
VSS 90
VDD 92
VDD 94
CKE0 96
DU/BA2 98
A11 100
A8 102
VSS 104
A6 106
A4 108
A2 110
A0 112
VDD 114
BA1 116
RAS# 118
CAS# 120
S1# 122
DU 124
VSS 126
DQ36 128
DQ37 130
VDD 132
DM4 134
DQ38 136
VSS 138
DQ39 140
DQ44 142
VDD 144
DQ41
145 DQS5
147 VSS
149 DQ42
151 DQ43
153 VDD
155 VDD
157 VSS
159 VSS
161 DQ48
163 DQ49
165 VDD
167 DQS6
169 DQ50
171 VSS
173 DQ51
175 DQ56
177 VDD
179 DQ57
181 DQS7
183 VSS
185 DQ58
187 DQ59
189 VDD
191 SDA
193 SCL
195 VDD_SPD
197 VDD_ID
199
DQ45 146
DM5 148
VSS 150
DQ46 152
DQ47 154
VDD 156
CK1# 158
CK1 160
VSS 162
DQ52 164
DQ53 166
VDD 168
DM6 170
DQ54 172
VSS 174
DQ55 176
DQ60 178
VDD 180
DQ61 182
DM7 184
VSS 186
DQ62 188
DQ63 190
VDD 192
SA0 194
SA1 196
SA2 198
DU 200
L19
MurataBLM21A601S_0805
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C264
0.1U_0402_16V4Z

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_SMA[0..12]
DDR_DQS[0..7]
DDR_SWE#
DDR_SRAS#
DDR_SCAS#
DDR_SBS0
DDR_SBS1
DDR_SCS#[0..3]
DDR_DQ[0..63]
DDR_DQS6
DDR_DQ50
DDR_SMA6
DDR_CKE[0..1]
DDR_CKE[2..3]
DDR_DQ0
DDR_DQ1 DDR_DQ59 DDR_DQ62
DDR_DQ6
DDR_DQ2 DDR_DQ5 DDR_DQ4
DDR_DQ13
DDR_DQ12 DDR_DQ3
DDR_DQS0
DDR_DQ11
DDR_DQ14 DDR_DQ9 DDR_DQ7
DDR_DQ20
DDR_DQ16 DDR_DQ8
DDR_DQ10
DDR_DQ21
DDR_DQ22 DDR_DQ18 DDR_DQ17
DDR_DQ28
DDR_DQ24 DDR_DQS2
DDR_DQ27
DDR_DQ29 DDR_DQ23 DDR_DQ25
DDR_DQ38
DDR_DQ37 DDR_DQ31 DDR_DQ30
DDR_DQ34
DDR_DQ36 DDR_DQ32 DDR_DQ33
DDR_DQ45
DDR_DQ46 DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42 DDR_DQ44 DDR_DQS5
DDR_DQ53
DDR_DQ55 DDR_DQ47 DDR_DQ43
DDR_DQ54
DDR_DQ51 DDR_DQ49 DDR_DQ52
DDR_DQ58
DDR_DQS7 DDR_DQ48 DDR_DQ57
DDR_DQ56
DDR_DQ60 DDR_DQ61 DDR_DQ63
DDR_SMA2
DDR_SCS#3
DDR_CKE0
DDR_SMA4
DDR_SMA1
DDR_SCS#2
DDR_CKE1
DDR_SMA5
DDR_SCAS#
DDR_SCS#1
DDR_SBS1
DDR_SRAS#
DDR_SMA0
DDR_SMA11
DDR_SMA8
DDR_SMA10
DDR_SMA3
DDR_DQ26
DDR_DQS3
DDR_DQ35
DDR_DQ15
DDR_DQS4
DDR_SMA7
DDR_SMA12
DDR_SMA9
DDR_CKE2
DDR_CKE3
DDR_SBS0
DDR_SWE#
DDR_SCS#0
DDR_DQS1
DDR_DQ19
DDR_SMA[0..12] 8,10,11
DDR_DQS[0..7] 10,11
DDR_SWE# 8,10,11
DDR_SRAS# 8,10,11
DDR_SCAS# 8,10,11
DDR_SBS0 8,10,11
DDR_SBS1 8,10,11
DDR_SCS#[0..3] 8,10,11
DDR_DQ[0..63] 10,11
DDR_CKE[0..1] 8,10
DDR_CKE[2..3] 8,11
+2.5V
+2.5V +2.5V
+1.25VS
+1.25VS
+1.25VS
+1.25VS
+1.25VS
+1.25VS
+1.25VS
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
12 53,
星期二 一月 07, 2003
Compal Electronics, inc.
Layout note :
Distribute as close as possible
to DDR-SODIMM.
Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25V
C322
0.1U_0402_16V7K
C340
0.1U_0402_16V7K
RP101 4P2R_56
1 4
2 3
C305
0.1U_0402_16V7K
C289
0.1U_0402_16V7K
RP62 4P2R_56
14 23
RP82 4P2R_56
14 23
C244
0.1U_0402_16V7K
C313
0.1U_0402_16V7K
RP87 4P2R_56
1 4
2 3
C338
0.1U_0402_16V7K
C310
0.1U_0402_16V7K
+
C255
150UF_D2_6.3V
12
C316
0.1U_0402_16V7K
RP86 4P2R_56
1 4
2 3
C293
0.1U_0402_16V7K
RP90 4P2R_56
14 23
RP80 4P2R_56
1 4
2 3
C339
0.1U_0402_16V7K
C295
0.1U_0402_16V7K
C258
0.1U_0402_16V7K
C323
0.1U_0402_16V7K
C325
0.1U_0402_16V7K
C287
0.1U_0402_16V7K
C302
0.1U_0402_16V7K
RP78 4P2R_56
14 23
C262
0.1U_0402_16V7K
RP94 4P2R_56
1 4
2 3
C328
0.1U_0402_16V7K
C324
0.1U_0402_16V7K
C292
0.1U_0402_16V7K
C341
0.1U_0402_16V7K
RP104 4P2R_56
1 4
2 3
C245
0.1U_0402_16V7K
C294
0.1U_0402_16V7K
C242
0.1U_0402_16V7K
C307
0.1U_0402_16V7K
+
C267
150UF_D2_6.3V
12
RP89 4P2R_56
14 23
RP92 4P2R_56
1 4
2 3
C246
0.1U_0402_16V7K
C327
0.1U_0402_16V7K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C345
0.1U_0402_16V7K
C243
0.1U_0402_16V7K
C329
0.1U_0402_16V7K
C334
0.1U_0402_16V7K
RP97 4P2R_56
14 23
C298
0.1U_0402_16V7K
C314
0.1U_0402_16V7K
RP52 4P2R_56
14 23
RP64 4P2R_56
1 4
2 3
C288
0.1U_0402_16V7K
C296
0.1U_0402_16V7K
C344
0.1U_0402_16V7K
RP60 4P2R_56
1 4
2 3
RP85 4P2R_56
14 23
RP66 4P2R_56
14 23
RP100 4P2R_56
1 4
2 3
C259
0.1U_0402_16V7K
C304
0.1U_0402_16V7K
+
C266
150UF_D2_6.3V
12
C312
0.1U_0402_16V7K
C291
0.1U_0402_16V7K
RP103 4P2R_56
14 23
RP99 4P2R_56
1 4
2 3
C297
0.1U_0402_16V7K
C306
0.01U_0402_16V7K
RP55 4P2R_56
14 23
C290
0.1U_0402_16V7K
C309
0.1U_0402_16V7K
RP84 4P2R_56
1 4
2 3
C342
0.1U_0402_16V7K
RP54 4P2R_56
14 23
C326
0.1U_0402_16V7K
RP63 4P2R_56
1 4
2 3
C300
0.1U_0402_16V7K
+
C220
150UF_D2_6.3V
12
RP65 4P2R_56
14 23
RP68 4P2R_56
1 4
2 3
C301
0.1U_0402_16V7K
C321
0.1U_0402_16V7K
C336
0.1U_0402_16V7K
C346
0.1U_0402_16V7K
C337
0.1U_0402_16V7K
RP59 4P2R_56
1 4
2 3
RP93 4P2R_56
1 4
2 3
RP102 4P2R_56
14 23
RP77 4P2R_56
1 4
2 3
C332
0.1U_0402_16V7K
RP51 4P2R_56
14 23
C333
0.1U_0402_16V7K
C303
0.1U_0402_16V7K
RP83 4P2R_56
14 23
RP81 4P2R_56
1 4
2 3
C315
0.1U_0402_16V7K
C311
0.1U_0402_16V7K
RP98 4P2R_56
14 23
RP67 4P2R_56
1 4
2 3
C318
0.1U_0402_16V7K
C320
0.1U_0402_16V7K
C308
0.1U_0402_16V7K
C260
0.1U_0402_16V7K
RP96 4P2R_56
1 4
2 3
C299
0.1U_0402_16V7K
RP75 4P2R_56
14 23
RP76 4P2R_56
1 4
2 3
RP73 4P2R_56
14 23
RP70 4P2R_56
14 23
C263
0.1U_0402_16V7K
C335
0.1U_0402_16V7K
RP79 4P2R_56
14 23
C319
0.1U_0402_16V7K
C317
0.1U_0402_16V7K
RP72 4P2R_56
14 23
C331
0.1U_0402_16V7K
C330
0.1U_0402_16V7K
RP71 4P2R_56
14 23
RP88 4P2R_56
1 4
2 3
C343
0.1U_0402_16V7K
RP74 4P2R_56
14 23
C261
0.1U_0402_16V7K
RP91 4P2R_56
1 4
2 3
RP69 4P2R_56
14 23
RP95 4P2R_56
1 4
2 3

A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
CLK_BCLK#
ICH_48M
+3V_VDD
PCI_LPC
PCI_ICH
PCI_SIO
PCI_LAN
CLK_BCLK
CLK_MCH#
CLK_MCH
PCI_MINI
PCI_PCM
CLK_ITP#
BSEL2
BSEL1
BSEL0
ICH_66M
MCH_66M
CLK_PWRDWN#
CLK_14M
CLK_ITP
+3V_CLK
PCI_1394
XTAL_OUT
XTAL_IN
CLKPCI_SD
SD_CLK_48M
SMB_DATA
SMB_CLK
AGP_66M
CLK_MCH_BCLK 7
CLK_MCH_BCLK# 7
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_ICH_48M20
CLK_ICH_66M 20
CLK_PCI_ICH 20
CLK_MCH_66M 7
CLK_ICH_14M20 CLK_14M_SIO32 CLK_PCI_CB 24
CLK_PCI_SIO 32
CLK_LPC_EC 38
CLK_PCI_MINI 28
CLK_PCI_LAN 26
CLK_CPU_ITP# 5
H_BSEL15 H_BSEL05
CK408_PWRGD#41
PM_STPPCI#20 PM_STPCPU#20,48
CLK_PCI_1394 23
CLK_CPU_ITP 5
CLK_PCI_SD 37
SDCLK_48M37
SMB_DATA10,11,20,22 SMB_CLK10,11,20,22
CLK_AGP_66M 14
PM_SLP_S1#20,38
+3VS
+3VS
+3V_CLK
+3VS
+3VS+3VS
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
13 53,
星期二 一月 07, 2003
Compal Electronics, inc.
Clock Generator
Width=40 mils
Place Crystal within 500mils of U8
+3V_CLK=40mils
SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2]
0 0 0 166.67 166.67
0 0 1 100.00 100.00
0 1 0 200.00 200.00
0 1 1 133.33 133.33
**
R143 33_0402_5%
R125
1K
12
R139 33_0402_5%
R141 33_0402_5%
C233
@10P_0402_25V8K
L16
CHB2012U121
1 2
R98 49.9_0402_1%
L13
CHB2012U121
1 2
R89 33_0402_5%
C197
0.1UF_0402
12
R140 33_0402_5%
R95 49.9_0402_1%
C195
0.1UF_0402
12
L18
CHB2012U121
1 2
R113
1K
12
C226
22U_1206_16V4Z_V1
1
2
R99 49.9_0402_1%
C229
0.1UF_0402
12
R107 33_0402_5%
C238
22U_1206_16V4Z_V1
1
2
R110 33_0402_5%
C228
@10P_0402_50V8K
R100 49.9_0402_1%
R124 @0_0402_5%
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C185
@10P_0402_25V8K
R88 10K_0402_1%
1 2
R142 33_0402_5%
R131 0_0402_5%
C235
0.1UF_0402
12
R112 33_0402_5%
R129
@1K
12
R156 33_0402_5%
R97 49.9_0402_1%
C223
0.1UF_0402
12
R157 33_0402_5%
R108 33_0402_5%
R109 33_0402_5%
C219
0.1UF_0402
12
C184
@10P_0402_25V8K
R158 33_0402_5%
1 2
R120 33_0402_5%
U8
ICS950810
VDD_REF 1
VDD_PCI 8 VDD_PCI 14
VDD_3V66 19 VDD_3V66 32
VDD_48MHZ 37
VDD_CPU 46 VDD_CPU 50
VDDA 26
GND_REF
4GND_PCI 9GND_PCI
15 GND_3V66 20 GND_3V66 31 GND_48MHZ 36 GND_IREF 41 GND_CPU 47
VSSA 27 XTAL_OUT
3
XTAL_IN
2
SEL2
40 SEL1
55 SEL0
54
PWR_DWN#
25 PCI_STOP#
34 CPU_STOP#
53
VTT_PWRGD#
28
MULT0
43
SDATA
29 SCLK
30
3V66_0
33 3V66_1/VCH_CLK
35
IREF
42
CPUCLKT2 45
CPU_CLKC2 44
CPUCLKT1 49
CPUCLKC1 48
CPUCLKT0 52
CPUCLKC0 51
3V66_5 24
3V66_4 23
3V66_3 22
3V66_2 21
PCICLK_F2 7
PCICLK_F1 6
PCICLK_F0 5
PCICLK6 18
PCICLK5 17
PCICLK4 16
PCICLK3 13
PCICLK2 12
PCICLK1 11
PCICLK0 10
48MHZ_USB
39
48MHZ_DOT
38
REF
56
R96 49.9_0402_1%
R111 33_0402_5%
C227
@10P_0402_50V8K
C230
0.1U_0402_16V7K
1
2
C231
0.1UF_0402
12
C236
@10P_0402_25V8K
R123
@1K
12
C224
0.1U_0402_16V7K
1
2
R127 @0_0402_5%
1 2
R92 475_0402_1%
1 2
R121
1K
12
C196
0.1UF_0402
12
R152 33_0402_5%
Y2
14.318MHZ
12
R155 33_0402_5%
R117 33_0402_5%
R105 33_0402_5%
C232
0.1U_0402_16V7K
1
2
C237
@10P_0402_25V8K
R154 33_0402_5%

1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
Tp7
AGP_GNT#
SUS_STAT#
AGP_SBA1
AGP_SBA4
AGP_AD22
AGP_AD24
AGP_AD1
AGP_AD27
AGP_AD3
Tp22
Tp12
AGP_ADSTB1#
AGP_AD10
Tp23
GINTA#
RSET
AGP_AD26
AGP_SBA0
AGP_AD19
AGP_AD23
Tp6
AGP_SBA6
AGP_AD29
AGP_AD15
FREQOUT
Tp21
AGP_SBSTB#
AGP_SBA[0:7]
AGP_AD0
AGP_AD28
AGP_SBSTB
AGP_RBF#
AGP_SBA5
OSCLIN
AGP_AD9
AGP_AD11 Tp10
Tp5
AGP_SBA2
AGP_AD12
AGP_AD8
AGP_AD4
Tp20
Tp19
Tp17
AGP_ST2
AGP_ADSTB1
AGP_SBA7
AGP_AD6
AGP_AD[0:31]
AGP_AD21
AGP_AD20
AGP_AD14
Tp16
R2SET
Tp11
AGP_AD2
AGP_PAR
Tp4
DDCSCL
AGP_AD7
AGP_AD31
AGP_AD25
SSOUT
SSIN
Tp8
AGP_SBA3
AGP_AD18
AGP_REQ#
AGP_AD17
AGP_AD5
Tp13
Tp9
AGP_AD13
SUS_STAT#
AGP_ST1
AGP_AD16
Tp18
DDCSDA
AGP_ST0
AGP_AD30
CLK_AGP
+SPREAD_P2
SSIN
SSOUT
AGP_ADSTB0#
AGP_ADSTB0
Tp0
Tp1
Tp2
Tp3
AGP_RBF#7 TXB0- 18
TXB1+ 18
SUS_STAT# 20
AGP_C/BE#17
CLK_AGP_66M13
TXBCLK+ 18
AGP_REQ#7
RED 18
AGP_TRDY#7
AGP_SBSTB7
BLON# 18
AGP_ST17
TXACLK+ 18
TXA1- 18
VSYNC 18
AGP_C/BE#07
AGP_GNT#7
AGP_ADSTB17
TXBCLK- 18
AGP_FRAME#7
AGP_DEVSEL#7
LUMA19
AGP_SBA[0:7]7
ENVDD 18
AGP_ST07
TXA0+ 18
TXACLK- 18
HSYNC 18
PIRQA#/E#20,24
F_AGP_ADSTB0#7
TXB2+ 18
TXB1- 18
AGP_C/BE#37
AGP_STOP#7
AGP_ST27
F_AGP_SBSTB#7
COMPS19
BLUE 18
PCIRST#7,20,23,24,25,26,28,30,32,37,38
TXA0- 18
TXA1+ 18
TXA2- 18
F_AGP_ADSTB1#7
AGP_ADSTB07
TXB2- 18
TXA2+ 18
TXB0+ 18
AGP_C/BE#27
AGP_PAR7
DDC_DATA 18
CRMA19
AGP_BUSY#20
GREEN 18
AGP_IRDY#7
AGP_AD[0:31]7
DDC_CLK 18
STP_AGP#20
+3V
+AGP_REF
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Compal Electronics, inc.
Custom
14 53, 07,
星期二 一月 2003
HOST INTERFACE
(10 mil)
Divider circuit for 1.8Vdc XTALIN from 3.3Vdc OSC out
Option Strap Pins
(10 mil)
(10 mil)
SM560 Schematic for 50MHz - 108MHz
**
**
R334 0_0402
12
R363 0_0402
12
C508
0.1U
12
R399 0
1 2
R547 0_0402
12
U32
SM560
X1/CLK
1
Xout 8 S0
7
S1
6
VDD 2
SSCLK 4
SSCC 5
GND
3
R538
@20K
1 2
C40 .1UF_0402
1 2
C520
@22P
1 2
R47 100K
1 2
R398 10K_0603
1 2
C519
@22P
12
R342
10K
12
R337
10K_0603
12
C528
@10P_0402_16V
12
R356
@10
1 2
C513
10U_0805_6.3V
R338120_0603
1 2
R336 0_0402
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R347
0
12
R60
845_1%_0603
1 2
R32 20K
12
L40
BLM21P300S_0805
R341
@10K
12
R38 10K
1 2
C499 @10P
1 2
R41 499_1%_0402
1 2
R353
@10
12
R371 22_0402_5%
1 2
X3
OSC_27MHz
OUT 3
GND 2
VDD
4
ST
1
PCI/AGP HOST BUS INTERFACECLK
ZV PORT / EXT TMDSLVDSTMDSDAC
SSCDAC2
GPIO / ROM
U36A
M6-C
AD0
D24 AD1
C26 AD2
D25 AD3
D26 AD4
E23 AD5
E25 AD6
E24 AD7
E26 AD8
F26 AD9
G23 AD10
G25 AD11
G24 AD12
G26 AD13
H24 AD14
H26 AD15
H25 AD16
L23 AD17
L26 AD18
L24 AD19
M26 AD20
M24 AD21
N25 AD22
M25 AD23
N26 AD24
P23 AD25
P26 AD26
P24 AD27
R25 AD28
R24 AD29
R26 AD30
T23 AD31
T25
C/BE#0
F23 C/BE#1
J25 C/BE#2
L25 C/BE#3
N23
PCICLK
AA26 RST#
AA23
REQ#
AA25 GNT#
Y24
PAR
J23 STOP#
J24 DEVSEL#
J26 TRDY#
K24 IRDY#
K26 FRAME#
K25
INTA#
AA24
STP_AGP#
AB25 AGP_BUSY#
AB26 RBF#
W26 AD_STB0
F25
AD_STB1
P25
SB_STB
V25
SBA0
W25 SBA1
V24 SBA2
V26 SBA3
V23 SBA4
U26 SBA5
U24 SBA6
T26 SBA7
T24
ST0
Y26 ST1
Y23 ST2
Y25
XTALIN
AF25
XTALOUT
AF26
TESTEN
AC6
GPIO0 Y2
GPIO1 Y1
GPIO2 W3
GPIO3 W2
GPIO4 W1
GPIO5 V4
GPIO6 V3
GPIO7 V2
GPIO8 V1
GPIO9 U3
GPIO10 U2
GPIO11 U1
GPIO12 T4
ZV_LCDDATA0 AA4
AGPTEST
C25 AGPREF
B26
ADSTRB0#
F24
ADSTRB1#
N24
SB_STB#
U25
SERR#
W24
GPIO13 T3
ZV_LCDDATA1 AB1
ZV_LCDDATA2 AB2
ZV_LCDDATA3 AB3
ZV_LCDDATA5 AC1
ZV_LCDDATA4 AB4
ZV_LCDDATA6 AC2
ZV_LCDDATA7 AC3
ZV_LCDDATA8 AD1
ZV_LCDDATA12 AE2
ZV_LCDDATA13 AF1
ZV_LCDDATA15 AF3
ZV_LCDDATA9 AD2
ZV_LCDDATA11 AE1
ZV_LCDDATA14 AF2
ZV_LCDDATA10 AD3
ZV_LCDCNTL0 Y4
ZV_LCDCNTL1 AA1
ZV_LCDCNTL2 AA2
ZV_LCDCNTL3 AA3
TXOUT_L0N AC8
TXOUT_L0P AD8
TXOUT_L1N AC9
TXOUT_L1P AD9
TXOUT_L2N AE8
TXOUT_L2P AF8
TXOUT_L3N AC10
TXOUT_L3P AD10
TXCLK_LN AE9
TXCLK_LP AF9
TXOUT_U0N AD11
TXOUT_U0P AC11
TXOUT_U1N AE11
TXOUT_U1P AF11
TXOUT_U2N AD12
TXOUT_U2P AC12
TXOUT_U3N AD13
TXOUT_U3P AE13
TXCLK_UN AE12
TXCLK_UP AF12
TX0M AE19
TX0P AF19
TX1M AE20
TX1P AF20
TX2M AE21
TX2P AF21
TXCM AE18
TXCP AF18
LTGIO0 AD7
LTGIO1 AD6
LTGIO2 AC7
DIGON AB10
BLON# AB9
DVIDDCCLK AD20
DVIDDCDATA AC20
HPD AD21
RAF24
GAF23
BAF22
HSYNC AE24
VSYNC AE23
RSET AE22
MONID0 AD24
MONID1 AD25
VGADDCDATA AC26
VGADDCCLK AC25
SUS_STAT# AE25
AUXWIN AC22
Y_G
AF15 C_R
AF16
COMP_B
AF14
R2SET
AE16
CRT2DDCCLK
AF6 CRT2DDCDATA
AF7
H2SYNC
AE14 V2SYNC
AF13
SSIN
AE6
SSOUT
AE7
ZV_LCDDATA16 AE3
ZV_LCDDATA17 AF4
ZV_LCDDATA18 AE4
ZV_LCDDATA19 AD4
ZV_LCDDATA20 AF5
ZV_LCDDATA21 AE5
ZV_LCDDATA22 AD5
ZV_LCDDATA23 AC5
ROMCS#
Y3
R30 47_1%_0603
1 2
C501
@15PF_0603
12
R335
150_0603
12
R343
10K
12
R348
10K
12
R361 22_0402_5%
1 2
R329@10
1 2
R375 1K_0603
1 2
C527
10P_0402_16V
12
C503
.1UF
12

1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
VMD[0:31]
NMA[0:13]
VDQM[0:3]
NMA0
NMA1
NMA9
NMA11
NMA12
NMA2
NMA10
NMA8
NMA7
NMA13
NMCKE
NMCLK0#
NMA3
NMA6
NMA5
NMA4
VMA8
VMD16
VMD11
VDQM2
VMA6
VMA2
VMD30
VMD28
VMD4
VMA10
VMA9
VMD26
VMD19
VMD14
VMD3
VDQM1
VMA4
VMD20
VMD8
VMD5
VMA12
VMD24
VMCKE
VMD29
VMD6
VDQM0
VMA0
VMD27
VMCLK0#
VMA5
VMA3
VMD21
MVREF
VMA1
VMD22
VMD13
VMD2
VMA11
VMD25
VMD18
VMD31
VMD15
VMD0
VMD12
VMD7
VMD23
VMD10
VMA13
VMD1
VDQM3
VMA7
VMD17
VMD9
VMCLK0
VDQS0
VMCS0#
VMRAS#
VMWE#
VMCAS# NMCS0# NMWE#
NMCAS#
NMRAS#
NMCLK0
VMD[0:31] 16
NMA[0:13] 16
VDQM[0:3] 16
NMCKE 16
NMCLK0# 16
VDQS0 16
NMCS0# 16
NMWE# 16
NMCAS# 16
NMRAS# 16
NMCLK0 16
+2.5VS
+1.8VS
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Compal Electronics, inc.
Custom
15 53, 07, 星期二 一月 2003
MEMORY INTERFACE
(10 mil)
MEMORY INTERFACE
U36B
M6-C
DQ0
A26 DQ1
B25 DQ2
A25 DQ3
A24 DQ4
B23 DQ5
A23 DQ6
C22 DQ7
B22 DQ8
C21 DQ9
B21 DQ10
A21 DQ11
D20 DQ12
C20 DQ13
B20 DQ14
A20 DQ15
C19 DQ16
B18 DQ17
A18 DQ18
C17 DQ19
B17 DQ20
A17 DQ21
D16 DQ22
C16 DQ23
B16 DQ24
B15 DQ25
A15 DQ26
D14 DQ27
C14 DQ28
B14 DQ29
A14 DQ30
D13 DQ31
C13 DQ32
B1 DQ33
C1 DQ34
C2 DQ35
D1 DQ36
D2 DQ37
E1 DQ38
E2 DQ39
F1 DQ40
G2 DQ41
G3 DQ42
H1 DQ43
H2 DQ44
H3 DQ45
J1 DQ46
J2 DQ47
J3 DQ48
L1 DQ49
L2 DQ50
L3 DQ51
L4 DQ52
M1 DQ53
M2 DQ54
M3 DQ55
N1 DQ56
N4 DQ57
P1 DQ58
P2 DQ59
P3 DQ60
P4 DQ61
R1 DQ62
R2 DQ63
R3
MA0 B13
MA1 A13
MA2 C12
MA3 B12
MA4 A12
MA5 D11
MA6 C11
MA7 B11
MA8 A11
MA9 C10
MA10 B10
MA11 A10
DQM#0 A22
DQM#1 D21
DQM#2 A16
DQM#3 C15
DQM#4 F2
DQM#5 G1
DQM#6 N2
DQM#7 N3
RAS# A9
CAS# C8
WE# D8
CS#0 B9
CS#1 B8
CKE A8
CLK0 A6
NC B7
CLK1 A4
CLK1# B4
MA12 D9
MA13 C9
CLKFB B3
QS0 A19
QS1 B19
QS2 D18
QS3 C18
QS4 J4
QS5 K1
QS6 K2
QS7 K3
VREF T2
MEMVMODE T1
NC A7
CLK0# B6
NC A5
NC B5
R80
1K_1%_0603
12
R81
1K_1%_0603
12
R133 22_0603
1 2
C225
@15PF_0603
12
R130 22_0603
1 2
RP7
16P8R-10
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
RP30
8P4R_0
1 8
2 7
3 6
4 5
R82
4.7K_0603
1 2
C213
@15PF_0603
12
RP8
16P8R-10
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
C159
.1UF_0402
12
R135 0
1 2

1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
NMCAS#
VREF1
NMA8
NDQM0
NMA6
NMA4
NMA0
NMA7
NMA10
NMCS0#
NMA1
NMWE#
NMA5
NMA13
NMRAS#
NDQM3
NMA3
NMA2
NMCKE
NVREF0
NMA9
NMA11
NMA12
NMRAS#
NMCAS#
NMA[0:13]
NMCLK0#
VMD[0:31]
NMCS0#
VDQM[0:3]
NMCLK0
NMWE#
NMCKE
NMCLK0
NMCLK0#
VDQS0
NDQS0
NDQM2
NDQM1
VDQS0
VMD2
VMD5
VMD3
VMD1
VMD0
VMD6
VMD7
VMD4
VMD20
VMD16
VMD18
VMD21
VMD17
VMD23
VMD19
VMD22
VMD8
VMD11
VMD10
VMD14
VMD13
VMD15
VMD9
VMD12
VMD26
VMD25
VMD31
VMD29
VMD28
VMD24
VMD30
VMD27
VDQM0
VDQM3
VDQM1
VDQM2
NMD23
NMD22
NMD21
NMD20
NMD19
NMD18
NMD17
NMD16
NMD10
NMD9
NMD8
NMD14
NMD13
NMD12
NMD11
NMD15
NMD31
NMD30
NMD29
NMD28
NMD27
NMD26
NMD25
NMD24
NMD0
NMD2
NMD1
NMD3
NMD5
NMD4
NMD7
NMD6
NMRAS#15
NMA[0:13]15
NMCAS#15
VDQM[0:3]15
NMCLK0#15
VDQS015
NMCLK015
VMD[0:31]15
NMCKE15
NMCS0#15
NMWE#15
+2.5VS
+2.5VS
+FBVDD
+FBVDD
+2.5VS
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Compal Electronics, inc.
Custom
16 53, 07, 星期二 一月 2003
DDR SDRAM
4X32Mb
(10
mil)
DDR 4x32Mb
C215
.1UF_0402
12
RP124
16P8R-47
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
RP122
16P8R-47
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
R134
120_0603
1 2
R138
1K_1%_0603
1 2
C168
.1UF_0402
12
R132
1K_1%_0603
1 2
R388 33_0603
1 2
C165
.1UF_0402
12
C166
2200PF_0603
12
C171
10UF_1206
R84 33_0603
1 2
RP123
16P8R-47
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
C214
2200PF_0603
12
R122 33_0603
1 2
C209
2200PF_0603
12
C564
10UF_1206
C164
.1UF_0402
12
C169
10UF_1206
C556
.1UF_0402
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R126 33_0603
1 2
U38
K4D62323HA
DQ0 97
DQ1 98
DQ2 100
DQ3 1
DQ4 3
DQ5 4
DQ6 6
DQ7 7
DQ8 60
DQ9 61
DQ10 63
DQ11 64
DQ12 68
DQ13 69
DQ14 71
DQ15 72
DQ16 9
DQ17 10
DQ18 12
DQ19 13
DQ20 17
DQ21 18
DQ22 20
DQ23 21
DQ24 74
DQ25 75
DQ26 77
DQ27 78
DQ28 80
DQ29 81
DQ30 83
DQ31 84
A0
31 A1
32 A2
33 A3
34 A4
47 A5
48 A6
49 A7
50 A8(AP)
51 A9
45 A10
36
BA0
29 BA1
30
DM0
23 DM1
56 DM2
24 DM3
57
DQS
94
VDDQ 2
VSSQ
5VDDQ 8
VSSQ
11
VDD 15
VDDQ 14
VSS
16
VDDQ 22
VDD 35
VSS
46
VDDQ 59
VSSQ
62
VDD 65
VSS
66
VDDQ 67
VSSQ
70 VDDQ 73
VSSQ
76 VDDQ 79
VSSQ
82
VSS
85
VDDQ 86 VDDQ 95
VSSQ
92 VSSQ 99
RAS#
27 CAS#
26 WE#
25 CS#
28
CKE
53
CK
55 CK#
54
VREF
58 MCL
52 RFU
93
VDD 96
A11
37
NC 38
NC 39
NC 40
NC 41
NC 42
NC 43
NC 44
NC
87 NC
88 NC
89 NC
90 NC
91
VSSQ
19
C203
.1UF_0402
12
C207
2200PF_0603
12
L44
CHB2012U121
C210
.1UF_0402
12
R137 33_0603
1 2
C553
.1UF_0402
12
RP125
16P8R-47
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
C167
.1UF_0402
12
C221
.1UF_0402
12

1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
+VDD_DAC1.8
+VDD_PNLPLL1.8
+VDD_DAC2.5
+VDD_MCLK2.5
+VDD_MEMPLL1.8
+VDD_PNLIO1.8
+VDD_PLL1.8
+VDD_DAC1.8
+VDD_PNLIO1.8
+VDD_PLL1.8
+VDD_MEMPLL1.8
+VDD_PNLPLL1.8
+VDD_DAC2.5
+2.5VS
+VDD_MCLK2.5
+2.5VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.5VS
+3VS
+2.5VS
+1.8VS
+1.8VS
+1.8VS
+2.5VS
+1.5VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Compal Electronics, inc.
Custom
17 53, 07,
星期二 一月 2003
POWER INTERFACE
(20 mil)
(20 mil)
(20 mil)
(20 mil)
(20 mil)
(20 mil)
(20 mil)
**
**
C89
1000PF_0402
12
C90
100PF
12
C505
10UF_1206
L37
CHB1608U301
C502
10UF_1206
C552
@10UF_1206
C72
.01UF_0402
12
C60
.1UF_0402
12
L11
CHB1608U301
1 2
C104
1000PF_0402
C132
.1UF_0402
12
C529
470PF_0603
C136
.1UF_0402
12
C112
.1UF_0402
12
C141
.1UF_0402
12
C76
1000PF_0402
12
C138
.1UF_0402
12
C64
.1UF_0402
12
L34
CHB1608U301
C100
.1UF_0402
12
L43
CHB1608U301
C536
.1UF_0402
C82
.1UF_0402
C98
.1UF_0402
12
C532
100PF
12
C500
10UF_1206
C92
.1UF_0402
C135
.1UF_0402
12
C542
100PF
12
C85
.1UF_0402
12
C91
100PF
12
C61
.1UF_0402
12
C43
.1UF_0402
C107
1UF_0805
12
C526
22UF_10V_1206
C48
.1UF_0402
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C58
1000PF_0402
12
L38
CHB1608U301
C105
.01UF_0402
12
C115
.1UF_0402 C99
470P_0402_50V7K
C137
.1UF_0402
12
C81
.1UF_0402
C125
1000PF_0402
12
C139
1000PF_0402
12
C548
.1UF_0402
C62
1000PF_0402
12
C59
.1UF_0402
12
CORE & HOST & MEMORY & I/O POWER
U36C
M6-C
VSS
E5 VSS
C3 VSS
B2 VSS
A1 VSS
D4 VSS
T10 VSS
T11 VSS
T12 VSS
T13 VSS
T14 VSS
T15 VSS
T16
VSS
K17
VSS
K10 VSS
K11 VSS
K12 VSS
K13 VSS
K14 VSS
K15
VSS
L17
VSS
L10 VSS
L11 VSS
L12 VSS
L13 VSS
L14 VSS
L15
VSS
M17
VSS
M10 VSS
M11 VSS
M12 VSS
M13 VSS
M14 VSS
M15
VSS
N17
VSS
N10 VSS
N11 VSS
N12 VSS
N13 VSS
N14 VSS
N15
VSS
P17
VSS
P10 VSS
P11 VSS
P12 VSS
P13 VSS
P14 VSS
P15
VSS
R17
VSS
R10 VSS
R11 VSS
R12 VSS
R13 VSS
R14 VSS
R15
VDDC H5
VDDC K5
VDDC M5
VDDC R5
VDDC U5
VDDC W5
VDDC AB8
VDDC AB14
VDDC AB7
VDDC AB17
VDDC AB19
VDDC W22
VDDC U22
VDDC R22
VDDC M22
VDDR1 C6
VDDR1 C7
VDDR1 C23
VDDR1 D12
VDDR1 E9
VDDR1 E13
VDDR1 E14
VDDR1 E6
VDDR1 E7
VDDR1 E11
VDDR1 E16
VDDR3 T5
VDDR3 U4
VDDR3 V5
VDDR3 W4
VDDR3 Y5
VDDR3 AA5
VDDR3 AC4
VDDR3 AB5
VDDR3 AB6
VDDP G22
VDDP T22
VDDP U23
VDDP V22
VDDP H23
VDDP W23
VDDP L22
VDDP M23
VDDP N22
VDDP P22
VDDP R23 PVDD
AE26 PVSS
AD26
LPVDD
AE10
TXVSSR
AC18
TXVDDR
AD19
TPVSS
AF17
TXVSSR
AD17
TPVDD
AE17
TXVSSR
AD18
A2VSSN
AC15 A2VDDQ
AD15
AVDD
AD23
A2VSSQ
AE15
LPVSS
AF10
MPVDD
A2 MPVSS
A3
VSS
U14
VSS
U12
VSS
U16 VSS
U15
VSS
U10
VSS
U13
VSS
U11
VSS
N16
VSS
U17
VSS
K16
VSS
M16
VSS
R16
VSS
P16
VSS
L16
VSS
T17
AVSSN
AD22
VDDC E12
VDDC E10
VDDC H22
VDDC E17
VDDC K22
VDDC E15
VDDC E19
VDDC E8
VDDR1 L5
VDDR1 K4
VDDR1 E21
VDDR1 J5
VDDR1 R4
VDDR1 P5
VDDR1 H4
VDDR1 E20
VDDR1 N5
VDDR1 G5
VDDR1 M4
VDDR1 E18
VDDR1 D17
VDDP D23
VDDC AB11
VDDR3 AB16
VDDR3 AB20
TXVDDR
AC19
VDDR3 AB21
LVDDR
AC13
LVSSR
AC14
VDDR3 AC17
VDDR3 AB22
VDDR3 AB15
VDDR3 AB18
VDDR3 AC23
VDDP E22
VDDP J22
AVSSQ
AC21
VDDR1 E3
VDDR1 F4
LVDDR
AD14 LVSSR
AB13 VDDP F22
VDDP K23
VDDR3 AC24 A2VSSN
AC16
A2VDD
AD16
VDDR1 B24
VDDR1 F3
VDDP C24
VDDR1 D6
VDDR1 D10
VDDR1 D15
VDDR1 D19
VDDR1 D22
VDDR1 G4
VDDR1 D7
VSS
D5
VSS
C4 VSS
D3 VSS
E4 VSS
F5
VDDP Y22
VDDP AA22
VDDP AB23
VDDP AB24
VDDC AB12
VDDRH
C5
C517
22UF_10V_1206
C134
1000PF_0402
12
C133
.1UF_0402
12
C73
.1UF_0402
12
C56
.1UF_0402
12
C118
1000PF_0402
12

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CRTR
CRTB
GREEN
VSYNC
DDC_CLK
HSYNC
DDC_DATA
BLUE
CRTG
RED
ENVDD
DISPOFF#
PID0
PID3
PID1
PID2
IB+
PID0
PID3
DAC_BRIG
DISPOFF#
INVT_PWM
PID1
PID2
GREEN14
DDC_DATA 14
HSYNC14
VSYNC14
RED14
BLUE14
DDC_CLK 14
EC_ENBKL38
BLON#14
ENVDD14
DAC_BRIG38 INVT_PWM38
TXB2-14 TXB2+14
TXBCLK-14 TXBCLK+14
TXB0+14 TXB0-14
TXB1-14 TXB1+14
TXA0-14 TXA0+14
TXA1-14 TXA1+14
TXA2-14 TXA2+14
TXACLK-14 TXACLK+14
PID032 PID132 PID232 PID332
+CRT_VCC
+3VS
+CRT_VCC
+3VS
+5VS +R_CRT_VCC
+3VS
+3VS
+LCDVDD
+5V
+LCDVDD
+12VALW
+LCDVDD
+3VS
B+
B+
+CRT_VCC
+3VS
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
18 53,
星期二 一月 07, 2003
Compal Electronics, inc.
CRT Connector
**
D1
DAN217_SOT23
1
2 3
R321
10K_0402_5%
C479
8PF_0402_NPO
12
R344
100_0603_5%
12
C516
4.7U_1206_16V6K
RP5
10K_8P4R_1206_5%
18 27 36 45
C740
220P_0402_25V8K
C522
4.7U_1206_16V6K
R310
75_0402_1%
C77
.1U_0402_16V7K
C478
8PF_0402_NPO
12
22K
22K
Q39
DTC124EK_SOT23
2
13
U2 74AHCT1G125GW
2 4
1
35
JP1
IPEX_20143-030E_30P
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Q35
SI2302DS-T1_SOT23
2
13
C4
27PF_0402_NPO
12
L1 FBM-11-160808-121
1 2
C549
1000P_0603_50V7K
R366
10K_0402_5%
Q3
2N7002
2
13
G
D S
Q29
2N7002
2
1 3
C476
.1UF_16V_0402_Y5V
12
L27
FCM2012C-800(0805)
1 2
U1
74AHCT1G125GW
2 4
1
35
G
D S
Q28
2N7002
2
1 3
R384
100K_0603_5%
F1
FUSE_1A
21
Q31
2N7002 2
13
D2
DAN217_SOT23
1
2 3
C737
220P_0402_25V8K
L30
FBM-11-160808-121
1 2
C41
10U_1210_35V4Z
C483
3.3P_0402_50V8J
C481
3.3P_0402_50V8J
C480
8PF_0402_NPO
12
L5
CHB2012U170_0805
1 2
D7
CH491D_SOT23
2 1
R308
75_0402_1%
R5
2.2K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C477
27PF_0402_NPO
12
R382
200K_0603_5%
C474
100PF_0402_NPO
12
R6
2.2K_0402_5%
R322
10K_0402_5%
L29 FCM2012C-800(0805)
1 2
C37
0.1U_0603_50V4Z
C738
220P_0402_25V8K
R323
2.2K_0402_5%
L4
CHB2012U170_0805
1 2
C63
1000P_0402_50V7K
R46
4.7K_0402_5%
R367
47K_0603_5%
L28
FCM2012C-800(0805)
1 2
22K
22K
Q34
DTC124EK_SOT23
2
13
C475
100PF_0402_NPO
12
C2
100PF_0402_NPO
12
R309
75_0402_1%
D3
DAN217_SOT23
1
2 3
JP15
SUYIN_7849S-15G2T-HC
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
D13
RB751V
21
C482
3.3P_0402_50V8J
R11 1K_0402_5%
C739
220P_0402_25V8K

A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
COMPS
CRMA
LUMA
CRMA14
LUMA14
COMPS14
+3VS
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
19 53,
星期二 一月 07, 2003
Compal Electronics, inc.
TV-OUT CONN.
**
D26
DAN217_SOT23
1
2 3
L56 CHB1608U301
1 2
C728
100P_0402_50V8K
C725
100P_0402_50V8K
R543
75_0402_1%
C723 @33P_0402_50V8J
L55 CHB1608U301
1 2
C724 @33P_0402_50V8J JP16
SUYIN_030008FR004T100XU
1
2
3
4
C727
270P_0402_25V8K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R544
75_0402_1%
D24
DAN217_SOT23
1
2 3
R545
75_0402_1%
C726
270P_0402_25V8K

A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
ECSMI#
ECSCI#
LID#
RTC_X2
LID#
HUB_PD5
PIRQB#
HUB_PD0
HUB_PD[0..10]
CLK_ICH14 HUB_ICH_RCOMP
HUB_PD10
HUB_PD4
RTC_VBIAS
HUB_PD9
HUB_PD3
HUB_PD2
RTC_X1
HUB_PD8
ECSCI#
HUB_PD6
HUB_PD1
CLK_ICHPCI
CLK_ICHHUB
PIRQA#
PIRQC#
ECSMI#
PM_LANPWROK
PIRQD#
HUB_PD7
CLK_ICH48
CLK_ICHHUB
IAC_BITCLK IAC_RST#
IAC_SDATAI0
IAC_SYNC
IAC_SDATAI1 IAC_SDATAO
IAC_SDATAO
IAC_SYNC
IAC_SDATAI1
IAC_SDATAI0
PM_SUSCLK
PM_SUSCLK
PM_LANPWROK
GNTA#
RTC_X2
RTC_X1
RTC_VBIAS
GNTA#
PCI_AD27
PCI_AD26
PCI_AD22
PCI_AD31
PCI_AD30
PCI_AD21
PCI_AD28
PCI_AD23
PCI_AD24
PCI_AD29
CLK_ICH14
CLK_ICH48
PCI_AD25
IAC_RST#
IAC_BITCLK
FERR#
FERR#
CLK_ICHAPIC
CLK_ICHPCI
RTC_RST#
PIRQE# PIRQF# PIRQG#
PIRQH#
PIRQC#/G#
PIRQD#/H#
PIRQA#
PIRQA#_1394
PIRQA#/E#
PIRQE#
PIRQF#
PIRQB#/F#/D#
PIRQC#
PIRQD#
PIRQ_LAN/B#/D#
PIRQA#/E#
PIRQH#
PIRQG# PIRQC#/G#
PIRQB#
PIRQD#/H#
PIRQB#/F#/D#
H_PICD0
H_PICD1
CLK_ICHAPIC
H_PICD0
CLK_ICHAPIC
H_PICD1
PIRQG#
PIRQH#
PIRQF# PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#
PCI_AD11
PCI_AD9
PCI_AD8
PCI_AD3
PCI_AD17
PCI_AD14
PCI_AD6
PCI_AD12
PCI_AD0
PCI_AD1
PCI_AD16
PCI_AD18
PCI_AD7
PCI_AD13
PCI_AD5
PCI_AD2
PCI_AD4
PCI_AD10
PCI_AD15
PCI_AD20
PCI_AD19
CLK_ICH_14M13
LPC_AD1 32,37,38
CLK_PCI_ICH 13
HUB_PSTRB 7
PM_DPRSLPVR48
LPC_AD2 32,37,38
PCI_FRAME# 22,23,24,26,28
PCI_LOCK# 22,24
LPC_AD0 32,37,38
HUB_PD[0..10] 7
CLK_ICH_48M13
PCI_TRDY# 22,23,24,26,28
LPC_AD3 32,37,38
HUB_PSTRB# 7
PM_GMUXSEL48
CLK_ICH_66M 13
PCI_IRDY# 22,23,24,26,28
PCI_STOP# 22,23,24,26,28
PCI_REQB# 22
PCI_REQA# 22
PCI_PERR# 22,23,24,26,28
PCI_PAR 22,23,24,26,28
PCI_DEVSEL# 22,23,24,26,28
SIRQ 22,24,32,37,38
ATF_INT#38
PM_BATLOW#38
LPC_DRQ#0 22,38
KBRST# 38
PM_CPUPERF#5
SM_INTRUDER# 22
SMB_CLK 10,11,13,22
SMB_DATA 10,11,13,22
INT_IRQ14 22,30
INT_IRQ15 22,29
PBTN#22
SYS_PWROK41
PM_SLP_S3#38 PM_SLP_S1#13,38
PM_SLP_S5#38 PM_STPCPU#13,48 PM_STPPCI#13 SUS_STAT#14
EC_SMI#38 EC_SCI#38
H_DPSLP# 5
SMB_ALERT# 22
EC_RIOUT#38
EC_LID_OUT#38
GATEA20 38
H_A20M# 5
H_SMI# 5
H_INIT# 5
SMLINK1 22
H_NMI 5
SMLINK0 22
H_STPCLK# 5
H_INTR 5
H_PWRGD 5
H_IGNNE# 5
ICH_VGATE41
AGP_BUSY#14
PM_CLKRUN#22,23,24,28,32,38
LFRAME# 32,37,38
LPC_DRQ#1 22,32
IAC_SDATAO31,34
IAC_RST#31,34
IAC_SDATAI034 IAC_SDATAI131
IAC_SYNC31,34
PM_RSMRST#38
H_FERR#5
H_CPUSLP# 5
PCI_GNT#122,28
PCI_REQ#422
PCI_GNT#222,24
PCI_C/BE#023,24,26,28
PCI_REQ#022,23
PCI_C/BE#323,24,26,28
PCI_REQ#322,26
PCI_C/BE#123,24,26,28
PCI_REQ#122,28
PCI_C/BE#223,24,26,28
PCI_REQ#222,24
PCI_GNT#322,26
PCI_GNT#022,23
PCI_GNT#422
PCI_AD[0..31]23,24,26,28
IAC_BITCLK31,34
PCIRST# 7,14,23,24,25,26,28,30,32,37,38
PCI_SERR# 22,23,24,26,28
ICH_WAKE_UP# 38
PIRQC#/G# 28
PIRQD#/H# 28
PIRQ_LAN/B#/D# 26
PIRQA#_1394 23
PIRQA#/E# 14,24
PIRQB#/F#/D# 24
RTCCLK24,25
STP_AGP#14
+RTCVCC
+VS_HUBREF
+VS_HUBVSWING
+1.8VS
+1.8VS
+VS_HUBVSWING
+RTCVCC
+VS_HUBREF +3VS
+CPU_CORE
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
401241
1A
SCHEMATIC, M/B LA-1691
Custom
20 53,
星期二 一月 07, 2003
Compal Electronics, inc.
(for use if CPU unable
to support DPSLP#)
ICH3-M (1/2)
Interface
PCI
Interface
LAN
PCI
Interface
HubLink
Interface
VSS
AC'97
Interface LPC
Interface
Clocks EEPROM
Interface
Interface
CPU
Interface
System
Managment
Interface
Interrupt
GPIO
unMUX
GeyservillePower Management
Close to ICH3-M.
HUB Reference Voltage
Place R_K and R_L
Closely ICH3
R_K
R_L
HUB Interface VSwing Voltage
1. Place R_G and R_H in middle of Bus.
R_G
R_H
Place closely to ICH3
Place closely to ICH3
**
**
**
R159 0
12
C617
.01UF
12
RP129
10P8R_8.2K
10
9
8
7
6
1
2
3
4
5
R431 470
1 2
R483 @0_0402_5%
1 2
R445
1K
12
R457
@10
12
R442
0
12
R418
@10
12
C627
@15PF
12
C584
.047UF_0603
1 2
R471
@ 33
12
J1
JOPEN
1 2
R446
@33
1 2
C569
12PF
12
R192 0_0402_5%
1 2
R486 33
1 2
R452
1K
12
R163 0
1 2
C649
@15PF
12
C601
@15PF
12
R433 36.5_1%
1 2
R410 10M_0603
1 2
C616
.01UF
12
C573
12PF
12
R443
470
12
R432 100K
1 2
C595
5PF
RP58
0_8P4R_1206_5%
1 8
2 7
3 6
4 5
R461
@0
12
R1700
1 2
C622
.1UF
12
C567
1UF_10V_0603
12
R430
301_1%
12
R412
1K
12
C668
@ 10PF
C639
@10PF
U12A
ICH3-M
PCI_AD0
J2 PCI_AD1
K1 PCI_AD2
J4 PCI_AD3
K3 PCI_AD4
H5 PCI_AD5
K4 PCI_AD6
H3 PCI_AD7
L1 PCI_AD8
L2 PCI_AD9
G2 PCI_AD10
L4 PCI_AD11
H4 PCI_AD12
M4 PCI_AD13
J3 PCI_AD14
M5 PCI_AD15
J1 PCI_AD16
F5 PCI_AD17
N2 PCI_AD18
G4 PCI_AD19
P2 PCI_AD20
G1 PCI_AD21
P1 PCI_AD22
F2 PCI_AD23
P3 PCI_AD24
F3 PCI_AD25
R1 PCI_AD26
E2 PCI_AD27
N4 PCI_AD28
D1 PCI_AD29
P4 PCI_AD30
E1 PCI_AD31
P5
PCI_C/BE#0
K2 PCI_C/BE#1
K5 PCI_C/BE#2
N1 PCI_C/BE#3
R2
PCI_GNT#0
A4 PCI_GNT#1
E3 PCI_GNT#2
D2 PCI_GNT#3
D5 PCI_GNT#4
B4
PCI_REQ#0
D3 PCI_REQ#1
F4 PCI_REQ#2
A3 PCI_REQ#3
R4 PCI_REQ#4
E4
CPU_RCIN# U22
CPU_PWRGOOD W23
CPU_NMI Y21
CPU_INTR AA23
CPU_INIT# AB23
CPU_IGNNE# AA21
CPU_FERR# J22
CPU_DPSLP# AB22
CPU_A20M# V23
CPU_A20GATE Y22
SMB_ALERT#/GPIO11 AC5
SMB_DATA AB5
SMB_CLK AC4
SMLINK1 AB2
SMLINK0 AC3
SM_INTRUDER# Y6
PCI_TRDY# H1
STOP# H2
PCI_SERR# L5
PCI_RST# Y1
PCI_PME# W1
PCI_LOCK# M1
PCI_PERR# M2
PCI_PAR G5
PCI_IRDY# N3
PCI_GPIO17/GNTB#/GNT5# B3
PCI_GPIO16/GNTA# B6
PCI_GPIO1/REQB#/REQ5# D4
PCI_GPIO0/REQA# C4
PCI_FRAME# F1
PCI_DEVSEL# M3
PCI_CLK T5
STPCLK# U23
CPU_SMI# Y23
CPU_SLP# W21
HUB_PD0 L22
HUB_PD1 M21
HUB_PD2 M23
HUB_PD3 N20
HUB_PD4 P21
HUB_PD5 R22
HUB_PD6 R20
HUB_PD7 T23
HUB_PD8 M19
HUB_PD9 P19
HUB_PD10 N19
HUB_CLK
T19 HUB_PAR
R19 HUB_PSTRB N22 HUB_PSTRB#
P23 HUB_RCOMP K19 HUB_VREF
L20 HUB_VSWING L19
EEP_CS
E9 EEP_DIN
D8 EEP_DOUT
E8 EEP_SHCLK
D10
LAN_RXD0
C8 LAN_RXD1
A8 LAN_RXD2 A9 LAN_TXD0 B9 LAN_TXD1
C10 LAN_TXD2
A10 LAN_JCLK
C9 LAN_RSTSYNC D7
PM_AGPBUSY#/GPIO6 V4
PM_AUXPWROK Y5
PM_BATLOW# AB3
PM_C3_STAT#/GPIO21 V5
PM_CLKRUN#/GPIO24 AC2
PM_DPRSLPVR AB21
PM_PWRBTN# AB1
PM_PWROK AA6
PM_RI# AA1
PM_RSMRST# AA7
PM_SLP_S1#/GPIO19 W20
PM_SLP_S3# AA5 PM_SLP_S5# AA2
PM_STPCPU#/GPIO20 V21
PM_STPPCI#/GPIO18 U21
PM_SUS_CLK AA4
PM_SUS_STAT# AB4
PM_THRM# U5
PM_GMUXSEL/GPIO23 U20
PM_CPUPREF#/GPIO22 Y20
PM_VGATE/VRMPWRGD V19
AC_BITCLK B7
AC_RST# D11
AC_SDATAIN0 B11 AC_SDATAIN1 C11
AC_SDATAOUT C7
AC_SYNC A7
LPC_AD0 V1 LPC_AD1 U3 LPC_AD2 T3 LPC_AD3 U2
LPC_DRQ#0 T2 LPC_DRQ#1 U4
LPC_FRAME# U1
GPIO_7 V2 GPIO_8 W2
GPIO_12 Y4 GPIO_13 Y2 GPIO_25 W3 GPIO_27 W4 GPIO_28 Y3
CLK_RTCX2
AC6 CLK_RTCX1 AC7 CLK_RTEST#
Y7 CLK_48
F20 CLK_14
J23
CLK_VBIAS
AB7
INT_SERIRQ H22
INT_IRQ15 W19 INT_IRQ14 AB14
INT_PIRQH#/GPIO5 A5
INT_PIRQG#/GPIO4 C5
INT_PIRQF#/GPIO3 B5
INT_PIRQE#/GPIO2 A6
INT_PIRQD# A2 INT_PIRQC# B2
INT_PIRQB# C1 INT_PIRQA# B1
INT_APICD1 J21 INT_APICD0 J20
INT_APICCLK J19
VSS0
A1 VSS1
A13 VSS2 A16 VSS3 A17 VSS4 A20 VSS5 A23 VSS6
B8 VSS7
B10 VSS8 B13 VSS9 B14 VSS10 B15 VSS11 B18 VSS12 B19 VSS13 B20 VSS14 B22 VSS15
C3 VSS16 C6 VSS17
F19 VSS18
C14 VSS19 C15 VSS20 C16 VSS21 C17 VSS22 C18 VSS23 C19 VSS24 C20 VSS25 C21 VSS26 C22 VSS27
D9 VSS28
D13 VSS29 D16 VSS30 D17 VSS31 D20 VSS32 D21 VSS33 D22 VSS34
E5
R488 0
1 2
R487 10K
12
R434
301_1%
12
R465
33
1 2
R396
1K
1 2
RP127
@0_8P4R_1206_5%
1 8
2 7
3 6
4 5
R421
2.4M
12
R420
10
1 2
C661
@10PF
R416 10M
1 2
R415 22M
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R404 15K
1 2
R447
@10
12
C575 .1UF
1 2
Q45
3904
2
3 1
X4
32.768KHZ
R458 0_0402_5%
1 2
R451
301_1%
12
R444
301_1%
12
R441 @ 10K
1 2
Q44
3904
2
3 1
R485 @10K
1 2
R160
@10K
12
R182
300
12