Compaq Deskpro 4000 Use and care manual

Technical
Reference
Guide
for
Compaq Deskpro 4000 and 6000 Personal Computers
featuring the Pentium II Processor

The hardcopy of this document is designed to be placed into a standard 3-ring binder. Provided below is a
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Deskpro 4000 and 6000 Personal Computers
featurin
g
the Pentium II Processor
TRG

Technical Reference Guide
Compaq Deskpro 4000 and 6000 Personal Computers
featuring the Pentium II Processor
First Edition – October1997
i
NOTICE
The information in this document is subject to change without notice.
COMPAQ COMPUTER CORPORATION SHALL NOT BE LIABLE FOR TECHNICAL OR
EDITORIAL ERRORS OR OMISSIONS HEREIN; NOR FOR INCIDENTAL OR
CONSEQUENTIAL DAMAGES RESULTING FROM THE FURNISHING, PERFORMANCE,
OR USE OF THIS MATERIAL. IT IS THE RESPONSIBILITY OF MANUFACTURERS TO
ENSURE THAT DEVICES DESIGNED TO BE USED WITH COMPAQ PRODUCTS
COMPLY WITH FCC CLASS B EMISSIONS REQUIREMENTS.
This guide contains information protected by copyright. No part of this document may be
photocopied or reproduced in any form without prior written consent from Compaq Computer
Corporation.
1997 Compaq Computer Corporation
All rights reserved. Printed in the USA
Compaq, Deskpro, LTE, Contura, Presario, ProLinea
Registered U.S. Patent and Trademark Office
Product names mentioned in this document may be trademarks and/or registered trademarks of other companies.
For more information regarding specifications and Compaq-specific parts please contact Compaq
Computer Corporation, Industry Relations Department.
Technical Reference Guide
for
Compaq Deskpro 4000 and 6000 Personal Computers featuring the Pentium II Processor
First Edition - October 1997
Document Number DSK-113A/1097

Technical Reference Guide
Compaq Deskpro 4000 and 6000 Personal Computers
featuring the Pentium II Processor
First Edition –- October1997
ii

Technical Reference Guide
Compaq Deskpro 4000 and 6000 Personal Computers
featuring the Pentium II Processor
First Edition – October1997
iii
TABLE OF CONTENTS
CHAPTER 1 INTRODUCTION.............................................................................................................
1.1 ABOUT THIS GUIDE ........................................................................................................... 1-1
1.1.1 USING THIS GUIDE.....................................................................................................1-1
1.1.2 ADDITIONAL INFORMATION SOURCES..................................................................1-1
1.2 NOTATIONAL CONVENTIONS..........................................................................................1-2
1.2.1 VALUES........................................................................................................................1-2
1.2.2 RANGES........................................................................................................................1-2
1.2.3 SIGNAL LABELS..........................................................................................................1-2
1.2.4 REGISTER NOTATION AND USAGE ......................................................................... 1-2
1.2.5 BIT NOTATION............................................................................................................1-2
1.3 COMMON ACRONYMS AND ABBREVIATIONS..............................................................1-3
CHAPTER 2 SYSTEM OVERVIEW.....................................................................................................
2.1 INTRODUCTION.................................................................................................................. 2-1
2.2 FEATURES...........................................................................................................................2-2
2.2.1 STANDARD FEATURES.............................................................................................. 2-2
2.2.2 SERIES DIFFERENCES................................................................................................ 2-3
2.2.3 OPTIONS.......................................................................................................................2-3
2.3 MECHANICAL DESIGN......................................................................................................2-4
2.3.1 CABINET LAYOUTS....................................................................................................2-4
2.3.2 CHASSIS LAYOUTS.....................................................................................................2-6
2.3.3 SYSTEM BOARD LAYOUTS....................................................................................... 2-7
2.4 SYSTEM ARCHITECTURE.................................................................................................. 2-8
2.4.1 PENTIUM II PROCESSOR.......................................................................................... 2-10
2.4.2 MEMORY....................................................................................................................2-10
2.4.3 SUPPORT CHIPSET.................................................................................................... 2-11
2.4.4 NETWORK INTERFACE............................................................................................2-11
2.4.5 GRAPHICS SUBSYSTEM...........................................................................................2-12
2.4.6 MASS STORAGE........................................................................................................ 2-12
2.4.7 SERIAL AND PARALLEL INTERFACES.................................................................. 2-12
2.4.8 UNIVERSAL SERIAL BUS INTERFACE...................................................................2-13
2.5 SPECIFICATIONS.............................................................................................................. 2-14
CHAPTER 3 PROCESSOR/MEMORY SUBSYSTEM........................................................................
3.1 INTRODUCTION.................................................................................................................. 3-1
3.2 PENTIUM II-BASED PROCESSOR/MEMORY SUBSYSTEM ...........................................3-2
3.2.1 PENTIUM II PROCESSOR............................................................................................ 3-3
3.2.2 SYSTEM MEMORY......................................................................................................3-6
3.2.3 SUBSYSTEM CONFIGURATION............................................................................... 3-10

Technical Reference Guide
Compaq Deskpro 4000 and 6000 Personal Computers
featuring the Pentium II Processor
First Edition –- October1997
iv
CHAPTER 4 SYSTEM SUPPORT.........................................................................................................
4.1 INTRODUCTION.................................................................................................................. 4-1
4.2 PCI BUS OVERVIEW...........................................................................................................4-2
4.2.1 PCI CONNECTOR.........................................................................................................4-3
4.2.2 PCI BUS MASTER ARBITRATION..............................................................................4-4
4.2.3 PCI BUS TRANSACTIONS...........................................................................................4-5
4.2.4 OPTION ROM MAPPING ............................................................................................. 4-8
4.2.5 PCI INTERRUPT MAPPING.........................................................................................4-9
4.2.6 PCI CONFIGURATION............................................................................................... 4-10
4.3 AGP BUS OVERVIEW .......................................................................................................4-11
4.3.1 AGP CONFIGURATION............................................................................................. 4-12
4.4 ISA BUS OVERVIEW......................................................................................................... 4-13
4.4.1 ISA CONNECTOR ...................................................................................................... 4-14
4.4.2 ISA BUS TRANSACTIONS......................................................................................... 4-15
4.4.3 DIRECT MEMORY ACCESS......................................................................................4-17
4.4.4 INTERRUPTS.............................................................................................................. 4-20
4.4.5 INTERVAL TIMER.....................................................................................................4-24
4.4.6 ISA CONFIGURATION...............................................................................................4-24
4.5 SYSTEM CLOCK DISTRIBUTION....................................................................................4-25
4.6 REAL-TIME CLOCK AND CONFIGURATION MEMORY............................................... 4-26
4.6.1 CONFIGURATION MEMORY BYTE DEFINITIONS................................................ 4-27
4.7 I/O MAP AND REGISTER ACCESSING............................................................................ 4-43
4.7.1 SYSTEM I/O MAP ......................................................................................................4-43
4.7.2 87307 I/O CONTROLLER CONFIGURATION........................................................... 4-44
4.8 SYSTEM MANAGEMENT SUPPORT ............................................................................... 4-46
4.8.1 FLASH ROM WRITE PROTECT ................................................................................ 4-47
4.8.2 PASSWORD PROTECTION........................................................................................4-47
4.8.3 I/O SECURITY............................................................................................................ 4-48
4.8.4 USER SECURITY........................................................................................................ 4-48
4.8.5 TEMPERATURE SENSING........................................................................................4-49
4.8.6 COVER LOCK............................................................................................................. 4-49
4.8.7 COVER REMOVAL SENSOR..................................................................................... 4-50
4.8.8 POWER MANAGEMENT........................................................................................... 4-51
CHAPTER 5 INPUT/OUTPUT INTERFACES.....................................................................................
5.1 INTRODUCTION.................................................................................................................. 5-1
5.2 ENHANCED IDE INTERFACE ............................................................................................5-1
5.2.1 IDE PROGRAMMING...................................................................................................5-1
5.2.2 IDE CONNECTOR........................................................................................................5-8
5.3 DISKETTE DRIVE INTERFACE..........................................................................................5-9
5.3.1 DISKETTE DRIVE PROGRAMMING ........................................................................ 5-10
5.3.2 DISKETTE DRIVE CONNECTOR.............................................................................. 5-13
5.4 SERIAL INTERFACES.......................................................................................................5-14
5.4.1 RS-232 INTERFACE ...................................................................................................5-14
5.4.2 IrDA INTERFACE.......................................................................................................5-15
5.4.3 SERIAL INTERFACE PROGRAMMING.................................................................... 5-16

Technical Reference Guide
Compaq Deskpro 4000 and 6000 Personal Computers
featuring the Pentium II Processor
First Edition – October1997
v
5.5 PARALLEL INTERFACE...................................................................................................5-21
5.5.1 STANDARD PARALLEL PORT MODE ..................................................................... 5-21
5.5.2 ENHANCED PARALLEL PORT MODE..................................................................... 5-22
5.5.3 EXTENDED CAPABILITIES PORT MODE............................................................... 5-22
5.5.4 PARALLEL INTERFACE PROGRAMMING.............................................................. 5-23
5.5.5 PARALLEL INTERFACE CONNECTOR ................................................................... 5-27
5.6 KEYBOARD/POINTING DEVICE INTERFACE ...............................................................5-28
5.6.1 KEYBOARD INTERFACE OPERATION ...................................................................5-28
5.6.2 POINTING DEVICE INTERFACE OPERATION .......................................................5-30
5.6.3 KEYBOARD/POINTING DEVICE INTERFACE PROGRAMMING ......................... 5-30
5.6.4 KEYBOARD/POINTING DEVICE INTERFACE CONNECTOR................................ 5-34
5.7 ETHERNET INTERFACE...................................................................................................5-35
5.7.1 NIC CONFIGURATION/CONTROL ........................................................................... 5-36
5.7.2 NIC CONNECTORS.................................................................................................... 5-36
5.8 UNIVERSAL SERIAL BUS INTERFACE........................................................................... 5-37
5.8.1 USB CONFIGURATION.............................................................................................. 5-37
5.8.2 USB CONTROL........................................................................................................... 5-38
5.8.3 USB CONNECTOR .....................................................................................................5-38
5.9 ULTRA SCSI ADAPTER ....................................................................................................5-39
5.9.1 SCSI CONNECTORS .................................................................................................5-40
CHAPTER 6 AUDIO SUBSYSTEM ......................................................................................................
6.1 INTRODUCTION.................................................................................................................. 6-1
6.2 FUNCTIONAL DESCRIPTION.............................................................................................6-2
6.2.1 PCM AUDIO PROCESSING..........................................................................................6-4
6.2.2 FM SYNTHESIS AUDIO PROCESSING.......................................................................6-7
6.3 AUDIO SUBSYSTEM PROGRAMMING ............................................................................. 6-8
6.3.1 CONFIGURATION........................................................................................................6-8
6.3.2 CONTROL..................................................................................................................... 6-9
6.4 SPECIFICATIONS.............................................................................................................. 6-11
CHAPTER 7 POWER SUPPLY AND DISTRIBUTION.......................................................................
7.1 INTRODUCTION.................................................................................................................. 7-1
7.2 POWER SUPPLY ASSEMBLY/CONTROL.......................................................................... 7-1
7.2.1 POWER SUPPLY ASSEMBLY.....................................................................................7-2
7.2.2 POWER CONTROL....................................................................................................... 7-3
7.3 POWER DISTRIBUTION......................................................................................................7-4
7.3.1 3.5/5/12 VDC DISTRIBUTION......................................................................................7-4
7.3.2 LOW VOLTAGE DISTRIBUTION................................................................................ 7-5
7.4 SIGNAL DISTRIBUTION.....................................................................................................7-6

Technical Reference Guide
Compaq Deskpro 4000 and 6000 Personal Computers
featuring the Pentium II Processor
First Edition –- October1997
vi
CHAPTER 8 BIOS ROM .......................................................................................................................
8.1 INTRODUCTION.................................................................................................................. 8-1
8.2 BOOT FUNCTIONS..............................................................................................................8-2
8.2.1 BOOT BLOCK...............................................................................................................8-2
8.2.2 QUICKBOOT.................................................................................................................8-2
8.2.3 SILENTBOOT ...............................................................................................................8-2
8.3 ACCESSING CONFIGURATION MEMORY.......................................................................8-3
8.3.1 ACCESSING CMOS...................................................................................................... 8-3
8.3.2 SETTING DEFAULT PARAMETERS.......................................................................... 8-3
8.3.3 ACCESSING CMOS FEATURE BITS...........................................................................8-4
8.4 CLIENT MANAGEMENT SUPPORT...................................................................................8-5
8.4.1 SYSTEM ID................................................................................................................... 8-7
8.4.2 SYSTEM INFORMATION TABLE...............................................................................8-7
8.4.3 DRIVE FAULT PREDICTION.....................................................................................8-12
8.4.4 DIMM SUPPORT......................................................................................................... 8-13
8.4.5 SECURITY FUNCTIONS............................................................................................8-15
8.4.6 ACCESSING CMOS FEATURE BITS......................................................................... 8-16
8.5 PNP SUPPORT.................................................................................................................... 8-17
8.6 POWER MANAGEMENT SUPPORT ................................................................................. 8-18
APPENDIX A ERROR MESSAGES AND CODES...............................................................................
A.1 INTRODUCTION.................................................................................................................A-1
A.2 POWER-ON MESSAGES..................................................................................................... A-1
A.3 BEEP CODE MESSAGES.................................................................................................... A-1
A.4 POWER-ON SELF TEST (POST) MESSAGES.................................................................... A-2
A.5 PROCESSOR ERROR MESSAGES (1XX-XX)....................................................................... A-3
A.6 MEMORY ERROR MESSAGES (2XX-XX)........................................................................... A-4
A.7 KEYBOARD ERROR MESSAGES (30X-XX)....................................................................... A-4
A.8 PRINTER ERROR MESSAGES (4XX-XX)............................................................................ A-5
A.9 VIDEO (GRAPHICS) ERROR MESSAGES (5XX-XX).......................................................... A-5
A.10 DISKETTE DRIVE ERROR MESSAGES (6XX-XX) ......................................................... A-6
A.11 SERIAL INTERFACE ERROR MESSAGES (11XX-XX)................................................... A-6
A.12 MODEM COMMUNICATIONS ERROR MESSAGES (12XX-XX).................................... A-7
A.13 HARD DRIVE ERROR MESSAGES (17XX-XX)............................................................... A-8
A.14 HARD DRIVE ERROR MESSAGES (19XX-XX)............................................................... A-9
A.15 VIDEO (GRAPHICS) ERROR MESSAGES (24XX-XX) .................................................... A-9
A.16 AUDIO ERROR MESSAGES (3206-XX)......................................................................... A-10
A.17 NETWORK INTERFACE ERROR MESSAGES (60XX-XX) ........................................... A-10
A.18 SCSI INTERFACE ERROR MESSAGES (65XX-XX, 66XX-XX, 67XX-XX) ....................... A-11
A.19 POINTING DEVICE INTERFACE ERROR MESSAGES (8601-XX).............................. A-11
A.20 CEMM PRIVILEDGED OPS ERROR MESSAGES........................................................ A-12
A.21 CEMM EXCEPTION ERROR MESSAGES ................................................................... A-12
APPENDIX B ASCII CHARACTER SET.............................................................................................
B.1 INTRODUCTION..................................................................................................................B-1

Technical Reference Guide
Compaq Deskpro 4000 and 6000 Personal Computers
featuring the Pentium II Processor
First Edition – October1997
vii
APPENDIX C KEYBOARD...................................................................................................................
C.1 INTRODUCTION..................................................................................................................C-1
C.2 KEYSTROKE PROCESSING................................................................................................C-2
C.2.1 TRANSMISSIONS TO THE SYSTEM ..........................................................................C-3
C.2.2 KEYBOARD LAYOUTS ...............................................................................................C-4
C.2.3 KEYS.............................................................................................................................C-7
C.2.4 KEYBOARD COMMANDS.........................................................................................C-10
C.2.5 SCAN CODES.............................................................................................................C-10
C.3 SCANNER DESCRIPTION.................................................................................................C-14
C.3.1 SCANNER OPERATION.............................................................................................C-15
C.3.2 SCANNER INTERFACE .............................................................................................C-18
C.3.3 SCANNER SPECIFICATIONS/REQUIREMENTS......................................................C-20
APPENDIX D MATROX MYSTIQUE GRAPHICS CARD.................................................................
D.1 INTRODUCTION.................................................................................................................D-1
D.2 FUNCTIONAL DESCRIPTION............................................................................................ D-2
D.3 DISPLAY CONFIGURATIONS ........................................................................................... D-3
D.4 MONITOR POWER MANAGEMENT CONTROL.............................................................. D-3
D.5 CONNECTORS.................................................................................................................... D-4
APPENDIX E MATROX MILLENNIUM II GRAPHICS CARD ........................................................
E.1 INTRODUCTION..................................................................................................................E-1
E.2 FUNCTIONAL DESCRIPTION.............................................................................................E-2
E.3 DISPLAY CONFIGURATIONS ............................................................................................E-3
E.4 PROGRAMMING..................................................................................................................E-4
E.4.1 CONFIGURATION........................................................................................................E-4
E.4.2 CONTROL.....................................................................................................................E-4
E.5 MONITOR POWER MANAGEMENT CONTROL...............................................................E-6
E.6 CONNECTORS.....................................................................................................................E-6

Technical Reference Guide
Compaq Deskpro 4000 and 6000 Personal Computers
featuring the Pentium II Processor
First Edition –- October1997
viii
LIST OF FIGURES
FIGURE 2–1. COMPAQ DESKPRO 4000 DESKTOP PERSONAL COMPUTER WITH MONITOR..........................2-1
FIGURE 2–2. CABINET LAYOUT, FRONT VIEW .......................................................................................2-4
FIGURE 2–3. CABINET LAYOUT, REAR VIEW ......................................................................................... 2-5
FIGURE 2–4. DESKTOP CHASSIS LAYOUT, TOP VIEW..............................................................................2-6
FIGURE 2–5. MINITOWER CHASSIS LAYOUT, LEFT SIDE VIEW................................................................2-6
FIGURE 2–6. SYSTEM BOARD LAYOUT, COMPONENT SIDE .....................................................................2-7
FIGURE 2–7. SYSTEM ARCHITECTURE, BLOCK DIAGRAM........................................................................2-9
FIGURE 2–8. PENTIUM II SEC CARTRIDGE AND HEAT SINK.................................................................. 2-10
FIGURE 3–1. PENTIUM II-BASED PROCESSOR/MEMORY SUBSYSTEM ARCHITECTURE...............................3-2
FIGURE 3–2. PENTIUM II PROCESSOR INTERNAL ARCHITECTURE............................................................3-3
FIGURE 3–3. SYSTEM MEMORY MAP.......................................................................................................3-9
FIGURE 4–1. PCI BUS DEVICES AND FUNCTIONS.....................................................................................4-2
FIGURE 4–2. PCI BUS CONNECTOR (5V TYPE)......................................................................................4-3
FIGURE 4–3. TYPE 0 CONFIGURATION CYCLE........................................................................................4-6
FIGURE 4–4. PCI CONFIGURATION SPACE MAP......................................................................................4-7
FIGURE 4–5. AGP BUS CONNECTOR ................................................................................................... 4-11
FIGURE 4–6. ISA BUS BLOCK DIAGRAM................................................................................................ 4-13
FIGURE 4–7. ISA EXPANSION CONNECTOR.......................................................................................... 4-14
FIGURE 4–8. MASKABLE INTERRUPT PROCESSING, BLOCK DIAGRAM.................................................... 4-20
FIGURE 4–9. CONFIGURATION MEMORY MAP...................................................................................... 4-26
FIGURE 5–1. 40-PIN IDE CONNECTOR. .................................................................................................5-8
FIGURE 5–2. 34-PIN DISKETTE DRIVE CONNECTOR.............................................................................. 5-13
FIGURE 5–3. SERIAL INTERFACES BLOCK DIAGRAM ............................................................................. 5-14
FIGURE 5–4. SERIAL INTERFACE CONNECTOR (MALE DB-9 AS VIEWED FROM REAR OF CHASSIS)........... 5-14
FIGURE 5–5. IRDA INTERFACE CONNECTOR (FEMALE MINI-DIN-TYPE AS VIEWED FROM REAR OF CHASSIS)5-15
FIGURE 5–6. PARALLEL INTERFACE CONNECTOR (FEMALE DB-25 AS VIEWED FROM REAR OF CHASSIS).. 5-27
FIGURE 5–7. 8042-TO-KEYBOARD TRANSMISSION OF CODE EDH, TIMING DIAGRAM............................ 5-28
FIGURE 5–8. KEYBOARD OR POINTING DEVICE INTERFACE CONNECTOR............................................... 5-34
FIGURE 5–9. ETHERNET INTERFACE BLOCK DIAGRAM ......................................................................... 5-35
FIGURE 5–10. ETHERNET AUI CONNECTOR (DB-15, VIEWED FROM REAR) ........................................... 5-36
FIGURE 5–11. ETHERNET RJ-45 CONNECTOR......................................................................................5-36
FIGURE 5–12. UNIVERSAL SERIAL BUS CONNECTOR (ONE OF TWO AS VIEWED FROM REAR OF CHASSIS)... 5-38
FIGURE 5–13. SCSI ADAPTER, BLOCK DIAGRAM.................................................................................. 5-39
FIGURE 5–14. ULTRA SCSI CONNECTOR (50-PIN, AS VIEWED FROM REAR OF CHASSIS)............................ 5-40
FIGURE 6–1. AUDIO SUBSYSTEM BLOCK DIAGRAM ................................................................................6-3
FIGURE 6–2. ANALOG SIGNAL SAMPLING/QUANTIZING..........................................................................6-4
FIGURE 6–3. DAC OPERATION .............................................................................................................6-5
FIGURE 6–4. AUDIO SUBSYSTEM-TO-ISA BUS PCM AUDIO DATA FORMATS / BYTE ORDERING ..............6-6
FIGURE 6–5. FM SYNTHESIS PATCH......................................................................................................6-7
FIGURE 6–6. AUDIO CAR-TO-ISA BUS FM AUDIO DATA FORMAT..........................................................6-7
FIGURE 7–1. POWER DISTRIBUTION AND CONTROL, BLOCK DIAGRAM....................................................7-1
FIGURE 7–2. POWER CABLE DIAGRAM ..................................................................................................7-4
FIGURE 7–3. LOW VOLTAGE SUPPLY,BLOCK DIAGRAM .........................................................................7-5
FIGURE 7–4. SIGNAL DISTRIBUTION DIAGRAM.......................................................................................7-6