
Document change history
First Edition Feb. 18, 2008 Initial edition
Second Edition Mar. 03, 2008 Edited the note on Pin No.8 of signal table as follows:
<Before editing>
“For VCC, connect I/O power of CPU. Debugging can be performed even if the signal is N.C.,
however, if you connect I/O power, it will allow prevention of leak during the target system power
OFF and adaptation to power 1.8V-5V range.”
<After editing>
“For VCC, connect I/O power of CPU. Debugging can be performed even if the signal is N.C.,
however, if you connect I/O power, it will allow prevention of leak during the target system power
OFF and adaptation to power 1.8V-3.6V range.”
Added the following description for Pin No.8 to the note on signal table.
“However, for input, it is 5V-tolerant. If optional conversion adapter (ADP-HUDI-5V) is used, 5V is
supported for output.”
Third Edition Aug. 07, 2008 Deleted the note from the pages on H8S and H8SX family CPU listings.
Fourth Edition Aug. 08, 2008 Applied PALMiCE3 provision to this document following the release of PALMiCE3-H8S.
Added the following CPUs.
・ H8S/2166F, H8S/2167F, H8S/2168F
・ H8S/2211F, H8S/2211UF, H8S/2212UF, H8S/2218UF
・ H8S/2360F, H8S/2361F, H8S/2362F, H8S/2364F
・ H8S/2370F, H8S/2371F, H8S/2372F, H8S/2374F, H8S/2370RF, H8S/2371RF, H8S/2372RF,
H8S/2374RF, H8S/2378BF
・ H8SX/1527RF
・ H8SX/1543F, H8SX/1544F
・ H8SX/1622F
・ H8SX/1632F, H8SX/1634F, H8SX/1638F
・ H8SX/1642F, H8SX/1644F, H8SX/1648F
・ H8SX/1653RF, H8SX/1654RF, H8SX/1658RF
・ H8SX/1663RF, H8SX/1664RF, H8SX/1668RF
Fifth Edition Nov. 06, 2009 Added the supported CPUs also to this manual as they had been added in CSIDE for
PALMiCE3 H8S (Ver.5.07.00).
・ H8S/2462F
・ H8SX/1662F, H8SX/1665F
Sixth Edition Mar. 04, 2011 Added pages for description of the following:
PALMiCE3 - Supported connectors
PALMiCE3 - Target probe specifications
Deleted the specifications of the debugger described in the note on "VCC". Refer to the
Product Summary.