Daewoo DG-K301 User manual

July. 2007
Service Manual
DG-K301
✔ Caution :
In this Manual, some parts can be changed for improving, their
performance without notice in the parts list. So, if you need the latest
parts information,please refer to PPL(Parts Price List) in Service
Information Center.
DVD PLAYER
MODEL:

1
CONTENTS
CONTENTS
SPECIFICATIONS.........................................................................................................................2
CIRCUIT OPERATIONAL DESCRIPTION.........................................................................................3
VOLTAGE CHARTS.....................................................................................................................16
CIRCUIT DIAGRAM...................................................................................................................18
PCB CIRCUIT BOARD.................................................................................................................24
WAVEFORMS............................................................................................................................27
TROUBLE SHOOTING.................................................................................................................36
INSTRUMENT DISASSEMBLY......................................................................................................41
PARTLIST...................................................................................................................................42

2
Laser wavelength 650nm
Video PAL/AUTO/NTSC
Frequency response 20Hz ~ 20KHz (±1dB)
Signal/noise ratio ≥90dB
Channel separation ≥85dB ( 1KHz)
Dynamic range ≥80dB ( 1KHz)
Output
Audio
Analog output level : 2.0 + 0/-0.2Vrms
(Load impedance : 1,0KΩ)
Digital output level : 0.5 ±0.1Vp-p
(Load impedance : 75Ω)
Output
Video
Composite output level : 1.0 ±0.1Vp-p
(Load impedance : 75Ω, imbalance, negative polarity)
S-video
output level : brightness(Luma) 1.0 ±0.1Vp-p Chromaticity (Color)
0.286 ±20%
(Load impedance : 75Ω)
Component Y: 1Vp-p, Pb/Pr: 0.7Vp-p (Load impedance : 75Ω)
Power 100-240V~, 50Hz~60Hz 12W
Dimensiones Body (W x H x D) 360 x 38 x 215 mm
Packing 437 x 90 x 280 mm
Weight (Gross / Net) 1.97Kg / 1.41Kg
Notes : Design and specifications in this instruction manual are subjected to change with-
out prior notice toimprove quality and function.
DVD Audio output standards
Output Disc type
DVD VIDEO-CD CD
Analogue Audio output 48/96KHz sampling 44.1KHz sampling 44.1KHz sampling
Digital Audio output 48KHz sampling 44.1KHz sampling 44.1KHz sampling
SPECIFICATIONS

3
1. DVD Module
1) Summary
DVD One Board consists of: Loader part that reads and transmits audio and video data saved
at Optic Discs (DVD, CD-DA, VCD, CD-R) to MPEG Decoder part; MPEG Decoder part, which,
by decoding and encoding data received from the Loader, produces analog signals; and u-Com
that controls the overall system including the loader and MPEG decoder.
2) How Does it Operate
Insert the power cord and then power transmitted to each IC, and the SET will be the STAND-
BY status which requires the least power for input the front panel key, input the STAND BY/
ON key, extinguished the LED. Once the Power On key is entered, u-Com recognizes it and
initiates each chipset, performs sequential algorithms such as determining whether the disc
is in or not, and if in, what type of disc is loaded.
Through this process, it can read disc data before transmitting it to the MPEG Decoder. The
MPEG Decoder will then decode and encode such data before generating the final analog
audio and video signal outputs.
DVD-MODULE Block Diagram
CIRCUIT OPERATIONAL DESCRIPTION

4
CIRCUIT OPERATIONAL DESCRIPTIONCIRCUIT OPERATIONAL DESCRIPTION
3) Loader Part
The loader which read the data of audio/video from optic disc and transfer them to MPEG
decoder can be divided into Deck total DVD assay(in a short term, Mecha) and Servo. Mecha
mounts with the optical pick-up which allows reading the signal of a disc using laser beam
and makes it operates and consists of the deck mechanism which allows loading a disc and
reading the data. Servo is a sort of circuit which allows operating the loader and recovering
the data and consists of Motor Drive IC operating the spindle, the sled, the loading motor.
Loader Block Diagram

5
CIRCUIT OPERATIONAL DESCRIPTION
2. Overall Block Diagram--S5L5008(2CH)
1) 2CH
M
M
DISC
SPINDLE
MOTOR
LOADING
MOTOR
DECK MECHANISM
DVD : A,B,C,D,RF CD : A,B,C,D,E,F,RF PD,PREF
PICK
UP
KEY Input
B/Pb
IC101
29LV800
8M
FLASH ROM
FDA[0:20]
NSOE
NSCSO
NSWE
MDB[00:15]
L
CVBS
R/PrG/Y
R
Y
C
L/R
-12V
AC 90V~240V
50HZ/60Hz
+12V
D5V
3.3V
27MHz
S5L5008 DVD-PLAYER OVERALL BLOCK DIAGRAM
D5V
IC304
4558
OP-AMP
LOAD[+,-]
FCS[+,-]
TRK[+,-]
SPN [+,-]
SLED
(FEEDING)
MOTOR
SLD[+,-]
M
3.3V
1.2V/3.3V
Q5~Q9,Q15
VIDEO BUFFER
SPDF_R
RGB_SW
MODE1 MODE2
CDLD,DVDLD,
SSTOP
OPEN_SW,CLOSE_SW
FDB[0:7]
U1
6928
POWER
BOARD
VSTB
MUTE
IC104
32M 16BIT
SDRAM
MMSD416T216
SDRAM_3.3V
MDA[00:11] DCLK
CKE BA0 BA1 DQM NDWE NCAS NRAS
IC100
SAMSUNG S5L5008
+-12V
OPEN, CLOSE,SLD_PWM,FOD
CD/DVD_SW, VR_CD,VR_DVD
CD/DVD
SPD_SENSE
CON5
UART
Download
UART_RXD,TXD
Q14
1.2V
IC1
AT5669
Motor Drive
LED DISPLAY
RF+MPEG IC
Q13
CVBS
R/Pr G/Y B/Pb Y
C
Q100
C108,D100
NSYS_RESET
REMOTE
FRONT CONTROL BOARD
VSCK
VSDA
TRB2
TRB1
SPD_PWM,TRD,DR_MUTE,VREF
+5V
3.3V
AL,AR
IR
MIC
U2
4558
AMP
U1
2399
ECHO
MIC
+12V

6
CIRCUIT OPERATIONAL DESCRIPTION
3. MPEG Decoder
The signal read from DVD disc is output into the RF signal and Servo related signal through
the RF IC and they are input into the MPEG decoder and processed the MPEG decoding
and divided into video/audio signal. The video signal is output into the analog audio signal
through the built-in encoder block and also the audio signal into the audio DAC through the
audio decoder block.
MPEG decoder consists of existing MPEG-2 decoder and single chip combined the digital sig-
nal processing part which is the core technology of DVD player with the Servo controller.
1) DVD Servo And MPEG-2 Decoder : S5L5008
SAMSUNG S5L5008 DVD SoC is designed to provide a cost-effective, low power size
and high performance DVD players solution for DVD-Video, DVD-Audio & many of CD
applications. To reduce total system cost, S5L5008 also providesthe following features:
a Optical RF,a front-end controller, a back-end decoder, a control CPU with separate
4KB Instruction and 4KB Data Cache, an improved audio DSP, a programmable video
encoder with a dual output capability of interlaced and progressive scan, Memory con-
troller, 4-channel Timers with PWM, I/O Ports, 1-channel 10-bit ADCsfor Servo control,
5-channel 10-bitVideo-DACs, 1-channel UART with handshake, IIC-BUS interface, IIS-
BUS interface, SIO, 6-in-1 Card Interface, SPDIF in/out, Audio PWM outand PLL for
clock generation.
The S5L5008 is fabricated in a standard 0.13um CMOS technology. Its low-power, sim-
ple, elegant and fully static design is particularly suitable for cost-sensitive and power-
sensitive applications.
The S5L5008 is built around the outstanding CPU core: The ARM946E-S cached pro-
cessor is a member of the ARM9 Thumb family of high-performance 32-bit system-on-
a-chip processor solutions. It provides a complete high performance CPU subsystem,
including ARM9TDMI RISC integer CPU, 4KB instruction/data caches, write buffer,
and protection unit, with an AMBA bus interface. The ARM9TDMI core within the
ARM946E-S executes both the 32-bit ARM and 16-bit Thumb instruction sets, allowing
the user to trade off between high performance and high code density. It is binary com-
patible with ARM7TDMI, ARM10TDMI, and StrongARM processors, and is supported by
a wide range of tools, operating systems, and application software.

7
CIRCUIT OPERATIONAL DESCRIPTION
S5L5008 Block Diagram
I2C
IR
UART
GPIO
16 bit Timers
WDT
CLKRST_GEN
PLLs
JTAG
PC debugger
Ext INT/
User IF
SPDIF
Master
XTL
Debugger
32-bit APB
32-bit AHBs
MPEG
Video
Decoder
Bus
Bridge
Sub-picture
Decoder
NTSC
/PAL
Encoder
MIU/Arbiter
Video
Processor
( Scaling )
Video
5-DAC
32-bit AHBs
OSD/Mixer
CSS
MPEG
Stream
DEMUX
Decoder
32-bit APB
SPDIF OUT
I2S_In
Servo/DP
AFE
EPROM
SPI
2D Graphic
Engine(GA)
Video
Output
Audio
Interface
CCIR656
Interface
RemoCon
ARM946E-S
(processor core)
4KB
I-cache
4KB
D-cache
BUS Interface
Motor/
Driver
CalmADM
( Audio DSP )
8KB
I-cache
12KB
D-cache
BUS Interface
I2S_Out
(5x)
16
4Mb Flash
8
Host IF/VFD
OPU
Mic
ATAPIDevice Drive SPDIF IN
Audio
DACs
SPDIF
Slave
16Mb SDR
Audio
AMP
Audio PWM
Reverse
playback
DRAM
5Mbit

8
CIRCUIT OPERATIONAL DESCRIPTION
S5L5008 System Diagram(Servo Application)
S5L5008 Servo Control Flow
Deck Mechanism
P/U
S5L5008X(DVDP SOC)
CPU + RF + Servo/DSP +
A/V Decoder + DRAM
2-Ch DAC
5.1-Ch
DAC
Display
SDRAM Flash ROM Peripherals
Front VFD Display
(SPI Interface)
IR Key Display
Audio
AMP
VREF(1.65V)
FOD
TRD
SLDPWM
SPDPWM
MON(Idle)
Maindata
REFEQ
A1
B1
C1
D1
E
F
ABCD AGC Equalize
ABCD1
EF
LPF
ENV
ABCD
TE
FE
MIRR
FOKB
PLLDFT
ENV
ABCD(RFO)
TE
FE
DFCT
MIRR
Analog&
Slice
Clock
Recovery
EFM
Demodulator
ECC
Descramble
& EDC
Frame Sync
Detect
Digital
Servo
DAC
Core
CLV
SERVO
DP
Command
MotorControl
DISC
FAN8026
Pick Up
FEU
SDRAM
RFSUM
A
B
C
D
LDODVD
PDDVD
LDOCD
RF
ADC
Equalize
Viterbi
Decode
EFM
PLCK

9
CIRCUIT OPERATIONAL DESCRIPTION
S5L5008
HSYNC(P0.5)
MDB12 VDDP4
VSSP5
MDB3
MDB13
MDB2
MDB14
MDB1
MDB15
VDDC2
VSSC2
MDB0
VSSP6
NTPST(P0.0)
VDD5
VDDC3
VSSC3
TDI(P0.1)
TCK(P0.2)
TMS(P0.3)
TDO(P0.4)
VSYNC(P0.6)
BTCLK(P0.7)
DACVDD33R
VREFOUT
CCOMP
IRESET
DACVSS33R
DACVBB33A
DAC0
DAC1
DAC2
DACVSS33A
DACVDD33A
DAC3 DAC4
DACVDD33D
DACVSS33D
PWMVSS3
I2SDO4(P2.4) I2SDO3(P2.3)
PWMVDD33
I2SDO2(P2.2) I2SDO1(P2.1) I2SDO0(P2.0)
VDDC4
VSSC4
I2SMCLK(P2.5)
I2SWSO(P2.6)
12SBCKO(P2.7)
I2CCK(P1.1)
I2CDAT(P1.2)
I2SDI(P1.0)
55 56
57
58 59 60
61 62
63 64 65 66 67
68
69
70
71 72
73 74 75 76
77
78
79
80 81 82
83
84 85 86 87
88 89
90
91
92
93
94
95 96
97 98
99
100 101
102
103
104
105 106 107 108
216
215
214 213
212
211
210 209
208
207
204
205 204
203
202
201
200
199
198
197
196 195
194
193
192
191
190
189
188
187 186 185 184
183 182
181 180
179
178
177
176
175
174 173
172 171
170
169 168 167
166
165 164
163
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
FDA12(P5.3)
FDA13(P5.2) FDA14(P5.4)
FDA15(P5.5) FDA16(P5.6) FDA19(P6.1) VSSP9
VDDP8 EDRVSSA EDRVCCA12 EDRVSSQ EDRVPP33V
EDRVSSP
EDRVSSP12 FDB7(P7.1) FDB6(P7.0)
FDB5(P6.7) FDB4(P6.6) FDB3(P6.5)
FDB2(P6.4) FDB1(P6.3)
FDB0(P6.2) NSOE NSWE
NSCS0 FDA0(P3.6) VSSC6
VDDC6
VSSP8
VDDP7
RXD(P3.5)
TXD(P3.4)
VSSC5 VDDC5 SPICLK(P3.3) MISO(P3.2) MOSO(P3.1) IRIN(P3.0)
TDIADM(P1.6) TCKDAM(P1.5)
TMSADM(P1.4) NTRSTADM(P1.3) NRESET SPDP SLDP
VSSSVO33A TEO FEO TZCI TE
VREF
RBIAS PREF FCB
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
MPEI
ABCDO
MPEO
MCB
MCP
VDDSVO33A
PDDVD
LDOCD
LDODVD
F
E
D
C
B
A
D1
C1
B1
A1
MIRRI
ABCDI
RFSUM
VSSEQ33A
RFAGC0
AGCP
AGCB
AGCACN
AGCACP
AGCC
RFEQ0
VDDEQ33A
EFMI
VDDPLS33A
VSSPLS33A
MCHL
MCHR
ADCVDD33A
ADCVSS33A
DPLLVSS12A
LFCDPLL
LFDVDPLL
VCTLCD
VCTLDVD
DPLLVDD12A
PLLVDD12
PLL1FLT
PLL1VSS12
PLL0VDD12
PLL0FLT
PLL0VSS12
XI
XO
VSSP7
VDDP6
FDA11(P5.1)
FDA10(P5.0)
FDA9(P4.7)
FDA8(P4.6)
FDA18(P6.0)
FDA17(P5.7)
FDA7(P4.5)
FDA6(P4.4)
VDDP0
VSSP0
VSSP1
FDA1(P3.7)
MDA4
MDA3
VDDC0
VSSC0
MDA5
MDA2
MDA6
MDA1
VDDP1
MDA7
MDA0
VSSP2
MDA8
MDA10
MDA9
MDA11
BA0
BA1_NDCS1
VDDP2
NDCS0
VSSP3
NRAS
DCLK
NCAS
VDDC1
VSSC1
NDWE
DQM
MDBB
VDDP3
MDB7
VSSP4
MDB9
MDB6
MDB10
MDB5
MDB11
MDB4
FDA5(P4.3)
FDA4(P4.2)
FDA3(P4.1)
FDA2(P4.0)
S5L5008 Pin Assignments (216-QFP)

10
CIRCUIT OPERATIONAL DESCRIPTION
2) Flash Memory : ES29LV800DB-70TG
Description
The ES29LV800 is a 8 megabit, 3.0 volt-only flash memory device, organized as 1M
x 8 bits (Byte mode) or 512K x 16 bits (Word mode) which is configurable by BYTE#.
Four boot sectors and fifteen main sectors are provided : 16Kbytes x 1, 8Kbytes x 2,
32Kbytes x 1 and 64Kbytes x 15. The device is manufactured with ESI’s proprietary,
high performance and highly reliable 0.18um CMOS flash technology. The device can
be programmed or erased in-system with standard 3.0 Volt Vcc supply ( 2.7V-3.6V) and
can also be programmed in standard EPROM programmers. The device offers minimum
endurance of 100,000 program/erase cycles and more than 10 years of data retention.
The ES29LV800 offers access time as fast as 70ns or 90ns, allowing operation of high-
speed microprocessors without wait states. Three separate control pins are provided to
eliminate bus contention : chip enable (CE#), write enable (WE#) and output enable
(OE#).
All program and erase operation are automatically and internally performed and con-
trolled by embedded program/erase algorithms built in the device. The device automati-
cally generates and times the necessary high-voltage pulses to be applied to the cells,
performs the verification, and counts the number of sequences. Some status bits (DQ7,
DQ6 and DQ5) read by data# polling or toggling between consecutive read cycles pro-
vide to the users the internal status of program/erase operation: whether it is success-
fully done or still being progressed.
The ES29LV800 is completely compatible with the JEDEC standard command set of sin-
gle power supply Flash. Commands are written to the internal command register using
standard write timings of microprocessor and data can be read out from the cell array
in the device with the same way as used in other EPROM or flash devices.

11
CIRCUIT OPERATIONAL DESCRIPTION
FLASH ES29LV800 Block Diagram
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE#
RESET#
NC
NC
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
A16
BYTE#
Vss
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
Vcc
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
Vss
CE#
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
48-Pin Standard TSOP
ES29LV800
FLASH ES29LV800 Pin Assignments
Command
Register
Analog Bias
Generator
Address Latch
BYTE#
CE#
OE#
A<0:18>
RESET#
Vcc
Vss
Chip Enable
Output Enable
Logic
Vcc Detector Timer/
Counter
Y-Decoder
X-Decoder
Y-Decoder
Cell Array
Data Latch/
Sense Amps
Input/Output
Buffers
Sector Switches
DQ0-DQ15(A-1)
RY/BY#
Write
State
Machine
WE#

12
CIRCUIT OPERATIONAL DESCRIPTION
3) SDRAM : MMSD416T216-O
SDROM MMSD416T216-O Pin Assignments

13
CIRCUIT OPERATIONAL DESCRIPTION
4) AMPLIFIERS : AZ4558CM-E1
Description
The AZ4558 consists of two high performance operational amplifiers. The IC features
high gain, high input resistance, excellent channel separation, wide range of operating
voltage and internal frequency compensation. It can work with ± 18V maximum power
supply voltage.
The AZ4558 is specifically suitable for applications in differential-in, differential-out as
well as in potentialmetric amplifiers and where gain and phase matched channels are
mandatory.
The AZ4558 is available in DIP-8 and SOIC-8 pack-age.
AMPLIFIERS AZ4558CM-E1 Block Diagram
AMPLIFIERS AZ4558CM-E1 Pin Assignments
- Input
+ Input
3.1 KΩ
7.1
KΩ
7.1
KΩ
87
pF
480 Ω 4.2 KΩ 36 KΩ
150 Ω
10pF
25 Ω
25 Ω
VEE
Output
VCC
(SOIC-8/DIP-8)
Top View
8 VCC
7 OUTPUT 2
6 INPUT 2-
5 INPUT 2+
1
2
3
4
OUTPUT 1
INPUT 1-
INPUT 1+
VEE
M Package/P Package

14
CIRCUIT OPERATIONAL DESCRIPTION
5) Motor Drive IC: AT5669
The AT5669 is a 5-channel BTL driver IC. Two of them can drive DC motors and two can drive
coils, such as the focus and tracking actuators of a CD-ROM/DVD-ROM/DVD-Player system It
also built-in one channel bi-direction DC motor driver for Tray. Using the built-in linear regu-
lator, it can be save the PCB space. It also includes 1 comparator.
Motor Drive IC (AT5669) Block Diagram

15
CIRCUIT OPERATIONAL DESCRIPTION
Pin Descriptions
Pin No. Pin name Function
1 IN1 CH1(Focus coil) input
2 DL1 Linear Regulator 3V3 driver output
3 FB2 Linear Regulator 2 feedback input
4 IN2 CH2(Sled driver) input
5 3V3 Linear Regulator 3V3 input(Metal Option possible for other voltage from
2.5V~4V)
6 FWD CH5 forward input
7 REV CH5 reverse input
8 VCC1 Power Supply 1
9 OUT5- CH5(Tray driver) output(-)
10 OUT5+ CH5(Tray driver) output(+)
11 OUT2+ CH2(Sled driver) output (+)
12 OUT2- CH2(Sled driver) output (-)
13 OUT1- CH1(Focus coil) output (-)
14 OUT1+ CH1(Focus coil) output (+)
15 OUT4+ CH4(Tracking coil) output (+)
16 OUT4- CH4(Tracking coil) output (-)
17 OUT3+ CH3(Spindle) output (+)
18 OUT3- CH3(Spindle) output (-)
19 VCC2 Power Supply 2
20 CPIP Comparator positive input
21 VCTL CH5 Speed control input
22 CPIN Comparator negative input
23 IN3 CH3(Spindle) input
24 CPO Comparator Output
25 DL2 Adjustable Linear Regulator driver output
26 IN4 CH4 (Tracking driver) input
27 VBIAS VREF input pin
28 MUTE_1_2_3_4 Mute control for CH1,CH2,CH3,CH4
Notes: The indicated polarities for the output pins are under the condition that all inputs
are (+). The power supplies for the driver output are Vcc1 for the loader, Vcc2 for
focus and tracking drivers, and Vcc for pre-block and sled driver. Therefore, make
sure Vcc1≥Vcc2.

16
VOLTAGE CHARTS
U1 SM8002C
PIN 1 2 3 4 5 6
Voltage 0.372V 0.176V 1.734V 1.742V 120.2V 1.965V
U2 EL817
PIN 1 2 3 4
Voltage 0.483V 3.818V 0.237V 2.637V
U3 AZ431BZ-ATRE1
PIN R A K
Voltage 2.476V 0V 3.821V
IC101 ES29LV800D
Voltage Voltage Voltage Voltage Voltage Voltage
PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY
10.8V 0.8V 10 0V 0V 19 2.8V 2.7V 28 3.2V 3.2V 37 3.26V 3.26V 46 0V 0V
23V 3.0V 11 3.26V 3.27V 20 2.5V 2.3V 29 2.9V 3V 38 3.3V 3.26V 47 0V 0V
33.26V 3.26V 12 3.27V 3.27V 21 2.5V 2.8V 30 0.1V 0.1V 39 3.2V 3V 48 0.9V 1.5V
41.7V 1.7V 13 3.27V 3.27V 22 2.5V 2.5V 31 3V 2.6V 40 3V 3V
52.5V 2.5V 14 0V 0V 23 2.8V 2.8V 32 0.1V 0.1V 41 0.1V 0.1V
61.8V 1.8V 15 0V 0V 24 2.8V 2.8V 33 2.6V 2.9V 42 3V 2.5V
72.4V 2.4V 16 0V 0V 25 1.4V 2V 34 0.1V 0.1V 43 0.1V 0.1V
81.2V 1.2V 17 2.8V 3.2V 26 3.2V 3.1V 35 3V 2.9V 44 3V 2V
90V 0V 18 3V 2.1V 27 0V 0V 36 0.1V 0.1V 45 1.4V 2.2V
IC102 MMSD416T216-0
Voltage Voltage Voltage Voltage Voltage Voltage
PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY
13.32V 3.32V 10 1.3V 1.25V 19 3.0V 3.3V 28 0V 0V 37 3.3V 3.3V 46 0V 0V
22.5V 1.1V 11 1.8V 1.7V 20 0V 0V 29 0.4V 0.8 38 1.6V 1.6V 47 2.6V 2.1V
33.32V 3.32V 12 0V 0V 21 1.8V 1.6V 30 1.2V 1.32V 39 2.9V 2.98V 48 2.9V 3.15V
42.5V 2.7V 13 2.9V 2.9V 22 0.1V 0.1V 31 0.6V 0.3V 40 0V 0V 49 3.3V 3.32V
51.9V 1.8V 14 3.3V 3.3V 23 0.3V 0.1V 32 0.6V 0.6V 41 0V 0V 50 1.04V 1.2V
60V 0V 15 2.8V 2.9V 24 0V 0V 33 0V 0V 42 1.6V 1.82V 51 1.0V 1.4V
71.5V 2.9V 16 3.3V 3.27V 25 0V 0V 34 0V 0V 43 3.3V 3.3V 52 0V 0V
81.1V 1.25V 17 3.3V 3.3V 26 0.6V 0.4V 35 0V 0V 44 1.5V 1.0V 53 0V 0V
93.32V 3.34V 18 3.2V 3.3V 27 3.3V 3.3V 36 0V 0V 45 1.8V 1.7V 54 0V 0V
IC1 AT5669
Voltage Voltage Voltage Voltage Voltage
PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY
11.66V 1.66V 70V 0V 13 2.48V 2.48V 19 4.88V 4.86V 25 2.69V 2.7V
23.35V 3.34V 84.87V 4.87V 14 2.46V 2.49V 20 3.71V 3.71V 26 1.63V 1.63V
31.23V 1.23V 90V 0V 15 2.56V 2.56V 21 4.86V 4.86V 27 1.61V 1.61V
41.63V 1.63V 10 0V 0V 16 2.41V 2.37V 22 1.11V 1.1V5 28 3.22V 3.22V
53.27V 3.27 11 2.57V 2.54V 17 3.57V 3.5V 23 2V 2V 29 0V 0V
60V 0V 12 2.39V 2.54V 18 1.41V 1.4V 24 4.71V 4.7V 30 0V 0V

17
VOLTAGE CHARTS
IC304 AZ4558CM-E1
Voltage Voltage Voltage Voltage
PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY
10V 0V 30V 0V 50V 0V 70V 0V
20V 0V 411.7V 11.7V 60V 0V 810V 10V
IC100 S5L5008
Voltage Voltage Voltage Voltage Voltage Voltage
PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY PIN STOP PLAY
11.5V 2.0V 37 0.1V 0.1V 73 0V 0V 109 3.2V 3.2V 145 2.2V 2.2V 181 3.3V 2.3V
22V 2.0V 38 3.3V 3.2V 74 0V 0V 110 0V 0V 146 2.2V 2.2V 182 2.6V 2.5V
31V 2.0V 39 2.2V 2.2V 75 0V 0V 111 2.2V 2.2V 147 1.6V 1.6V 183 1.2V 1.2V
42.3V 2.3V 40 3.2V 3.2V 76 2.4V 2.4V 112 1.8V 1.8V 148 1.6V 1.6V 184 0V 0V
52.4V 2.5V 41 1.1V 1.1V 77 2.3V 2.3V 113 0V 0V 149 1.6V 1.6V 185 3.2V 3.2V
60.3V 1.0V 42 0V 0V 78 0V 0V 114 0.5V 0.5V 150 1.6V 1.6V 186 0V 3.6V
72.6V 2.6V 43 3.2V 3.2V 79 3.2V 3.2V 115 1.2V 1.2V 151 1.6V 1.6V 187 2.6V 3.7V
82.2V 2.6V 44 3V 3V 80 1.2V 1.2V 116 1.2V 1.2V 152 2.1V 2.1V 188 3.2V 3.2V
93.2V 3.2V 45 3V 1.2V 81 2V 2V 117 1.2V 1.2V 153 2.1V 2.1V 189 0V 0V
10 0V 0V 46 3.2V 3.2V 82 1.2V 1.2V 118 1.2V 1.2V 154 1.9V 1.9V 190 1.2V 1.1V
11 2.5V 2.2V 47 1V 1.4V 83 0V 0V 119 1.2V 1.2V 155 3.2V 3.2V 191 0V 0V
12 2.7V 2.5V 48 0V 0V 84 0V 0V 120 0.4V 0.4V 156 0.2V 0.2V 192 1.3V 1.9V
13 1.7V 2.2V 49 1.3V 2.4V 85 0.6V 0.6V 121 0V 0V 157 3.2V 3.2V 193 3.1V 2.8V
14 3.1V 2.5V 50 1.2V 2V 86 0.7V 0.7V 122 0.5V 0.4V 158 1.9V 1.9V 194 2.2V 3.2V
15 1.5V 2.0V 51 1V 2.5V 87 0.7V 0.4V 123 0V 0V 159 1.2V 1.2V 195 3.1V 2.5V
16 0.9V 1.8V 52 1V 1.5V 88 0V 0V 124 0V 0V 160 1.9V 1.9V 196 2.5V 3.1V
17 0.1V 0.1V 53 1.4V 1.6V 89 3.2V 3.2V 125 0V 0V 161 1V 1V 197 3.2V 3.1V
18 1V 0.9V 54 1.7V 2.4V 90 0.7V 0.7V 126 3.2V 3.3V 162 1.6V 1.6V 198 3.2V 2.5V
19 1.2V 1.2V 55 1V 1.2V 91 0.8V 0.7V 127 1.6V 1.6V 163 1.34V 1.34V 199 3.1V 2.8V
20 0V 0V 56 3.2V 3.2V 92 3.2V 3.2V 128 1.6V 1.6V 164 2.1V 2.1V 200 3V 3.1V
21 1V 1.1V 57 1.5V 1.2V 93 0V 0V 129 0V 0V 165 0.9 0.9V 201 2.2V 1.9V
22 0.6V 1.2V 58 1.2V 1.6V 94 0V 0V 130 3.2V 3.2V 166 1.5V 1.5V 202 3.2V 2.8V
23 1V 1.2V 59 1.3V 1.4V 95 2.3V 2.3V 131 1.7V 1.7V 167 1.5V 1.4V 203 1.2V 1.1V
24 1.5V 1.2V 60 1.5V 1.3V 96 2.3V 2.3V 132 3.2V 3.2V 168 1.5V 1.5V 204 0V 0V
25 3.2V 3.2V 61 1V 2V 97 3.2V 3.2V 133 2V 1.9V 169 1.58V 1.58V 205 3.2V 3.2V
26 1V 1.0V 62 1.1V 1.2V 98 0V 0V 134 1.3V 1.3V 170 1.61V 1.61 206 0V 0V
27 0.5V 1.3V 63 1.3V 2V 99 0V 0V 135 1.6V 1.6V 171 0V 0V 207 1.15V 1.15V
28 0V 0V 64 1.2V 1.2V 100 0V 0V 136 1.65V 1.65V 172 1.5V 1.6V 208 0V 0V
29 0.5V 0.5V 65 0V 0V 101 1.2V 1.2V 137 1.35V 1.35V 173 2.1V 2.1V 209 3.2V 3.2V
30 1V 1.3V 66 3.1V 2.2V 102 0V 0V 138 1.8V 1.8V 174 3.2V 3.2V 210 0V 0V
31 0.7V 1.2V 67 0V 0V 103 0V 0V 139 1V 1V 175 3.2V 3.2V 211 0V 0V
32 0.1V 0.1V 68 0V 0V 104 0V 0V 140 0V 0V 176 0V 0V 212 1.2V 1.2V
33 2.2V 2.6V 69 3.3V 3.3V 105 0V 0V 141 1.7V 1.7V 177 3.2V 3.2V 213 2.2V 2.4V
34 3.2V 3.2V 70 1V 0V 106 0V 0V 142 0V 0V 178 0V 3.2V 214 1.7V 2V
35 3.2V 3.2V 71 1.2V 1.2V 107 0V 0V 143 1.6V 1.7V 179 3.8V 3.8V 215 1.5V 2V
36 3.2V 3.2V 72 3.6V 3.6V 108 2.3V 2.3V 144 2.2V 2.2V 180 2.3V 2.3V 216 2.3V 2V

18
CIRCUIT DIAGRAM
1. POWER SUPPLY SCHEMATIC DIAGRAM
12 3 4 65
A
B
C
D
6
54
3
21
D
C
B
A
Title
n
o
is
i
ve
R
r
e
bmuN
Size
B
fo
t
eeh
S7
0
02
-b
eF-3
1
:
et
a
D
Drawn By:
U2 PC817C
U3 TL431
R10
220R
C11
224/50V
2
C9
330uF/10V
Port
GND
C17
103/50V U2
PC817
R4
100K/1W
D6
FR107
C18
22uF/25V
*
R13 4.7K
R17
300R
C15
332/1KV
T1
7
C8 1000uF/10V
L3
4.7UH/2A
1
2
3
4
8
D1-D4
F1 FUSE
Port Port AC/IN
C2
15uF/400V
5.6
R19 10R
100V-240V
ZD2
FR107 Port
+5V
R3 1K
R17 1K
CY2 102
*
*
D8 SB340
U1
SM8002C
4 5
6 7
8
3
R11 1.2K
R14
4.7K
2
1
R18
100R
R16
1M
ZD3
15V/0.5W
C20 104/50V
C19
10uF/16V
C9
104/50V
C1
15uF/400V
C7
47uF/25V
Port
GND
5
C6
100uF/25V
L4
4.7UH/0.2A
Port
+12V
*
D7
FR102
Port
GND
1
C10 100uF/25V
Port
-12V
*
D9 FR102
C16 471/1KV
L2
INDUCTOR L1 1mH0.2A
R12 8.2E 2W
R12 4.7K
Q1
CEP63A3
Q3 2N5551
Q4 2N5551
Q2 2N5401
R7 10K
R5 10K
R6
470R
R15 6.8K
D10
1N4148
power CTL
Port
R9
2K
R8 1K
ZD1
12V/0.5W
C13
220uF/25V
C14 100uF/25V
k
a
ref
C12
100uF/25V

CIRCUIT DIAGRAM
19
2. DECODE BOARD SCHEMATIC DIAGRAM