Daewoo DG-K512 User manual

Service Manual
MODEL: DG-K512
DG-K514
DG-K515
DG-K518
✔ Caution :
In this Manual, some parts can be changed for improving, their
performance without notice in the parts list. So, if you need the latest
parts information,please refer to PPL(Parts Price List) in Service
Information Center.
December. 2005
DVD PLAYER
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CONTENTS
CONTENTS
SPECIFICATIONS.........................................................................................................................2
CIRCUIT OPERATIONAL DESCRIPTION.........................................................................................3
VOLTAGE CHARTS.....................................................................................................................12
CIRCUIT DIAGRAM...................................................................................................................13
PCB CIRCUIT BOARD.................................................................................................................22
WAVEFORMS............................................................................................................................32
TROUBLE SHOOTING.................................................................................................................37
INSTRUMENT DISASSEMBLY......................................................................................................42
PARTLIST...................................................................................................................................49
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Laser wavelength 650nm
Video PAL/AUTO/NTSC
Frequency response 20Hz ~ 20KHz (±1dB)
Signal/noise ratio ≥90dB
Channel separation ≥85dB ( 1KHz)
Dynamic range ≥80dB ( 1KHz)
Output
Audio
Analog output level : 2.0 + 0/-0.2Vrms
(Load impedance : 1,0KΩ)
Digital output level : 0.5 ±0.1Vp-p
(Load impedance : 75Ω)
Output
Video
Composite output level : 1.0 ±0.1Vp-p
(Load impedance : 75Ω, imbalance, negative polarity)
S-video
output level : brightness(Luma) 1.0 ±0.1Vp-p Chromaticity (Color)
0.286 ±20%
(Load impedance : 75Ω)
Component Y: 1Vp-p, Pb/Pr: 0.7Vp-p (Load impedance : 75Ω)
Power 100-240V~, 50Hz~60Hz 12W
Dimensiones Body (W x H x D) 430 x 38 x 245 mm
Packing 510 x 88 x 305 mm
Weight (Gross / Net) 2.9Kg / 2.2Kg
Notes : Design and specifications in this instruction manual are subjected to change with-
out prior notice toimprove quality and function.
DVD Audio output standards
Output Disc type
DVD VIDEO-CD CD
Analogue Audio output 48/96KHz sampling 44.1KHz sampling 44.1KHz sampling
Digital Audio output 48KHz sampling 44.1KHz sampling 44.1KHz sampling
SPECIFICATIONS
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DVD Module
1. Summary
DVD One Board consists of: Loader part that reads and transmits audio and video data saved
at Optic Discs (DVD, CD-DA, VCD, CD-R) to MPEG Decoder part; MPEG Decoder part, which,
by decoding and encoding data received from the Loader, produces analog signals; and u-Com
that controls the overall system including the loader and MPEG decoder.
2. How Does it Operate
Insert the power cord and then power transmitted to each IC, and the SET will be the STAND-
BY status which requires the least power for input the front panel key, input the STAND BY/
ON key, extinguished the LED. Once the Power On key is entered, u-Com recognizes it and
initiates each chipset, performs sequential algorithms such as determining whether the disc
is in or not, and if in, what type of disc is loaded.
Through this process, it can read disc data before transmitting it to the MPEG Decoder. The
MPEG Decoder will then decode and encode such data before generating the final analog
audio and video signal outputs.
DVD-MODULE Block Diagram
CIRCUIT OPERATIONAL DESCRIPTION
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CIRCUIT OPERATIONAL DESCRIPTION
CIRCUIT OPERATIONAL DESCRIPTION
3. Loader Part
The loader which read the data of audio/video from optic disc and transfer them to MPEG
decoder can be divided into Deck total DVD assay(in a short term, Mecha) and Servo. Mecha
mounts with the optical pick-up which allows reading the signal of a disc using laser beam
and makes it operates and consists of the deck mechanism which allows loading a disc and
reading the data. Servo is a sort of circuit which allows operating the loader and recovering
the data and consists of Motor Drive IC operating the spindle, the sled, the loading motor.
Loader Block Diagram
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CIRCUIT OPERATIONAL DESCRIPTION
1) Motor Drive IC: AT5888S
The AT5868S is a 5-channel BTL driver IC for driving the motors and actuators in products
such as CD-ROM/DVD-ROM/DVD-Player drives. Two of the channels use current feedback to
minimize the current phase shift caused by the influence of load inductance. Driver IC gener-
ates the focus signal and the tracking signal for pick-up actuator, the sled signal for feed,
spindle signal and the load signal for opening and closing of the tray. The focus signal, the
tracking signal, the sled signal and the spindle signal are input into each relaxant port of
the drive IC(in the order of No. 26 pin, 23, 4, and 1) and set the gain amplification and the
center voltage through the internal OP-AMP and drive on both sides and then the focus sig-
nal and the tracking signal will be output as VOFC+, VOFC- and VOTK+, VOTK- on actuator,
the sled signal and the spindle signal will be output as VOSL+, VOSL- and VOLD+, VOLD- on
each motor. For the load signal the input opening/closing signal is output as VOTR+, VOTR-
through the loading PRE FWD REV circuit.
Motor Drive IC (AT5888S) Block Diagram
Actuator
Driver(6x)
MUTE
Actuator
Driver(6x)
Spindle
Driver(4X)
Sled
Driver(4X)
Thermal
Shut down
+
-
+
-
10K
25K
GND
Vcc2
28 27 26 25 24 23 22 21 20 19 18 17 16 15
8 9 10 11 12 13 141 2 3 4 5 6 7
PGND
25K
10K
Vcc1
PGND
Vcc2
Vcc2
Vcc1
Pre-DRV TRAY
DRIVER
VCTL
FWD REV
TRB_2 NC NC
REGO2TRB_1 REGO1 VOTR- VOTR+ VOSL+ VOSL- VOFC- VOFC+
VOLD- VOLD+ VOTK- VOTK+
-
+
-
+
VINSL+VINFC
MUTE BIAS VINTK VINLD GND VCC2
VCC1
10K
25K
15K
10K
- +
+
-
CIRCUIT OPERATIONAL DESCRIPTION
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CIRCUIT OPERATIONAL DESCRIPTION
MPEG Decoder
The signal read from DVD disc is output into the RF signal and Servo related signal through
the RF IC and they are input into the MPEG decoder and processed the MPEG decoding
and divided into video/audio signal. The video signal is output into the analog audio signal
through the built-in encoder block and also the audio signal into the audio DAC through the
audio decoder block.
MPEG decoder consists of existing MPEG-2 decoder and single chip combined the digital sig-
nal processing part which is the core technology of DVD player with the Servo controller.
1) DVD Servo And MPEG-2 Decoder : MT1389D
MediaTek MT1389 is a DVD player system-on-chip (SOC) which incorporates advanced
features like high quality TV encoder and state-of-art de-interlace processing. The
MT1389 enables consumer electronics manufacturers to build high quality, cost-effec-
tive DVD players, portable DVD players or any other home entertainment audio/video
devices.
Based on MediaTek’s world-leading DVD player SOC architecture, the MT1389 is the
3rd generation of the DVD player SOC. It integrates the MediaTek 2nd generation
front-end analog RF amplifier and the Servo/MPEG AV decoder.
The progressive scan of the MT1389D utilized advanced motion-adaptive de-interlace
algorithm to achieve the best movie/video playback. It also supports a 3:2 pull down
algorithm to give the best film effect. The 108MHz/12-bit video DAC provides users a
whole new viewing experience.
DVD Player System Diagram
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CIRCUIT OPERATIONAL DESCRIPTION
MT1389 Functional Block Diagram
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CIRCUIT OPERATIONAL DESCRIPTION
2) Flash Memory : MX29F040QC-70
This stores every program required for the operation of DVD player and holds the data of
OSD languages and LOGO and send them upon request from u-COM. This allows the update
of firmware by CD-R/RW. For DVD module, 8MBit Flash Memory on 512K x 16bit basis is
used.
Description
The MX29F040 is a 4-mega bit Flash memory organizedas 512K bytes of 8 bits. MX-
IC's Flash memories offerthe most cost-effective and reliable read/write non-volatile
random access memory. The MX29F040 is packaged in 32-pin PLCC, TSOP, PDIP. It is
designed to bereprogrammed and erased in system or in standardEPROM programmers.
The standard MX29F040 offers access time as fast as55ns, allowing operation of high-
speed microprocessorswithout wait states. To eliminate bus contention, theMX29F040
has separate chip enable (CE) and outputenable (OE) controls.
MXIC's Flash memories augment EPROM functionalitywith in-circuit electrical erasure
and programming. TheMX29F040 uses a command register to manage thisfunctional-
ity. The command register allows for 100%TTL level control inputs and fixed power
supply levels during erase and programming, while maintaining maxi-mum EPROM
compatibility.
MXIC Flash technology reliably stores memorycontents even after 100,000 erase and
programcycles. The MXIC cell is designed to optimize theerase and program mecha-
nisms. In addition, thecombination of advanced tunnel oxide processingand low in-
ternal electric fields for erase andprogramming operations produces reliable cycling.
The MX29F040 uses a 5.0V±10% VCC supply toperform the High Reliability Erase and
autoProgram/Erase algorithms.
The highest degree of latch-up protection isachieved with MXIC's proprietary non-epi
process.Latch-up protection is proved for stresses up to 100milliamps on address and
data pin from -1V to VCC+ 1V.
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CIRCUIT OPERATIONAL DESCRIPTION
CONTROL
INPUT
LOGIC
PROGRAM/ERASE
HIGH VOLTAGE
WRITE
STATE
MACHINE
(WSM)
STATE
REGISTER
MX29F040
FLASH
ARRAY
R
E
D
O
C
E
D
-
X
ADDRESS
LATCH
AND
BUFFER Y-PASS GATE
R
EDO
C
ED
-
Y
ARRAY
SOURCE
HV
COMMAND
DATA
DECODER
COMMAND
DATA LATCH
I/O BUFFER
PGM
DATA
HV
PROGRAM
DATA LATCH
SENSE
AMPLIFIER
Q0-Q7
A0-A18
CE
OE
WE
FLASH MX29F040QC-70 Block Diagram
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CIRCUIT OPERATIONAL DESCRIPTION
3) EEPROM : AT24C16A
This stores the information related to setup of DVD menus. This can read and write the op-
tional information such as OSD, voice, language option after function for subtitle etc, the
aspect or method of TV display, video option like display function and audio, screen saver,
parental function through the I2C transmission method.
Description
The AT24C16A provides 16384 bits of serial electrically erasable and programmable
read only memory (EEPROM) organized as 2048 words of 8 bits each. The device is op-
timized for use in many industrial and commercial applications where low power and
low voltage operation are essential. The AT24C16A is available in space saving 8-lead
PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP packages and is accessed via a
2-wire serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V)
and 1.8V (1.8V to 5.5V) versions.
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CIRCUIT OPERATIONAL DESCRIPTION
4) SDROM : M12L16161A-7T
This sends and receives data with MPEG decoder and performs the video signal processing.
Every video signal output from DVD player is once stored in SDRAM and then encoded in
MPEG decoder and finally output into the analog signal.
SDRAM applied to DVD module has the capacity of 16MBit(1048576 x 16bit x 1Bank), sends
and receives data with MPEG decoder by 16 bit.
Description
The M12L16161A is 16,777,216 bits synchronous high data rate Dynamic RAM orga-
nized as2 x 524,288 words by 16 bits, fabricated withhigh performance CMOS technol-
ogy. Synchronous design allows precise cycle control with theuse of system clock I/O
transactions are possibleon every clock cycle. Range of operating frequencies, program-
mable burst length and programmable latencies allow the same device to beuseful for
a variety of high bandwidth, high performance memory system applications.
SDROM M12L16161A-7T Block Diagram
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Power board output voltage
J1
Pin number 1 2 3 4 5 6 7 8 9
Output voltage GND S5V 3.3V D5V GND A5V GND +12V -12V
J2
Pin number 1 2 3 4 5 6
Output voltage SW F- F+ GND -24V STB5V
Decode board input voltage
CN1
Pin number 1 2 3 4 5 6 7 8 9
Output voltage GND S5V 3.3V D5V GND A5V GND +12V -12V
VOLTAGE CHARTS
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CIRCUIT DIAGRAM
1. POWER SUPPLY SCHEMATIC DIAGRAM
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CIRCUIT DIAGRAM
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2. DECODE BOARD SCHEMATIC DIAGRAM
1) INDEX SCHEMATIC DIAGRAM
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CIRCUIT DIAGRAM
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2) RF & MPEG SCHEMATIC DIAGRAM
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CIRCUIT DIAGRAM
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3) SDRAM & FLASH SCHEMATIC DIAGRAM
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CIRCUIT DIAGRAM
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4) VIDEO OUTPUT PORT SCHEMATIC DIAGRAM
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CIRCUIT DIAGRAM
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5) AUDIO OUTPUT PORT SCHEMATIC DIAGRAM
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CIRCUIT DIAGRAM
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3. CONTROL BOARD SCHEMATIC DIAGRAM
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