Datum bc635VME User manual

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bc635VME/bc350VXI
TIMEAND FREQUENCYPROCESSOR
Operation and Technical Manual
October 1994
Datum inc
BANCOMM DIVISION • 6541 Via del Oro, San Jose. CA 95119 TEL: [phone] FAX: 4(18/57X-4165

COPYRIGHT NOTICE
Copyright 1994 Datum Inc. All Rights Reserved
This manual is provided to assist the user in the operation and maintenance of the supplied equipment. It is
recognized that multiple copies may be required to support even a single unit, and for this reason, permission is
hereby granted to reproduce the supplied Operation and Technical Manual for the purpose stated above, provide that
this notice is included as part of the copy. Additional copies are also available from Datum Inc for a nominal fee.
In no case, however, does the supply of these manuals or the granting of rights to reproduce the manuals, grant any
rights to use information contained within to reproduce the supplied equipment or software, either in whole or part.
_The equipmen. and software described in this manual has been developed solely at tae expense of Datum Inc and
is proprietary. No unlimited rights in technical data are granted. Limited Rights as per DFARS 252.227-7013 shall
be effective for 10 years from the copyright date.
FEDERAL COMMUNICATIONS COMMISSION (FCC) STATEMENT
This equipment is certified to comply with the limits for a Class A computing device pursuant to Part 15,
Subpart B of FCC Rules.
This equipment generates and uses radio frequency (RF) energy. If not installed and used properly, that
is, in strict accordance with the manufacturer's instructions, it may cause interference to radio or television
reception.
If this equipment does cause interference to radio or television reception, which can be determined by
turning the equipment on and off, the user is encouraged to correct the interference by one or more of the
following measures:
♦Reorient the radio/television receiving, antenna.
♦Move the antenna leads away from any wire runs to the personal computer with the
Datum module.
♦If using an indoor antenna, have a quality outdoor antenna installed.
♦Relocate the personal computer with respect to the radio/television receiver.
♦Connect the AC transformer to a different outlet so the personal computer and the
radio/television are on different branch circuits.
If necessary, the user should consult the dealer or an experienced radio/television technician for
suggestions or reference the following booklet, prepared by the Federal Communications Commission,
helpful: "How to Identify and Resolve Radio-TV Interference Problems". This booklet is available from
the U.S: Government Printing Office, Washington D.C. 20402. Stock No. 004-000-00345-4.
Properly shielded and grounded cables and connectors must be used for connection to peripherals in order
to meet FCC emission limits. Datum Inc. is not responsible for any radio or television interference caused
by using other than recommended cables or by unauthorized modifications to this equipment. It is the
responsibility of the user to correct such interference.
Datum Inc
BANCOMM DIVISION • 6541 Via del Oro. San Jose. CA 951'19 TEL: [phone] FAX: [phone]

bc635VME/bc350VX1
TIME AND FREQUENCY PROCESSOR
1.0 GENERAL
1.1 KEY FEATURES
1.2 PHYSICAL AND FUNCTIONAL OVERVIEW
1-1
1-1
1-2
1.3 PERFORMANCE SPECIFICATIONS 1-3
1.3.1 TIMECODE READER 1-3
1.3.2 TIMECODE GENERATOR 1-3
1.3.3 BUS CHARACTERISTICS 1-3
1.3.4 DIGITAL INPUTS 1-3
1.3.5 DIGITAL OUTPUTS 1-4
1.3.6 EXTERNAL 10 MHz INPUT 1-4
1.3.7 ENVIRONMENTAL SPECIFICATIONS 1-4
CHAPTER 2
INSTALLATION AND SETUP
2.0 VME / VXI COMPATIBILITY SWITCHES 2-1
2.1 VMEbus BASE ADDRESS SELECTION 2-2
2.2 bc350VXI LOGICAL ADDRESS SELECTION 2-2
2.3 JUMPERS 2-3
2.4 INSTALLATION 2-4
CHAPTER 3
INTERFACES
3.0 GENERAL 3-1
3. O. 1 DATA INPUT AND OUTPUT 3-1
CHAPTER 4
FIFO DATA PACKETS
4.0 GENERAL 4-1
4.1 WRITING DATA PACKETS 4-1
4.1.1 PACKET 'A' - SELECT TFP OPERATIONAL MODE 4-1
4.1.2 PACKET 'B' SET MAJOR TIME 4-3
4.1.3 PACKET 'C' COMMAND INPUT 4-3
TABLE OF CONTENTS
SECTION PAGE
CHAPTER 1
INTRODUCTION
Datum Inc., Bancomm Div. bc635VME/bc350VXI Mnaual

TABLE OF CONTENTS (continued)
SECTION PAGE
4.1.4 PACKET 'D' LOAD D/A CONVERTER 4-4
4.1.5 PACKET 'F' HEARTBEAT (PERIODIC) CONTROL 4-4
4.1.6 PACKET 'G' OFFSET CONTROL 4-5
4.1.7 PACKET 'H' SET TIMECODE FORMAT FOR MODE 0 4-6
4.1.8 PACKET T CLOCK SOURCE SELECT 4-6
4.1.9 PACKET 'J' SEND DATA TO GPS RECEIVER 4-7
4.1.10 PACKET 'K' SELECT GENERATOR CODE 4-7
4.1.11 PACKET V SET REAL TIME CLOCK 4-7
4.1.12 PACKET 'M' LOCAL TIME OFFSET SELECT (GPS MODES ONLY) 4-8
4.1.13 PACKET '0' REQUEST DATA FROM THE TFP 4-8
4.1.14 PACKET P' PATH SELECTION 4-9
4.1.15 PACKET 'Q' SET DISCIPLINING GAIN4-10
4.1.16 PACKET 'S' SET YEAR4-10
CHAPTER 5
PROGRAMMING EXAMPLES
5.0 GENERAL 5-1
5.1 READING TIME ON DEMAND 5-1
5.2 EXTERNAL EVENT TIME CAPTURE 5-1
5.3 PROGRAM PERIODIC FREQUENCY OF 1000 HZ 5-2
5.4 SET MODE 1 AND THE MAJOR TIME 5-2
5.5 SELECT MODE 0 (IRIGB)AND ADVANCE TFP 2.5 MILLISECONDS 5-3
CHAPTER 6
INPUTS AND OUTPUTS
6.0 INPUTS AND OUTPUTS 6-1
CHAPTER 7
REVISION HISTORY
8.0 GENERAL 7-1
CHAPTER 8
DRAWING SET
9.0 GENERAL 8-1
Schematic Diagram, bc635VME/bc350VXI Time & Frequency Processor 11600
Assembly and Parts list, bc635VME/bc350VXI Time & Frequency Processor 11603
ii- bc635VME/bc350VXI Manual Datum Inc., Bancomm Div.

CHAPTER 1
MODE SOURCE OF SYNCHRONIZATION
0Timecode - IRIGA IRIGB XR3 2137 NASA36 (modulated or DC)
1Free running - on board VCXO used as reference
2 1PPS - accepts input one pulse per second
3RTC - uses battery backed on board real time clock IC
5GPS (optional) - double wide configuration including GPS receiver
6GPS (optional) - uses GPS receiver / antenna (receiver in antenna)
INTRODUCTION
1.0 GENERAL
This bc635VME / bc350VX1 Time and Frequency Processor (TFP) Operation and Technical Manual
provides the following information:
Introduction and key feature description
Installation and setup
Detailed operation and programming interfaces
Input and output signals
Programming examples
Drawing set
1.1 KEY FEATURES
The TFP has been designed with the following key features:
Time on demand (days through 0.1 microseconds) with zero latency. This feature is
implemented with hardware registers which latch the current time upon host request
Event logging (days through 0.1 microseconds). This feature is implemented with a second
set of hardware registers. Time is captured on a positive or negative input edge.
Six operational modes are supported. Modes are distinguished by the reference source.
Datum Inc., Bancomm Div. bc635VME/bc350VX1 Manual 1-1

Provides an output clock synchronized to the selected reference; programmable 1,5, or 10
MHz TTL.
INT# SOURCE OF INTERRUPT
0External event input has occurred
1 A periodic output has occurred
2The time coincidence strobe has occurred
3Aone second epoch (1 PPS output) has occurred
4An output data packet is available
All modes of operation are supplemented by flywheel operation i.e. If synchronization
source is lost the TFP will continue to function at the last known reference rate.
Generates synchronized IRIGB timecode; modulated and DC level shift formats are produced
simultaneously.
Programmable frequency output (periodics) is provided. The output frequency is 10,000,000
/(nl * n2). 1<nl <65536 & 1<n2<65536
Atime coincidence strobe output is provided. Programmable from days through
milliseconds. This strobe also has an each second mode programmable to milliseconds.
Five maskable interrupt sources are supported. IRQ levels 1 through 7 are programmable.
Time of day, hours, minutes, and seconds, are displayed on front panel LED's.
Most inputs and outputs are accessible via the P2 connector.
1.2 PHYSICAL AND FUNCTIONAL OVERVIEW
The TFP is a B size module (6U X 160 mm) . Operation is controlled by a block of 32 D16 registers
written and read by the host via the VMEbus (A16 : D16). The TFP is available in two versions.
The bc635VME is intended for use in a VMEbus system with most I/0 signals available on rows A
and C of the P2 connector. The bc350VXI is intended for use in a VXlbus system, and is shipped
without a P2 connector. A dip switch is used to select VME or VXI compatibility. In VMEbus
systems the register block can be located on any 64 byte boundary. In VXlbus systems the register
block can be located at any of the 256 Logical Addresses (A15 and A14 must be high). The Logical
Address is returned during an interrupt acknowledge cycle.
1
1-2 bc635VME/bc350VXI Manual Datum Inc., Eamon= Div.

1.3 PERFORMANCE SPECIFICATIONS
FORMAT IRIGA IRIGB XR3 2137 NASA36
CARRIER RANGE +/- 50 PPM
FLYWHEEL ACCURACY drift < 2 millisecond per hour (applies to all operational modes)
MODULATION RATIO 3:1 to 6:1
INPUT AMPLITUDE 0.5 to 5 volts-peak to. peak
INPUT IMPEDANCE 10K ohms AC coupled
FORMAT IRIGB
MODULATION RATIO 3:1
OUTPUT AMPLITUDE 0to10 volts peak to peak
DC LEVEL SHIFT TTL / CMOS compatible
ADDRESS SPACE A16, AM codes $29 and $2D, 64 bytes
DATA TRANSFER D16 .
INTERRUPTER D08(0), 1(1-7), ROAK
POWER +5 @ 1.5amps 4-12 @ 50 milliamp -12 @ 30 milliamp
EVENT CAPTURE TTL / CMOS positive or negative edge triggered
20 nanoseconds min.width 250 nanoseconds min. period
EXTERNAL 1PPS TTL / CMOS positive edge on time
20 nanoseconds minimum width
1.3.1 TIMECODE READER
1.3.2 TIMECODE GENERATOR
1.3.3 BUS CHARACTERISTICS
1.3.4 DIGITAL INPUTS
Datum Inc., Bancomm Div. bc635VME/bc350VXI Manual 1-3

I
1PPS TTL / CMOS positive edge on time
PERIODICS TTL / CMOS positive edge on time
STROBE TTL / CMOS positive edge on time
1, 5, 10 MHz clock TTL / CMOS positive edge on time
DIGITAL INPUT (or) TTL / CMOS 45% to 55% duty cycle
SINEWAVE INPUT 1.2 to 4 volts peak to peak
TEMPERATURE
OPERATING 0to 70 degrees centigrade
NON-OPERATING -50 to 125 degrees centigrade
RELATIVE HUMIDITY OPERATING 5% to 95% non-condensing
ALTITUDE OPERATING -400 to 18,000 meters MSL
1.3.5 DIGITAL OUTPUTS
1.3.6 EXTERNAL 10 MHz INPUT
1.3.7 ENURONMENTAL SPECIFICATIONS
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1-4 bc635VME/bc350VXI Manual Datum Inc., Bancomm Div. I

CHAPTER 2
INSTALLATION AND SETUP
2.0 VME / VXI COMPATIBILITY
SWITCHES
The TFP is designed for both
VMEbus and VXIbus compatibility.
Switches SW2-3 and SW2-4 are
used to select the bus protocol. To
select VXIbus compatibility set
SW2-3 and SW2-4 to the OPEN or
OFF position. To select VMEbus
compatibility set SW2-3 and SW2-
4to the CLOSED or ON position.
41
SWI
31/2
PI
P2
Switch SW2-3 controls the register
block addressing within the A16 SW IGood SW2 LOCA170N REVA ding REVD
address space. With this switch in
the VXI position, address bits A14 and A15 must be 1 for Al6 selection. Switch SW1 is then used
to select the Logical Address for the module. With SW2-3 in the VME position, the module can be
mapped to any 64 byte block in the A 16 address space. SW2-1 and SW2-2 set the Al4 and A 15
address bits, and SW1 is used to set the A13 through A6 address bits.
Switch SW2-4 controls the status /
ID byte returned during interrupt
acknowledge cycles. With SW2-4 in
the VXI position, the Status / ID byte
returned during interrupt
acknowledge cycles is the Logical
Address set with SW1. When SW2-
4is in the VME position, the Status
/ID byte returned during interrupt
acknowledge cycles is the user
programmable vector loaded into the
VECTOR register (discussed in
CHAPTER 3).
Datum Inc., Bancomm Div.
SW I
P1
8
SW2
SW I and SW2 LOCATION REVE
bc635VME/bc350VXI Manual 2-1

2.1 VMEbus BASE ADDRESS SELECTION
SW2 SW I A1 6 address range
used. (The BASE
address is on the
left.)
Address Bit A15 A14 A13 Al2 Al I A10 A09 A08 A07 A06
Switch Number 2 I 8 7 6 54 3 2 1
Example switch
settings for SW I and
0 0 0 0 00 0 0 0 0 0x0000 - 0x003F
SW2. 0 0 000000 0 1 •0x0040 - 0x007F
00 0 0 0 0 0 0 I 0 Ox0080 - 0x0OBF .
I.... OPEN or OFF
0 0 0 0 0 0 0 0 1 10x0000 - Ox0OFF
0= CLOSED or ON
0 0 000 0 0 I0 0 Ox0100 - Ox013F
... .. ... ... .. ... .
...
II 1 1 1 1 I 0 1 IOxFECO - OxFEFF
I I I I I I I I00OxFFOO - 0xFF3F
I I 1 I I I I I 0 I 0xFF40 - 0xFF7F
I I I 11I I I I 0 0xFF80 - OxFFBF
I I I I 1 I II 1 I OxFPCO - OxI+I-1
Base address selection for the VMEbus requires the setting of switch SW1 (A6 thru A13) and SW2
(A14 and A15). The bc635VME occupies 64 bytes in the A16 address space and can be freely
located on any 64 byte boundary. The correspondence of the switch positions to the address bits is
illustrated below.
t' I,
To select a base address set each of the switches to the logical zero (CLOSED or ON) or the logical
one (OPEN or OFF) state.
2.2 bc3.50V2CI LOGICAL ADDRESS SELECTION
Logical Address selection for the VXlbus requires the setting of switch SW1 (A6 thru A13). The
bc350VXI occupies 64 bytes in the A1 6 address space and can be located at any of the 256 Logical
Addresses within the VXlbus. The correspondence between the switch positions and the address
bits, and the logical state corresponding to a switch setting follows the description provided in
SECTION 2.1.
2-2 bc635VME/bc350VXI Manual Datum Inc., Bancomm Div.

2.3 JUMPERS (default setting in bold type)
The jumper locations for the REV A thru
REV C TFP versions are shown in the
adjacent illustration. The jumper blocks are
not drawn to scale in order to make the
numbers more visible. It might be helpful to
refer to the schematic diagrams to obtain a
clearer idea of the function of each jumper
option.
JP1
With the jumper in the 1-2 position the TFP
is configured to use DC level shift input
timecode. In the 3-4 or open position the
TFP is configured to use modulated
timecode.
3
JP2
42
JP1
21
43
1
42
JP3
7
2
JP5
4
2
JP4 P1
P2
JUMPER LOCATION REV A thru REV C
JP2 (GPS OPTION)
In the 1-2 position the TFP is configured to use a single ended 1PPS GPS input. In the 3-4 position
the TFP is configured to use a differential 1PPS GPS input.
JP3 (GPS OPTION)
In the 1-2 position the TFP is configured to use the ACUTIME Smart Antenna or SV-6 as the GPS
sensor. In the 3-4 position the TFP is configured to use the TANS as the GPS sensor.
The ACUTIME, SV-6, and TANS are GPS sensors manufactured by Trimble Navigation Inc.
JP4
The jumpers in the JP4 group are designed
to be moved as a pair. That is positions 3-4
and 5-6 define one configuration, and
positions 1-2 and 7-8 define a second
configuration. In the default configuration
the TFP is configured with an auxiliary RS-
422 output. In the second configuration the
TFP as configured in a daisy-chain mode
(the RS-422 input is jumpered to the RS-
422 output. This jumper set is intended to
be used in a digital synchronization mode.
At the present time this mode has not been
implemented.
3
3
3
21
43
JP2
2
4
W1
JP3
7I
3
4
2
IPS
4
2
JP4 P1
P2
JP5 JUMPER LOCATION REVD & UP
In the 1-2 position this jumper places a 100
ohm load between the RS-422 input lines. In the 3-4 position the 100 ohm load is by-passed. When
the TFP is the terminal device on an RS-422 daisy chain the load should be used. When the TFP is
Datum Inc., Bancomm Div. bc635VME/bc350VXI Manual 2-3

not at the end of the chain the load should be omitted.
2.4 INSTALLATION
To install the TFP into a computer chassis follow the steps below.
Remove the IACKIN*/IACKOUT* back plane jumper for the TFP slot. This step should be
performed even if TFP interrupts are not used.
bc635VME users must verify that signals on rows A and C of the P2 connector are not used
for VSB or other purposes. The TFP provides signal I/O on row A and C that may produce
aconflict. If a conflict does exist, a solution is to obtain a bc635VME with the P2 connector
removed.
Verify that power is off and insert the TFP into the chassis, securing it in the slot by
tightening the two front panel screws.
2-4 bc635VME/bc350VXI Manual Datum Inc., Bancomm Div. 1

CHAPTER 3
INTERFACES
3.0 GENERAL
The TFP occupies 64 bytes in the VMEbus / VXlbus A16 address space. Refer to SECTION 2.1 for
details on VMEbus base address selection, and to SECTION 2.2 for VXlbus Logical Address
selection. TFP data transfers are D16 with the exception of packet I/0 which allows D08(0)
transfers. A glossary of key terms commonly used in the discussion of timing operation is provided
below.
EPOCH
Areference time or event. Epoch often refers to a one pulse per second event.
FLYWHEEL
To maintain time or frequency accuracy as well as local resources allow when a time or frequency
reference has been lost or removed.
PERIODIC
Aprogrammable frequency which is obtained by dividing the TFP reference frequency. Periodics
are sometimes referred to as 'heartbeats'. Periodics may optionally be synchronous with the 1PPS
epoch if the period is expressible as a ratio of integers.
MAJOR TIME
Units of time larger than or equal to seconds. A day hr:min:sec format is usually implied.
MINOR TIME
Subsecond time to whatever resolution is supported.
PACKET
Agroup of bytes conforming to a defined structure. Packets are usually used in bit serial or byte
serial data transmission to allow framing of the transmitted data.
3.1 DATA INPUT AND OUTPUT
Communication with the TFP is performed using a set of memory mapped registers. These registers
may be read only (R), write only (W), or read/write (R/149. In some cases a read/write register is
structured to support dissimilar data in the read and write directions. The table below summarizes
the type of register located at each hexadecimal offset, and provides a brief description of the register
function. The data format and detailed descriptions of each register are provided in the next section.
Datum Inc., Bancomm Div. bc635VME/bc350VXI Manual 3-1

1
TFP REGISTER MAP SUMMARY
HEX OFFSET TYPE LABEL FUNCTION READ / WRITE
0RID Reg. VXIbus ID Register
2RDevice VXlbus Device Type Register
4R/W Status / Control VXlbus Status I Control Registers
6-08 reserved
OA R TIMEREQ Time Request (Time Latching Strobe)
OC RTIMEO Requested Time (includes status byte)
OE R TIME1 Requested Time
10 RTIME2 Requested Time
12 RTIME3 Requested Time
14 RTIME4 Requested Time
16 REVENTO Event Time
18 R/W EVENTI / STROBE1 Event Time / Strobe Time
lA R/W EVENT2 / STROBE2 Event Time / Strobe Time
1C R/W EVENT3 I STROBE3 Event Time / Strobe Time
lE R EVENT4 Event Time
20 R/W UNLOCK Release Lockout / Capture Time
22 R/W ACK Acknowledge Register
24 R/W CMD Command Register
26 R/W FIFO FIFO Input / Output (D16 or D08(0))
28 R/W MASK Interrupt Mask
2A R/W INTSTAT Interrupt Status
2C R/W VECTOR Interrupt Vector
2E R/W LEVEL Interrupt Level
30-3E reserved
3-2 bc635VME/bc350VXI Manual Datum Inc., Bancomm Div.

OFFSET Ox00 ID Reg.
bit # 15-14 13-12 11-0
use of field device class addressing modes manufacturer's ID
TFP meaning Register Based A16 only OxEF4
RESET VALUE OxFEF4
This register was implemented to satisfy the VXlbus Specification. Bit assignments are as follows.
OFFSET 0x02 DEVICE RESET VALUE OxF350
This register simply contains (in the case of an A16 only device) a manufacturer's card ID.
OFFSET 0x04 STATUS RESET VALUE OxFFFF
The TFP does not support VXIbus initialization and diagnostic features. The reset value is always
returned.
OFFSET 0x04 CONTROL
Writing to this register with bit 0 set will deassert any pending interrupts and will clear all used bits
in offsets 0x20 through Ox2E (except FIFO at offset 0x28). Writing to this register with bit 0 cleared
has no effect. All other bits are ignored during a write.
RESET VALUE OxFFFE
OFFSETOxOA TIMEREQ RESET VALUE NA
Reading this register latches the current time and status into offsets OxOC through Ox14. The value
read is indeterminant.
*** WARNING ***
Many compilers will optimize out of existence an assignment made to a local variable if that
variable is not used. For example, the following code snippet may not read offset OxOA.
timeptr = (short *)(BASE + OxOA) ;
local dummy = *timeptr++ ;
read time(timeptr) ;
I* initialize pointer */
/* latch the time ?? */
/* read the time */
The following form is recommended. Use of the global prevents optimizing out.
timeptr = (short *) (BASE + OxOA) ;
global dummy = *timeptr++ ;
read time(timeptr) ;
I* initialize pointer */
/* latch the time */
/* read the time */
Datum Inc., Bancomm Div. bc635VME/bc350VXI Manual 3-3

OFFSET OxOC TIMED
OFFSET OxOE TIME]
OFFSET Ox10 TIME2
OFFSET Ox12 TIME3
OFFSET 0x14 TIME4
bit # 15-12 11-8 7-4 3-0
TIMEO field not defined not defined status (note 1) days hundreds
TIME1 field days tens days units hours tens hours units
TIME2 field minutes tens minutes units seconds tens seconds units
TIME3 field 10E-1 seconds 10E-2 seconds 10E-3 seconds 10E-4 seconds
TIME4 field 10E-5 seconds 10E-6 seconds 10E-7 seconds not defined
bit # 15-12 11-8 7-4 3-0
EVENTO field not defined not defined status (note 1) days hundreds
EVENT1 field days tens days units hours tens hours units
EVENT2 field minutes tens minutes units seconds tens seconds units
EVENT3 field 10E-1 seconds 10E-2 seconds 10E-3 seconds 10E-4 seconds
EVENT4 field 10E-5 seconds 10E-6 seconds 10E-7 seconds not defined
RESET VALUE NA
RESET VALUE NA
RESET VALUE NA
RESET VALUE NA
RESET VALUE NA
For clarity the above offsets have been grouped.
OFFSET Ox16 EVENTO
OFFSET Ox18 EVENT]
OFFSET OxlA EVENT2
OFFSET Ox1C EVENT3
OFFSET OxIE EVENT4
RESET VALUE NA
RESET VALUE NA
RESET VALUE NA
RESET VALUE NA
RESET VALUE NA
For clarity the above offsets have been grouped.
note 1 bit 6 1 = frequency offset > 5E8 0 = frequency offset < 5E8
bit 5 1 = time offset > X microsec 0 = time offset < X microsec
(X = 5 for mode 0 X = 2 more all other modes)
bit 4 1 = flywheeling (not locked) 0 = locked to selected reference
1
3-4 bc635VME/bc350VXI Manual Datum Inc., Bancomm Div. a

it
bit # 15-12 11-8 7-4 3-0
STROBE1 field not defined not defined hours tens hours units
STROBE2 field minutes tens minutes units seconds tens seconds units
STROBE3 field 10E-1 seconds 10E-2 seconds 10E-3 seconds not defined
bit# CONTROL FUNCTION (SET = '1' = high voltage CLEAR = '0' = low voltage)
0TFP
HOST
SETS bit to acknowledge the receipt of a valid input packet from host
CLEARS bit by writing to this register with bit 0 SET
1reserved
2TFP
HOST
SETS bit when output FIFO contains a data packet.
CLEARS bit by writing to this register with bit 2 SET.
This bit can generate an interrupt. (see OFFSET 0x2A INTSTAT)
3reserved
4TFP
HOST
SETS bit if output FIFO contains data. CLEARS bit if output FIFO empty.
CLEARS output FIFO by writing to this register with bit 4 SET.
5reserved
6reserved
7HOST Must write to this register with bit 7 SET to cause TFP to take action
on the data packet previously written to the input FIFO.
8-15 reserved
OFFSET 0x18 STROBEI
OFFSET OxlA STROBE2
OFFSET Ox1C STROBE3
RESET VALUE OxXX00
RESET VALUE Ox0000
RESET VALUE Ox0000
For clarity the above offsets have been grouped.
OFFSET 0x20 UNLOCK RESET VALUE NA
Aread of this register releases the time capture lockout function if it has been enabled. See CMD
OFFSET Ox24for additional details. The data read from this offset is meaningless. A write to the
UNLOCK register acts as a secondary time latching strobe. Time is latched in EVENTO - EVENT4.
This feature allows the host to capture two times independently.
OFFSET 0x22 ACK RESET VALUE 000(00
Datum Inc., Bancomm Div. bc635VME/bc350VXI Manual 3-5

OFFSET 0x24 CMD
bit# NAME FUNCTION
0 LOCKEN
Event capture lockout (0 = disable lockout 1 = enable lockout).
Prevents a new event from overwriting a previous event until an
UNLOCK is performed (see OFFSET 0x20 UNLOCK).
1 HBEN
Enable periodic time capture (0 = disable 1 = enable).
When enabled the periodic output is logically OR'ED with the event
input, and the time of the periodic may be read in EVENTO - EVENT4.
2EVSENSE Event capture sense select (0 = rising edge 1= falling edge)
3 EVENTEN Event capture enable (0 = disable 1 = enable)
4STREN Time coincidence output strobe enable (0 = disable 1 = enable)
5STRMODE Strobe mode (0 = use major and minor time 1 = use minor time only)
In mode (1) an output strobe is produced each second.
6FREQSELO 010
MHz
15
MHz
01
MHz
11
MHz
7FREQSELI 00 1 1
8-15 reserved
RESET VALUE OxXX00
This register is used to command the TFP to perform specific functions.
OFFSET 0x26 FIFO RESET VALUE NA
Reads take data from the output FIFO. Writes place data into the input FIFO. Both the input FIFO
and the output FIFO may also be accessed via D08(0) at offset 0x27. Each FIFO has a depth of 512
bytes.
Data must be written to and read from the FIFO in the following data packet format.
byte 1 Ox01 header byte (ASCII SOH)
byte 2 'A' thru 'Z' idbyte (defined in CHAPTER 4)
byte 3 data always ASCII i.e. 0 = 0x30
byte 4 data
the number of data bytes varies
byte N data
byte N+1 Ox17 tail byte (ASCII ETB)
1
1
3-6 bc635VME/bc350VXI Manual Datum Inc., Bancomm Div.

1
bit # INT # SOURCE OF INTERRUPT
0 0 External event input has occurred
1
•. 1Periodic pulse output has occurred
22Time coincidence strobe has occurred
3 3 The one pulse per second (1PPS) output has occurred
44 A data packet is available in the output FIFO
5-15 reserved
OFFSET 0x28 MASK RESET VALUE OxXX00
An interrupt source is enabled by writing a'1' to the mask bit corresponding to that source. An'
interrupt source is disabled by writing a '0' to the mask bit corresponding to that source.
OFFSET Ox2A INTSTAT RESET VALUE OxXX00
The INTSTAT register has the same basic structure as the MASK register. The TFP sets bits 0
through 4 of this register depending upon which of the interrupt source generated the interrupt. The
INTSTAT register bits are set regardless of the state of the mask bits. This feature allows the host
to poll for the occurrence of the interrupt sources. INTSTAT bits are cleared by writing to the
INTSTAT register with the correspond bit(s) set.
*** WARNING ***
It is the transition of an INTSTAT bit from a zero to a one that causes an interrupt to be generated
(assuming, of course, that the corresponding MASK bit was set). If the bit in the INTSTAT
register is not cleared by the host it is not possible to generate a second interrupt. It is good
programming practice to clear the INTSTAT register immediately after interrupts have been
enabled.
OFFSET Ox2C VECTOR RESET VALUE 0x/30(00
The VECTOR register holds the 8 bit Status / ID byte that the TFP will return during interrupt
acknowledge cycles for VMEbus applications.
Datum Inc., Bancomm Div. bc635VME/bc350VXI Manual 3-7