Dialog Semiconductor DA14580 User manual

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User manual
DA14580 Range extender v.2
reference application
UM-B-045
Abstract
This document describes the Bluetooth Range Extender v.2 module, based on the DA14580 SoC.
Target hardware: 580 RD QFN40 Module_RF PA_vC –Board Number: 078-56-C.

UM-B-045
DA14580 Range extender v.2 reference application
Company confidential
User manual
Revision 1.1
14-September-2015
CFR0012-00 Rev 1
2 of 56
© 2015 Dialog Semiconductor

UM-B-045
DA14580 Range extender v.2 reference application
Company confidential
User manual
Revision 1.1
14-September-2015
CFR0012-00 Rev 1
3 of 56
© 2015 Dialog Semiconductor
Contents
Contents .................................................................................................................................... 3
1 Terms and definitions ........................................................................................................... 9
2 References ........................................................................................................................... 9
3 Introduction ........................................................................................................................10
4 System overview .................................................................................................................10
Features .............................................................................................................................. 104.1
General description............................................................................................................. 11
4.2
Bluetooth SoC ..................................................................................................................... 124.3
RF front end ........................................................................................................................ 144.4
Radio front end control signals ............................................................................ 154.4.1
4.4.1.1 Radio front end control signals .......................................................... 15
4.4.1.2 Suggested pin assignment ................................................................. 18
Power amplifier .................................................................................................... 204.4.2
Low pass filter....................................................................................................... 21
4.4.3
Antenna ................................................................................................................ 224.4.4
4.4.4.1 Range Extender v.2 on Interposer ..................................................... 22
4.4.4.2 Range Extender v.2 stand alone......................................................... 25
Power system and requirements........................................................................................ 274.5
Trimming the 16MHz Xtal ................................................................................................... 274.6
PCBA.................................................................................................................................... 284.7
Development Mode-Peripheral Pin Mapping..................................................................... 31
4.8
Software.............................................................................................................................. 334.9
5 Measurements ....................................................................................................................38
Basic performance measurements ..................................................................................... 385.1
Receiver sensitivity (conducted) .......................................................................... 385.1.1
5.1.1.1 Test description.................................................................................. 38
5.1.1.2 Test setup........................................................................................... 38

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5.1.1.3 Test results......................................................................................... 38
Transmitter output power (conducted) ............................................................... 405.1.2
5.1.2.1 Test description.................................................................................. 40
5.1.2.2 Test setup........................................................................................... 40
5.1.2.3 Test results......................................................................................... 40
Current consumption ........................................................................................... 425.1.3
5.1.3.1 Test setup........................................................................................... 42
5.1.3.2 Advertisement mode ......................................................................... 42
5.1.3.3 Connection mode............................................................................... 43
5.1.3.4 Extended sleep mode......................................................................... 44
FCC/ ETSI Measurements.................................................................................................... 455.3
Emission limitation conducted (transmitter) ....................................................... 455.3.1
5.3.1.1 Test description.................................................................................. 45
5.3.1.2 Test setup........................................................................................... 45
5.3.1.3 Test results......................................................................................... 45
Emission limitation radiated (transmitter)........................................................... 455.3.2
5.3.2.1 Test description.................................................................................. 45
5.3.2.2 Test setup........................................................................................... 45
5.3.2.3 Test results......................................................................................... 46
6 FCC/IC Certification and CE marking .....................................................................................53
Standards and conformity assessment............................................................................... 536.1
FCC requirements regarding the end product and end user .............................................. 536.2
End product marking ............................................................................................ 536.2.1
End product literature .......................................................................................... 536.2.2
Permissive changes............................................................................................................. 536.3
Industry Canada requirements regarding the end product and end user.......................... 536.4
End product marking ............................................................................................ 536.4.1

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End product literature .......................................................................................... 536.4.2
7 Appendix A: Range Extender v.2 with SPI Data Flash.............................................................53
8 Revision history ...................................................................................................................55

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DA14580 Range extender v.2 reference application
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List of Figures and Tables
Figure 1: DA14580 Range Extender v.2 module.................................................................................. 10
Figure 2: Block diagram ....................................................................................................................... 11
Figure 3: Sky66111-11 Power Amplifier.............................................................................................. 12
Figure 4: DA14580 QFN40 SoC, Range Extender ver.2 module .......................................................... 13
Figure 5: RF front end signal paths...................................................................................................... 14
Figure 6: RF front end schematic ........................................................................................................ 15
Figure 7: Diagnostic port to pins assignment and register settings.................................................... 17
Figure 8: The RF control signals........................................................................................................... 19
Figure 9: Rising edge of Tx_En control signal...................................................................................... 19
Figure 10: Detail from Tx_En to Rx_En signal..................................................................................... 20
Figure 11: Low pass filter..................................................................................................................... 21
Figure 12: T- shaped, 3-poles, Low Pass Filter .................................................................................... 21
Figure 13: Simulation results of LPF response .................................................................................... 22
Figure 14: Range Extender v.2 on interposer...................................................................................... 22
Figure 15: Antenna geometry on Range Extender v.2 ........................................................................ 23
Figure 16: Measured S11 paramater for IFA ....................................................................................... 23
Figure 17: Radiation diagram for the board placed vertically on the short edge ............................... 24
Figure 18: Radiation diagram for the board placed horizontally ........................................................ 24
Figure 19: Range Extender v.2 stand-alone ........................................................................................ 25
Figure 20: Radiation diagram for the board placed vertically on the short edge ............................... 25
Figure 21: Radiation diagram for the board placed horizontally ........................................................ 26
Figure 22: IFA antenna implementation ............................................................................................. 26
Figure 23: Current consumption for Advertisement frame ................................................................ 27
Figure 24: Top view of PCBA ............................................................................................................... 28
Figure 25: Schematic of DA14580 Range Extender v.2 Module.......................................................... 29

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Figure 26: DA14580/581/583 configuration settings for peripherals, periph_setup.h ...................... 32
Figure 27: Step 2 of adding app_range_extender............................................................................... 33
Figure 28: Step 3a of adding app_range_extender............................................................................. 33
Figure 29: Step 3b of adding app_range_extender............................................................................. 34
Figure 30: Step 4a of adding app_range_extender............................................................................. 34
Figure 31: Step 4b of adding app_range_extender............................................................................. 35
Figure 32: Step 5a of adding app_range_extender............................................................................. 35
Figure 33: Step 5b of adding app_range_extender............................................................................. 36
Figure 34: Inserting app_range_extender in the production test tool ............................................... 37
Figure 35: Nominal conducted output power per channel................................................................. 40
Figure 36: Peak conducted output power per channel....................................................................... 41
Figure 37: Supplu current during an Advertisement frame ................................................................ 42
Figure 38: Supply current during a Connection frame........................................................................ 43
Figure 39: Supply current during Extended Sleep mode..................................................................... 44
Figure 40: Range Extender v.2 mounted on the interposer board for radiated measurements........ 46
Figure 41: FCC, Frequency Range from 30MHz to 1 GHz, CH39 ......................................................... 47
Figure 42: FCC, Frequency from 1GHz to 3GHz, CH00 ........................................................................ 47
Figure 43: FCC, Frequency from 1GHz to 3GHz, CH19 ........................................................................ 48
Figure 44: FCC, Frequency from 1GHz to 3GHz, CH39 ........................................................................ 48
Figure 45: FCC, Frequency from 3GHz to 18GHz, CH00 ...................................................................... 49
Figure 46: FCC, Frequency from 3GHz to 18GHz, CH19 ...................................................................... 49
Figure 47: FCC, Frequency from 3GHz to 18GHz, CH39 ...................................................................... 50
Figure 48: FCC, Frequency Range 2.31 GHz to 2.39 GHz (Restricted band- CH00) ............................. 50
Figure 49: FCC, Frequency Range 2.31 GHz to 2.39 GHz (Restricted band- CH19) ............................. 51
Figure 50: FCC, Frequency Range 2.31 GHz to 2.39 GHz (Restricted band- CH39) ............................. 51
Figure 51: FCC, Frequency Range 2.4385 GHz to 2.5 GHz (Restricted band- CH00) ........................... 52
Figure 52: FCC, Frequency Range 2.4385 GHz to 2.5 GHz (Restricted band- CH19) ........................... 52

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DA14580 Range extender v.2 reference application
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© 2015 Dialog Semiconductor
Figure 53: FCC, Frequency Range 2.4385 GHz to 2.5 GHz (Restricted band-CH39) ............................ 53
Figure 54: Range Extender v.2 Module with external SPI Flash.......................................................... 54
Table 1: Electrical characteristics ........................................................................................................ 11
Table 2: BLE_ DIAGCNTL_REG (0x40000050) register specification ................................................... 16
Table 3: BLE_CNTL2_REG (0x40000200) register specification........................................................... 17
Table 4: Diagnostic port availability and settings for control pins...................................................... 18
Table 5: Suggested pin assignment for extracting all RF control signals ............................................ 18
Table 6: Antenna gain Range Extender v.2 with interposer................................................................ 23
Table 7: Antenna gain Range Extender v.2 stand-alone ..................................................................... 25
Table 8: Module Pin assignment ......................................................................................................... 28
Table 9: Bill of Materials...................................................................................................................... 30
Table 10: Development/ testing mode pin mapping .......................................................................... 31
Table 11: Conducted Rx sensitivity...................................................................................................... 39
Table 12: Tx output power .................................................................................................................. 41
Table 13: Peak current during Advertisement mode.......................................................................... 42
Table 14: Peak current during Connection mode ............................................................................... 43
Table 15: Average current in Extended Sleep mode........................................................................... 44
Table 16: Conducted Tx harmonics at VBAT_3V = 3.0 V @ CH00, CH19, CH39....................................... 45

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DA14580 Range extender v.2 reference application
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© 2015 Dialog Semiconductor
1 Terms and definitions
BLE Bluetooth Low Energy
BOM Bill Of Materials
DUT Device Under Test
ERP Effective Radiated Power
FW Firmware
LPF Low Pass Filter
PA Power Amplifier
PCBA Printed Circuit Board Assembled
PCB Printed Circuit Board
RF Radio Frequency
SoC System on Chip
SPDT Single Pole Double Throw
2 References
1. DA14580 Low Power Bluetooth Smart SoC, Datasheet, Dialog Semiconductor
2. SKY66111-11 Datasheet
3. AN-B-020 End product testing and programming guidelines.(This document is susceptible to be replaced)
4. UM-B-012 DA14580/581/583 Creation of a secondary boot loader

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3 Introduction
The DA14580 Range Extender v.2 module design is based on the Dialog Semiconductor DA14580
BLE Smart SoC, where enhanced RF transmitted power is presented. This module serves as
reference design to potential customers requesting BLE functionality with Nominal RF Output power
up to +9.3 dBm (Peak RF Output Power +9.8 dBm). From physical perspective, the module is a two
layer PCBA where the digital and power interfaces of the DA14580 are accessible to the user. This
document presents the system, technical specifications, physical dimensions and test results.
Figure 1: DA14580 Range Extender v.2 module
4 System overview
Features
4.1
■Highly integrated Dialog Semiconductor DA14580 Bluetooth ® Smart SoC
■Module can be used as either stand-alone or as a data pump on a system with an external
processor
■Module satisfies all Bluetooth requirements
■No external crystal or additional passive components are required for module operation, as the
module is equipped with two crystal oscillators one at 16MHz (XTAL16M) and a second at
32.738KHz (XTAL32K). The 32.738 KHz is used as the clock of Extended/ Deep Sleep modes.
■Access to processor via JTAG, SPI, UART or I2C
■22 GPIOs available on module at a 1.27 mm pitch, suitable for keyboard designs
■Operating voltage: 2.4 V to 3.3 V. Suitable for operation from a single coin cell battery.
■On-board printed inverted F-type antenna (Figure 1)
■RF connector for conducted measurements( Figure 1)
■Up to +9.3 dBm Nominal Maximum Output Power (+9.8dBm Peak Maximum Output Power).
■Rx sensitivity: better than -90 dBm
■Supply current:
-Tx : less than 17 mA peak current @ 3.0 V
-Rx: less than 6 mA peak current @ 3.0 V
-Extended - Sleep current: less than 1.6A @ 3.0 V
■15.25 mm x 24 mm, 37 pins, two layer PCBA
■Operating temperature: –40 ºC to +85 ºC
■Test FW based on DA14580_581_583_SDK_3.0.10.1

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Table 1: Electrical characteristics
Characteristic
Value
Comments
Battery voltage (VBAT_3V)
2.4 V to 3.3 V
Specification tested at typical
voltage of 3.0 V
Operating frequency range
2400 MHz to 2483.5 MHz
Conducted output power
+9.3 dBm
VBAT_3V = 3 V, TA= +15 to +35 °C
Maximum bypass loss
0.6 dB
VBAT_3V = 3 V, TA= +15 to +35 °C
Receiver sensitivity
Better than -90 dBm
VBAT_3V = 3 V, TA= +15 to +35 °C
Peak Tx current
<17mA
Tx Power = +9.3 dBm,
VBAT_3V = 3 V, TA= +15 to +35 °C
Peak extended-sleep current
<1.6A
VBAT_3V = 3 V, TA= +15 to +35 °C
General description4.2
The system consists of the DA14580 Bluetooth Low power SoC, the SKY6611-11 Front-end module
and a discrete low pass filter. The radio front end is connected to a PCB trace antenna as Figure 2
shows.
The power amplifier is controlled by the CTRL1 and CTRL2 signals. CTRL1 is generated from pin
P0_3 and CTRL2 is generated from P0_2 of the DA14580. On pin P0_3 and pin P0_2 the internal
Radio_TXEN and Radio_RXEN signals are software allocated.
DA14580
QFN40 Sky6611-11 Discrete
LPF
cRx
Bias
P0_2 P0_3
buck
VBAT_3V
gpios RBIAS
cTx
CTRL1
CTRL2
Figure 2: Block diagram
The amplifier circuit is the SKY66111-11 from Skyworks. The CTX pin is used as the TX control
signal and amplifier bias voltage. CTX pin is connected to the amplifier BIAS pin via resistor RBIAS.
The resistor value is adjusted in order to get a Nominal RF Output Power of +9.3 dBm. More
information for the power output adjustment can be found in Sky66111-11 datasheet2.

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Figure 3: Sky66111-11 Power Amplifier
Bluetooth SoC4.3
The DA14580 integrated circuit has a fully integrated radio transceiver and baseband processor for
Bluetooth ® Smart. It can be used as an application processor as well as a data pump in systems
with an external processor.
The DA14580 contains an embedded One-Time-Programmable (OTP) memory for storing Bluetooth
profiles as well as custom application code. The qualified Bluetooth® Smart protocol stack, which is
stored in a dedicated ROM, and the customer application software which is stored in system RAM,
run on the embedded ARM Cortex M0 processor. Low leakage Retention RAM is used to store
sensitive data and connection information while in Deep Sleep mode.
The Radio Transceiver implements the RF part of the Bluetooth Smart protocol. Together with the
Bluetooth 4.0 PHY layer, it provides a 93 dB RF link budget for reliable wireless communication. All
RF blocks are supplied by on-chip low drop out regulators (LDOs). The RF port is single ended 50 ,
so no external balun is required.
The DA14580 has dedicated hardware for the Link Layer implementation of Bluetooth® Smart and
interface controllers for enhanced connectivity capabilities.
The reset line of the DA14580 (pin RST) is active high. On this module the RST pin is available on
module pin 21.
Main debug port for the DA14580 is the JTAG. JTAG consists of two signals, SWDIO and SWCLK.
The frequency tolerance specification for BLE is 50 ppm. In order to compensate ageing and offset
effects, an external crystal shall have an accuracy of ±15 ppm or better. The DA14580 crystal (Y1)
has a fundamental frequency of 16 MHz and load capacitance not higher than 10 pF. The crystal is
located on the module itself. Also, an internal programmable capacitance bank is available in the
DA14580. In this way, the crystal oscillator frequency can be tuned.
For sleep mode the on chip RCX oscillator is utilized. In addition, a 32 kHz crystal (Y2) with a
tolerance of 50 ppm (500 ppm max) can be assembled on the module. The crystal load capacitance
shall not be higher than 10 pF.
The external digital interfaces available for the module are:
●2 UARTs with hardware flow control up to 1 MBd
●SPI interface
●I2C bus at 100 kHz, 400 kHz

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●3-axis capable Quadrature Decoder
There is also a 4-channel 10-bit ADC available externally to the module.
The module includes 22 GPIOs (including JTAG signals) that are available externally. The interfaces
are multiplexed with the GPIOs and can be enabled by appropriate programming.
The DA14580 is equipped with a DC-DC converter that can be configured as either Buck or Boost.
For this module, the DC-DC converter is configured as a Buck converter (C5, C2, L1, C3).
The DA14580 is available in three packages: WLCSP34, QFN40 and QFN48. In this reference
application the QFN40 has been used.
Figure 4: DA14580 QFN40 SoC, Range Extender ver.2 module

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RF front end4.4
This part of the design is implementing the amplification of the RF transmitted signal while the
transmitted harmonics as well as the Tx spurious emissions remain within the FCC/ETSI
specification.
The operation of the RF front end is controlled by the DA14580. There are two RF paths: one
through the amplifier and one bypass path. The amplifier path is enabled during transmission. The
RF signal passes through the PA, the low pass filter and the RF matching network. In the bypass
path, the RF signal received at the antenna is driven directly to the BLE transceiver.
DA14580
QFN40
BTLE SoC
Low Pass
Filter Matching circuit
Amplifier
SKY66111-11
Amplifier bypass path
Power Amplifier Path
RFIOP
Figure 5: RF front end signal paths

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Figure 6: RF front end schematic
Radio front end control signals4.4.1
4.4.1.1 Radio front end control signals
In general, three different radio control signal can be extracted from DA14580:
- extrc_txen, it can be used as Tx_En control signal of the RF front end.
- extrc_rxen or radcntl_rxen radio. Both signals are of the same duration. They can be used
as Rx_En control signals for the RF front end.
- event_in_process that can be used for wlan co-existence signal.
The signals are extracted by using the BLE diagnostic port. Two registers need to be programmed:
- BLE_DIAGCNTL_REG where it is defined which signals will be extracted from each port.
Register specification of BLE_ DIAGCNTL_REG :

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Table 2: BLE_ DIAGCNTL_REG (0x40000050) register specification
- BLE_CNTL2_REG where the BLE diagnostic port is enabled and the straight or reverse pin
assignment is defined. This function is controlled by two register bit-fields, DIAGPORT_SEL
and DIAGPORT_REVERSE. Description presented below on Table 3.

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Table 3: BLE_CNTL2_REG (0x40000200) register specification
In BLE_CNTL2_REG the port and the pins assignment order is defined. Only port 0 (P0_[0:7]) and
port 1 (P1_[0:3]) of the chip can be utilized.
DIAG0
DIAG1
DIAG2
DiagOut[0]
DiagOut[1]
DiagOut[2]
DiagOut[3]
DiagOut[4]
DiagOut[5]
DiagOut[6]
DiagOut[7] P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
P1_0
P1_1
BLE
DIAGNOSTIC
BLE_DIAGCNTL_REG
[DIAG0, DIAG1, DIAG2] BLE_CNTL2_REG
(DIAGPORT_ REVERSE =1)
or
or
BLE_CNTL2_REG
(DIAGPORT_ SELECT =0 )
DIAG0
DIAG1
DIAG2
DiagOut[0]
DiagOut[1]
DiagOut[2]
DiagOut[3]
DiagOut[4]
DiagOut[5]
DiagOut[6]
DiagOut[7]
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
P1_0
P1_1
BLE
DIAGNOSTIC
BLE_DIAGCNTL_REG
[DIAG0, DIAG1, DIAG2] BLE_CNTL2_REG
(DIAGPORT_ REVERSE =0 )
or
or
BLE_CNTL2_REG
(DIAGPORT_ SELECT =0 )
Figure 7: Diagnostic port to pins assignment and register settings

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For having all pins extracted in parallel, a combination of register setting and pin availability must be
arranged. For example it is preferable to avoid assigning P0_4 and P0_5 to RF control signals. P0_4
and P0_5 are used for UART ports in testing and production tests.
The available pins are presented below:
Table 4: Diagnostic port availability and settings for control pins
Function
Diagnostic port settings
DA14580 assigned Pins
BLE_DIAGCNTL_REG
BLE_CNTL2_REG
DIAG port
DIAGx
DIAGPORT_
REVERSE = 0
DIAGPORT_
REVERSE = 1
Tx_Enable
DIAG1
0x28
P0_3
P0_4
Rx_Enable
DIAG1
0x28
P0_4
P0_3
DIAG2
0x08
P0_5
P0_2
DIAG2
0x0c
P0_6
P0_1, P1_1
DIAG0
0x1F
P0_2
P0_5
Wlan coexist
DIAG2
0x08
P0_7
P0_0, P1_0
DIAG2
0x0D
P0_7
P0_0, P1_0
DIAG2
0x1F
P0_6
P0_1, P1_1
4.4.1.2 Suggested pin assignment
A suggested pin assignment for extracting all rf control signals at the same time is presented below:
Table 5: Suggested pin assignment for extracting all RF control signals
function
Signal used
Diagnostic port settings
DA14580 assigned Pins
BLE_DIAGCNTL_REG
BLE_CNTL2_REG
DIAG port
DIAGx
DIAGPORT_ REVERSE = 0
PA_Tx Enable
extrc_txen
DIAG1
0x28
P0_3
PA_Rx Enable
radcntl_rxen
DIAG0
0x1F
P0_2
Wlan coexist
event_in_
process
DIAG2
0x08
P0_7
For more options on the pin assignment please read paragraph 4.8: Development mode-peripheral
pin mapping.

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Below, screenshots from the radio control signals during operation are presented. The proximity
reporter_fh application was used.
Figure 8: The RF control signals
Figure 9: Rising edge of Tx_En control signal

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Figure 10: Detail from Tx_En to Rx_En signal
Power amplifier4.4.2
The amplifier circuit is the SKY66111-112from Skyworks. The VBIAS pin is connected to the bias
voltage via resistor R7. The resistor value is adjusted so that the +9.3 dBm output power is achieved
at maximum 16.15 mA current consumption.
There are two Low Pass Filters options for the power amplifier. The first one is at the input of the
Skyworks amplifier and is formed by C6, C7 and L3 and the second is at the output of the Skyworks
amplifier and is formed by L4, L5, C18 and C19. The second LPF is used in the current design.
The power amplifier is supplied from pin VBAT_3V directly.