Elmicro S12compact User manual

S12compact
Hardware Version 1.10
User Manual
July 4 2008

Copyright (C)2002-2008 by
ELMICRO Computer GmbH & Co. KG
Hohe Str. 9-13 D-04107 Leipzig, Germany
Tel.: +49-(0)341-9104810
Fax: +49-(0)341-9104818
Email: [email protected]
Web: http://elmicro.com
This manual and the product described herein were designed
carefully by the manufacturer. We have made every effort to avoid
mistakes but we cannot guarantee that it is 100% free of errors.
The manufacturer's entire liability and your exclusive remedy shall
be, at the manufacturer's option, return of the price paid or repair or
replacement of the product. The manufacturer disclaims all other
warranties, either expressed or implied, including but not limited to
implied warranties of merchantability and fitness for a particular purpo-
se, with respect to the product including accompanying written material,
hardware, and firmware.
In no event shall the manufacturer or its supplier be liable for any
damages whatsoever (including, without limitation, damages for loss of
business profits, business interruption, loss of business information, or
other pecuniary loss) arising out of the use of or inability to use the
product, even if the manufacturer has been advised of the possibility of
such damages. The product is not designed, intended or authorized for
use in applications in which the failure of the product could create a
situation where personal injury or death may occur. Should you use the
product for any such unintended or unauthorized application, you shall
indemnify and hold the manufacturer and its suppliers harmless against
all claims, even if such claim alleges that the manufacturer was negli-
gent regarding the design or implementation of the product.
Product features and prices may change without notice.
All trademarks are property of their respective holders.
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Contents
27Real Time Clock (RTC) ............................... 26Extra Ports PARIN and PAROUT ........................ 25SPI Subsystem ...................................... 23USB Interface ....................................... 23IF-Module Connection ................................. 22RS232 Interface ..................................... 20Buzzer ............................................. 20Indicator-LED ....................................... 18Integrated EEPROM .................................. 16Integrated A/D-Converter .............................. 15Operating Modes, BDM Support ......................... 14Clock Generation and PLL ............................. 13Reset Generation .................................... 12Controller Core, Power Supply .......................... 12Schematic Diagram ..................................
12
6. Circuit Description .................................
11
5. Mechanical Dimensions ............................
9Solder Bridges ....................................... 9Jumpers ............................................
9
4. Jumpers and Solder Bridges .........................
7
3. Parts Location Diagram .............................
6
2. Quick Start .........................................
5Package Contents .................................... 4Optional Components .................................. 3Technical Data .......................................
3
1. Overview ...........................................
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45
9. Memory Map ......................................
41Monitor Commands .................................. 41Usage ............................................. 39Redirected Interrupt Vectors ............................ 38Write Access to Flash and EEPROM ..................... 38Autostart Function .................................... 38Serial Communication .................................
38
8. TwinPEEKs Monitor ................................
37Additional Information on the Web ....................... 37Startup Code ........................................ 37Behaviour after Reset .................................
37
7. Application Hints ...................................
36Bus Interface ........................................ 34CAN Interface ...................................... 32IIC-Bus ............................................ 31Serial Data Flash (SDF) ............................... 30D/A-Converter (DAC) ................................. 29A/D-Converter (ADC) .................................
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1. Overview
The S12compact is a versatile controller module based on the
HCS12 16-bit microcontroller family from Motorola. It combines
compact size (Half-Euro form factor, 80mm x 100mm) with powerful
computing features and a rich set of peripherals. The controller module
can be used for a wide range of applications, e.g. industrial controllers,
measuring devices and data loggers.
The S12compact is equipped with a MC9S12DP512 microcontrol-
ler unit (MCU). It contains a 16-bit HCS12 CPU, 512KB of Flash
memory, 14KB RAM, 4KB EEPROM and a large amount of peripheral
function blocks, such as SCI, SPI, CAN, IIC, Timer, PWM, ADC and
General-Purpuse-I/Os. The MC9S12DP512 has full 16-bit data
paths throughout. An integrated PLL-circuit allows adjusting perfor-
mance vs. current consumption according to the needs of the user
application.
In addition to the on-chip controller functions, the S12compact
module provides a number of useful peripheral options: 16-bit
A/D-Converter and 16-bit D/A-Converter including precision voltage
reference, battery-backed Real Time Clock (RTC), USB-Interface and
2MB (16Mbit) extra memory using Serial Data Flash.
For the HCS12 microcontrollers, a wide range of software tools
(Monitors, C-Compilers, BDM-Debuggers) is available to accelerate the
development process.
Technical Data
wMCU MC9S12DP512 with LQFP112 package (SMD)
wHCS12 16-bit CPU, uses same programming model and
command set as the HC12
w16 MHz crystal clock, up to 25 MHz bus clock using PLL
w512KB Flash
w4KB EEPROM
w14KB RAM
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w2x SCI - asynch. serial Interface (e.g. RS232, LIN)
w3x SPI - synch. serial Interface
w1x IIC - Inter-IC-Bus
w5x msCAN-Module (CAN 2.0A/B-compatible)
w8x 16-Bit Timer (Input Capture/Output Compare)
w8x PWM (Pulse Width Modulator)
w16-channel 10-bit A/D-Converter
wBDM-Interface for Download and Debugging
wSpecial LVI-Circuit (Reset Controller)
wSerial Interface with RS232-Transceiver (for PC connection)
wSecond serial port for IF-Modules (RS232, RS485, LIN...)
wIndicator-LED
wSound Transducer (Buzzer)
wHigh-Speed phys. CAN-Interface
wReset Button
wup to 70 free General-Purpose-I/Os
weight additional digital inputs
weight additional digital outputs
wOperating voltage 5V, current consumption 70 mA typ.
wMech. Dimensions: 80mm x 100mm
Optional Components
wOption RTC: battery-backed Real Time Clock
wOption ADC: 8-channel 16-bit A/D-Converter (4096mV)
wOption DAC: 2-channel 16-bit D/A-Converter (4096mV)
wOption USB: Full-speed USB2.0 Interface (uses second SCI)
wOption SDF: 2MB (16Mbit) Serial Data Flash
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Package Contents
wController Module (with options as ordered)
wTwinPEEKs Monitor program (in the MCU's Flash Memory)
wRS232 Cable (Sub-D9)
wUSB Cable (only for option /USB)
wset of header connectors (two 72-pin male headers)
wUser Manual (this document)
wSchematic Diagrams
wCD-ROM: contains assembler software, data sheets, CPU12
Reference Manual, code examples, C-Compiler (evaluation
version), etc.
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2. Quick Start
As no one likes to read lengthy manuals, we will summarize the
most important things in the following section. If you need any additio-
nal information, please refer to the more detailed sections of this
manual.
Here is how you can start:
wPlease check the board for any damages due to transportation
wConnect the Controller Module via RS232 to a PC. The connec-
tion between S12compact (interface SCI0, connector X2) and
PC is simply made using the flat ribbon cable which is in the
box.
wOn the PC, start a Terminal Program. An easy to use Terminal
Program is OC-Console, which is available at no charge from
our Website!
wSelect a baudrate of 19200 Bd. Disable all hardware or software
protocols.
wConnect a (stabilized!) power supply, e.g. here:
wGround on X4 pin 70
w+5V on X4 pin 72
wCheck voltage and polarity before making the connection!
wOnce powered up, the Monitor program will start, display a
message and await your commands.
We hope you will enjoy working with the S12compact Controller
Module!
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3. Parts Location Diagram
Place Plan - Component Side
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Solder Bridges on the solder side of the PCB
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4. Jumpers and Solder Bridges
Jumpers
There are no jumpers on the S12compact.
Solder Bridges
On the solder side of the module, the following solder bridges can
be found:
BR1: VRH
open external supply of VRH required
closed* VRH connected to VDDA (VCC) on-board
BR2: CANR
open no CAN-Bus termination on-board
closed* on-board CAN-Bus termination active
BR3: BUZZ
open Port pin PT2 freely available
closed* PT2 controls buzzer
BR4: T1IN
open Port pin TXD0 (PS1) freely available
closed* TXD0 connected to RS232 Transceiver IC3
BR5: T2IN
open Port pin PM3 freely available
closed* PM3 connected to RS232 Transceiver IC3
BR6: R1OUT
open Port pin RXD0 (PS0) freely available
closed* RXD0 connected to RS232 Transceiver IC3
* = Factory Default Setting
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BR7: R2OUT
open Port pin PM2 freely available
closed* PM2 connected to RS232 Transceiver IC3
BR8: TPOUT
open* TPOUT and /IRQ not connected
closed TPOUT connected to /IRQ, Real Time Clock IC7
can issue an interrupt
BR9: VREF
open external supply of VREF required
closed* IC10 delivers reference voltage VREF for the
16-bit A/D-Converter IC11 and the 16-Bit
D/A-Converter IC12
BR10: DFLE
open Port pin MISO1 (PH0) freely available
closed* MISO1 connected to buffer IC6B (Serial Data Flash)
BR11: USBR
open* Reset input of USB Transceiver IC15 and
system reset signal /RESET not connected
closed system /RESET also resets USB Transceiver
* = Factory Default Setting
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5. Mechanical Dimensions
The following table summarizes the mechanical dimensions of the
S12compact. The values provide a basis for the design of carrier boards
etc. Please note: Always check all mechanical dimensions using the real
hardware module!
The reference point (0,0) is located at the "south/west" corner of
the PCB. The PCB is orientated vertically, as shown in the Parts
Location Diagram (see above).
All data for holes/drills (B) refer to the center of the hole/drill,
connectors (X) are referenced by pin 1.
100,080,0PCB 3,070,0B3 97,077,0B2 97,03,0B1 23,364,4X8 23,324,4X7 92,337,8X6 3,078,1X5 3,04,5X4 86,436,4X3 93,814,8X2 3,232,2X1B 3,219,5X1A
Y
in mm
X
in mm
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6. Circuit Description
Schematic Diagram
To ensure best visibility of all details, the schematic diagram of the
S12compact controller module is provided as a separate document.
Controller Core, Power Supply
The nominal operating voltage of the MC9S12DP512 is 5V. This
MCU (IC1) has three supply pin pairs: VDDR/VSSR, VDDX/VSSX
and VDDA/VSSA. Internally, the MCU uses a core voltage of only
2.5V. The necessary voltage regulator is already included in the chip, as
well as 5V I/O-buffers for all general-purpose input/output pins. There-
fore, the MCU behaves like a 5V device from an external point of view.
There is just one exception: the signals for oscillator and PLL are based
on the core voltage und must not be driven by 5V levels. High level on
the pin VREGEN is needed to enable the internal voltage regulator.
The three terminal pairs mentioned above must be decoupled
carefully. A ceramic capacitor of at least 100nF should be connected
directly at each pair (C15, C16, C17). It is recommended to add a 10µF
(electrolytic or tantalum) capacitor per node, especially if some MCU
port pins are loaded heavily (C5, C6, C7). Special care must be taken
with VDDA, since this is the reference point (VDDA/2) for the internal
voltage regulator.
The internal core voltage appears at the pin pairs VDD1/VSS1,
VDD2/VSS2 and VDDPLL/VSSPLL, which have to be decoupled as
well (C19, C20, C21). A static current draw from these terminals is not
allowed. This is especially true for VDDPLL, which serves as the
reference point for the external PLL loop filter combination (R3, C3,
C4).
There are two MCU pins (VRH/VRL) to define the upper and
lower voltage limits for the internal analog to digital (ATD) converter.
While VRL is grounded, VRH is usually tied to VDDA. C18 is used for
decoupling. VRH can be supplied externally after opening the solder
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bridge BR1. This can be useful if the main supply is not in the desired
tolerance band or if the ATD should work with a reference value lower
than 5V. VRH must not exceed VDDA, regardless of the selected
supply mode.
The TEST pin is used for factory testing only, in an application
circuit this pin always has to be grounded.
Reset Generation
/RESET is the MCU's active low bidirectional reset pin. As an
input it initializes the MCU asynchronously to a known start-up state.
As an open-drain output it indicates that a system reset (internal to
MCU) has been triggered. The HCS12 MCUs already contain on-chip
reset generation circuitry including power-on reset, COP watchdog
timer and clock monitor. It is, however, necessary to add an external
Low Voltage Inhibit (LVI) circuit, also referred to as "reset controller".
The task of this reset controller is to issue a stable reset condition if the
power supply falls below the level required for proper MCU operation.
To prevent collisions with the bidirectional /RESET pin of the
MCU, the LVI circuit IC2 has an open-drain output. In the inactive state
it is pulled-up high by the resistor R6. The detector treshold of IC2 is
typically 4.6V, which is slightly higher than the required minimum
MCU operating voltage of 4.5V.
Furthermore, IC2 is capable of stretching the reset output to filter
out short pulses on the power supply effectively. The duration of that
delay can be selected using the capacitor C14. A value of 100nF results
in a delay of approx. 50..80ms.
It is important to note, that this delay will only be applied during a
power cycle event. IC2 will not stretch pulses coming from the MCU's
internal reset sources. This is essentially important, since otherwise the
MCU would not be able to detect the source of a reset. This would
finally lead to a wrong reset vector fetch and could result in a system
software crash. Please be aware, that also a capacitor on the reset line
would cause the same fatal effect, therefore external circuitry connected
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to the /RESET pin of a HC12/HCS12 MCU should never include a
large capacitance!
Clock Generation and PLL
The on-chip oscillator of the MC9S12DP512 can generate the
primary clock (OSCCLK) using a quartz crystal (Q1) connected
between the EXTAL and XTAL pins. The allowed frequency range is
0.5 to 16MHz. As usual, two load capacitors are part of the oscillator
circuit (C1, C2). However, this circuit is modified compared to the
standard Pierce oscillator that was used for the HC11 or most HC12
derivatives.
The MC9S12DP512 uses a Colpitts oscillator with translated
ground scheme. The main advantage is a very low current consumption,
though the component selection is more critical. The S12compact
circuit uses a 16MHz automotive quartz from NDK together with two
load capacitors of only 3.9pF. Furthermore, special care was taken for
the PCB design to introduce as little stray capacitance as possible in
respect to XTAL and EXTAL.
With an OSCCLK of 16MHz, the internal bus speed (ECLK)
becomes 8MHz by default. To realize higher bus clock rates, the PLL
has to be engaged. The MC9S12DP512 can be operated with a bus
speed of up to 25MHz, though most designs use 24MHz because this
value is a better basis to generate a wide range of SCI baud rates.
A passive external loop filter must be placed on the XFC pin. The
filter (R3, C3, C4) is a second-order, low-pass filter to eliminate the
VCO input ripple. The value of the external filter network and the
reference frequency determines the speed of the corrections and the
stability of the PLL. If PLL usage is not required, the XFC pin must be
tied to VDDPLL.
The choice of filter component values is always a compromise over
lock time and stability of the loop. 5 to 10kHz loop bandwidth and a
damping factor of 0.9 are a good starting point for the calculations.
With a quartz frequency of 16MHz and a desired bus clock of 24MHz, a
possible choice is R3 = 4.7k and C3 = 22nF. C4 should be
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approximately (1/20..1/10) x C3, e.g. 2.2nF in our case. These values
are suitable for a reference frequency of 1MHz (Note: to be defined in
example file S12_CRG.H). The according reference divider register
value is REFDV=15 and the synthesizer register setting becomes
SYNR=23. Please refer to the chapter "XFC Component Selection" in
the MC9S12DP256B Device User Guide for detailed description of
how to calculate values for other system configurations.
The following source listing shows the steps required to initialize
the PLL:
//=============================================================================
// File: S12_CRG.C - V1.00
//=============================================================================
//-- Includes -----------------------------------------------------------------
#include <mc9s12dp512.h>
#include "s12_crg.h"
//-- Code ---------------------------------------------------------------------
void initPLL(void) {
CLKSEL &= ~BM_PLLSEL; // make sure PLL is *not* in use
PLLCTL |= BM_PLLON+BM_AUTO; // enable PLL module, Auto Mode
REFDV = S12_REFDV; // set up Reference Divider
SYNR = S12_SYNR; // set up Synthesizer Multiplier
// the following dummy write has no effect except consuming some cycles,
// this is a workaround for erratum MUCTS00174 (mask set 0K36N only)
// CRGFLG = 0;
while((CRGFLG & BM_LOCK) == 0) ; // wait until PLL is locked
CLKSEL |= BM_PLLSEL; // switch over to PLL clock
}
//=============================================================================
An alternative, external clock source can be used for the
MC9S12DP512 if the internal oscillator and PLL are disabled by apply-
ing a low level to the /XCLKS pin during reset. Since this option is not
used on the S12compact Controller Module, R5 is used to pull /XCLKS
high. Please note, that other HCS12 derivatives will have different
features associated with the /XCLKS pin.
Operating Modes, BDM Support
Three pins of the HCS12 are used to select the MCU operating
mode: MODA, MODB and BKGD (=MODC). While MODA and
MODB are pulled low (R1, R2) to select Single Chip Mode, BKGD is
pulled high (R7) by default. As a consequence, the MCU will start in
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Normal Single Chip Mode, which is the most common operating mode
for application code running on the HCS12.
The HCS12 operating mode used for download and debugging is
called Background Debug Mode (BDM). BDM is active immediately
out of reset if the mode pins MODA/MODB/BKGD are configured for
Special Single Chip Mode. This is done by pulling the BKGD pin low
during reset, while MODA and MODB are pulled-down as well.
Because only the BKGD level is different for the two modes, it is
quite easy to change over. However, there is no need to switch the
BKGD line manually via a jumper or solder bridge because this can be
done by a BDM-Pod (such as ComPOD12) attached to connector X1A.
A BDM-Pod is required for BDM-based download and/or debugging
anyway, so it can handle this task automatically, usually controlled by a
PC-based debugging program.
The 6-pin header X1A uses the suggested standard BDM12
connector layout. Connector X1B carries additional MCU signals,
which are normally not needed for BDM12 debugging. Some
debuggers, however, provide additional features, which rely on the
presence of these supplemental signals.
Integrated A/D-Converter
The MC9S12DP512 contains two 10-bit Analog-to-Digital Conver-
ter modules. Each module (ATD0, ATD1) provides eight multiplexed
input channels.
VRH is the upper reference voltage for all A/D-channels. On the
S12compact, VRH is connected to VDDA (5V) through solder bridge
BR1.
After opening BR1, it is possible to use an external reference volta-
ge, which has to be applied to X5/46. For this purpose, the precision
voltage reference IC10 could be used (if present). IC10 delivers 4.096V
at X5/71.
The following example program shows the initialization sequence
for the A/D-converter module ATD0 and a single-channel conversion
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routine. The source file S12_ATD.C also contains some additional
functions for the integrated ATD module.
//=============================================================================
// File: S12_ATD.C - V1.00
//=============================================================================
//-- Includes -----------------------------------------------------------------
#include "datatypes.h"
#include <mc9s12dp512.h>
#include "s12_atd.h"
//-- Code ---------------------------------------------------------------------
// Func: Initialize ATD module
// Args: -
// Retn: -
//
void initATD0(void) {
// enable ATD module
ATD0CTL2 = BM_ADPU;
// 10 bit resolution, clock divider=12 (allows ECLK=6..24MHz)
// 2nd sample time = 2 ATD clocks
ATD0CTL4 = BM_PRS2 | BM_PRS0;
}
//-----------------------------------------------------------------------------
// Func: Perform single channel ATD conversion
// Args: channel = 0..7
// Retn: unsigned, left justified 10 bit result
//
UINT16 getATD0(UINT8 channel) {
// select one conversion per sequence
ATD0CTL3 = BM_S1C;
// right justified unsigned data mode
// perform single sequence, one out of 8 channels
ATD0CTL5 = BM_DJM | (channel & 0x07);
// wait until Sequence Complete Flag set
// CAUTION: no loop time limit implemented!
while((ATD0STAT0 & BM_SCF) == 0) ;
// read result register
return ATD0DR0;
}
//-----------------------------------------------------------------------------
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Integrated EEPROM
The internal EEPROM module of the MC9S12DP512 contains
4KB of memory. It consists of 1024 sectors with 4 bytes (32 bits) per
sector. For erasure, any single sector can be selected. Programming is
done by words (2 bytes). Read accesses can be made to any word or
byte.
After reset, the EEPROM module of the MC9S12DP512 is mapped
to address 0x0000. In the lower 1KB area (0x0000..0x03FF), control
registers take precedence over EEPROM. In order to use the full
EEPROM space, the EEPROM module can be relocated (see INITEE
control register).
In the following example, the EEPROM module is left at it's
default position. The initialization sequence just takes care for setting
up the EEPROM Clock Divider according to the quartz crystal frequen-
cy. The write function wrSectEETS() copies two words (4 bytes) from
source address src to EEPROM address dest. dest must be identical to
an EEPROM sector border (aligned 32 bit value). If the sector is not
erased (erased state = 0xFFFFFFFF), the routine will perform a sector
erase before writing to the sector.
The access functions readItemEETS() and writeItemEETS()
provide a more abstract way to deal with EEPROM contents. Instead of
using certain addresses, which must be part of the EEPROM address
range, these routines use abstract "item numbers", with each item consi-
sting of a variable amount of data (1 to 4 bytes).
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Table of contents