Embest SBC8018 User manual

SBC8018 Evaluation Board
Integrated with SATA, TF, OTG, Audio in/out, USB, Ethernet, LCD, CCD/COMS, Serial, JTAG
interface based on 32-bit microprocessor
User Manual

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Copyright © 2011 by element14
User Manual
Version update records:
Rev
Date
Description
1.0
2011.10.21
Initial version

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Copyright © 2011 by element14
User Manual
Contents
CHAPTER 1 OVERVIEW................................................................................................................. 6
1.1 PRODUCT INTRODUCTION.......................................................................................................... 6
1.2 FEATURES ................................................................................................................................ 7
CHAPTER 2 HARDWARE SYSTEM............................................................................................... 9
2.1 CPU......................................................................................................................................... 9
2.1.1 CPU Introduction.............................................................................................................. 9
2.1.2 CPU Features .................................................................................................................. 9
2.2 INTRODUCTION TO THE EXPANDED CHIP: ..................................................................................11
2.2.1 TPS65070.......................................................................................................................11
2.2.2 K9F1G08U0B..................................................................................................................11
2.2.3 H5MS1G62MFP............................................................................................................. 12
2.2.4 DM9161.......................................................................................................................... 12
2.2.5 TLV320AIC33IRGZR...................................................................................................... 12
2.2.6 MAX3232 ....................................................................................................................... 12
2.3 HARDWARE INTERFACE ........................................................................................................... 13
2.3.1 Power Input Jack............................................................................................................ 13
2.3.2 Power Output Interface.................................................................................................. 14
2.3.3 Power Switch ................................................................................................................. 14
2.3.4 TFT_LCD Interface ........................................................................................................ 14
2.3.5 AUDIO OUTPUT Jack.................................................................................................... 16
2.3.6 Camera Interface........................................................................................................... 17
2.3.7 MIC IN Jack.................................................................................................................... 18
2.3.8 Serial Ports..................................................................................................................... 18
2.3.9 LAN Interface................................................................................................................. 19
2.3.10 SATA Interface ............................................................................................................. 19
2.3.11 USB OTG Interface...................................................................................................... 20
2.3.12 USB HOST Interface.................................................................................................... 21
2.3.13 TF Card Interface......................................................................................................... 21

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2.3.14 JTAG Interface............................................................................................................. 22
2.3.15 Expansion Interface..................................................................................................... 22
2.3.16 DIP Switch.................................................................................................................... 25
2.3.17 KEY Switch .................................................................................................................. 26
2.3.18 LEDs............................................................................................................................. 26
CHAPTER 3 LINUX OPERATING SYSTEM................................................................................. 27
3.1 INTRODUCTION........................................................................................................................ 27
3.2 SOFTWARE RESOURCES ......................................................................................................... 27
3.3 BOARD SUPPORT PACKAGE (BSP) FEATURES ......................................................................... 28
3.4 SYSTEM DEVELOPMENT .......................................................................................................... 29
3.4.1 How to Setup Operating System Development Environment ....................................... 29
3.4.2 System Compilation....................................................................................................... 30
3.4.3 System Customization................................................................................................... 33
3.5 HOW TO UPDATE THE SYSTEM IMAGE ...................................................................................... 37
3.5.1 Boot-up From Serial Port............................................................................................... 37
3.5.2 How Update Images From Ethernet.............................................................................. 38
3.6 TEST PROCEDURES ................................................................................................................ 42
3.6.1 Various Tests Scenario................................................................................................... 42
3.7APPLICATION DEVELOPMENT................................................................................................... 51
CHAPTER 4 WINCE OPERATING SYSTEM................................................................................ 53
4.1 INTRODUCTION........................................................................................................................ 53
4.2 SOFTWARE RESOURCES ......................................................................................................... 53
4.3 SOFTWARE FEATURES ............................................................................................................ 54
4.4 SYSTEM DEVELOPMENT .......................................................................................................... 56
4.4.1 Installation of IDE(Integrated Development Environment)............................................ 56
4.4.2 Extract BSP and project files to IDE.............................................................................. 56
4.4.3 Sysgen & Build BSP ...................................................................................................... 57
4.4.4 Source code path of all drivers in BSP.......................................................................... 58
4.5 HOW TO UPDATE SYSTEM IMAGE............................................................................................. 60

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4.5.1 Downloading EBOOT to NAND Flash ........................................................................... 60
4.5.2 Update TF Card NK runtime images ............................................................................. 63
4.5.3 Downloading NK.bin to NAND flash .............................................................................. 71
4.6 USER INSTRUCTIONS .............................................................................................................. 75
4.6.1 How to use Power Management.................................................................................... 75
4.6.2 How to use CAM8000-Amodule.................................................................................... 76
4.7 SBC8018WINDOWS CE 6.0WIN32APIAPPLICATION DEVELOPMENT DEMO ............................ 77
APPENDIX ..................................................................................................................................... 78
APPENDIX I: HARDWARE DIMENSIONS............................................................................................ 78
APPENDIX II: THE INSTALLATION OF UBUNTU ................................................................................. 79
APPENDIX III: DRIVER INSTALLATION FOR LINUX USB ETHERNET/RNDIS GADGET ......................... 94
APPENDIX IV:THE SETUP OF TFTPSERVER................................................................................. 97
CUSTOMER SERVICE & TECHNICAL SUPPORT...................................................................... 99
CUSTOMER SERVICE..................................................................................................................... 99
TECHNICAL SUPPORT ................................................................................................................... 99
NOTES.......................................................................................................................................... 99

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Chapter 1 Overview
1.1 Product Introduction
The SBC8018 evaluation board is a compact, low-cost with high-performance evaluation board
based on Texas instruments (TI) AM1808 microprocessor. AM1808 is an integration of 375 MHz
ARM9 low-power application processor with 128K-Byte On-the chip memory, and provided lots of
peripheral interface. SBC8018 board expands the hardware capabilities including LAN port, audio
input/output interface, USB OTG, USB HOST, SATA interface, TF slot, serial port, JTAG interface,
camera interface, TFT LCD interface, touch screen interface and keyboard interface.
SBC8018 board can be used for the following applications:
Intelligent instrument
Service point
Educational plant
Portable data terminal
Placeholder intelligent sensor
A formal data terminal
Industrial Control
Home Automation

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Figure 1-1 SBC8018 Evaluation Board Functional Block Diagram
1.2 Features
SBC8018 evaluation board is based on AM1808 processor and is one compact board which
integrates all functions and features of TI’s AM1808 ARM9 processor. Some of the board features
are mentioned below:
Mechanical Parameters
Working temperature: 0°C ~ 70°C
Humidity Range: 20% ~ 90%, non-condensable
Dimensions: 112.24mm x 82.29mm
Power Consumption: [email protected] (working without LCD)
Power Input: +5V/2A
Processor
375-MHzARM926EJ-S™ RISC Core
ARM926EJ-S Core
Memory
128MB NAND Flash

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128MB Mobile DDR
Audio/Video Interfaces
An audio Microphone input interface (3.5mm audio jack, red)
A two-channel audio line output interface (3.5mm audio jack, green)
ATFT-LCD interface (24 bit color, 1.8 V logic, with touch screen)
Data Transfer Interface
Serial port:
UART1, 3 line serial port, TTL based voltage
UART2, 3 line serial port, TTL based voltage
UART3, 5 line serial port, RS232 based voltage
1 x USB 2.0 OTG interface (OTG connector)
1 x USB1.1 Interface (Type A)
10/100Mbps Ethernet Interface (RJ45 jack)
1 channel TF card slot
1 channel SATA interface (supports both SATA I (1.5 Gbps) and SATA II (3.0 Gbps))
1 channel 14-pin JTAG interface
Multi-functional expand interface(IIC, SPI, MCBSP, UART, 1.8V, 3.3V, 5V, GPIO, EMA)
Input Interface
2 x Camera interfaces (8 bit, 1.8 V logic)
4 buttons (RESET,BACK,HOME,MENU)
LED
1 Power LED
3 User LEDs

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Chapter 2 Hardware System
2.1 CPU
2.1.1 CPU Introduction
The AM1808 microprocessor contains an ARM RISC CPU for general-purpose processing and
systems control. The AM1808 ARM microprocessor consists of the following primary components:
ARM926EJ-S RISC processor core and associated memories
A set of I/O peripherals
A powerful DMA subsystem and SDRAM EMIF interface
2.1.2 CPU Features
Clock
The OSCIN/ OSCOUT system input clock (24 MHz) is used to generate the main source clock for
the device. It also provides the DPLLs to several CPU other modules.
Reset
The function of reset is determined by the input signal on RESETN pin of the CPU, Reset is
enabled when LOW level signal (high to low) is given.
ARM Subsystem
The ARM Subsystem includes the following features:
ARM926EJ-S RISC processor
ARMv5TEJ (32/16-bit) instruction set
Little endian
System Control Co-Processor 15 (CP15)
MMU
16KB Instruction cache
16KB Data cache
Write Buffer
Embedded Trace Module and Embedded Trace Buffer (ETM/ETB)
ARM Interrupt controller

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ARM926EJ-S RISC CPU
The ARM Subsystem integrates the ARM926EJ-S processor. The ARM926EJ-S processor is a
member of ARM9 family of general-purpose microprocessors. This processor is targeted at
multi-tasking applications where full memory management, high performance, low die size, and
low power are all important. The ARM926EJ-S processor supports the 32-bit ARM and 16 bit
THUMB instruction sets, enabling the user to trade off between high performance and high code
density. Specifically, the ARM926EJ-S processor supports the ARMv5TEJ instruction set, which
includes features for efficient execution of Java byte codes, providing Java performance similar to
Just in Time (JIT) Java interpreter, but without associated code overhead.
The ARM926EJ-S processor supports the ARM debug architecture and includes logic to assist in
both hardware and software debug. The ARM926EJ-S processor has a Harvard architecture and
provides a complete high performance subsystem, including:
ARM926EJ -S integer core
CP15 system control coprocessor
Memory Management Unit (MMU)
Separate instruction and data caches
Write buffer
Separate instruction and data (internal RAM) interfaces
Separate instruction and data AHB bus interfaces
Embedded Trace Module and Embedded Trace Buffer (ETM/ETB)
ARM Internal Memory
8 KB RAM
64 KB built-in ROM
Embedded Trace Module and Embedded Trace Buffer (ETM/ETB)

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Figure 2-1 ARM Subsystem
2.2 Introduction to the Expanded Chip:
2.2.1 TPS65070
The TPS6507x are single chip Power Management IC, the charger can either be supplied by a
USB port on pin USB or by a DC voltage from a wall adapter connected to pin. Three highly
efficient 2.25MHz step-down converters are targeted at providing the core voltage, memory and
I/O voltage in a processor based system. The step-down converters allow the use of small
inductors and capacitors to achieve a small solution size.
The TPS6507x also integrate two general purpose LDOs for an output current of 200mA. These
LDOs can be used to power a TF-card interface and an always-on rail, but can be used for other
purposes as well. Each LDO operates with an input voltage range between 1.8V and 6.3V allowing
them to be supplied from one of the step-down converters or directly from the main battery.
2.2.2 K9F1G08U0B
The K9F1G08U0B is the 128MB NAND flash memory chips used in SBC8018 evaluation board.
This NAND Flash chip is directly interfaced to the CPU for faster memory access and read/write
cycles.

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2.2.3 H5MS1G62MFP
The H5MS1G62MFP-K3M is the 128MB DDR memory chip used in SBC8018 evaluation board,
This DDR RAM is connected directly the CPU DDR/SDRAM interface for faster memory access.
2.2.4 DM9161
The DM9161 is a fully integrated and cost-effective low pin count single chip Fast Ethernet
controller with a general processor interface, a 10/100M PHY and 4K DWORD SRAM. It is
designed with low power and high performance process that support 3.3V with 5V I/O tolerance.
SBC8018 uses 10/100M adaptive network interface of DM9161, in which, the 10/100M Ethernet
module is compatible to IEEE 802.3 standard protocol. The cable interface used is a standard
RJ45 cable, with a connection indicator and a transmission indicator.
2.2.5 TLV320AIC33IRGZR
The TLV320AIC33IRGZR is a low-power stereo audio codec with stereo headphone amplifier, as
well as ten audio inputs and seven audio outputs programmable in single-ended or fully differential
configurations. Extensive register enabling the stereo 48 kHz DAC playback as low as 15 mw from
a 3.3V analog supply, making it ideal for portable battery-powered audio and telephony
applications.
The playback path includes mix/mux capability from the stereo DAC and selected inputs, through
programmable volume controls, to the various outputs. TLV320AIC33IRGZR has Ten Audio Input
Pins and Seven Audio Output Drivers.
2.2.6 MAX3232
The function of MAX3232 is mainly to convert TTL logic level signal to RS232 logic level, which
helps the board at TTL logic to interface with PC working at RS232 logic level. The SBC8018
evaluation board uses UART2 as debugger serial port; the default voltage for this UART2 is 1.8V,

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it is necessary to convert this voltage from 1.8V to 3.3V in order to connect the board to the eternal
world.
.
2.3 Hardware Interface
The following section provides you the detailed information on the peripherals, with the pin
description, and its functionality available on SBC8018 evaluation board.
Figure 2-2 Hardware Interface chart
2.3.1 Power Input Jack
Table 2-1 power input interface
J40
Pin
Signal
Function
1
GND
GND
2
NC
NC
3
+5V
Power supply (+5V) 2A(Type)

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2.3.2 Power Output Interface
Table 2-2 power output interface
J18
Pin
Signal
Function
1
+5V
5V output
2
GND
GND
2.3.3 Power Switch
Table 2-3 power switch
SW1
Pin
Signal
Function
1
DC IN
VDD Input
2
+5VDC_IN
+5V
3
NC
NC
2.3.4 TFT_LCD Interface
Table 2-4 TFT_LCD interface
J1
Pin
Signal
Function
1
B_NU0
Test Point
2
B_NU1
Test Point
3
B_NU2
Test Point
4
LCD_D0
LCD data bit0
5
LCD_D1
LCD data bit1
6
LCD_D2
LCD data bit2
7
LCD_D3
LCD data bit3
8
LCD_D4
LCD data bit4
9
GND
GND

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10
G_NU0
Test Point
11
G_NU1
Test Point
12
LCD_D5
LCD data bit5
13
LCD_D6
LCD data bit6
14
LCD_D7
LCD data bit7
15
LCD_D8
LCD data bit8
16
LCD_D9
LCD data bit9
17
LCD_D10
LCD data bit10
18
GND
GND
19
R_NU0
Test Point
20
R_NU1
Test Point
21
R_NU2
Test Point
22
LCD_D11
LCD data bit11
23
LCD_D12
LCD data bit12
24
LCD_D13
LCD data bit13
25
LCD_D14
LCD data bit14
26
LCD_D15
LCD data bit15
27
GND
GND
28
R_LCD_DEN
LCD AC bias enable chip select
29
R_LCD_HSYNC
LCD vertical sync
30
R_LCD_VSYNC
LCD horizontal sync
31
GND
GND
32
R_LCD_DCLK
LCD Pixel Clock
33
GND
GND
34
TOUCH_X1
Input 1 to the x-plate for the touch screen
35
TOUCH_X2
Input 2 to the x-plate for the touch screen
36
TOUCH_Y1
Input 1 to the y-plate for the touch screen
37
TOUCH_Y2
Input 2 to the y-plate for the touch screen
38
R_LCD_SPICLK
SPI clock
39
R_LCD_MOSI
Slave data in, master data out

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40
R_LCD_MISO
Slave data out, master data in
41
R_LCD_SPICS
SPI enable
42
IIC_CLK
IIC master serial clock, NC
43
IIC_DAT
IIC serial bidirectional data, NC
44
GND
GND
45
+1P8V_LDO
+1.8V
46
+3P3V
+3.3V
47
+5VDC_IN
+5V
48
+5VDC_IN
+5V
49
RESET
+1.8V
50
R_LCD_PWREN
Power on enable
2.3.5 AUDIO OUTPUT Jack
Table 2-5 Audio out interface
J38
Pin
Signal
Function
1
GND
GND
2
LINE_OUT_LP
Left output
3
LINE_OUT_RP
Right output
4
LINE_OUT_RP
Right output
5
LINE_OUT_LP
Left output

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2.3.6 Camera Interface
Table 2-6 camera interface
J35,J43
Pin
Signal
Function
1
GND
GND
2
D0
Test Point
3
D1
Test Point
4
R_CAM_D0
VPIF capture data bit 0
5
R_CAM_D1
VPIF capture data bit 1
6
R_CAM_D2
VPIF capture data bit 2
7
R_CAM_D3
VPIF capture data bit 3
8
R_CAM_D4
VPIF capture data bit 4
9
R_CAM_D5
VPIF capture data bit 5
10
R_CAM_D6
VPIF capture data bit 6
11
R_CAM_D7
VPIF capture data bit 7
12
D10
Test Point
13
D11
Test Point
14
GND
GND
15
PCLK
Pixel clock
16
GND
GND
17
CAM_HS_A0
Horizontal synchronization
18
+5VDC_IN
5V
19
CAM_VS_A0
Vertical synchronization
20
+3P3V
3.3V
21
CAM_XCLKA_A0
Test Point
22
CAM_XCLKB_A0
Test Point
23
GND
GND
24
CAM_FLD_A0
Test Point
25
uP_CAM_WEN0
Test Point
26
uP_CAM_STR
Test Point

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27
CAM_SDA
I2C0 serial data
28
CAM_SCL
I2C0 serial clock
29
GND
GND
30
+1P8V_LDO
1.8V
2.3.7 MIC IN Jack
Table 2-7 MIC IN interface
J39
Pin
Signal
Function
1
GND
GND
2
LINE_IN_LP
Left input
3
LINE_IN_RP
Right input
4
LINE_IN_RP
Right input
5
LINE_IN_LP
Left input
2.3.8 Serial Ports
Table 2-8 serial port
J9
Pin
Signal
Function
1
NC
NC
2
RSA_RXD
Receive data
3
RSA_TXD
Transit data
4
NC
NC
5
GND
GND
6
NC
NC
7
RSA_RTS
Request To Send
8
RSA_CTS
Clear To Send
9
NC
NC
10
GND
GND
11
GND
GND

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2.3.9 LAN Interface
Table 2-9 LAN interface
J58
Pin
Signal
Function
1
LAN_TX+
TX+ output
2
LAN_TX-
TX- output
3
CT
Link to analog transmit power input with
0R resistance
4
4&5
Transformer
5
7&8
Transformer
6
CT
Link to analog transmit power input with
0R resistance
7
LAN_RX+
RX+ input
8
LAN_RX-
RX- input
9
YEL
Link LED
10
VDD
3.3V Power for LED
11
GRN
Speed LED
12
VDD
3.3V Power for LED
13
CHGND
GND
14
CHGND
GND
15
NC
NC
16
NC
NC
2.3.10 SATA Interface
Table 2-10 SATAinterface
J32
Pin
Signal
Function
1
GND
GND
2
SATA_TXP
SATA receive data(positive)

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3
SATA_TXN
SATA receive data(negative)
4
GND
GND
5
SATA_RXN
SATA transmit data(negative)
6
SATA_RXP
SATA transmit data(positive)
7
GND
GND
8
NC
NC
9
GND
GND
2.3.11 USB OTG Interface
Table 2-11 USB OTG interface
J34
Pin
Signal
Function
1
USB0_VBUS
+5V
2
USB0_D-
USB Data-
3
USB0_D+
USB Data+
4
ID
USB ID
5
GND
GND
6
G2
GND
7
G3
GND
8
G4
GND
9
G5
GND
10
G6
GND
11
NC
NC
12
NC
NC