Endace DAG 3.7T User manual

DAG 3.7T Card User Guide
EDM01-12

EDM01-12v18 DAG_3.7T_Card_User_Guide
©2005-2008 Endace Technology Ltd. Confidential - Version 18 - November 2008
Protection Against Harmful Interference
When present on equipment this manual pertains to, the statement "This device complies with part 15 of the FCC
rules" specifies the equipment has been tested and found to comply with the limits for a Class A digital device,
pursuant to Part 15 of the Federal Communications Commission [FCC] Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment.
This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in
accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will
be required to correct the interference at their own expense.
Extra Components and Materials
The product that this manual pertains to may include extra components and materials that are not essential to its
basic operation, but are necessary to ensure compliance to the product standards required by the United States
Federal Communications Commission, and the European EMC Directive. Modification or removal of these
components and/or materials, is liable to cause non compliance to these standards, and in doing so invalidate the
user’s right to operate this equipment in a Class A industrial environment.
Disclaimer
Whilst every effort has been made to ensure accuracy, neither Endace Technology Limited nor any employee of
the company, shall be liable on any ground whatsoever to any party in respect of decisions or actions they may
make as a result of using this information.
Endace Technology Limited has taken great effort to verify the accuracy of this manual, but nothing herein should
be construed as a warranty and Endace shall not be liable for technical or editorial errors or omissions contained
herein.
In accordance with the Endace Technology Limited policy of continuing development, the information contained
herein is subject to change without notice.
Website
Copyright 2005-2008 Endace Technology Ltd. All rights reserved.
http://www.endace.com
No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any
means electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of the
Endace Technology Limited.
Endace, the Endace logo, Endace Accelerated, DAG, NinjaBox and NinjaProbe are trademarks or registered
trademarks in New Zealand, or other countries, of Endace Technology Limited. Applied Watch and the Applied
Watch logo are registered trademarks of Applied Watch Technologies LLC in the USA. All other product or
service names are the property of their respective owners. Product and company names used are for identification
purposes only and such use does not imply any agreement between Endace and any named company, or any
sponsorship or endorsement by any named company.
Use of the Endace products described in this document is subject to the Endace Terms of Trade and the Endace
End User License Agreement (EULA).

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Contents
Introduction 1
Overview .....................................................................................................................................................................1
Card Features..............................................................................................................................................................1
Purpose of this User Guide .......................................................................................................................................2
System Requirements................................................................................................................................................. 2
General ...................................................................................................................................................................2
Operating System ................................................................................................................................................. 2
Other Systems........................................................................................................................................................ 2
Card Description ........................................................................................................................................................ 3
Battery removal – don’t do it! .............................................................................................................................3
Card Architecture.......................................................................................................................................................4
Line Types ...................................................................................................................................................................5
Overview................................................................................................................................................................ 5
Supported Options ............................................................................................................................................... 5
Extended Functions....................................................................................................................................................6
Installation 7
Introduction ................................................................................................................................................................7
DAG Software package .............................................................................................................................................7
Inserting the DAG Card ............................................................................................................................................7
Port Connectors .......................................................................................................................................................... 8
External pod housing................................................................................................................................................. 8
External Pod ..........................................................................................................................................................9
Pod rackmount chassis....................................................................................................................................... 10
Configuring the DAG card 19
Introduction .............................................................................................................................................................. 19
Before configuring the DAG card..................................................................................................................... 19
Firmware images ................................................................................................................................................ 19
Setting up the FPGA ................................................................................................................................................ 20
Programming the FPGA .................................................................................................................................... 20
dagrom ................................................................................................................................................................. 21
Loading new firmware images onto a DAG Card ......................................................................................... 22
Preparing the DAG card for use............................................................................................................................. 22
Configuring the DAG card...................................................................................................................................... 23
Display Current Configuration......................................................................................................................... 23
Configuring the Links ........................................................................................................................................ 24
dagconfig tokens explained............................................................................................................................... 27
dagconfig options ............................................................................................................................................... 32
dagthree options ................................................................................................................................................. 33
Viewing the DAG card status ................................................................................................................................. 34
Interface Status.................................................................................................................................................... 34
Configuring HDLC Connections 37
Configuration File .................................................................................................................................................... 37
Multiple Interfaces.............................................................................................................................................. 37
Receive/Transmit..................................................................................................................................................... 38
Transmitting Packets................................................................................................................................................ 38
Connection ID ........................................................................................................................................................... 38
HDLC Connections............................................................................................................................................. 38
RAW Connections .............................................................................................................................................. 38
Output Record Formats........................................................................................................................................... 39
Connection Types..................................................................................................................................................... 39
Hyper-Channel Connection .............................................................................................................................. 39
Timeslot Connection........................................................................................................................................... 39

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Sub-channel Connection.................................................................................................................................... 40
Line Connection.................................................................................................................................................. 40
RAW Connection................................................................................................................................................ 40
Line RAW Connection....................................................................................................................................... 40
Channel RAW Connection................................................................................................................................ 40
Hyper-Channel RAW Connection ................................................................................................................... 40
Sub-Channel RAW Connection ........................................................................................................................ 41
Delete Connection .............................................................................................................................................. 41
Configuring ATM Connections 43
Overview................................................................................................................................................................... 43
Configuration File .................................................................................................................................................... 43
Multiple Interfaces ............................................................................................................................................. 43
Receive/Transmit .................................................................................................................................................... 44
Transmitting Packets ............................................................................................................................................... 44
Output Record Formats .......................................................................................................................................... 44
Connection Types .................................................................................................................................................... 45
Hyper-Channel Connection .............................................................................................................................. 45
Timeslot Connection .......................................................................................................................................... 45
Line Connection.................................................................................................................................................. 45
ATM Scrambling on Interface........................................................................................................................... 46
HEC Connection on Interface ........................................................................................................................... 46
Delete Connection .............................................................................................................................................. 46
Configuring Mixed ATM and HDLC Connections 47
Using Mixed Firmware ........................................................................................................................................... 47
Using your DAG card to capture data 49
Introduction .............................................................................................................................................................. 49
Basic data capture .................................................................................................................................................... 49
Starting a capture session .................................................................................................................................. 49
dagsnap................................................................................................................................................................ 50
Capturing data at high speed ........................................................................................................................... 51
Viewing captured data ............................................................................................................................................ 52
dagbits.................................................................................................................................................................. 52
Converting captured data....................................................................................................................................... 54
Dagconvert .......................................................................................................................................................... 55
Using third party applications ............................................................................................................................... 56
Transmitting captured data.................................................................................................................................... 56
Configuration...................................................................................................................................................... 56
Explicit Packet Transmission ............................................................................................................................ 56
Trace Files............................................................................................................................................................ 57
Configuring Extended Functions 59
Overview................................................................................................................................................................... 59
Loading the Images............................................................................................................................................ 59
Starting the XScale.............................................................................................................................................. 59
Directing Data to the XScale ............................................................................................................................. 60
Using the AAL Reassembler.................................................................................................................................. 60
Using IMA................................................................................................................................................................. 61
Overview ............................................................................................................................................................. 61
IMA Monitor ....................................................................................................................................................... 61
IMA Transmit...................................................................................................................................................... 62
Using the HDLC Filter ............................................................................................................................................ 63
Using HDLC and IMA Together............................................................................................................................ 63
Synchronizing Clock Time 65
Overview................................................................................................................................................................... 65

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DUCK Configuration ............................................................................................................................................... 65
Common Synchronization ...................................................................................................................................... 65
Network Time Protocol ........................................................................................................................................... 66
Timestamps ............................................................................................................................................................... 67
Example................................................................................................................................................................ 67
Dagclock .................................................................................................................................................................... 68
Dagclock Statistics reset ..................................................................................................................................... 69
Dagclock output explained................................................................................................................................ 70
Card with Reference................................................................................................................................................. 72
Overview.............................................................................................................................................................. 72
Pulse Signal from External Source.................................................................................................................... 72
Connecting the Time Distribution Server........................................................................................................ 72
Testing the Signal................................................................................................................................................ 72
Single Card No Reference ....................................................................................................................................... 73
Two Cards No Reference......................................................................................................................................... 74
Overview.............................................................................................................................................................. 74
Synchronizing with Each Other........................................................................................................................ 74
Synchronizing with Host ................................................................................................................................... 75
Connector Pin-outs................................................................................................................................................... 76
Overview.............................................................................................................................................................. 76
Pin Assignments ................................................................................................................................................. 76
Data Formats 77
Overview ................................................................................................................................................................... 77
Generic ERF Header................................................................................................................................................. 78
ERF 5. TYPE_MC_HDLC ........................................................................................................................................ 80
ERF 6. TYPE_MC_RAW .......................................................................................................................................... 81
ERF 7. TYPE_MC_ATM........................................................................................................................................... 82
ERF 8. TYPE_MC_RAW_CHANNEL.................................................................................................................... 83
ERF 9. TYPE_MC_AAL5 ......................................................................................................................................... 84
ERF 12. TYPE_MC_AAL2 ....................................................................................................................................... 85
Extension Headers (EH) .......................................................................................................................................... 86
Introduction......................................................................................................................................................... 86
Troubleshooting 87
Reporting Problems ................................................................................................................................................. 87
Version History 89

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Introduction
Overview
The Endace DAG 3.7T Card is optimized for monitoring and interception with precise
timestamping capability on up to 16 T1/E1 network links. The DAG card actively manages
the movement of network data into memory while only consuming a minimal amount of the
host computers resources.
The DAG 3.7T is a 16 port, PCI card that allows capture and transmission of data.
Supported protocols include raw data (unmapped/unframed), HDLC and ATM over as
many as 512 sub-channels, channels and hyper-channels. The DAG 3.7T also supports
Inverse Multiplex ATM (IMA) link aggregation, AAL2 and AAL5 segmentation and
reassembly, and frame (HDLC), cell (ATM) and packet (AAL2/5) filtering based on user-
defined filter rules. An onboard Intel® XScale™ processor provides the means to pre-process
data prior to presentation to the monitoring software (or prior to transmission over a T1/E1
link).
Card Features
The following features are available on this DAG card. Note: Different firmware images
may be required. Not all features are available on each firmware image. For further
information on which feature is available in what firmware image, see Firmware images
19 (page ).
•ATM
•HDLC
•RAW E1/T1/J1
•IMA
•AAL2 and AAL5
•TERF

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Purpose of this User Guide
The purpose of this User Guide is to provide you with an understanding of the DAG 3.7T
card architecture, functionality and to guide you through the following:
•Installing the card and associated software and firmware
•Configuring the card for your specific network requirements
•Running a data capture session
•Synchronizing clock time
•Data formats
You can also find additional information relating to functions and features of the DAG 3.7T
card in the following documents which are available from the Support section of the Endace
website at http://www.endace.com
•EDM04-01 DAG Software Installation Guide
:
•EDM04-03 dagflood User Manual
•EDM04-06 Daggen User Guide
•EDM04-08 Configuration and Status API Programming Guide
•EDM04-12 DAG 3.7T HDLC Filtering Guide
•EDM04-13 SAR API Programming Guide
•EDM04-18 IMA Host API Programming Guide
•EDM04-19 DAG Programming Guide
•EDM05-01 Time Distribution Server User Guide
•PN01-13 DAG Card Quick Start Guide
This User Guide and the EDM04-01 DAG Software Installation Guide are also available in PDF
format on the installation CD shipped with your DAG 3.7T card.
System Requirements
General
The minimum system requirements for the DAG 3.7T card are:
•A computer, with at least a Intel Xeon 1.8GHz or faster and a minimum of 1GB RAM.
•At least one free PCI 2.1 slot supporting 33MHz operation.
•Software distribution requires 60MB free space.
•For details of the supported operating systems, see one of the following documents:
•EDM04-01 DAG Software Installation Guide
•Current release notes - See the Documentation CD or the Endace support website
at https://www.endace.com/support
.
Operating System
This document assumes you are installing the DAG 3.7T card in a computer which already
has an operating system installed. To install refer to EDM04-01 DAG Software Installation
Guide. All related documentation is included on the CD shipped with the DAG 3.7T card.
Other Systems
For advice on using an operating system that is substantially different from any of those
specified above, please contact Endace Customer Support at [email protected].

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Card Description
The DAG 3.7T cards are PCI bus cards designed for cell and packet capture and generation
over IP networks. The key features of the card are:
•Support for 16 RJ-45 T1/E1 network interfaces in an external pod housing.
•A Spartan III FPGA supporting high-performance Endace firmware,
•An Intel 80321 XScale IO processor which supports AAL2/AAL5 reassembly or
inverse multiplexing over ATM (IMA) and filtering services,
•Support for receiving and sending channelized, unchannelized, and fractional T1/E1,
HDLC and non-HDLC data traffic,
•Support for data traffic filtering.
Battery removal – don’t do it!
Removing the battery from a DAG card voids your warranty.
Removing the battery from a DAG card will cause the loss of encryption key used to decode
the DAG card's firmware. Once the encryption key is lost the DAG card must be returned to
Endace for reprogramming.
The battery in this product is expected to last a minimum of 10 years.
Caution
Risk of explosion if the battery is replaced by an incorrect type.
Dispose of used batteries carefully.

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Card Architecture
T1 or E1 data is received on up to 16 x RJ-45 interfaces, and passes through line interface
units. It then feeds immediately into the FPGA for deframing and demapping into ATM or
HDLC frames.
The FPGA contains a Packet processor and the DAG Universal Clock Kit (DUCK) timestamp
engine. The DUCK provides high resolution per packet timestamps which can be accurately
synchronized. Time stamped packet records are then stored in the lower FIFO.
Note: For further information on the time synchronization see Synchronizing Clock Time
65 (page ) later in this User Guide.
An Intel 80321 XScale processor is logically located next to the main FPGA. The XScale
processor provides the facility to pre-process data before it is presented to the host, or before
being transmitted over an E1/T1 link. It can also facilitate hostless operation via an
embedded Linux kernel.
The main FPGA can route packets to either the XScale processor before routing onto the host,
or directly to the host via the PCI port.
The diagram below shows the card’s major components and the flow of data.

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Line Types
It is important that you understand the physical characteristics of the network to which you
want to connect. If your configuration settings do not match your network, the DAG 3.7T
card will not function as expected.
Overview
Endace DAG 3.7T card provides the means to transfer data at the full speed of the network
into the memory of the host computer, with zero packet loss guaranteed in even worst-case
conditions. Further, unlike a Network Interface Card (NIC), Endace products actively
manage the movement of network data into memory while only consuming a minimal
amount of the host computer's resources. The full attention of the CPU remains focused on
the analysis of incoming data without a constant stream of interruptions as new packets
arrive from the network. For a busy network link, this feature has a turbo-charging effect
similar to that of adding a second CPU to the system.
The DAG 3.7T is a Network Monitoring Interface Card specifically designed to perform high
efficiency monitoring and transmission with precision timestamping capability on up to
sixteen T1/E1 network links.
The flexibility provided by the Exar chips means that the card will accept a wide range of
settings. However if they are not the correct settings for your network the card will not
function as expected.
Note: If you are unsure about which of the options listed below to apply to your network,
please contact your Network Administrator for further information.
Supported Options
The line characteristics supported by the DAG 3.7T card are described below.
Line Type:
•E1: European digital standard 2 Mbps,
•E1 CRC: E1 with cyclic redundancy check,
•T1: North American digital standard 1.544 Mbps,
•T1 SF: Super frame, (also called D4 framing). An SF is 12 frames long,
•T1 ESF: Extended super frame, (also called D5 framing), includes CRC and bandwidth
for a data link channel. An ESF is 24 frames long.
Encoding Type:
•B8ZS: Bipolar with Eight Zero Substitution (T1 only)/HDB3 Hi-density Bipolar Three
zeros(E1 only),
•AMI: Alternate Mark Inversion.
Cable Termination Types:
•Externally terminated,
•75Ω unbalanced coaxial cable (E1 only),
•100Ω balanced twisted pair (T1 only),
•120Ω balanced twisted pair (E1 only).
Signal Attenuation:
•Maximum receiver gain of 36dB for T1.
•Maximum receiver gain of 43dB for E1.

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Extended Functions
The DAG 3.7T card supports the following extended functions:
•AAL2/AAL5 segmentation and reassembly
•Inverse Multiplexing ATM (IMA)
•HDLC Filtering (see EDM04-12 DAG 3.7T HDLC Filtering Guide)
These functions are described in more detail in Using your DAG card to capture data
49
(page
) later in this User Guide and also in the following documents available from Endace
Customer Support at [email protected]
:

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Installation
Introduction
A DAG 3.7T card can be installed in any free PCI slot. It is 5V tolerant and operates only in
32-bit 33MHz PCI mode.
If you install the card into a slot that is rated for higher speeds it will cause the bus to
automatically change to 33MHz. This will also affect any other devices which may be sharing
the bus.
You can run multiple DAG 3.7T cards on one bus. By default, the DAG driver supports up to
four DAG cards in one system.
DAG Software package
The latest DAG Software package must be installed before you install the DAG 3.7T card
itself. See EDM04-01 DAG Software Installation Guide, which is included on the CD shipped
with the DAG 3.7T card.
Inserting the DAG Card
Caution:
It is very important to protect both the computer and the DAG 3.7T card from
damage by electro-static discharge (ESD). Failure to do so could cause damage to
components and subsequently cause the card to partially or completely fail.
1. Turn power to the computer OFF.
2. Remove the PCI bus slot screw and cover.
3. Using an approved ESD protection device attach the end with the strap to your wrist
and pull or clip firmly so there is firm contact with your wrist.
4. Securely attach the clip on the other end of the strap to a solid metal area on the
computer chassis as shown below.
5. Insert the DAG 3.7T card into PCI bus slot ensuring it is firmly seated.
6. If this DAG card requires an external power supply, complete the following steps:
a. Connect the supplied (or equivalent) power cable to the external power connector
on the DAG card.
b. Connect the cable to the appropriate power connector on your server's power
supply unit.
7. Check the free end of the card fits securely into the card-end bracket that supports the
weight of the card.
8. Secure the card with the bus slot cover screw.
9. Turn power to the computer ON.
10. Ensure the blue (FPGA successfully programmed) LED on the DAG card illuminates.

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Port Connectors
Before you begin to configure the DAG card it is important to understand the function of the
various LEDs associated with the card, as well as the sockets on the PCI bracket.
There is an 8-pin RJ-45 PPS input socket located below the SFP connectors on the PCI bracket.
This is available for connection to an external time synchronization source only.
Caution:
Never connect an Ethernet network or telephone line to the RJ-45 PPS input socket.
External pod housing
There are two forms of external Pod housing that are available:
•an external Pod case - housed in a 5.25 inch drive bay housing. For further details see
External Pod 9(page ).
•a Pod rackmount chassis - a 1U, 19 in rack housing. For further details see Pod
Chassis 10(page ).

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External Pod
Note: You can connect only one Pod to the DAG 3.7T card at any one time.
You can mount the DAG 3.7T Pod either:
•internally in a spare 5.25 inch drive bay in the computer chassis, or
Use the supplied VHDCI ribbon cable.
•sit it separately outside of the computer chassis.
Use a shielded VHDCI ribbon cable rather than the supplied ribbon cable.
The Pod and the DAG 3.7T card connect via a VHDCI cable which is supplied with the Pod.
The DAG 3.7T card has one VHDCI connector located on the PCI bracket and another on the
card itself. The Pod has one VHDCI connector located on the rear of the casing.
Connecting the external Pod to the computer
If the Pod is mounted internally in the computer chassis you need to use the VHDCI
connector located on the card itself as shown in the picture below.
If the Pod is mounted external to the computer chassis you need to use the connector located
on the card PCI bracket as shown in the picture below.

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Pod rackmount chassis
This section describes how to install the Pod rackmount chassis ready for connecting to the
monitored network.
Additional options
For details on how to:
•add a second Pod PCB into a Pod rackmount chassis, see Adding a second Pod PCB to
the Pod rackmount chassis 14(page ).
•change the VHDCI connector location, see Changing VHDCI connector location
18
(page
).
Before you begin
Inspect the contents of the Pod rackmount chassis kit and ensure you have the following
items:
•1 x Sliding rail kit
•1 x Pod rackmount chassis (PodRMount-37P1 has one Pod or PodRMount-37P2 has
two Pods)

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Installing the Pod rackmount chassis
Step 1: Separate the rail assembly
1. Slide inner rail out to full extension.
2. Press the release lever and slide inner rail from outer rail.
3. Repeat the following for the second rail assembly.
Step 2: Attach rail to Pod chassis
1. Attach the inner rail to the Pod rackmount chassis using the two screws (supplied).
2. Repeat for the other side.
Note: Ensure both release levers are towards the rear of the Pod rackmount chassis.
Step 3: Attach rail assembly to rack
1. Measure the distance from the front to the rear of the rack and compare to the length
of the outer rail.
2. Ensure both mounting brackets are attached to the outer rail.
3. Adjust the length of the outer rail to match the rack depth by adjusting the screws on
the mounting brackets. Leave the mounting bracket screws un-tightened.
4. Attach the front and rear mounting brackets to the rack using supplied screws.
5. Adjust the mounting brackets attachments until the outer rail fits in the rack and then
tighten the screws.
6. Tightened all screws on the mounting brackets.
7. Repeat for the other outer rail.
Step 4: Mount the Pod rackmount chassis in the rack
1. Slide the Pod rackmount chassis inner rails into the rack into the mounted outer rails
until you hear the release/locking lever operate.
2. Press in the release/locking lever on both sides and continue to slide the Pod
rackmount chassis into the rack until it will not slide any further.

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Cable wiring
The RJ45 cables for connecting the network interfaces to the Pod are not supplied with the
DAG 3.7T card or the Pod. You must source these yourself.
If you have an Endace Pod, you are able to use standard E1/T1 cables available from your
local electronic stockist. If you do not have an Endace Pod you will need to make the cables
up yourself to match the Pod pinouts shown in the following tables.
Note: You can identify the standard Endace Pod by the web address “www.endace.com”
written on the front of the casing.
The physical pinouts of the RJ-45 connectors for both Endace and other pods are shown
below:
Endace Pod Other Pod
1 TX Tip 1
2 TX Ring 2
3 3 TX Ring
4 RX Tip 4 TX Tip
5 RX Ring 5 RX Ring
6 6 RX Tip
7 7
8 8

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Connecting to the Network
Once you have connected the interfaces to the Pod you must connect the interfaces to the
network via a tap as shown in the diagram below:
You must use a separate tap for each interface.
When you have connected the Pod to the DAG 3.7T and the network interfaces to the
network, you must configure the card for your specific requirements. This process is
described next in Configuring the DAG Card 19(page ).
Note: For further information about using taps to connect to the network, please consult
your network administrator.

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Adding a second Pod PCB to the Pod rackmount chassis
The following describes how to add a second Pod PCB into the Pod rackmount chassis.
Note: For instructions on removing a Pod PCB from the external Pod case, see Removing a
Pod PCB from an External Pod case 16(page )
1. Remove the top cover from the Pod rackmount chassis.
2. Remove the front blanking plate. Break the metal tabs holding the blanking plate in
place.
3. Attach the VHDCI ribbon cable to the Pod PCB.
a. Attach thumb screws to connector on Pod PCB.
b. Connect VHDCI ribbon cable to Pod PCB.
c. Fasten the VHDCI ribbon cable to Pod PCB using the supplied screws.
4. Attach the other end of the VHDCI ribbon cable to the VHDCI PCB using the supplied
screws.
5. Remove thumb screws and retain.
6. Select which Pod 2 connector location you want to use (front or back).