The output from the low pass filter is connected directly to
the VCO tuning varactor and is composed of a DC voltage with
a small AC signal (error voltage) riding on the DC. The level of
the DC voltage coarse tunes the VCO to the correct frequency
and the error voltage acts as a continuous fine tune to maintain
phase tracking with the 5 kHz reference.
A lock detect circuit consisting of Q15 and its associated
components is provided as an indication to the microprocessor
of the operational state of the PLL. The lock output from syn-
thesizer U5-9 is a series of negative going pulses where the in-
dividual pulse width is a direct measure of the closeness of
frequency and/or phase coherence of the VCO to the 5 kHz ref-
erence. R67 and C78 form an integrator with the time constant
selected so that Q15 will turn off whenever the pulse widths
appearing at U5-9 narrow to the width that represents the VCO
being within the allowable frequency tolerance of programmed
output frequency.
As the PLL achieves lock, the transition between Q15 con-
ducting (out-of-lock indication) and turning off (valid lock in-
dication) typically results in a short period where Q15 will be
rapidly turning on and off. R66 and C77 are provided to filter
out this "chatter" so that the indication to the microprocessor
(U10-21) is a steady lock or unlock condition.
Transmit/Receive VCO’S
The synthesized radio uses two VCO’s to generate the
transmit channel frequencies and the receiver’s first LO injec-
tion frequency. Both oscillators use the same Colpitts topology
with the receiver oscillator offset in frequency by the 10.7
MHz, the first IF. The receive VCO consists of Q201 and asso-
ciated circuitry and the transmit VCO consists of Q202 and as-
sociated circuitry. Refer to the VCO schematic diagram.
The oscillators are both grounded gate JFET designs that
are varactor controlled to be DC voltage tuneable through a
range of approximately 7 MHz. The VCO frequencies are set
by monitoring the VCO Test Point on the VCO board, setting
the channel selector for the center programmed frequency, and
adjusting the appropriate capacitor (C205 receive & C212
transmit) for 4.5 ±0.1 Vdc. The test point is located near the
center of the board just above R206. The TX VCO has a sec-
ond varactor tapped into the oscillator tank circuit of Q202 to
allow direct FM modulation.
The transmit or receive VCO is enabled by switching the 8
Vdc supply to the appropriate oscillator depending on whether
the radio is operating in the transmit or receive mode. The ac-
tive oscillator is determined by the presence of 8 Vdc at pin 1
(transmit) or pin 2 (receive) of the VCO board.
TRANSMITTER
The transmitter operates in a frequency range of 30 to 50
MHz and delivers 5 watts RF output power to the antenna. The
operating frequencies are established by preprogramming the
radio and may be programmed by the dealer using the
MHTS3R Radio Programmer. The transmitter consists of the
microphone audio circuit, power amplifier, harmonic filter,
automatic power control, and frequency synthesizer.
When the PTT bar is pressed the transmitter is keyed, the
microphone audio circuitry is powered up via Q11, and Q12 is
turned on. The open collector output of Q12 represents the ra-
dio’s PTT function and switches the receiver VCO off and the
transmit VCO on via Q13 and Q14. Q12 also provides a re-
quest to transmit signal, via J1-1 to the microprocessor at U10-
2. The microprocessor then directs the transmit channel codes
be loaded into synthesizer U5 from the information stored in
EEPROM U9. Once the synthesizer loop has achieved lock
with the selected transmit frequency, the synthesizer, via Q15,
signals microprocessor U10-21 with a logic low. The micro-
processor then outputs a logic high (TX ENABLE) on pin 8 to
turn on power control transistor Q5 and enable the transmitter
power amplifier circuits through dc power switch Q6.
To initiate transmit operation a positive base voltage from
the microprocessor must first turn on power control transistor
Q5. When Q5 is turned on its collector drops low, enabling it
to:
•Complete the current path to illuminate the TX LED,
CR302.
•Provide base current to turn on dc switching transistor
Q6, providing dc power to the power amplifier circuits,
RF pre-driver Q7 and drivers Q8 and Q9 respectively.
Microphone Audio Circuit
The Monogram radio operates using direct frequency
modulation by applying the modulating signals to a modula-
tion varactor diode that is lightly coupled to the transmit VCO
tank circuit. Deviation limiting and occupied bandwidth are
controlled by an instantaneous peak limiter and audio low pass
filter respectively.
Voice modulation may be applied either through the inter-
nal electret microphone (MP301) or externally by an optional
speaker/mic through J301. The internal electret is enabled by
pressing the hand-held PTT switch. If the external speaker/mic
is used, the external PTT switch controls the radio and the in-
ternal mic remains disabled.
DC bias for the microphone is supplied through R30 when
the PTT bar is pressed. The resulting current through R30
causes Q11 to turn on supplying 8 Vdc to the op-amp pair of
U3 and also to Q12 through R33. Q12 is turned on. The
open collector output of Q12 represents the radio’s PTT
function. The active low PTT output from Q12 switches Q14
off, removing the receiver VCO voltage causing it to be dis-
abled and also switches Q13 on, applying 8V to the trans-
mitter VCO, enabling it.
The audio frequencies from the microphone are ampli-
fied and filtered by the active two-pole high pass filter con-
sisting of U3B and its associated components. The filter
operates with a cutoff frequency of 270 Hz and provides ap-
proximately 17 dB of voltage gain. The amplified output
from U3B is passed through a 6 dB/octave pre-emphasis net-
work composed of C61 and R43 to the input of limiting am-
plifier U3A. U3A has a voltage gain of approximately 40 dB
at 1 kHz. This amplifier is driven into limiting to provide
peak clipping. Deviation symmetry while in limiting is set
by the reference voltage divider of R42 and R46, supplying
U3. The combined gain of U3A and U3B establishes the mi-
crophone sensitivity and is optimized to provide the best
trade off between maximum deviation with low distortion
versus the tendency to pick up background noise.
The limited output of U3A is coupled through a resistive
divider network consisting of R48, R49, and R50, option
connector J1, and coupling capacitor C71 to the input of an
active 3-pole low pass filter. The filter, consisting of U4 B
and associated components has a cutoff frequency of 3 kHz
to roll off the harmonics of the clipped signal and therefore
establish the spectral distribution of the modulated RF sig-
nal. The output of this LPF is coupled directly to the modu-
lating varactor diode in the transmit VCO.
The connection point in the transmit audio path is at op-
tion connector J1. This provides a summing point for the ac-
cessories that modulate the transmitter, such as, CTCSS
encoding, DTMF encoding, etc. Resistors R48 and R49, be-
sides being part of the voltage divider to reduce the ampli-
tude of the modulating signal to a level compatible with the
input of the LPF, provide for minimal loading of the signal
sources to be summed.
Power Amplifier And Harmonic Filter
RF transistors Q7 - Q1O are the active devices in the
transmit power chain and are controlled by the microproces-
sor through power control transistor Q5 and dc power switch
Q6.
Transmitter pre-amp Q7 is located within the synthesizer
shield to prevent stray RF pickup from transmitted high
power RF fields. It therefore acts as a buffer to isolate the
transmit VCO from the subsequent transmitter power stages.
This isolation minimizes VCO pulling by controlling the
load changes seen by the transmit VCO.
Q7 is biased Class "A" by resistive divider R53-R54 and
emitter resistor R56. The emitter resistor provides ac and dc
degeneration for amplifier stability. The collector output is
dc shunt fed by L18 and has approximately 12 dB of power
gain. C70 and L18 form an impedance matching "L" net-
work that drives a 50 ohm RF pad consisting of R57- R59.
The padded RF output is then applied to the emitter of am-
plifier Q8.
Q8 is also biased Class "A" by resistive divider R21-R22
and collector resistor R24. The output of Q8 is then matched
into the base of Q9 by an "L" network composed of L9 and
C33.
The last two stages, Q9 and Q10, are biased Class "C".
These stages are driven into saturation to provide RF power
stability (flatness) over the extremes of operating tempera-
ture and voltage. Another "L" network consisting of L11 and
C34 is utilized to form a broad band impedance matching
network between the collector of Q9 and the base of Q10.
Driver transistor Q9 supplies sufficient RF power to saturate
power amplifier Q10.
Dc to the collector of Q9 is shunt fed by parallel circuit
L13-R28 that acts as a low Q RF choke to the RF output
power. The amplifier output is matched to 50 ohms by a "T"
network consisting of L14, C41, C42, and L15. RF power
then passes through pin diode CR3, coupling capacitor C43,
and an elliptic Low Pass Filter (LPF) to reach the antenna.
The LPF is a 50 ohm input-output design to reject harmon-
ics. Together, the "T" network and the LPF pass the carrier
with low loss while effectively suppressing harmonics. C42
is adjustable to provide 5 watts to the antenna output.
Receiver Protection Circuit
During transmit, the receiver protection circuit, L17, is
active. The protection circuit consists of "T" network L17,
L16, and C44 terminated by pin diode CR2, which is turned
on, and parallel capacitors C39 and C40. The capacitors and
CR2 act as an RF short at the receiver input to protect it
from transmitted energy. The loading presented to the trans-
mitter consists of a parallel resonant circuit composed of
L16 and C44. The impedance of this circuit is high with re-
spect to 50 ohms, therefore, transmitter power loss is mini-
mal within the usable bandwidth of the transmitter.
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