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Espressif Systems ESP32-WROVER-E User manual

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ESP32-WROVER-E &
ESP32-WROVER-IE
User Manual
Version 0.1
Espressif Systems
Copyright © 2019
www.espressif.com
PRELIMINARY
PRELIMINARY
PRELIMINARY
About This Document
This document provides the specifications for the ESP32-WROVER-E and ESP32-WROVER-IE module.
Documentation Change Notification
Espressif provides email notifications to keep customers updated on changes to technical documentation.
Please subscribe at www.espressif.com/en/subscribe.
Certification
Download certificates for Espressif products from www.espressif.com/en/certificates.
Disclaimer and Copyright Notice
Information in this document, including URL references, is subject to change without notice. THIS DOCUMENT IS
PROVIDED AS IS WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF
MERCHANTABIL-ITY, NON-INFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY
WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.
All liability, including liability for infringement of any proprietary rights, relating to use of information in this docu-
ment is disclaimed. No licenses express or implied, by estoppel or otherwise, to any intellectual property rights
are granted herein. The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo
is a registered trademark of Bluetooth SIG.
All trade names, trademarks and registered trademarks mentioned in this document are property of their
respective owners, and are hereby acknowledged.
Copyright © 2019 Espressif Inc. All rights reserved.
PRELIMINARY
1. Overview
1. Overview
ESP32-WROVER-E is a powerful, generic WiFi-BT-BLE MCU module that targets a wide variety of
applications, ranging from low-power sensor networks to the most demanding tasks, such as voice encoding,
music streaming and MP3 decoding.
This module is provided in two versions: one with a PCB antenna, the other with an IPEX antenna. ESP32-
WROVER-E features a 4 MB external SPI flash and an additional 8 MB SPI Pseudo static RAM (PSRAM).
The information in this datasheet is applicable to both modules.
The ordering information on the two variants of ESP32-WROVER-E is listed as follows:
Table 1: ESP32-WROVER-E Ordering Information
Module
Chip embedded
Flash
PSRAM
Module dimensions (mm)
ESP32-WROVER-E (PCB)
ESP32-D0WD-V3
8 MB 1
8 MB
(18.00±0.10)×(31.40±0.10)×(3.30±0.10)
ESP32-WROVER-IE
(IPEX)
Notes:
1.
ESP32-WROVER-E (PCB) or ESP32-WROVER-IE(IPEX) with 4 MB flash or 16 MB flash is available for
custom order.
2.
For detailed ordering information, please see Espressif Product Ordering Information.
3.
For dimensions of the IPEX connector, please see Chapter 10.
At the core of the module is the ESP32-D0WD-V3 chip*. The chip embedded is designed to be scalable and adaptive.
There are two CPU cores that can be individually controlled, and the CPU clock frequency is adjustable from 80 MHz to
240 MHz. The user may also power off the CPU and make use of the low-power co-processor to constantly monitor the
peripherals for changes or crossing of thresholds. ESP32 integrates a rich set of peripherals, ranging from capacitive touch
sensors, Hall sensors, SD card interface, Ethernet, high-speed SPI, UART, I²S and I²C.
Note:
*For details on the part numbers of the ESP32 family of chips, please refer to the document ESP32 User Manual.
The integration of Bluetooth, Bluetooth LE and Wi-Fi ensures that a wide range of applications can be targeted,
and that the module is all-around: using Wi-Fi allows a large physical range and direct connection to the
Internet through a Wi-Fi router, while using Bluetooth allows the user to conveniently connect to the phone or
broadcast low energy beacons for its detection. The sleep current of the ESP32 chip is less than 5 A, making
it suitable for battery powered and wearable electronics applications. The module supports a data rate of up
to 150 Mbps. As such the module does offer industry-leading specifications and the best performance for
electronic integration, range, power consumption, and connectivity.
The operating system chosen for ESP32 is freeRTOS with LwIP; TLS 1.2 with hardware acceleration is built
in as well. Secure (encrypted) over the air (OTA) upgrade is also supported, so that users can upgrade their
products even after their release, at minimum cost and effort.
Table 2 provides the specifications of ESP32-WROVER-E.
1
PRELIMINARY
1. Overview
Categories
Items
Specifications
Test
Reliablity
HTOL/HTSL/uHAST/TCT/ESD
802.11 b/g/n20//n40
Wi-Fi
Protocols
A-MPDU and A-MSDU aggregation and 0.4 s guard in-
terval support
Frequency range
2412-2462MHzHz
Protocols
Bluetooth v4.2 BR/EDR and BLE specification
NZIF receiver with –97 dBm sensitivity
Bluetooth
Radio
Class-1, class-2 and class-3 transmitter
AFH
Audio
CVSD and SBC
SD card, UART, SPI, SDIO, I
2
C, LED PWM, Motor PWM,
Module interfaces
I2S, IR, pulse counter, GPIO, capacitive touch sensor,
ADC, DAC
On-chip sensor
Hall sensor
Integrated crystal
40 MHz crystal
Integrated SPI flash
4 MB
Hardware
Integrated PSRAM
8 MB
Operating voltage/Power supply
3.0 V ~ 3.6 V
Minimum current delivered by
500 mA
power supply
Recommended operating tem-
–40 °C ~ 65 °C
perature range
Package size
(18.00±0.10) mm × (31.40±0.10) mm × (3.30±0.10) mm
Moisture sensitivity level (MSL)
Level 3
2
Table 2: ESP32-WROVER-E Specifications
2. Pin Definitions
2. Pin Definitions
2.1 Pin Layout
Figure 1: Pin Layout of ESP32-WROVER-E (Top View)
3
PRELIMINARY
2. Pin Definitions
2.2 Pin Description
ESP32-WROVER-E has 38 pins. See pin definitions in Table 3.
Table 3: Pin Definitions
Name
No.
Type
Function
GND
1
P
Ground
3V3
2
P
Power supply
EN
3
I
Module-enable signal. Active high.
SENSOR_VP
4
I
GPIO36, ADC1_CH0, RTC_GPIO0
SENSOR_VN
5
I
GPIO39, ADC1_CH3, RTC_GPIO3
IO34
6
I
GPIO34, ADC1_CH6, RTC_GPIO4
IO35
7
I
GPIO35, ADC1_CH7, RTC_GPIO5
IO32
8
I/O
GPIO32, XTAL_32K_P (32.768 kHz crystal oscillator input), ADC1_CH4,
TOUCH9, RTC_GPIO9
IO33
9
I/O
GPIO33, XTAL_32K_N (32.768 kHz crystal oscillator output),
ADC1_CH5, TOUCH8, RTC_GPIO8
IO25
10
I/O
GPIO25, DAC_1, ADC2_CH8, RTC_GPIO6, EMAC_RXD0
IO26
11
I/O
GPIO26, DAC_2, ADC2_CH9, RTC_GPIO7, EMAC_RXD1
IO27
12
I/O
GPIO27, ADC2_CH7, TOUCH7, RTC_GPIO17, EMAC_RX_DV
IO14
13
I/O
GPIO14, ADC2_CH6, TOUCH6, RTC_GPIO16, MTMS, HSPICLK,
HS2_CLK, SD_CLK, EMAC_TXD2
IO12
14
I/O
GPIO12, ADC2_CH5, TOUCH5, RTC_GPIO15, MTDI, HSPIQ,
HS2_DATA2, SD_DATA2, EMAC_TXD3
GND
15
P
Ground
IO13
16
I/O
GPIO13, ADC2_CH4, TOUCH4, RTC_GPIO14, MTCK, HSPID,
HS2_DATA3, SD_DATA3, EMAC_RX_ER
NC
17
-
-
NC
18
-
-
NC
19
-
-
NC
20
-
-
NC
21
-
-
NC
22
-
-
IO15
23
I/O
GPIO15, ADC2_CH3, TOUCH3, MTDO, HSPICS0, RTC_GPIO13,
HS2_CMD, SD_CMD, EMAC_RXD3
IO2
24
I/O
GPIO2, ADC2_CH2, TOUCH2, RTC_GPIO12, HSPIWP, HS2_DATA0,
SD_DATA0
IO0
25
I/O
GPIO0, ADC2_CH1, TOUCH1, RTC_GPIO11, CLK_OUT1,
EMAC_TX_CLK
IO4
26
I/O
GPIO4, ADC2_CH0, TOUCH0, RTC_GPIO10, HSPIHD, HS2_DATA1,
SD_DATA1, EMAC_TX_ER
NC1
27
-
-
NC2
28
-
-
IO5
29
I/O
GPIO5, VSPICS0, HS1_DATA6, EMAC_RX_CLK
IO18
30
I/O
GPIO18, VSPICLK, HS1_DATA7
4
PRELIMINARY
2. Pin Definitions
Name
No.
Type
Function
IO19
31
I/O
GPIO19, VSPIQ, U0CTS, EMAC_TXD0
NC
32
-
-
IO21
33
I/O
GPIO21, VSPIHD, EMAC_TX_EN
RXD0
34
I/O
GPIO3, U0RXD, CLK_OUT2
TXD0
35
I/O
GPIO1, U0TXD, CLK_OUT3, EMAC_RXD2
IO22
36
I/O
GPIO22, VSPIWP, U0RTS, EMAC_TXD1
IO23
37
I/O
GPIO23, VSPID, HS1_STROBE
GND
38
P
Ground
Notice:
*GPIO6 to GPIO11 are connected to the SPI flash integrated on the module and are not connected out.
2.3 Strapping Pins
ESP32 has five strapping pins, which can be seen in Chapter 6 Schematics:
•MTDI
•GPIO0
•GPIO2
•MTDO
•GPIO5
Software can read the values of these five bits from register ”GPIO_STRAPPING”.
During the chip’s system reset release (power-on-reset, RTC watchdog reset and brownout reset), the latches
of the strapping pins sample the voltage level as strapping bits of ”0” or ”1”, and hold these bits until the chip
is powered down or shut down. The strapping bits configure the device’s boot mode, the operating voltage of
VDD_SDIO and other initial system settings.
Each strapping pin is connected to its internal pull-up/pull-down during the chip reset. Consequently, if a
strapping pin is unconnected or the connected external circuit is high-impedance, the internal weak pull-up/pull-
down will determine the default input level of the strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or use the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32.
After reset release, the strapping pins work as normal-function pins.
Refer to Table 4 for a detailed boot-mode configuration by strapping pins.
Table 4: Strapping Pins
Voltage of Internal LDO
(VDD_SDIO)
Pin
Default
3.3 V
1.8 V
MTDI
Pull-down
0
1
5
PRELIMINARY
2. Pin Definitions
Note:
•Firmware can configure register bits to change the settings of ”Voltage of Internal LDO (VDD_SDIO)” and
”Timing of SDIO Slave” after booting.
•Internal pull-up resistor (R9) for MTDI is not populated in the module, as the flash and SRAM in ESP32-
WROVER-E only support a power voltage of 3.3 V (output by VDD_SDIO)
6
Booting Mode
Pin
Default
SPI Boot
Download Boot
GPIO0
Pull-up
1
0
GPIO2
Pull-down
Don’t-care
0
Enabling/Disabling Debugging Log Print over U0TXD During Booting
Pin
Default
U0TXD Active
U0TXD Silent
MTDO
Pull-up
1
0
Timing of SDIO Slave
Pin
Default
Falling-edge Sampling
Falling-edge Output
Falling-edge Sampling
Rising-edge Output
Rising-edge Sampling
Falling-edge Output
Rising-edge Sampling
Rising-edge Output
MTDO
Pull-up
0
0
1
1
GPIO5
Pull-up
0
1
0
1
PRELIMINARY
3. Functional Description
3. Functional Description
This chapter describes the modules and functions integrated in ESP32-WROVER-E.
3.1 CPU and Internal Memory
ESP32-D0WD-V3 contains two low-power Xtensa® 32-bit LX6 microprocessors. The internal memory
includes:
•448 KB of ROM for booting and core functions.
•520 KB of on-chip SRAM for data and instructions.
•8 KB of SRAM in RTC, which is called RTC FAST Memory and can be used for data storage; it is
accessed by the main CPU during RTC Boot from the Deep-sleep mode.
•8 KB of SRAM in RTC, which is called RTC SLOW Memory and can be accessed by the co-processor
during the Deep-sleep mode.
•1 Kbit of eFuse: 256 bits are used for the system (MAC address and chip configuration) and the
remaining 768 bits are reserved for customer applications, including flash-encryption and chip-ID.
3.2 External Flash and SRAM
ESP32 supports multiple external QSPI flash and SRAM chips. More details can be found in Chapter SPI in
the ESP32 Technical Reference Manual. ESP32 also supports hardware encryption/decryption based on
AES to pro-tect developers’ programs and data in flash.
ESP32 can access the external QSPI flash and SRAM through high-speed caches.
•The external flash can be mapped into CPU instruction memory space and read-only memory space
simul-taneously.
–When external flash is mapped into CPU instruction memory space, up to 11 MB + 248 KB can be
mapped at a time. Note that if more than 3 MB + 248 KB are mapped, cache performance will be
reduced due to speculative reads by the CPU.
–When external flash is mapped into read-only data memory space, up to 4 MB can be mapped at a
time. 8-bit, 16-bit and 32-bit reads are supported.
•External SRAM can be mapped into CPU data memory space. Up to 4 MB can be mapped at a time. 8-
bit, 16-bit and 32-bit reads and writes are supported.
ESP32-WROVER-E integrates a 8 MB SPI flash and an 8 MB PSRAM for more memory space.
3.3 Crystal Oscillators
The module uses a 40-MHz crystal oscillator.
7
PRELIMINARY
3. Functional Description
3.4 RTC and Low-Power Management
With the use of advanced power-management technologies, ESP32 can switch between different power modes.
For details on ESP32’s power consumption in different power modes, please refer to section ”RTC and Low-
Power Management” in ESP32 Datasheet.
8