Fairchild FSB44104A User manual

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© 2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
Rev. 1.1 6/26/15
www.fairchildsemi.com
AN-9111
Smart Power Module, Motion SPM®45 LV series User’s Guide
Table of Contents
1. Introduction ...................................................................................................................................2
1.1. Design Concept...............................................................................................................................2
1.2. Key Features...................................................................................................................................2
2. Product Selections........................................................................................................................3
2.1. Ordering information .......................................................................................................................3
2.2. Product Line-up...............................................................................................................................3
3. Package..........................................................................................................................................4
3.1. Pin Description................................................................................................................................5
3.2. Detailed Pin Definition and Notification...........................................................................................6
3.3. Package Outline..............................................................................................................................7
3.4. Marking Specification......................................................................................................................8
4. Product Synopsis..........................................................................................................................9
4.2. Electrical Characteristic (TJ= 25oC, unless otherwise specified). ................................................10
4.3. Recommended Operating Conditions...........................................................................................12
4.4. Mechanical Characteristics...........................................................................................................12
5. Operation Sequence for Protections ........................................................................................13
5.1. Under-Voltage Lockout Protection................................................................................................13
6. Key Parameter Design Guidance ..............................................................................................14
6.1. Selection of Shunt resistor............................................................................................................14
6.2. Fault Output Circuit .......................................................................................................................15
6.3. Circuit of Input Signal (IN(xH), IN(xL)) ..........................................................................................15
6.4. Bootstrap Circuit Design ...............................................................................................................16
7. Print Circuit Board (PCB) Design..............................................................................................19
7.1. General Application Circuit Example ............................................................................................19
7.2. PCB Layout Guidance...................................................................................................................20
Packing Information .......................................................................................................................................21
Related Resources .........................................................................................................................................22

AN-9111 APPLICATION NOTE
© 2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
Rev. 1.1 6/26/15 2
1. Introduction
This application note supports the Motion SPM®45 LV-
series. It should be used in conjunction with Motion SPM
45 LV datasheets, and Motion SPM design reference (RD-
408).
1.1. Design Concept
The key design objective of the SPM 45 LV series is to
provide a compact and reliable inverter solution for small
power motor drive applications. Ongoing efforts have
improved the performance, quality, and power rating of
SPM 45 LV series products.
The MOSFETs in SPM 45 LV series are specially processed
to reduce the amount of body-diode reverse recovery charge
to minimize the switching loss and enable fast switching
operations. Softness of the reverse-recovery characteristics
is managed through advanced MOSFET design with
optimized gate resistor selections to contain
Electromagnetic Interference (EMI) noise within a
reasonable range.
SPM 45 LV series has six fast-recovery MOSFETs
(FRFET®), LVIC and three-in-one HVIC. An FRFET-based
power module has much better ruggedness and a larger Safe
Operation Area (SOA) than MOSFET-based module or
Silicon-On-Insulator modules.
The FRFET-based power module has a big advantage in
light-load efficiency because the voltage drop across the
transistor decreases linearly as current decrease. Some
applications require continuous operation at light load
except short transients and improving the efficiency in the
light-load condition is the key to saving energy.
Refrigerators, water circulation pumps, and some fans are
good examples.
Motion SPM 45 LV series achieves reduced board size and
improved reliability compared to existing discrete solutions.
Target applications are invert motor drives for industrial
use, such as general-purpose inverters, power tool and servo
motors.
1.2. Key Features
UL Certified No.E209204 (UL1557)
40 V, Low RDS(ON) 3-Phase MOSFET Inverter
Module with Gate Drivers and Protection
Low Thermal Resistance Using Ceramic Substrate
Three Separate Open-Emitter Pins from Low-Side
MOSFETs for Three-Leg Current Sensing
Single-Grounded Power Supply for Built-in HVIC
Isolation Rating: 800 VRMS / min
Figure 1. Package Outline of Motion SPM 45 LV
Series
Figure 2. Internal Equivalent Circuit, Input / Output Pins

AN-9111 APPLICATION NOTE
© 2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
Rev. 1.1 6/26/15 3
2. Product Selections
2.1. Ordering information
FSB44104A
4 : SPM 45L Package
Max. RDS(on) ( ÷10 mΩ)
Voltage Rating ( X 10 )
Version Blank : Ver.1
A : Ver.2
B : No NTC Thermister
S : Divided N-Terminal
F : Fairchild Semiconductor
Figure 3. Ordering Information of SPM® 45 LV Series
2.2. Product Line-up
Table 1 shows the basic line up. Online loss & temperature simulation tool, Motion Control Design Tool (Motion-Control-
Design-Tool), is recommended to find out the right SPM product for the desired application.
Table 1. Product Line-up
Target Application
Fairchild Device
MOSFET Rating
Motor
Rating(Error!
Reference source
not found.)
Isolation Voltage
Small-Power Inverter,
Power Tool
FSB44104A
40 A / 40 V
0.8 kW
VISO = 800 VRMS
(Sine 60 Hz, 1 min.
Between all shorted pins
and heat sink)
FSB43004A
60 A / 40 V
1.2 kW
Note:
1. These motor ratings are general ratings, so may be changed by conditions.

AN-9111 APPLICATION NOTE
© 2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
Rev. 1.1 6/26/15 4
3. Package
Since heat dissipation is an important factor that limits the power modules current capability, the heat dissipation
characteristics are critical in determining the SPM package performance. A trade-off exists among heat dissipation
characteristics, package size, and isolation characteristics. The key to a good package technology lies in the accomplishment
of optimization package size while maintaining outstanding heat dissipation characteristics without compromising the
isolation rating.
In the SPM package, technology was developed in which bare ceramic with good heat dissipation characteristics is attached
directly to the lead frame. This technology already applied in SPM, but was improved through new adhesion methods. This
made it possible to achieve improved reliability and heat dissipation, while maintaining cost effectiveness.
FRDMosfet
IC
Al Wiring
Cu Wiring Lead Frame
Ceramic (Isolation material)
EMC(Epoxy Molding Compound)
Epoxy Resin
Figure 4. Vertical Structure of SPM Package

AN-9111 APPLICATION NOTE
© 2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
Rev. 1.1 6/26/15 5
3.1. Pin Description
Figure 5 shows the location of pins, the name and dummy pins of SPM 45 LV series.
P (1)
W (2)
V (3)
NW(5)
NV(6)
NU(7)
U (4)
(22) VB(W)
(21) VS(W)
(20) VB(V)
(19) VS(V)
(18) VB(U)
(17) VS(U)
(16) IN(WH)
(15) IN(VH)
(14) IN(UH)
(13) VCC
(12) COM
(11) IN(WL)
(10) IN(VL)
(9) IN(UL)
(8) VFO
Figure 5. Package Top-View and Pin Assignment
The detail functional descriptions are provided in Table 2.
Table 2. Pin Description
Pin Number
Name
Description
1
P
Positive DC-Link Input
2
W
W Phase Output
3
V
V Phase Output
4
U
U Phase Output
5
NW
Negative DC-Link Input
6
NV
Negative DC-Link Input
7
NU
Negative DC-Link Input
8
VFO
Fault Output
9
IN(UL)
PWM Input for Low-Side U-Phase MOSFET Drive
10
IN(VL)
PWM Input for Low-Side V-Phase MOSFET Drive
11
IN(WL)
PWM Input for Low-Side W-Phase MOSFET Drive
12
COM
Common Supply Ground
13
VCC
Common Supply Voltage for IC and Low-side MOSFET Drive
14
IN(UH)
PWM Input for High-Side U-Phase MOSFET Drive
15
IN(VH)
PWM Input for High-Side V-Phase MOSFET Drive
16
IN(WH)
PWM Input for High-Side W-Phase MOSFET Drive
17
VB(U)
Supply Voltage for High-Side U-Phase MOSFET Drive
18
VS(U)
Supply Ground for High-Side U-Phase MOSFET Drive
19
VB(V)
Supply Voltage for High-Side V-Phase MOSFET Drive
20
VS(V)
Supply Ground for High-Side V-Phase MOSFET Drive
21
VB(W)
Supply Voltage for High-Side W-Phase MOSFET Drive
22
VS(W)
Supply Ground for High-Side W-Phase MOSFET Drive

AN-9111 APPLICATION NOTE
© 2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
Rev. 1.1 6/26/15 6
3.2. Detailed Pin Definition and Notification
High-Side Bias Voltage Pins for Driving the
MOSFET / High-Side Bias Voltage Ground
Pins for Driving the MOSFET
Pin: VB(U)-VS(U), VB(V)-VS(V), VB(W)-VS(W)
•These are drive power supply pins for providing gate
drive power to the high-side MOSFETs.
•The external power supplies dont need for the high
side MOSFET driving by using bootstrap circuit..
•Each bootstrap capacitor is charged from the VCC
supply during ON state of the corresponding low-
side MOSFET.
•To prevent malfunctions caused by noise and ripple
in the supply voltage, a low-ESR, low-ESL filter
capacitor should be mounted very close to these pins.
Low-Side Bias Voltage Pin / High-Side Bias
Voltage Pins:
Pin: VCC
•These are control supply pins for the built-in ICs.
•This pin should be connected externally.
•To prevent malfunctions caused by noise and ripple
in the supply voltage, a low-ESR, low-ESL filter
capacitor should be mounted very close to these pins.
Low-Side Common Supply Ground Pins
Pin: COM
•The common (COM) pin connects to the control
ground for the internal ICs.
•Important! To avoid noise influences, the main
power circuit current should not be allowed to blow
through this pin.
Signal Input Pins
Pin: IN(UL), IN(VL), IN(WL), IN(UH), IN(VH), IN(WH)
•These pins control the operation of the built-in
MOSFETs.
•They are activated by voltage input signals. The
terminals are internally connected to a Schmitt-
trigger circuit composed of 5 V-class CMOS.
•The signal logic of these pins is active HIGH. The
MOSFETs associated with each of these pins are
turn-on when a sufficient logic voltage is applied to
these pins.
•The wiring of each input should be as short as
possible to protect the Motion SPM®45 LV series
against noise influences.
•To prevent signal oscillations, an RC coupling as
illustrated in Figure 16 is recommended.
Fault Output Pin
Pin: VFO
•This is the fault output alarm pin. An active LOW
output is given on this pin for a fault state condition
in the SPM.
•The alarm condition is: low-side bias Under-Voltage
Lockout (UVLO).
•The VFO output is open drain configured. The VFO
signal line should be pulled to the 5 V logic power
supply with approximately 4.7 
Positive DC-Link Pin
Pin: P
•This is the DC-link positive power supply pin of the
inverter.
•It is internally connected to the drains of the high-
side MOSFETs.
•To suppress surge voltage caused by the DC-link
wiring or PCB pattern inductance, connect a
smoothing filter capacitor close to this pin (tip: metal
film capacitor is typically used).
Negative DC-Link Pins
Pin: NU, NV, NW
•These are the DC-link negative power supply pins
(power ground) of the inverter.
•These pins are connected to the low-side MOSFET
source of the each phase.
•These pins are used in connection with one shunt or
three shunt resistor
Inverter Power Output Pins
Pin: U, V, W
•Inverter output pins for connecting to the inverter
load (e.g. motor).

AN-9111 APPLICATION NOTE
© 2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
Rev. 1.1 6/26/15 7
3.3. Package Outline

AN-9111 APPLICATION NOTE
© 2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
Rev. 1.1 6/26/15 8
3.4. Marking Specification

AN-9111 APPLICATION NOTE
© 2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
Rev. 1.1 6/26/15 9
4. Product Synopsis
This section discuss electrical specification, characteristics and mechanical characteristics
4.1. Absolute Maximum Ratings (TJ= 25°C, unless otherwise specified).
Table 3. Inverter Part
Symbol
Parameter
Conditions
Rating
Unit
VPN
Supply Voltage
Applied between P NU, NV,NW
40
V
* ±ID(2)
Each MOSFET Drain Current
TC=25°C, TJ 150°C
FSB44104A
57
A
FSB43004A
71
* ±ICP(2)
Each MOSFET Drain Current
(Peak)
TC=25°C, TJ 150°C, Under
1 ms Pulse Width
FSB44104A
110
A
FSB43004A
180
* PD(2)
Maximum Power Dissipation
TC=25°C, per One Chip,
TJ=150°C
FSB44104A
28
W
FSB43004A
31
TJ
Operating Junction Temperature
-40 ~ 150
oC
Note:
2. .
Table 4. Control Part
Symbol
Parameter
Conditions
Rating
Unit
VCC
Control Supply Voltage
Applied between VCC - COM
20
V
VBS
High-Side Control Bias Voltage
Applied between VB(U) - VS(U),VB(V) - VS(V), VB(W) -
VS(W),
20
V
VIN
Input Signal Voltage
Applied between IN(UH), IN(VH), IN(WH), IN(UL),
IN(VL), IN(WL), - COM
-0.3~VCC+0.3
V
VFO
Fault Output Supply Voltage
Applied between VFO COM
-0.3~VCC+0.3
V
IFO
Fault Output Current
Sink Current at VFO Pin
1
mA
Table 5. Total System
Symbol
Parameter
Conditions
Rating
Unit
TC
Module Case Operation
Temperature
See Figure 6
-40~125
°C
TSTG
Storage Temperature
-40~150
°C
VISO
Isolation Voltage
60 Hz, Sinusoidal, 1-Minute, Connect Pins to
Heat Sink
800
Vrms
Table 6. Thermal Resistance
Symbol
Parameter
Conditions
Max.
Unit
Rth(j-c)
Junction-to-Case Thermal
Resistance(3)
Package center (per MOSFET)
FSB44104A
4.41
°C /W
FSB43004A
3.92
Note:
3. For the measurement point of case temperature (TC), please refer to Figure 6.