Fairchild FSD200 User manual

©2003 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev.1.0.0
Features
• Single Chip 700V SenseFET Power Switch
• Precision Fixed Operating Frequency (134kHz)
• Internal Start-up Switch and Soft Start
• UVLO with Hysteresis (6V/7V)
• Pulse by Pulse Current Limit
• Over Load Protection
• Internal Thermal Shutdown Function (Hysteresis)
• Secondary Side Regulation
• Auto-Restart Mode
• Frequency Modulation for EMI
• No Bias Winding
Applications
• Charger & Adaptor for Mobile Phone, PDA & MP3
• Auxiliary Power for PC, C-TV & Monitor
Description
The FSD200 is specially designed for an off-line SMPS with
minimal external components. The FSD200 is a monolithic
high voltage power switching regulator that combines an
LDMOS SenseFET with a voltage mode PWM control
block. The integrated PWM controller features: A fixed
oscillator with frequency modulation for reduced EMI.
Under voltage lock out. Leading edge blanking(LEB).
Optimized gate turn-on/turn-off driver. Thermal shut down
protection. Temperature compensated precision current
sources for loop compensation and fault protection circuitry.
Compared to a discrete MOSFET and controller or RCC
switching converter solution, an FSD200 can reduce total
component count, design size, weight and at the same time
increase efficiency, productivity, and system reliability. It is
a basic platform well suited for cost effective design of fly-
back converters.
1.2.3.GND 4.Vfb 5.Vcc 7.Drain 8.Vstr
7-DIP
Internal Block Diagram
Rsense
Iover
S/S
3mS
4
1, 2, 3
7
OSC
S
R
Q
TSD
His 50
S
R
Q
LEB
OLP
Reset
UVLO Reset
(Vcc<6V)
DRIVER
Frequency
Modulation
5uA 250uA
Vck
Vth
SFET
Drain
GND
Vfb
BURST
VSD
VBURST
7V
1
7
UVLO Voltage
Ref.
HV/REG
INTERNAL
BIAS
ON/OFF
Vstr
Vcc
FSD200
Fairchild Power Switch(FPS)

FSD200
2
Absolute Maximum Ratings
(Ta=25°C unless otherwise specified)
PIN Definitions
Parameter Symbol Value Unit
Maximum Vstr Pin Voltage Vstr,max 700 V
Maximum Supply Voltage VCC,MAX 10 V
Input Voltage Range VFB −0.3 to VSD V
Operating Ambient Temperature TA−25 to +85 °C
Storage Temperature Range TSTG −55 to +150 °C
Pin Number Pin Name Pin Function Description
1, 2, 3 GND These pins are the control ground and the SenseFET Source.
4Vfb
This pin is the inverting input of the PWM comparator. It operates normally
between 0.5V and 2.5V. It has a 0.25mA current source connected internally
and a capacitor and opto coupler connected externally. A feedback voltage
of 3V to 4V triggers overload protection (OLP). There is a time delay due to
the 5uA current source, which prevents false triggering under transient
conditions but still allows the protection mechanism to operate under true
overload conditions.
5Vcc
This is the positive supply voltage input. During start up, current is supplied
to this pin from Pin 8 via an internal switch. When Vcc reaches the UVLO
upper threshold (7V), the internal switch start-up switch (Vstr) opens and
power is supplied from auxiliary transformer winding.
7Drain
This pin is designed to directly drive the converter transformer and is
capable of switching a maximum of 700V.
8Vstr
This pin connects directly to the rectified AC line voltage source. At start up
the internal switch supplies internal bias and charges an external capacitor
that connects from the Vcc pin to ground. once this reaches 7V, the internal
current source is disabled.

FSD200
3
Electrical Characteristics
(Ta=25°C unless otherwise specified)
Note:
1. These parameters, although guaranteed, are not 100% tested in production
Parameter Symbol Condition Min. Typ. Max. Unit
SENSEFET SECTION
Drain-Source Breakdown Voltage BVdss VCC = 0V, ID = 100µA 700 - - V
Off-State Current Idss VDS = 560V - - 100 µA
On-State Resistence RDS(ON)
Tj = 25°C, ID = 25mA - 28 32 Ω
Tj = 100°C, ID = 25mA - 42 48 Ω
Rise Time TRVDS = 325V, ID = 50mA - 100 - nS
Fall Time TFVDS = 325V, lD = 25mA - 50 - nS
CONTROL SECTION
Output Frequency Fosc Tj = 25°C126 134 142 kHz
-±4-
Feedback Source Current Ifb Vfb = 0V 0.22 0.25 0.28 mA
Maximum Duty Cycle Dmax Vfb = 3.5V 60 64 68 %
Minimum Duty Cycle Dmin Vfb = 0V 0 0 0 %
Supply Regulation High Voltage Vregh - 7 - V
Supply Regulation Low Voltage Vregl - 6 - V
Supply Shunt Regulator VCCreg --7-V
Internal Soft Start Time TS/S -3-mS
BURST MODE SECTION
Burst Mode Voltage VBURST Hysteresis
-0.64- V
-60-mV
PROTECTION SECTION
Drain to Source Peak Current Limit Iover 0.26 0.30 0.34 A
Thermal Shutdown Temperature (Tj) (1) TSD Hysteresis
125 145 - °C
-50- °C
Shutdown Feedback Voltage VSD -3.54.04.5V
Feedback Shutdown Delay Current Idelay Vfb = 4.0V 3 5 7 uA
TOTAL DEVICE SECTION
Operating Supply Current IOP Vcc = 7V - 0.6 - mA
Start Up Current Istart Vcc = 0V - 0.8 1.0 mA

FSD200
4
Typical Performance Characteristics
(These characteristic graphs are normalized at Ta=25°C)
Figure 1. Freqency vs. Temp Figure 2. Operating Current vs. Temp
Operating Current
0.5
0.55
0.6
0.65
0.7
0.75
0.8
-25 0 25 50 75 100 125
Operating Current Temp
Operating Current
0.5
0.55
0.6
0.65
0.7
0.75
0.8
-25 0 25 50 75 100 125
Operating Current Temp
Output Frequency
0
0.2
0.4
0.6
0.8
1
1.2
-25 0 25 50 75 100 125
Fosc
Figure 3. Peak Current Limit vs. Temp Figure 4. Feedback Source Current vs. Temp
Over Current
0.00
0.20
0.40
0.60
0.80
1.00
1.20
-25 0 25 50 75 100 125
Iover
Feedback Current
0
0.2
0.4
0.6
0.8
1
1.2
-25 0 25 50 75 100 125
Feedback Current
Figure 5. ShutDown Feedback Voltage vs. Temp
Shutdown Feedback Voltage
0
0.2
0.4
0.6
0.8
1
1.2
-25 0 25 50 75 100 125
Shutdow n Feedback Voltage
Figure 6. Operating Current vs. Vcc Voltage

FSD200
5
Typical Performance Characteristics (Continued)
(These characteristic graphs are normalized at Ta=25°C)
Figure 7. On State Resistance vs. Temp Figure 8. Breakdown Voltage vs. Temp
On _S tate_Re s is tan ce
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
-40 -25 0 25 50 75 100 125
Rds(on)
Breakdow n Voltage
650
700
750
800
850
900
-25 0 25 50 75 100 125
Breakdow n Voltage

FSD200
6
Typical Circuit
FSD200
Snubber
Circuit
+
+
+
PWM
Feedback
Circuit
+
Load

FSD200
7
Product Information
Basic system topology of FSD200/210 is the same as
the original FSDH565/0165 devices. The FSD210
devices require a bias winding, whereas the FSD200
devices do not. Other features of the two types of
devices are almost the same and are listed below.
Figure 1. Line-up Table
Functional Description
1. Startup : At startup, an internal high voltage current
source supplies the internal bias and charges the
external Vcc capacitor as shown in Figure 1. In the
case of the FSD210, when Vcc reaches 8.7V the
device starts switching and the internal high voltage
current source is disabled. The device continues to
switch provided that Vcc does not drop below 6.7V.
After startup the bias is supplied from the auxiliary
transformer winding. In the case of FSD200, Vcc is
continuously supplied from the external high voltage
source and Vcc is regulated to 7V by an internal high
voltage regulator (HV Reg). The internal startup switch
is not disabled and an auxiliary winding is not required.
Figure 2.
Figure 2. Internal startup circuit
2. Feedback Control : The FSD200/210 are voltage
mode devices as shown in Figure 3. Usually, an opto-
coupler and KA431 type voltage reference are used to
implement the feedbacknetwork. The feedback voltage
is compared with an internally generated sawtooth
waveform. This directly controls the duty cycle. When
the KA431 reference pin voltage exceeds the internal
reference voltage of 2.5V, the optocoupler LED current
increase pulling down the feedback voltage and
reducing the duty cycle. This will happen when the
input voltage increases or the output load decreases.
3. Leading edge blanking (LEB) : When the MOSFET
turns on, there will usually be a large current spike
through the MOSFET. This is caused by primary side
capacitance and secondary side rectifier reverse
recovery. This could cause premature termination of
the switching pulse if it exceeded the over-current
threshold. Therefore, the FPS uses a leading edge
blanking (LEB) circuit. This circuit inhibits the pver-
current comparator for a short time after the MOSFET
is turned on.
Figure 3. PWM and feedback circuit
4. Protection Circuit : The FSD200/210 has 2 self
protection functions: over-load protection (OLP) and
thermal shutdown (TSD). Because these protection
circuits are fully integrated into the IC with no external
components, system reliability is improved without cost
increase. If either of these functions are triggered, the
FPS starts an auto-restart cycle. Once the fault
condition occurs, switching is terminated and the
MOSFET remains off. This cause Vcc to fall. When Vcc
reaches the UVLO stop voltage (6.7:FSD210,
6V:FSD200), the protection is reset and the internal
high voltage current source charges the Vcc capacitor.
When Vcc reaches the UVLO start voltage
(8.7V:FSD210, 7V:FSD200), the device attempts to
resume normal operation. If the fault condition is no
longer present start up will be successful. If it is still
present the cycle is repeated. This is shown in Figure 4.
ooooBurst function
145℃(Hys 50℃)145℃(Hys 50℃)145℃(Hys 50℃)145℃(Hys 50℃)Thermal Shutdown(typ.)
6W4W6W4W85~265VAC
Output
Power
Package Type
Operating Current (max)
Frequency Modulation
Switching Frequency
Current Limit (typ.Iover)
On-state Resistance (max)
Breakdown vol tage (min)
Product Parameter
7DIP/7SMD7DIP/7SMD7DIP/7SMD7DIP/7SMD
Without Bias WindingWith Bias Winding
770uA770uA770uA770uA
134kHz134kHz134kHz134kHz
±4kHz
0.3A
32ohm
700V
BCDMOS
FSD200
±4kHz
0.3A
32ohm
700V
BCDMOS
FSD210
±4kHz
0.48A
18ohm
700V
BCDMOS
FSD211
18ohm
±4kHz
0.48A
700V
BCDMOS
FSD201
ooooBurst function
145℃(Hys 50℃)145℃(Hys 50℃)145℃(Hys 50℃)145℃(Hys 50℃)Thermal Shutdown(typ.)
6W4W6W4W85~265VAC
Output
Power
Package Type
Operating Current (max)
Frequency Modulation
Switching Frequency
Current Limit (typ.Iover)
On-state Resistance (max)
Breakdown vol tage (min)
Product Parameter
7DIP/7SMD7DIP/7SMD7DIP/7SMD7DIP/7SMD
Without Bias WindingWith Bias Winding
770uA770uA770uA770uA
134kHz134kHz134kHz134kHz
±4kHz
0.3A
32ohm
700V
BCDMOS
FSD200
±4kHz
0.3A
32ohm
700V
BCDMOS
FSD210
±4kHz
0.48A
18ohm
700V
BCDMOS
FSD211
18ohm
±4kHz
0.48A
700V
BCDMOS
FSD201
Vin,dc
Vstr
Vcc HV
Reg.
Vin,dc
Vstr
Vcc
7V
Vcc>8.7V
off
Vcc<6.7V
on
Istr Istr
FSD21x FSD20x
4
OSC
Vcc Vref
5uA 0.25mA
VSD
R
FB Gate
driver
OLP
Vfb
KA431
Cfb
Vo

FSD200
8
Figure 4. Protection block
4.1 Over Load Protection (OLP) : Overload is a load
current that exceeds a pre-set level due to an abnormal
situation. If this occurs, the protection circuit should be
triggered to protect the SMPS. It is possible that a short
term load transient can occur under normal operation. If
this occurs the system should not shut down. In order
to avoid false shut-downs, the over load protection
circuit is designed to trigger after a delay. Therefore the
device can discriminate between transient overloads
and true faul conditions. The device is pulse-by-pulse
current limited and therefore, for a given input voltage,
the maximum input power is limited. If the load tries to
draw more than this, the output voltage will drop below
its set value. This reduces the opto-coupler LED
current which in turn will reduce the photo-transistor
current. Therefore, the 250uA current source will
charge the feedback pin capacitor, Cfb, and the
feedback voltage, Vfb, will increase. The input to the
feedback comparator is clamped at around 3V.
Therefore, once Vfb reaches 3V, the device is
switching at maximum power. At this point the 250uA
current source is blocked and the 5uA source continues
to charge Cfb. Once Vfb reaches 4V, switching stops.
Therefore the shutdown delay time is set by the time
required to charge Cfb from 3V to 4V with 5uA as
shown in Fig. 5.
Figure 5. Over load protection delay
4.2 Thermal Shutdown (TSD) : The SenseFET and
the control IC are assembled in one package. This
makes it easy for the control IC to detect the
temperature of the SenseFET. When the temperature
exceeds approximately 150°C, thermal shutdown is
activated. Thermal shutdown has a Hysteresis of 50°C
and so the temperature must drop to 100°C before the
device attempts to restart.
5. Soft Start : FSD200/210 has an internal soft start
circuit that increases the feedback voltage together
with the MOSFET current slowly at start up. The soft
start time is 3msec in FSD200/210.
OSC
4
Vfb
S
R
QGATE
DRIVER
FSD2xx
OLP, TSD
Protection Block
5uA 250uA
RESET Vth 4V
OLP
+
-
TSD
His 50℃
S
R
Q
/8
Cfb
3VR
Vfb
t
3V
OLP
4V
t1 t3
10V
t1<<t2, t3
t1 = -1/RCΧln( 1-v(t1)/R )
v(t1)=3V
t2 = CΧ[v(t1+t2)-v(t1)]ΧIdelay [v(t1+t2)-v(t1)]=1V, Idelay=5uA
t2
FPS Switching Area
Idelay (5uA) charges Cfb
T
SD - 50℃
Temperature
t
TSD(℃)
FPS Switching Area
TSD Hysteresis

FSD200
9
6. Burst operation : In order to minimize the power
dissipation in standby mode, the FSD200/210
implements burst mode.
Figure 6. Circuit for burst operation
As the load decreases, the feedback voltage
decreases. The device automatically enters burst mode
when the feedback voltage drops below 0.5V. At this
point switching stops and the output voltages start to
drop. This causes the feedback voltage to rise. Once is
passes 0.6V switching starts again. The feedback
voltage falls and the process repeats. Burst mode
operation alternately enables and disables switching of
the power MOSFET to reduce the switching loss in the
standby mode.
Figure 7. Burst mode operation
7. Frequency Modulation
0.2A
0.25A
0.3A
3mS
Iover
FSD200/210
I(A)
t
OSC
4
Vfb
S
R
QGATE
DRIVER
5uA 250uA
0.6V
/0.5V
on/off
FSD2xx
Burst Operation Block
VFB
Vds
0.5V
0.6V
Ids
Vo
Voset
time
130kHz
131kHz
132kHz
133kHz
134kHz
135kHz
136kHz
137kHz
138kHz
2mS
A
B
C
130kHz134kHz138kHz
Sawtooth
waveform
Ton
Vfb
Vdrain
Idrain
ABC

FSD200
10
Typical application circuit 1. Cellular Phone Charger Example Circuit
For FSD21x
L3
4uH
C8
330uF 16V
L1 330uH
R19
510R
R8
510R
D6
1N4148
R3
47k
TH1 10k
Vo
.
R15 3R0
R5
39R
Q1
KSP2222A
1
U2
TL431
D1
1N4007
R16 3R0
C9 470nF
TX1
R10
2.2k
C2
4.7uF 400V
0
3
C4
100nF
H11A817B
U3
R1 4.7k
4
C1
4.7UF 400V
C5
33uF 50V
7
Fuse
1W, 10R
C6 152M-Y, 250Vac
D3
1N4007
8
H11A817B
2
1
R7
4.7M, 1/4W
AC
R17 3R0
D2
1N4007
D4
1N4007
R9
56R
D5
UF4007
AC
0
R12
2k
C7
330uF 16V
(5.2V/0.65A)
R4
47k
C10
4.7uF 50V
U1
FSD210
8
5
7
1
4
2 3
Vstr
Vcc
Drain
GND
Vfb
GND GND
D7
SB260
R6
4.7M 1/4W
0
C3
102k 1kV
TO-92 Type, LM431Vref=2.495V(Typ.)1KA431AZU2
Iover=0.3A, Fairchildsemi0.5A/700V1FSD210
(FSD200)
U1
-CTR 80~160%1H11A817AU3
DO41 Type1A/1000V Ultra Fast Diode1UF4007D5
D0-213 Type10mA/100V Junction Diode11N4148D6
D0-41 Type2A/60V Schottky Diode1SB260D7
1
4
Quantity
Ic=600mA, Vce=30V
1A/1000V Junction Rectifier
Description
TO-92 TypeKSP2222AQ1
DO41 Type1N4007D1,D2,D3,D4
Requirement/CommentPart #Reference
TO-92 Type, LM431Vref=2.495V(Typ.)1KA431AZU2
Iover=0.3A, Fairchildsemi0.5A/700V1FSD210
(FSD200)
U1
-CTR 80~160%1H11A817AU3
DO41 Type1A/1000V Ultra Fast Diode1UF4007D5
D0-213 Type10mA/100V Junction Diode11N4148D6
D0-41 Type2A/60V Schottky Diode1SB260D7
1
4
Quantity
Ic=600mA, Vce=30V
1A/1000V Junction Rectifier
Description
TO-92 TypeKSP2222AQ1
DO41 Type1N4007D1,D2,D3,D4
Requirement/CommentPart #Reference
1.
1. Schematic diagram(Top view) Schematic diagram(Top view)
2.
2. Core & Bobbin Core & Bobbin
CORE : EE1616
BOBBIN : EE1616(H)
W4
W3
W2
W1
2mm 2mm
1
2
3
4
8
7
6
5
3.
3. W inding specification W inding specification
4.
4. Electrical characteristic E lectrica l ch ara cte ristic
INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 3Ts
SOLENOID W INDING9 Ts0.40ΦΧ18 →7W4
INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 3Ts
SOLENOID W INDING50 Ts0.16ΦΧ11 →openW3
INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 2Ts
CENTER SOLENOID
WINDING
18 Ts0.16ΦΧ14 →3W2
INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 2Ts
SOLENOID W INDING99 Ts0.16ΦΧ11 →2W1
W inding M ethod
W inding M ethod
Turns
Turns
Wire
Wire
Pin (S
Pin (S → →F) F)
No.
No.
INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 3Ts
SOLENOID W INDING9 Ts0.40ΦΧ18 →7W4
INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 3Ts
SOLENOID W INDING50 Ts0.16ΦΧ11 →openW3
INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 2Ts
CENTER SOLENOID
WINDING
18 Ts0.16ΦΧ14 →3W2
INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 2Ts
SOLENOID W INDING99 Ts0.16ΦΧ11 →2W1
W inding M ethod
W inding M ethod
Turns
Turns
Wire
Wire
Pin (S
Pin (S → →F) F)
No.
No.
3,4,7,8 short
100kHz, 1V
50uH1 – 2LEAKAGE L
1kHz, 1V1.6m H1 – 2INDUCTANCE
REMARKS
REMARKS
S P E C IF IC A T IO N
SPECIFICATION
TERM INAL
TERMINAL
IT E M
IT E M
3,4,7,8 short
100kHz, 1V
50uH1 – 2LEAKAGE L
1kHz, 1V1.6m H1 – 2INDUCTANCE
REMARKS
REMARKS
S P E C IF IC A T IO N
SPECIFICATION
TERM INAL
TERMINAL
IT E M
IT E M

FSD200
11
Typical application circuit 2. Buck Convertor
U1
FSD21x
8
5
7
1
4
2 3
Vstr
Vcc
Drain
GND
Vfb
GND GND
ZD1
1N759A
D1
UF4004
Q1
2N3904
R2
100
C1
4.7uF/400V
12VGND
R1 100
C4
680uF 16V
Vin,dc
C2
10uF/50V
GND
C3
47uF 25V
L1
1mH
R3
750
0
D2
UF4004
C2
10uF/50V
C1
4.7uF/400V R4
5.6k
12V
L1
1mH
Q1
2N3904
0
ZD1
1N759A
Vin,dc
R2
100
C5
4.7uF/50V
C4
680uF 16V
GND
GND
R1 100
D1
UF4004
R3
750
C3
47uF 25V
U1
FSD20x
8
5
7
1
4
2 3
Vstr
Vcc
Drain
GND
Vfb
GND GND
D2
UF4004
1
1
1
2
Quantity
0.5A/700V
12V 0.5W
Ic=200mA, Vce=40V
1A/1000V Ultra Fast Diode
Description
Iover=0.3A, FairchildFSD210
(FSD200)
U1
DO-35 Type1N759AZD1
TO-92 Type2N3904Q1
DO41 TypeUF4007D1,D2
Requirement/CommentPart #Reference
1
1
1
2
Quantity
0.5A/700V
12V 0.5W
Ic=200mA, Vce=40V
1A/1000V Ultra Fast Diode
Description
Iover=0.3A, FairchildFSD210
(FSD200)
U1
DO-35 Type1N759AZD1
TO-92 Type2N3904Q1
DO41 TypeUF4007D1,D2
Requirement/CommentPart #Reference

FSD200
12
Package Dimensions
7-DIP

FSD200
13
Ordering Information
Product Number Package Rating Topr (°C)
FSD200 7DIP 700V, 0.5A −25°C to +85°C

FSD200
8/28/03 0.0m 001
Stock#DSxxxxxxxx
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