TABLE OF CONTENTS
CHAPTER 1: INTRODUCTION..............................................................................................................................1
1.0 GENERAL DESCRIPTION..................................................................................................................................1
1.1 PMC/PCI INTERFACE.....................................................................................................................................2
1.2 LOCAL CONTROL LOGIC.................................................................................................................................2
1.3 TRANSMIT/RECEIVE FIFOS............................................................................................................................2
1.4 UNIVERSAL SERIAL CONTROLLERS ................................................................................................................2
1.5 MULTIPROTOCOL TRANSCEIVERS...................................................................................................................2
1.6 GENERAL PURPOSE IO ...................................................................................................................................2
1.7 CONNECTOR INTERFACE ................................................................................................................................2
CHAPTER 2: LOCAL SPACE REGISTERS..........................................................................................................3
2.0 REGISTER MAP...............................................................................................................................................3
2.1 GSC FIRMWARE REGISTERS...........................................................................................................................4
2.1.1 FIRMWARE REVISION:LOCAL OFFSET 0X0000..............................................................................................5
2.1.2 BOARD CONTROL:LOCAL OFFSET 0X0004....................................................................................................5
2.1.3 BOARD STATUS:LOCAL OFFSET 0X0008........................................................................................................6
2.1.5 CHANNEL TX ALMOST FLAGS:LOCAL OFFSET 0X0010 /0X0020 /0X0030 /0X0040.....................................6
2.1.6 CHANNEL RX ALMOST FLAGS:LOCAL OFFSET 0X0014 /0X0024 /0X0034 /0X0044.....................................6
2.1.7 CHANNEL FIFO: LOCAL OFFSET 0X0018 /0X0028 /0X0038 /0X0048 ..........................................................6
2.1.8 CHANNEL CONTROL/STATUS:LOCAL OFFSET 0X001C /0X002C /0X003C /0X004C....................................7
2.1.9 CHANNEL SYNC DETECT BYTE:LOCAL OFFSET 0X0050 /0X0054 /0X0058 /0X005C..................................7
2.1.10 INTERRUPT REGISTERS...................................................................................................................................8
2.1.10.1 INTERRUPT CONTROL:LOCAL OFFSET 0X0060 ......................................................................................9
2.1.10.2 INTERRUPT STATUS/CLEAR:LOCAL OFFSET 0X0064..............................................................................9
2.1.10.3 INTERRUPT EDGE/LEVEL &INTERRUPT HI/LO:LOCAL OFFSET 0X0068 /0X006C.................................9
2.1.11 CHANNEL PIN SOURCE:LOCAL OFFSET 0X0080 /0X0084 /0X0088 /0X008C............................................10
2.1.12 CHANNEL PIN STATUS:LOCAL OFFSET 0X0090 /0X0094 /0X0098 /0X009C.............................................13
2.1.13 PROGRAMMABLE CLOCK REGISTERS:LOCAL OFFSET 0X00A0 /0X00A4 /0X00A8....................................14
2.1.14 FIFO COUNT REGISTER:LOCAL OFFSET 0X00D0 /0X00D4 /0X00D8 /0X00DC .......................................14
2.1.15 FIFO SIZE REGISTER:LOCAL OFFSET 0X00E0 /0X00E4 /0X00E8 /0X00EC .............................................14
2.1.16 FEATURES REGISTER:LOCAL OFFSET 0X00FC............................................................................................14
2.2 UNIVERSAL SERIAL CONTROLLER REGISTERS ..............................................................................................15
2.2.1 USC RESET ..................................................................................................................................................15
2.2.2 8-BIT USC REGISTER ACCESS......................................................................................................................15
2.2.3 USC DATA TRANSFER..................................................................................................................................15
2.2.4 USC REGISTER MEMORY MAP.....................................................................................................................16
CHAPTER 3: PROGRAMMING...........................................................................................................................17
3.0 INTRODUCTION.............................................................................................................................................17
3.1 RESETS.........................................................................................................................................................17
3.2 FIFO ALMOST FLAGS...................................................................................................................................17
3.3 PCI DMA.....................................................................................................................................................18
3.4 INTERRUPTS .................................................................................................................................................18
3.5 CLOCK SETUP...............................................................................................................................................19
3.6 PROGRAMMABLE OSCILLATOR /PROGRAMMABLE CLOCKS .........................................................................20
3.7 MULTIPROTOCOL TRANSCEIVER CONTROL ..................................................................................................21
3.8 DCE/DTE MODE .........................................................................................................................................21
3.9 GENERAL PURPOSE IO .................................................................................................................................21
CHAPTER 4: PCI INTERFACE ............................................................................................................................22
4.0 PCI INTERFACE REGISTERS ..........................................................................................................................22
4.1 PCI REGISTERS.............................................................................................................................................22
