Holtek HT45F4050 User manual

A/D NFC Flash MCU
HT45F4050
Revision: V1.00 Date: September 11, 2018

Rev. 1.00 2 September 11, 2018 Rev. 1.00 3 September 11, 2018
HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Table of Contents
Features............................................................................................................ 7
CPU Features ......................................................................................................................... 7
Peripheral Features................................................................................................................. 7
General Description......................................................................................... 8
Block Diagram.................................................................................................. 9
Pin Assignment.............................................................................................. 10
Pin Description .............................................................................................. 10
Absolute Maximum Ratings.......................................................................... 15
D.C. Characteristics....................................................................................... 15
A.C. Characteristics....................................................................................... 18
Memory Characteristics ................................................................................ 20
A/D Converter Electrical Characteristics..................................................... 21
Internal Reference Voltage Electrical Characteristics................................ 22
LVD & LVR Electrical Characteristics .......................................................... 23
Comparator Electrical Characteristics ........................................................ 24
Software Controlled LCD Driver Electrical Characteristics....................... 25
Power on Reset Characteristics................................................................... 25
System Architecture...................................................................................... 25
Clocking and Pipelining......................................................................................................... 26
Program Counter................................................................................................................... 26
Stack ..................................................................................................................................... 27
Arithmetic and Logic Unit – ALU ........................................................................................... 27
Flash Program Memory................................................................................. 28
Structure................................................................................................................................ 28
Special Vectors ..................................................................................................................... 28
Look-up Table........................................................................................................................ 29
Table Program Example........................................................................................................ 29
In Circuit Programming – ICP ............................................................................................... 30
On-Chip Debug Support – OCDS ......................................................................................... 31
Data Memory .................................................................................................. 31
Structure................................................................................................................................ 32
Data Memory Addressing...................................................................................................... 32
General Purpose Data Memory ............................................................................................ 32
Special Purpose Data Memory ............................................................................................. 33
Special Function Register Description........................................................ 34
Indirect Addressing Registers – IAR0, IAR1, IAR2 ............................................................... 34
Memory Pointers – MP0, MP1L/MP1H, MP2L/MP2H........................................................... 34
Accumulator – ACC............................................................................................................... 36
Program Counter Low Register – PCL.................................................................................. 36

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HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Look-up Table Registers – TBLP, TBHP, TBLH..................................................................... 36
Status Register – STATUS .................................................................................................... 36
EEPROM Data Memory.................................................................................. 38
EEPROM Data Memory Structure ........................................................................................ 38
EEPROM Registers .............................................................................................................. 38
Reading Data from the EEPROM ........................................................................................ 39
Writing Data to the EEPROM................................................................................................ 40
Write Protection..................................................................................................................... 40
EEPROM Interrupt ................................................................................................................ 40
Programming Considerations................................................................................................ 41
Oscillators ...................................................................................................... 42
Oscillator Overview ............................................................................................................... 42
System Clock Congurations ............................................................................................... 42
External Crystal/Ceramic Oscillator – HXT ........................................................................... 43
Internal RC Oscillator – HIRC ............................................................................................... 44
External 32.768kHz Crystal Oscillator – LXT ........................................................................ 44
Internal 32kHz Oscillator – LIRC .......................................................................................... 45
Operating Modes and System Clocks ......................................................... 45
System Clocks ...................................................................................................................... 45
System Operation Modes...................................................................................................... 46
Control Register .................................................................................................................... 47
Operating Mode Switching ................................................................................................... 50
Standby Current Considerations .......................................................................................... 54
Wake-up................................................................................................................................ 54
Watchdog Timer............................................................................................. 55
Watchdog Timer Clock Source.............................................................................................. 55
Watchdog Timer Control Register ......................................................................................... 55
Watchdog Timer Operation ................................................................................................... 56
Reset and Initialisation.................................................................................. 57
Reset Functions .................................................................................................................... 57
Reset Initial Conditions ........................................................................................................ 61
Input/Output Ports ........................................................................................ 65
Pull-high Resistors ................................................................................................................ 66
Port A Wake-up ..................................................................................................................... 66
I/O Port Control Registers ..................................................................................................... 67
I/O Port Source Current Control............................................................................................ 67
I/O Port Power Source Control.............................................................................................. 69
Pin-shared Functions ............................................................................................................ 70
I/O Pin Structures.................................................................................................................. 77
Programming Considerations ............................................................................................... 77
Timer Modules – TM ...................................................................................... 78
Introduction ........................................................................................................................... 78
TM Operation ........................................................................................................................ 78
TM Clock Source................................................................................................................... 78

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A/D NFC Flash MCU
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A/D NFC Flash MCU
TM Interrupts......................................................................................................................... 78
TM External Pins .................................................................................................................. 79
Programming Considerations................................................................................................ 80
Compact Type TM – CTM .............................................................................. 81
Compact Type TM Operation ................................................................................................ 81
Compact Type TM Register Description................................................................................ 81
Compact Type TM Operating Modes .................................................................................... 85
Standard Type TM – STM .............................................................................. 91
Standard Type TM Operation................................................................................................ 91
Standard Type TM Register Description ............................................................................... 91
Standard Type TM Operation Modes .................................................................................... 95
Periodic Type TM – PTM.............................................................................. 105
Periodic Type TM Operation................................................................................................ 105
Periodic Type TM Register Description ............................................................................... 105
Periodic Type TM Operation Modes.................................................................................... 109
Analog to Digital Converter – ADC..............................................................118
A/D Converter Overview ......................................................................................................118
A/D Converter Register Description .....................................................................................119
A/D Converter Reference Voltage....................................................................................... 122
A/D Converter Input Signals................................................................................................ 123
A/D Converter Operation..................................................................................................... 124
A/D Conversion Rate and Timing Diagram ......................................................................... 125
Summary of A/D Conversion Steps..................................................................................... 126
Programming Considerations.............................................................................................. 127
A/D Conversion Function .................................................................................................... 127
A/D Converter Programming Examples .............................................................................. 128
Comparator .................................................................................................. 130
Comparator Operation ........................................................................................................ 130
Comparator Registers ......................................................................................................... 130
Input Offset Calibration ...................................................................................................... 132
Serial Interface Module – SIM ..................................................................... 133
SPI Interface ....................................................................................................................... 133
I2C Interface ........................................................................................................................ 142
UART Interface............................................................................................. 152
UART External Pins ............................................................................................................ 153
UART Data Transfer Scheme.............................................................................................. 153
UART Status and Control Registers.................................................................................... 153
Baud Rate Generator .......................................................................................................... 159
UART Setup and Control..................................................................................................... 160
UART Transmitter................................................................................................................ 161
UART Receiver ................................................................................................................... 162
Managing Receiver Errors .................................................................................................. 164
UART Interrupt Structure..................................................................................................... 165
UART Power Down and Wake-up....................................................................................... 166

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A/D NFC Flash MCU
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A/D NFC Flash MCU
Near Field Communication – NFC.............................................................. 167
NFC Power Management.................................................................................................... 167
NFC Memory....................................................................................................................... 168
NFC Control Registers ....................................................................................................... 171
Collisions between the MCU and NFC RF Interface........................................................... 178
NFC State Diagram and Logical Status Descriptions ......................................................... 179
NFC Command Set............................................................................................................. 181
SCOM Controlled LCD Driver ..................................................................... 189
LCD Operation .................................................................................................................... 189
LCD Bias Current Control ................................................................................................... 190
Interrupts ...................................................................................................... 191
Interrupt Registers............................................................................................................... 191
Interrupt Operation .............................................................................................................. 196
External Interrupts............................................................................................................... 197
Comparator Interrupt........................................................................................................... 198
Multi-function Interrupts....................................................................................................... 198
A/D Converter Interrupt ....................................................................................................... 198
Time Base Interrupts........................................................................................................... 198
Serial Interface Module Interrupt......................................................................................... 200
UART Transfer Interrupt ...................................................................................................... 200
NFC Interrupt ...................................................................................................................... 201
EEPROM Write Interrupt..................................................................................................... 201
LVD Interrupt ....................................................................................................................... 201
TM Interrupts ...................................................................................................................... 201
Interrupt Wake-up Function................................................................................................. 202
Programming Considerations.............................................................................................. 202
Low Voltage Detector – LVD ....................................................................... 203
LVD Register ....................................................................................................................... 203
LVD Operation..................................................................................................................... 204
Conguration Options................................................................................. 205
Application Descriptions ............................................................................ 206
NFC Operating Principle ..................................................................................................... 206
Hardware Block Diagram .................................................................................................... 206
Hardware Circuit ................................................................................................................. 208
Instruction Set.............................................................................................. 209
Introduction ......................................................................................................................... 209
Instruction Timing ................................................................................................................ 209
Moving and Transferring Data............................................................................................. 209
Arithmetic Operations.......................................................................................................... 209
Logical and Rotate Operation ............................................................................................. 210
Branches and Control Transfer ........................................................................................... 210
Bit Operations ..................................................................................................................... 210
Table Read Operations ....................................................................................................... 210
Other Operations................................................................................................................. 210

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A/D NFC Flash MCU
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A/D NFC Flash MCU
Instruction Set Summary .............................................................................211
Table Conventions................................................................................................................211
Extended Instruction Set ..................................................................................................... 213
Instruction Denition................................................................................... 215
Extended Instruction Denition ........................................................................................... 224
Package Information ................................................................................... 231
48-pin LQFP (7mm × 7mm) Outline Dimensions ................................................................ 232

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A/D NFC Flash MCU
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A/D NFC Flash MCU
Features
CPU Features
• Operating Voltage
♦fSYS=4MHz: 1.8V~5.5V
♦fSYS=8MHz: 2.0V~5.5V
♦fSYS=12MHz: 2.7V~5.5V
♦fSYS=16MHz: 3.3V~5.5V
• Up to 0.25μs instruction cycle with 16MHz system clock at VDD=5V
• Power down and wake-up functions to reduce power consumption
• Oscillator types
♦External High Speed Crystal – HXT
♦Internal High Speed RC – HIRC
♦External Low Speed 32.768kHz Crystal – LXT
♦Internal Low Speed 32kHz RC – LIRC
• Multi-mode operation: NORMAL, SLOW, IDLE and SLEEP
• Fully integrated internal oscillators require no external components
• All instructions executed in one to three instruction cycles
• Table read instructions
• 115 powerful instructions
• 8-level subroutine nesting
• Bit manipulation instruction
Peripheral Features
• Flash Program Memory: 8K×16
• RAM Data Memory: 256×8
• True EEPROM Memory: 64×8
• Watchdog Timer function
• 41 bidirectional I/O lines
• I/O source current programmable
• Software controlled 4-SCOM lines LCD driver with 1/2 bias
• Two external interrupt lines shared with I/O pins
• Multiple Timer Modules for time measure, input capture, compare match output, PWM output or
single pulse output functions
• Serial Interfaces Module – SIM for SPI or I2C
• Single Fully-duplex Universal Asynchronous Receiver and Transmitter Interface – UART
• Dual Time-Base functions for generation of xed time interrupt signals
• One comparator function
• 13 external channels 12-bit resolution A/D converter

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A/D NFC Flash MCU
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A/D NFC Flash MCU
• NFC AFE (can only be tuned under VDD=2.2V~5.5V)
♦Standards: NFC Forum Type 2 and ISO14443 Type A
♦Demodulation: 100% ASK
♦RF data rate: 106 kbit/s
♦LDO supply power (1.8V) for 100% ASK demodulator and NFC clock recovery
♦NFC EEPROM: 256 bytes
♦NFC SRAM: 64 bytes
• Low Voltage Reset function
• Low Voltage Detect function
• Package type: 48-pin LQFP
General Description
The device is an Flash Memory type 8-bit high performance RISC architecture microcontroller
especially designed fro Near Field Communication, NFC, applications. Offering users the
convenience of Flash Memory multi-programming features, the device also includes a wide range of
functions and features. Other memory includes an area of RAM Data Memory as well as an area of
true EEPROM memory for storage of non-volatile data such as serial numbers, calibration data etc,
however the unique feature of this device is its fully integrated NFC circuitry.
Analog features include a multi-channel 12-bit A/D converter and a comparator function. Multiple
and extremely flexible Timer Modules provide timing, pulse generation and PWM generation
functions. Communication with the outside world is catered for by including fully integrated SPI,
I2C and UART interface functions, popular interfaces which provide designers with a means of easy
communication with external peripheral hardware. Protective features such as an internal Watchdog
Timer, Low Voltage Reset and Low Voltage Detector coupled with excellent noise immunity and
ESD protection ensure that reliable operation is maintained in hostile electrical environments.
A full choice of external and internal, high speed and low speed oscillator functions are provided
including a fully integrated system oscillator which requires no external components for its
implementation. The ability to operate and switch dynamically between a range of operating modes
using different clock sources gives users the ability to optimise microcontroller operation and
minimize power consumption.
The device includes a new NFC Forum compliant Type 2 tag product based on NFC-A technology
for the 13.56MHz contactless IC card standards and for the ISO/IEC14443 Type A specications.
Being compliant with the ISO/IEC14443A Reader/Writer Passive communication mode, the device
can be accessed by other NFC devices with an extremely short connection time with the advantage
of extra-low power consumption.
The inclusion of flexible I/O programming features, timebase functions along with many other
features ensure that the device will nd excellent use in applications such as smart meters, smart
appliances, NFC data loggers in addition to many others.

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HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Block Diagram
HIRC
4/8/12MHz
LIRC
32kHz
MUX
HT8 MCU Core
Reset
Circuit
Interrupt
Controller
INT0~INT1
ROM
8K × 16
EEPROM
64 × 8
Watchdog
Timer
RAM
256 × 8
Stack
8-level
LVD/LVR
SYSCLK
Bus
Digital Peripherals
Time Bases
Pin-Shared
With Port A
I/O
Pin-Shared
Function
Port A
Driver
Port B
Driver
Port C
Driver
Port D
Driver
Port E
Driver
PA0~PA7
PB0~PB7
PC0~PC7
PD0~PD3
PE0~PE4
Port F
Driver PF0~PF7
VDD
AVDD
VDD
AVDD
VSS
AVSS
VSS
AVSS
RES
Pin-Shared
With Port B
Clock System
HXT
LXT
XT2
XT1
Pin-Shared
With Port F
OSC2
OSC1
Pin-Shared
With Port B
MUX
: Pin-Shared Node
LA
LB
NFC State Machine
NFC Memory
ASK 100%
Demodulator
Limiter
Modulator
Clock Recovery
Field
Detector Regulator
VDD
NFC Peripheral
VSSN
Pin-Shared
With Port C/D/F
AN0~
AN12
VREF
Analog Peripherals
12-bit
ADC
AVDD
AVDD/2
AVDD/4
VR
VR/2
VR/4
PGA
AVDD
VREFI
Pin-Shared
With Port C
+
-
C+
C-
CX
Analog to Digital Converter
Pin-Shared With Port B
Comparator
Pin-Shared With Port F
CMP
VDDIO VDDIO
VBGREF
SCOM
Timers
UART
SIM
: SIM including SPI & I2C

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HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Pin Assignment
PB4/CTCK/CTPB
VSSN
VDD
PA3/INT1/SDO
PA2/ICPCK/OCDSCK PF3/SCK/SCL/SCOM3
PF0/SCS/SCOM0
PB3/CTP
PD3/AN11
PF6/AN12/C-
PF7/C+
PB1/PTPI/PTP
PB2/PTCK/PTPB
PB0/CX
PC6/STPI/STP/AN6
PC7/STCK/STPB/AN7
PD0/AN8 PD1/AN9
PD2/AN10
PC0/AN0/VREFI
AVSS
PF5/XT1
PF4/XT2
AVDD
PC5/AN5
PC4/AN4
PC1/AN1/CX/VREF
PC3/PTCK/PTPB/AN3
PC2/PTPI/PTP/AN2
PF1/SDO/SCOM1
PF2/SDI/SDA/SCOM2
PE4 PE3/VDDIO/CTP PE2/CTCK/CTPB PE1/STPI/STP
PE0/STCK/STPB
PA7/INT1/TX PA6/INT0/RX
PA0/ICPDA/OCDSDA
PA4/SDI/SDA
PB5/RES
PA5/SCK/SCL
PB7/OSC2
LB
LA
PB6/OSC1
VSS HT45F4050/HT45V4050
48 LQFP-A
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
25
26
27
28
29
30
31
32
33
34
35
36
45
464748 3738394041424344
PA1/INT0/SCS
Notes: 1. If the pin-shared pin functions have multiple outputs simultaneously, the desired pin-shared function is
determined by the corresponding software control bits.
2. The actual device and its equivalent OCDS EV device share the same package type, however the OCDS
EV device part number is HT45V4050. Pins OCDSCK and OCDSDA which are pin-shared with PA2
and PA0 are only used for the OCDS EV device.
Pin Description
With the exception of the power pins, all pins on the device can be referenced by its Port name,
e.g. PA0, PA1 etc., which refer to the digital I/O function of the pins. However these Port pins are
also shared with other function such as the Analog to Digital Converter, Timer Module pins etc.
The function of each pin is listed in the following table, however the details behind how each pin is
congured is contained in other sections of the datasheet.
Pin Name Function OPT I/T O/T Description
PA0/ICPDA/
OCDSDA
PA0
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-high and
wake-up.
ICPDA — ST CMOS ICP Address/Data pin
OCDSDA — ST CMOS OCDS Address/Data pin, for EV chip only
PA1/INT0/SCS
PA1
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-high and
wake-up.
INT0
PAS0
INTEG
INTC0
IFS1
ST — External Interrupt 0
SCS PAS0
IFS0 ST CMOS SPI slave select

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HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Pin Name Function OPT I/T O/T Description
PA2/ICPCK/
OCDSCK
PA2
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-high and
wake-up.
ICPCK — ST — ICP Clock pin
OCDSCK — ST — OCDS Clock pin, for EV chip only
PA3/INT1/SDO
PA3
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-high and
wake-up.
INT1
PAS0
INTEG
INTC2
IFS1
ST — External Interrupt 1
SDO PAS0 — CMOS SPI data output
PA4/SDI/SDA
PA4
PAPU
PAWU
PAS1
ST CMOS General purpose I/O. Register enabled pull-high and
wake-up.
SDI PAS1
IFS0 ST — SPI data input
SDA PAS1
IFS0 ST NMOS I2C data line
PA5/SCK/SCL
PA5
PAPU
PAWU
PAS1
ST CMOS General purpose I/O. Register enabled pull-high and
wake-up.
SCK PAS1
IFS0 ST CMOS SPI serial Clock
SCL PAS1
IFS0 ST NMOS I2C clock line
PA6/INT0/RX
PA6
PAPU
PAWU
PAS1
ST CMOS General purpose I/O. Register enabled pull-high and
wake-up.
INT0
PAS1
INTEG
INTC0
IFS1
ST — External Interrupt 0
RX PAS1 ST — UART RX serial data input
PA7/INT1/TX
PA7
PAPU
PAWU
PAS1
ST CMOS General purpose I/O. Register enabled pull-high and
wake-up.
INT1
PAS1
INTEG
INTC2
IFS1
ST — External Interrupt 1
TX PAS1 — CMOS UART TX serial data output
PB0/CX PB0 PBPU
PBS0 ST CMOS General purpose I/O. Register enabled pull-high.
CX PBS0 — CMOS Comparator output
PB1/PTPI/PTP
PB1 PBPU
PBS0 ST CMOS General purpose I/O. Register enabled pull-high.
PTPI PBS0
IFS0 ST — PTM capture input
PTP PBS0 — CMOS PTM output

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A/D NFC Flash MCU
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A/D NFC Flash MCU
Pin Name Function OPT I/T O/T Description
PB2/PTCK/PTPB
PB2 PBPU
PBS0 ST CMOS General purpose I/O. Register enabled pull-high.
PTCK PBS0
IFS0 ST — PTM clock input
PTPB PBS0 — CMOS PTM inverted output
PB3/CTP PB3 PBPU
PBS0 ST CMOS General purpose I/O. Register enabled pull-high.
CTP PBS0 — CMOS CTM output
PB4/CTCK/CTPB
PB4 PBPU
PBS1 ST CMOS General purpose I/O. Register enabled pull-high.
CTCK PBS1
IFS0 ST — CTM clock input
CTPB PBS1 — CMOS CTM inverted output
PB5/RES
PB5
PBPU
PBS1
RSTC
ST CMOS General purpose I/O. Register enabled pull-high.
RES PBS1
RSTC ST — External reset input
PB6/OSC1 PB6 PBPU
PBS1 ST CMOS General purpose I/O. Register enabled pull-high.
OSC1 PBS1 HXT — HXT oscillator pin
PB7/OSC2 PB7 PBPU
PBS1 ST CMOS General purpose I/O. Register enabled pull-high.
OSC2 PBS1 — HXT HXT oscillator pin
PC0/AN0/VREFI
PC0 PCPU
PCS0 ST CMOS General purpose I/O. Register enabled pull-high.
AN0 PCS0 AN — A/D Converter analog input
VREFI PCS0 AN — A/D Converter PGA input
PC1/AN1/CX/
VREF
PC1 PCPU
PCS0 ST CMOS General purpose I/O. Register enabled pull-high.
AN1 PCS0 AN — A/D Converter analog input
CX PCS0 — CMOS Comparator output
VREF PCS0 AN — A/D Converter reference voltage input
PC2/PTPI/PTP/
AN2
PC2 PCPU
PCS0 ST CMOS General purpose I/O. Register enabled pull-high.
PTPI PCS0
IFS0 ST — PTM capture input
PTP PCS0 — CMOS PTM output
AN2 PCS0 AN — A/D Converter analog input
PC3/PTCK/
PTPB/AN3
PC3 PCPU
PCS0 ST CMOS General purpose I/O. Register enabled pull-high.
PTCK PCS0
IFS0 ST — PTM clock input
PTPB PCS0 — CMOS PTM inverted output
AN3 PCS0 AN — A/D Converter analog input
PC4/AN4 PC4 PCPU
PCS1 ST CMOS General purpose I/O. Register enabled pull-high.
AN4 PCS1 AN — A/D Converter analog input
PC5/AN5 PC5 PCPU
PCS1 ST CMOS General purpose I/O. Register enabled pull-high.
AN5 PCS1 AN — A/D Converter analog input

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A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Pin Name Function OPT I/T O/T Description
PC6/STPI/STP/
AN6
PC6 PCPU
PCS1 ST CMOS General purpose I/O. Register enabled pull-high.
STPI PCS1
IFS0 ST — STM capture input
STP PCS1 — CMOS STM output
AN6 PCS1 AN — A/D Converter analog input
PC7/STCK/
STPB/AN7
PC7 PCPU
PCS1 ST CMOS General purpose I/O. Register enabled pull-high.
STCK PCS1
IFS0 ST — STM clock input
STPB PCS1 — CMOS STM inverted output
AN7 PCS1 AN — A/D Converter analog input
PD0/AN8 PD0 PDPU
PDS0 ST CMOS General purpose I/O. Register enabled pull-high.
AN8 PDS0 AN — A/D Converter analog input
PD1/AN9 PD1 PDPU
PDS0 ST CMOS General purpose I/O. Register enabled pull-high.
AN9 PDS0 AN — A/D Converter analog input
PD2/AN10 PD2 PDPU
PDS0 ST CMOS General purpose I/O. Register enabled pull-high.
AN10 PDS0 AN — A/D Converter analog input
PD3/AN11 PD3 PDPU
PDS0 ST CMOS General purpose I/O. Register enabled pull-high.
AN11 PDS0 AN — A/D Converter analog input
PE0/STCK/STPB
PE0 PEPU
PES0 ST CMOS General purpose I/O. Register enabled pull-high.
STCK PES0
IFS0 ST — STM clock input
STPB PES0 — CMOS STM inverted output
PE1/STPI/STP
PE1 PEPU
PES0 ST CMOS General purpose I/O. Register enabled pull-high.
STPI PES0
IFS0 ST — STM capture input
STP PES0 — CMOS STM output
PE2/CTCK/CTPB
PE2 PEPU
PES0 ST CMOS General purpose I/O. Register enabled pull-high.
CTCK PES0
IFS0 ST — CTM clock input
CTPB PES0 — CMOS CTM inverted output
PE3/VDDIO/CTP
PE3 PEPU
PES0 ST CMOS General purpose I/O. Register enabled pull-high.
VDDIO PES0 PWR — SPI/I2C/UART pin power supply
CTP PES0 ST — CTM clock input
PE4 PE4 PEPU
PES1 ST CMOS General purpose I/O. Register enabled pull-high.
PF0/SES/SCOM0
PF0 PFPU
PFS0 ST CMOS General purpose I/O. Register enabled pull-high.
SES PFS0
IFS0 ST CMOS SPI slave select
SCOM0 PFS0 — SCOM Software controlled LCD COM output

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HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Pin Name Function OPT I/T O/T Description
PF1/SDO/
SCOM1
PF1 PFPU
PFS0 ST CMOS General purpose I/O. Register enabled pull-high.
SDO PFS0 — CMOS SPI data output
SCOM1 PFS0 — SCOM Software controlled LCD COM output
PF2/SDI/SDA/
SCOM2
PF2 PFPU
PFS0 ST CMOS General purpose I/O. Register enabled pull-high.
SDI PFS0
IFS0 ST — SPI data input
SDA PFS0
IFS0 ST NMOS I2C data line
SCOM2 PFS0 — SCOM Software controlled LCD COM output
PF3/SCK/SCL/
SCOM3
PF3 PFPU
PFS0 ST CMOS General purpose I/O. Register enabled pull-high.
SCK PFS0
IFS0 ST CMOS SPI serial Clock
SCL PFS0
IFS0 ST NMOS I2C clock line
SCOM3 PFS0 — SCOM Software controlled LCD COM output
PF4/XT2 PF4 PFPU
PFS1 ST CMOS General purpose I/O. Register enabled pull-high.
XT2 PFS1 — LXT LXT oscillator pin
PF5/XT1 PF5 PFPU
PFS1 ST CMOS General purpose I/O. Register enabled pull-high.
XT1 PFS1 LXT — LXT oscillator pin
PF6/AN12/C-
PF6 PFPU
PFS1 ST CMOS General purpose I/O. Register enabled pull-high.
AN12 PFS1 AN — A/D Converter analog input
C- PFS1 AN — Comparator negative input
PF7/C+ PF7 PFPU
PFS1 ST CMOS General purpose I/O. Register enabled pull-high.
C+ PFS1 AN — Comparator positive input
LA LA — AN AN Antenna connection LA
LB LB — AN AN Antenna connection LB
VDD VDD — PWR — Positive power supply
AVDD AVDD — PWR — Analog positive power supply
VSS VSS — PWR — Negative power supply, ground
AVSS AVSS — PWR — Analog negative power supply, ground
VSSN VSSN — PWR — NFC AFE negative power supply
Legend: I/T: Input type; O/T: Output type;
OPT: Optional by register option; PWR: Power
ST: Schmitt Trigger input; AN: Analog signal;
CMOS: CMOS output; NMOS: NMOS output;
SCOM: Software controlled LCD COM;
HXT: High frequency crystal oscillator;
LXT: Low frequency crystal oscillator.

Rev. 1.00 14 September 11, 2018 Rev. 1.00 15 September 11, 2018
HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Absolute Maximum Ratings
Supply Voltage ................................................................................................VSS−0.3V to VSS+6.0V
Input Voltage ..................................................................................................VSS−0.3V to VDD+0.3V
Storage Temperature....................................................................................................-50˚C to 125˚C
Operating Temperature..................................................................................................-40˚C to 85˚C
IOH Total ....................................................................................................................................-80mA
IOL Total ..................................................................................................................................... 80mA
Total Power Dissipation ......................................................................................................... 500mW
Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute
Maximum Ratings" may cause substantial damage to the device. Functional operation of this
device at other conditions beyond those listed in the specication is not implied and prolonged
exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Ta=-40°C~85°C, unless otherwise specied
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VDD
Operating Voltage (HXT) —
fSYS=fHXT=4MHz 1.8 — 5.5
V
fSYS=fHXT=8MHz 2.0 — 5.5
fSYS=fHXT=12MHz 2.7 — 5.5
fSYS=fHXT=16MHz 3.3 — 5.5
Operating Voltage (HIRC) —
fSYS=fHIRC=4MHz 1.8 — 5.5
VfSYS=fHIRC=8MHz 2.0 — 5.5
fSYS=fHIRC=12MHz 2.7 — 5.5
Operating Voltage (LXT) — fSYS=fLXT=32.768kHz 1.8 — 5.5 V
Operating Voltage (LIRC) — fSYS=fLIRC=32kHz 1.8 — 5.5 V
VDDIO VDDIO Pin Power Supply — — 1.8 — VDD V
IDD Operating Current (HXT)
3V No load, all peripherals off,
fSYS=fHXT=4MHz
— 0.8 1.1
mA
5V — 1.3 1.8
3V No load, all peripherals off,
fSYS=fHXT=4MHz,
NFC communication is in progress
— 1.2 1.7
5V — 2.3 3.2
3V No load, all peripherals off,
fSYS=fHXT=8MHz
— 1.1 1.5
5V — 2.6 3.2
3V No load, all peripherals off,
fSYS=fHXT=8MHz,
NFC communication is in progress
— 1.7 2.3
5V — 3.3 4.7
3V No load, all peripherals off,
fSYS=fHXT=12MHz
— 1.5 2.1
5V — 2.7 3.9
3V No load, all peripherals off,
fSYS=fHXT=12MHz,
NFC communication is in progress
— 2.3 3.2
5V — 4.7 6.7
5V No load, all peripherals off,
fSYS=fHXT=16MHz — 3.3 4.8
5V
No load, all peripherals off,
fSYS=fHXT=16MHz,
NFC communication is in progress
— 5.7 8.2

Rev. 1.00 16 September 11, 2018 Rev. 1.00 17 September 11, 2018
HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
IDD
Operating Current (HIRC)
3V No load, all peripherals off,
fSYS=fHIRC=4MHz
— 0.8 1.1
mA
5V — 1.3 1.8
3V No load, all peripherals off,
fSYS=fHIRC=4MHz,
NFC communication is in progress
— 1.2 1.7
5V — 2.3 3.2
3V No load, all peripherals off,
fSYS=fHIRC=8MHz
— 1.1 1.5
5V — 2.6 3.2
3V No load, all peripherals off,
fSYS=fHIRC=8MHz,
NFC communication is in progress
— 1.7 2.3
5V — 3.3 4.7
3V No load, all peripherals off,
fSYS=fHIRC=12MHz
— 1.5 2.1
5V — 2.7 3.9
3V No load, all peripherals off,
fSYS=fHIRC=12MHz,
NFC communication is in progress
— 2.3 3.2
5V — 4.7 6.7
Operating Current (LXT) 3V No load, all peripherals off,
fSYS=fLXT=32768Hz
— 10 20 μA
5V — 30 50
Operating Current (LIRC) 3V No load, all peripherals off,
fSYS=fLIRC=32kHz
— 10 20 μA
5V — 30 50
Operating Current,
fH=8MHz (HIRC)
3V No load, all peripherals off, fSYS=fH/2 — 0.5 1.0
mA
5V — 1.0 2.0
3V No load, all peripherals off,
fSYS=fH/64
— 0.25 0.5
5V — 0.5 1.0
Operating Current,
fH=12MHz (HXT)
3V No load, all peripherals off, fSYS=fH/2 — 0.7 1.4
mA
5V — 1.4 2.8
3V No load, all peripherals off,
fSYS=fH/64
— 0.35 0.7
5V — 0.7 1.4
ISTB
Standby Current
(SLEEP mode)
3V No load, all peripherals off,
WDT off
— 0.2 0.8
μA
5V — 0.5 1.0
3V No load, all peripherals off,
WDT on
— — 3
5V — — 5
Standby Current
(IDLE0 mode)
3V No load, all peripherals off,
fSUB on
— 3 5 μA
5V — 5 10
Standby Current
(IDLE1 mode, HIRC)
3V No load, all peripherals off,
fSUB on, fSYS=fHIRC=4MHz
— 0.25 0.5
mA
5V — 0.5 1.0
3V No load, all peripherals off,
fSUB on, fSYS=fHIRC=8MHz
— 0.5 1.0
5V — 1.0 2.0
3V No load, all peripherals off,
fSUB on, fSYS=fHIRC=12MHz
— 0.7 1.4
5V — 1.4 2.8
Standby Current
(IDLE1 mode, HXT)
3V No load, all peripherals off,
fSUB on, fSYS=fHXT=4MHz
— 0.25 0.5
mA
5V — 0.5 1.0
3V No load, all peripherals off,
fSUB on, fSYS=fHXT=8MHz
— 0.5 1.0
5V — 1.0 2.0
3V No load, all peripherals off,
fSUB on, fSYS=fHXT=12MHz
— 0.7 1.4
5V — 1.5 3.0
5V No load, all peripherals off,
fSUB on, fSYS=fHXT=16MHz — 2.0 4.0

Rev. 1.00 16 September 11, 2018 Rev. 1.00 17 September 11, 2018
HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VIL
Input Low Voltage for I/O
Ports
5V —0 — 1.5
V
— 0 — 0.2VDD
Input Low Voltage for PA1,
PA3~PA7 Pins
5V PMPS[1:0]=10B or 11B, VDDIO=VDD 0 — 1.5
— PMPS[1:0]=10B or 11B 0 — 0.2VDDIO
Input Low Voltage for RES
Pin — — 0 — 0.4VDD
VIH
Input High Voltage for I/O
Ports
5V —3.5 — 5.0
V
— 0.8VDD — VDD
Input High Voltage for PA1,
PA3~PA7 Pins
5V PMPS[1:0]=10B or 11B, VDDIO=VDD 3.5 — 5.0
— PMPS[1:0]=10B or 11B 0.8VDDIO — VDDIO
Input High Voltage for RES
Pin — — 0.9VDD — VDD
IOL Sink Current for I/O Ports
1.8V
VOL=0.1VDD
7 14 —
mA
3V 16 32 —
5V 32 64 —
1.8V
VOL=0.1VDDIO, VDDIO=VDD
7 14 —
3V 16 32 —
5V 32 64 —
IOH Source Current for I/O Ports
3V VOH=0.9VDD, SLEDCn[m+1, m]=00B
(n=0, 1 or 2, m=0, 2, 4 or 6)
-1.0 -2.0 —
mA
5V -2.0 -4.0 —
3V VOH=0.9VDDIO, VDDIO=VDD,
SLEDCn[m+1, m]=00B
(n=0, 1 or 2, m=0, 2, 4 or 6)
-1.0 -2.0 —
5V -2.0 -4.0 —
3V VOH=0.9VDD, SLEDCn[m+1, m]=01B
(n=0, 1 or 2, m=0, 2 or, or 6)
-1.75 -3.5 —
5V -3.5 -7.0 —
3V VOH=0.9VDDIO, VDDIO=VDD,
SLEDCn[m+1, m]=01B
(n=0, 1 or 2, m=0, 2, 4 or 6)
-1.75 -3.5 —
5V -3.5 -7.0 —
3V VOH=0.9VDD, SLEDCn[m+1, m]=10B
(n=0, 1 or 2, m=0, 2, 4 or 6)
-2.5 -5.0 —
5V -5.0 -10 —
3V VOH=0.9VDDIO, VDDIO=VDD,
SLEDCn[m+1, m]=10B
(n=0, 1 or 2, m=0, 2, 4 or 6)
-2.5 -5.0 —
5V -5.0 -10 —
3V VOH=0.9VDD, SLEDCn[m+1, m]=11B
(n=0, 1 or 2, m=0, 2, 4 or 6)
-5.5 -11 —
5V -11 -22 —
3V VOH=0.9VDDIO, VDDIO=VDD,
SLEDCn[m+1, m]=11B
(n=0, 1 or 2, m=0, 2, 4 or 6)
-5.5 -11 —
5V -11 -22 —
RPH
Pull-high Resistance for I/O
Ports
3V LVPU=0 20 60 100
kΩ
5V 10 30 50
3V LVPU=0, VDDIO=VDD 20 60 100
5V 10 30 50
3V LVPU=1 6.67 15 23
5V 3.5 7.5 12
3V LVPU=1, VDDIO=VDD 6.67 15 23
5V 3.5 7.5 12

Rev. 1.00 18 September 11, 2018 Rev. 1.00 19 September 11, 2018
HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
NFC Function
VLDO LDO Output Voltage
2.2V
ILOAD=700μA, Ta=-40°C~85°C 1.71 1.80 1.89 V3V
5V
IOUT LDO Output Current
2.2V
ΔVLDO=-3%, Ta=-40°C~85°C 200 ─ ─ μA
3V
5V
IQLDO Quiescent Current
2.2V
No load, Ta=-40°C~85°C ─ ─ 20 μA3V
5V
A.C. Characteristics
Ta=-40°C~85°C, unless otherwise specied
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
fSYS
System Clock (HXT)
1.8V~5.5V fSYS=fHXT=4MHz — 4 —
MHz
2.0V~5.5V fSYS=fHXT=8MHz — 8 —
2.7V~5.5V fSYS=fHXT=12MHz — 12 —
3.3V~5.5V fSYS=fHXT=16MHz — 16 —
System Clock (HIRC)
1.8V~5.5V fSYS=fHIRC=4MHz — 4 —
MHz2.0V~5.5V fSYS=fHIRC=8MHz — 8 —
2.7V~5.5V fSYS=fHIRC=12MHz — 12 —
System Clock (LXT) 1.8V~5.5V fSYS=fLXT=32.768kHz — 32.768 — kHz
System Clock (LIRC) 1.8V~5.5V fSYS=fLIRC=32kHz — 32 — kHz
fHIRC
High Speed Internal RC Oscillator
(HIRC=4MHz,
trim 4MHz @ VDD=3V)
3.0V Ta=25°C -2% 4 +2%
MHz
2.2V~5.5V Ta=25°C -5% 4 +5%
3.0V Ta=0°C~70°C -5% 4 +5%
3.0V Ta=-40°C~85°C -5% 4 +5%
2.2V~5.5V Ta=0°C~70°C -7% 4 +7%
2.2V~5.5V Ta=-40°C~85°C -10% 4 +10%
3.0V Ta=25°C -20% 8 +20%
3.0V Ta=25°C -20% 12 +20%
High Speed Internal RC Oscillator
(HIRC=4MHz,
trim 4MHz @ VDD=5V )
5.0V Ta=25°C -2% 4 +2%
MHz
2.2V~5.5V Ta=25°C -5% 4 +5%
5.0V Ta=0°C~70°C -5% 4 +5%
5.0V Ta=-40°C~85°C -5% 4 +5%
2.2V~5.5V Ta=0°C~70°C -7% 4 +7%
2.2V~5.5V Ta=-40°C~85°C -10% 4 +10%
5.0V Ta=25°C -20% 8 +20%
5.0V Ta=25°C -20% 12 +20%

Rev. 1.00 18 September 11, 2018 Rev. 1.00 19 September 11, 2018
HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
fHIRC
High Speed Internal RC Oscillator
(HIRC=8MHz,
trim 8MHz @ VDD=3V)
3.0V Ta=25°C -2% 8 +2%
MHz
3.0V~5.5V Ta=25°C -5% 8 +5%
3.0V Ta=0°C~70°C -5% 8 +5%
3.0V Ta=-40°C~85°C -5% 8 +5%
3.0V~5.5V Ta=0°C~70°C -7% 8 +7%
3.0V~5.5V Ta=-40°C~85°C -10% 8 +10%
3.0V Ta=25°C -20% 4 +20%
3.0V Ta=25°C -20% 12 +20%
High Speed Internal RC Oscillator
(HIRC=8MHz,
trim 8MHz @ VDD=5V)
5.0V Ta=25°C -2% 8 +2%
MHz
3.0V~5.5V Ta=25°C -5% 8 +5%
5.0V Ta=0°C~70°C -5% 8 +5%
5.0V Ta=-40°C~85°C -5% 8 +5%
3.0V~5.5V Ta=0°C~70°C -7% 8 +7%
3.0V~5.5V Ta=-40°C~85°C -10% 8 +10%
5.0V Ta=25°C -20% 4 +20%
5.0V Ta=25°C -20% 12 +20%
High Speed Internal RC Oscillator
(HIRC=12MHz,
trim 12MHz @ VDD=5V)
5.0V Ta=25°C -2% 12 +2%
MHz
4.0V~5.5V Ta=25°C -5% 12 +5%
5.0V Ta=0°C~70°C -5% 12 +5%
5.0V Ta=-40°C~85°C -5% 12 +5%
4.0V~5.5V Ta=0°C~70°C -7% 12 +7%
4.0V~5.5V Ta=-40°C~85°C -10% 12 +10%
5.0V Ta=25°C -20% 4 +20%
5.0V Ta=25°C -20% 8 +20%
fLIRC
Low Speed Internal RC Oscillator
(LIRC) 2.2V~5.5V Ta=25°C -5% 32 +5% kHz
Ta=-40°C~85°C -10% 32 +10%
tTCK
CTCK, STCK and PTCK Pin
Minimum Pulse Width — — 0.3 — — μs
tTPI
STPI, PTPI Pin Minimum Pulse
Width — — 0.3 — — μs
tINT
External Interrupt Minimum Pulse
Width — — 10 — — μs
tSRESET
Minimum Software Reset Width
to Reset — — 45 90 120 μs
tRSTD
System Reset Delay Time (Reset
source from Power-on reset or
LVR hardware reset)
— RRPOR=5V/ms
42 48 54 ms
System Reset Delay Time (LVRC/
WDTC/RSTC software reset) — —
System Reset Delay Time (Reset
source from WDT overow or
RES pin reset)
— — 14 16 18 ms

Rev. 1.00 20 September 11, 2018 Rev. 1.00 21 September 11, 2018
HT45F4050
A/D NFC Flash MCU
HT45F4050
A/D NFC Flash MCU
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
tSST
System Start-up Timer Period
(Wake-up from Power Down
Mode and fSYS Off)
— fSYS=fSUB=fLXT — 1024 — tLXT
— fSYS=fH ~ fH/64, fH=fHXT — 128 — tHXT
— fSYS=fH ~ fH/64, fH=fHIRC — 16 — tHIRC
— fSYS=fSUB=fLIRC — 2 — tLIRC
System Start-up Timer Period
(Slow Mode ↔ Normal Mode, or
fH=fHIRC ↔ fHXT, or fSUB=fLIRC ↔ fLXT)
— fHXT off → on (HXTF=1) — 1024 — tHXT
— fHIRC off → on (HIRCF=1) — 16 — tHIRC
— fLXT off → on (LXTF=1) — 1024 — tLXT
System Start-up Timer Period
(Wake-up from Power Down
Mode and fSYS On)
—fSYS=fH ~ fH/64,
fSYS=fHXT or fHIRC
— 2 — tH
— fSYS=fLXT or fLIRC — 2 — tSUB
System Start-up Timer Period
(WDT Time-out Hardware Cold
Reset)
— — — 0 — tH
NFC Function
fPLL NFC PLL Frequency 2.2V~5.5V Ta=-40°C~85°C -7% 13.56 +7% MHz
tSETUP NFC PLL Setup Time 2.2V~5.5V Ta=-40°C~85°C — — 90 μs
tRCY NFC EEPROM Read Time 2.2V~5.5V Ta=-40°C~85°C — — 200 tSYS
tWCY NFC EEPROM Write Time 2.2V~5.5V Ta=-40°C~85°C — 4 6 ms
Note: tSYS=1/fSYS
Memory Characteristics
Ta=-40°C~85°C, unless otherwise specied
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VRW VDD for Read / Write — — VDDmin — VDDmax V
Flash Program / Data EEPROM Memory
tDEW
Erase / Write Time – Flash Program
Memory — — — 2 3 ms
Write Cycle Time – Data EEPROM
Memory — — — 4 6 ms
tDER
Read Time – Flash Program Memory /
Data EEPROM Memory — — — — 4 tSYS
IDDPGM Programming / Erase current on VDD — — — — 5.0 mA
EPCell Endurance — — 100K — — E/W
tRETD ROM Data Retention time — Ta=25°C — 40 — Year
RAM Data Memory
VDR RAM Data Retention voltage — Device in SLEEP Mode 1.0 — — V