Huawei MediaPad 10 FHD User manual

MediaPad10FHDMaintenance Manual INTERNAL
2012-10-09 HuaweiConfidential Page1of 78
MediaPad10 FHDMaintenance Manual
V1.0
Forinternaluseonly
Preparedby Yang Yongxiang Date 2012-7-14
Reviewedby ZhangDewen Date
Approvedby ZhenHaitao Date
HuaweiTechnologiesCo., Ltd.
All rightreserved

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ChangeHistory
Date RevisionVersion
Change Reason
ChangedChapter
ChangeDescription
Author
2012-7-14
V1.0

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Contents
1ProductOverview.................................................................................................................... 8
1.1BriefIntroduction.......................................................................................................................................8
1.2HardwareSpecifications...........................................................................................................................11
1.3SoftwareSpecifications............................................................................................................................12
1.4ExplodedViewoftheHost.......................................................................................................................12
2FunctionalChips.................................................................................................................... 14
2.1Hi3620.....................................................................................................................................................14
2.1.1ChipSpecifications..........................................................................................................................14
2.1.2PinAssignment................................................................................................................................15
2.1.3WorkingPrinciplesand Functionsof theHi3620..............................................................................15
2.2POPLPDDR2..........................................................................................................................................17
2.3PMUHi6421............................................................................................................................................20
2.4Wi-FiandBluetoothModules...................................................................................................................25
2.5GPS BCM47511.......................................................................................................................................28
3LayoutofMajorComponents.............................................................................................. 32
3.1LayoutofComponentsontheS10 PCBA.................................................................................................32
3.2ComponentsontheS10PCBA.................................................................................................................32
4Principlesand FailureAnalysis........................................................................................... 37
4.1Working Principlesof theMediaPad10FHD............................................................................................37
4.2Power-Onand PowerTree........................................................................................................................39
4.2.1HardwareStartupProcess................................................................................................................39
4.2.2PowerTree......................................................................................................................................41
4.3Circuit AnalysisandTroubleshootingforFunctionalUnits........................................................................42
4.3.1WorkingPrinciplesof theAPSubsystem..........................................................................................42
4.3.2DetailedAnalysisofWorkingPrinciplesof theAPSubsystem..........................................................45
4.4Circuit AnalysisandTroubleshootingfortheModemUnit........................................................................65
5SoftwareUpgrade.................................................................................................................. 73
5.1UpgradePreparation.................................................................................................................................73
5.2UpgradingtheSoftwarebyUsingaUSBPeripheral..................................................................................73
5.2.1UpgradingtheSoftwarebyUsingamicroSD Card...........................................................................73
6DisassemblyProcedure......................................................................................................... 75

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6.1Tools........................................................................................................................................................75
6.2DisassemblyPreparation...........................................................................................................................75
6.3DisassemblyProcedure.............................................................................................................................75
6.4OtherPrecautions.....................................................................................................................................75
7Appendix................................................................................................................................. 77
7.1PCBALayout...........................................................................................................................................77
7.2TestSpotList...........................................................................................................................................78
7.3AcronymsandAbbreviations....................................................................................................................78

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Figures
Figure1-1Appearance of theMediaPad10FHD.............................................................................................9
Figure1-2 Hardwareprinciplesof theMediaPad10FHD..............................................................................10
Figure1-3 Explodedviewofthehost.............................................................................................................13
Figure2-1 FunctionalblocksoftheHi3620...................................................................................................14
Figure2-2 FunctionalblocksofthePOPLPDDR2chip.................................................................................18
Figure2-3 Modelof thePOPLPDDR2chipprovidedbyELPIDA.................................................................18
Figure2-4 Modelof thePOPLPDDR2chipprovidedbySamsung................................................................19
Figure2-5 Pinoutsof thePOPLPDDR2chip.................................................................................................20
Figure2-6 Functionalblocksofthepowersupply..........................................................................................23
Figure2-7 RFsolutionfortheWi-FiandBluetoothmodulesof theS10.........................................................26
Figure2-8 ComponentsencapsulatedintheWI-FIorBluetoothmodule.........................................................28
Figure2-9 RFsolutionfortheGPS moduleof theS10...................................................................................29
Figure2-10 FunctionalblocksoftheBCM47511chip....................................................................................30
Figure2-11 Modelsof theBCM47511...........................................................................................................30
Figure2-12 ComponentsencapsulatedintheBCM47511chip.......................................................................31
Figure3-1 LayoutofcomponentsontheS10 PCBA......................................................................................32
Figure4-1 FunctionalblocksofthePCBA.....................................................................................................38
Figure4-2 LayoutofcomponentsonthePCBA.............................................................................................38
Figure4-3 Physical architectureof thePCBA................................................................................................39
Figure4-4 Power-onand power-off sequencing.............................................................................................40
Figure4-5 Power-onprocedure......................................................................................................................41
Figure4-6APframework..............................................................................................................................42
Figure4-7 Workingprinciplesof thePMU.....................................................................................................45
Figure4-8 Possiblefaultsof theAPpowercircuit ..........................................................................................47
Figure4-9 Workingprinciplesof theAPchargingcircuit................................................................................49
Figure4-10 Working principlesof thecoulometercircuit ...............................................................................50

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Figure4-11 Workingprinciplesof theeMMCcircuit......................................................................................52
Figure4-12 Working principlesof theMICcircuit.........................................................................................53
Figure4-13 Working principlesof theheadset circuit.....................................................................................54
Figure4-14 Working principlesof theLCDcircuit.........................................................................................55
Figure4-15 Working principlesof theTPcircuit............................................................................................57
Figure4-16 Working principlesof therearcamera.........................................................................................59
Figure4-17 Working principlesof thefrontcamera........................................................................................59
Figure4-18 Working principlesof theBC1.1circuit.......................................................................................60
Figure4-19 Working principlesof thechargingcircuit...................................................................................62
Figure4-20 Working principlesof theMAX8903A........................................................................................62
Figure4-21 Working principlesof thesensorcircuits.....................................................................................64
Figure4-22 Circuitsof themodemunit..........................................................................................................66
Figure7-1 PCBAlayoutat thetoplayer.........................................................................................................77
Figure7-2 PCBAlayoutat thebottomlayer...................................................................................................77

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Tables
Table1-1 Externalhardwareinterfaces...........................................................................................................11
Table1-2 Hardwarespecificationsof theMediaPad10FHD..........................................................................11
Table3-1 Descriptionof componentsontheS10 PCBA.................................................................................32
Table4-1 Voltagesignalsof theAPpowercircuit...........................................................................................45
Table4-2 Possiblefaultsof theAPpowercircuit............................................................................................47
Table4-3 Definitionsof signalsof theAPchargingcircuit..............................................................................50
Table4-4 Definitionsof signalsof thecoulometercircuit ...............................................................................51
Table4-5 Definitionsof signalsof theeMMCcircuit .....................................................................................52
Table4-6 Definitionsof signalsof theMICcircuit.........................................................................................53
Table4-7 Definitionsof signalsof theheadset circuit.....................................................................................55
Table4-8 Definitionsof signalsof theLCDcircuit.........................................................................................57
Table4-9 Definitionsof signalsof theTPcircuit............................................................................................58
Table4-10 Definitionsof signalsof thecameracircuit...................................................................................60
Table4-11 Definitionsof signalsof theBC1.1circuit.....................................................................................61
Table4-12 Definitionsof signalsof thechargingcircuit.................................................................................63
Table4-13 Definitionsof signalsof thesensorcircuit.....................................................................................65
Table5-1 Upgradepreparation.......................................................................................................................73
Table7-1 Testspotlist...................................................................................................................................78

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1 ProductOverview
1.1BriefIntroduction
Background
10-inchtabletstakeashareofmorethan70%ofthetabletmarket.Asamainstreammodelof
tablets, theyprovideInternetsurfing, pleasantvisualexperience, andportableuse. 10-inch
tabletshavefoundtheirwayinavarietyofapplicationfields, suchasretailing,operators'
mobilebroadbandproductreselling,operators' promotionofnewhomeproducts, enterprise
office administration, andfinancialinsurance.
MediaPad10 FHD isa10-inchtabletofHuaweiMediaPadseriesbasedontheAndroid4.0
(Ice CreamSandwich)operatingsystem.Itshardwareintegratesanaccess point(AP)and a
modem(K3+BalongV7). Equippedwitha10.1-inchin-planeswitching(IPS)thin-film
transistor(TFT)LCD, theMediaPad10 FHD featureshighresolution(1920 x 1200 pixels)
and providescompletetouchscreenoperations. Itsupportsmultipleaudioandvideoformats,
suchasMP3, MP4, AVI,ASF, and WAV.
TheMediaPad10 FHD alsoprovidesthefollowingauxiliaryfunctions:
l8.0 megapixel(MP)camera
lmicroSDcard
lGlobalpositioningsystem(GPS)
lWireless Fidelity(Wi-Fi)
lBluetooth4.0
lFrequencymodulation(FM)
lAcceleration sensor
lProximitysensor
lLightsensor
lGyroscopesensor
lCompass
lElectromagneticsensor
Intermsofwireless communication, theMediaPad10 FHD supportsthefollowingfeatures:
lGSMmode:GPRSandEDGE
lWCDMAmode:UMTS, HSDPA, andHSPA+
lWCDMAfrequencybands:bands1, 2, 5, 8, 9, and 11
lGSMfrequencybands:850 MHz, 900 MHz, 1800 MHz,and1900 MHz.

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Theentiredevicehasfiveantennas:onehostantenna, onediversityantenna, oneGPSantenna,
oneantennafortheBluetoothand Wi-Fimodules, andoneindependentantennaforthe
syntheticapertureradar(SAR)sensor.
ThesmartchipMAX8903 isusedforchargingmanagement, theBroadcomBCM4330 chipis
usedfortheWi-Fiand Bluetoothmodules, andtheBCM47511 chipisusedfortheGPS
module.
TheMediaPad10 FHD hasthefollowingmemoryfeatures:
lAPRAM:LPDDR2, standard1 GB533 Hz(compatiblewith2 GB)
lAPROM:eMMC, standard8 GB(compatiblewith16 GBand 32 GB)
lModem:Hi6920+Hi6451+Hi6360, MCP(NAND+DDR),standard2 Gbit +1 Gbit
(compatiblewith1 Gbit +512 Mbit)
TheMediaPad10 FHD supportsthe3.5 mmheadsetjackand 30-pindockinterface. Thedock
interface supportsmultiplefunctions, suchascharging,powersupply,USBhostordevice
installation, and thedisplayport.
Figure1-1 showstheappearance oftheMediaPad10 FHD.
Figure 1-1 AppearanceoftheMediaPad10FHD
Figure1-2 showsthehardwareprinciplesoftheMediaPad10 FHD (Hi3620+Hi6920).

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Figure 1-2 HardwareprinciplesoftheMediaPad10 FHD
Board Functions
Themaincontrolboardprovidesthefollowingfunctions:
lProvidesthehostCPUand processesimagesignals.
lManageshostpowersupply.
lSupportsUMTS(WCDMA), HSPA, GSM, GPRS, and EDGE.
lSupportsGPS.
lProvidesLCDandcamerainterfaces.
lProvidesaudiointerfaces.
lProvidesaWLANorBluetoothmodule.
Theinterface boardprovidesthefollowing functions:
lProvidesdockinterfaces.
lProvidesUSBandcharging interfaces.
Table1-1 liststhehardwareinterfacesprovidedbytheMediaPad10 FHD.

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Table1-1 Externalhardwareinterfaces
No. Interface
Type Physical Interface Mode Numberof Interfaces Remarks
1 USB OTG 1 Thisinterface isusedtoconnecttoaPCorother
devices.ItcomplieswiththeUSB2.0
specification.
2 3G Mainantennaand
diversityantenna
2 Thisinterfaceisanuplinkdatainterface for
voiceservices(WCDMA).
3 WLAN Built-inantenna 1 Thisinterfaceisusedtoconnecttoalocal
WLANdevice.
4 Dock
interface Dockjack 1 Thisinterfaceprovidesnumerous
communicationsignals, suchaspowerinput,
MHL, and USBsignals.
5 Powerswitch
Tactswitch 1 Powerswitch
6 Key Soundvolume
adjustmentkey 2 VOL+, VOL-
7 Touchscreen Capacitorscreen,
I2Cinterface 1 Compatiblewiththeresistor-capacitor
8 LCD MIPI 1 1920 x 1080 pixels
9 JTAG
interface Normalized9-pin encapsulation 1 ThisJTAGinterfaceisusedforprogram loading.
10
11
12
13
1.2HardwareSpecifications
Table1-2 liststhehardwarespecificationsoftheMediaPad10 FHD.
Table1-2 HardwarespecificationsoftheMediaPad 10 FHD
TechnicalParameter Specification
Dimensions(Hx Wx D) 8.9 mm x 267.2 mm x 169.8 mm
Weight About630 g(TBD)

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TechnicalParameter Specification
Shape
Battery 6300 mA
Display 10.1-inchWXGA(1920 x 1200 pixels), TFT, touchscreen
Touchpanel Capacitive, Multi-touch(10 points)
Interface 30-pindockconnector
3.5 mm headsetjack
Band S10-101u:UMTS2100/900, EDGE/GPRS/GSM(850/900/1800/1900)
S10-102u:UMTS2100/1900/850, EDGE/GPRS/GSM(850/900/1800/1900)
HSPA+:42 Mbit/s
Chipset Hi3620T(K3 V2)+Hi6920 (BalongV7)
OS Android4.0 (Ice CreamSandwich)
Memory RAM:2 GB
ROM:16 GB
Maximum32 GBmicroSDcard
Multimedia Rearcamera:8.0 MPHD AF, dualLEDflash
Frontcamera:1.3 MPHD
H.263, MPEG4, H.264 (decode)
MP3, AAC,AAC+
Networkservice 3G
Others Wi-Fib/g/n, Bluetoothv3.0 +HS, DLNA, 30-pindockconnector, 1080pvideo
1.3SoftwareSpecifications
1.4Exploded ViewoftheHost
Figure1-3 showstheexplodedviewofthehost.

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Figure 1-3 Explodedviewofthehost

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2 FunctionalChips
2.1Hi3620
TheHi3620 isanew-generationquadcoreARMcortex-A9 processorlaunchedbyHisilicon.
Theprocessorsupports1.2 GHzprocessing.
Figure2-1 showsthefunctionalblocksoftheHi3620.
Figure 2-1 FunctionalblocksoftheHi3620
2.1.1ChipSpecifications
Encapsulation:11.90 mmx 11.90 mm, 576-pinBGA/CSPencapsulation, Hi3620 (IC).

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2.1.2PinAssignment
2.1.3WorkingPrinciplesandFunctions oftheHi3620
TheK3V200 systemusestheHi3620 chipasitscoretoprovidethefollowinglogical
interfaces:
NAND/eMMC Interface
TheHi3620 provides16-bit NAND interfaces. Thehigh8-bitsaremultiplexedwiththe
eMMCinterface. Therefore, it isrecommendedthattheeighthigh-orderbitsbeconnectedto
theeMMCcomponentandtheeightlow-orderbitsbeconnectedtoacomponentsuchasthe
MLCNAND orClearNAND.
Camera Interface and LCD Interface
TheHi3620 providesthree MIPIinterfaces:CSI0, DSI0, andCSI_DSI1. Eachinterface can
containfourdatalanes. TheHi3620 alsoprovidesoneparallelcamerainterface whichis
knownastheDVPinterface.
lCSI0:Thisinterface isusedforcameraimagecapturing.
lDSI0:Thisinterface isusedforLCDdisplay.
lCSI1_DSI1:Thisinterface canbestaticallymultiplexedasanLCDdisplayinterface (in
thetwo-screenapplicationscenario)orasaninterfaceforcameraimagecapturing(in3D
imagepickupandmaster/mastercameraapplicationscenarios).
lDVP:Thisinterface isusedtoconnecttoacamerathroughaparallelbus. Itisreserved
forthefrontcamera.
microSD Card Interface
TheHi3620 providesadedicatedmicroSDcardslot, whichcomplieswiththeSD3.0
specification andsupportstheSDR50 orDDR50.
ThebusclockfrequencyoftheSDR50 is100 MHz,andthatoftheDDR50 is50MHz.
SDIO Interface
TheHi3620 providestwoSDIObuses,whichcomplywiththeSD2.0 specificationand
supportatmosttheSDR25. Thetwobusesareusedtoconnectperipherals.
lSDIO0:Thisinterface isthedataand controlinterface oftheAPormodem. Itssignal
levelis1.8 Vor2.5 V.
lSDIO1:Thisinterface isthedataand controlinterface ofWi-Fi. Itssignallevelis1.8 V.
ThebusclockfrequencyoftheSDR25 is50MHz.
UART Interface
TheHi3620 providesfiveUARTinterfaces, all ofwhichsupportfour-wirehardwareflow
controlandprovidethemaximumbaudrateof3.25 Mbit/s.Theseinterfacesareusedto
connecttoperipherals.

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lUART0:ThisUARTinterface isspeciallyusedforsystemcommissioningorloading. Its
signallevelis2.5 V.
lUART1:Thisinterface isusedasthedataand controlinterface oftheAPormodem.It
canalsobemultiplexedasaGPIOinterface. Itssignallevelis1.8 Vor2.5 V.
lUART2:Thisinterface isstaticallymultiplexedwithUSIMand onewiresignalsand
reservedforperipherals. Itssignallevelis1.8 V.
lUART3:Thisinterface ismultiplexedwiththeGPSbaseband busGPS_SPIthatis
integratedintheHi3620. Itprovidesadataand controlchannelforexternalthird-party
GPS devices.Itssignallevelis1.8 V.
lUART4:Thisinterface ismultiplexedwiththeBluetoothbaseband interfaceBT_IFthat
isintegratedintheHi3620. Itprovidesadataand controlchannelforexternalthird-party
Bluetoothdevices. Itssignallevelis1.8 V.
SPI Interface
TheHi3620 supportsfivegroupsofSPIbusinterfaces, allofwhichworkinmastermode.
lSPI0:ThisSPIinterface supportsamaximumoffourchip selection signals. Itis
reservedforperipherals, suchastheCMMB.Itssignallevelis1.8 V.
lSPI1:Thisinterface isthecommunicationandcontrolinterface ofthemodem.Itssignal
levelis1.8 Vor2.5 V.
lPMU_SPI:ThisSPIinterface isdedicatedforthePMU(Hi6421)and worksin
three-wiremode(theinputendandtheoutputendsharethesamedatasignal). Itssignal
levelis1.8 V.
lBT_SPI:Thisinterface isadedicatedSPIinterface betweenaBluetoothbasebandunit
integratedintheHi3620 and theRFIC(Hi6350). Itssignallevelis1.8 V.
lGPS_SPI:Thisinterface isadedicatedSPIinterface betweenaGPS baseband unit
integratedintheHi3620 and theRFIC(Hi6350). Itssignallevelis1.8 V.
I2C Bus
TheHi3620 providesfourgroupsofI2Cbuses.Twogroupsarededicatedforcamera
interfaces, andtheothertwogroupsareusedforperipherals.
lISP_I2C0/1:usedforcameraI2Cinterfaces.
lI2C0:usedforthexSenor, capacitivetouchscreen, andindependentFMcommunication
and datainterfaces.
lI2C1:usedforthechargingIC.
ThexSensorandcapacitivetouchscreenarecomponentsthatmaybefrequentlyaccessed.Therefore,the
precedingI2Cbusallocation modeisappliedbydefaultbutajumperisreservedduringdesignto
connect thecapacitivetouchscreentoI2C1.
Digital Audio Interface PCM/I2S
TheK3V200 systemprovidesthree groupsofdigitalaudiointerfacestoconnecttoacodec
insidetheHi6421.
lI2Sinterface:ThisinterfaceisastereoaudiointerfacebetweentheHi3620 and thecodec
insidetheHi6421.
lM_PCMinterface:Thisinterface providesavoicechannelbetweenthemodemand the
codec insidetheHi6421.

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lBT_PCMinterface:Thisinterface providesavoicechannelbetweenexternalthird-party
Bluetoothdevicesandthecodec insidetheHi6421.
HDMI Interface
TheHi3620 complieswiththeHDMI1.3aprotocolspecification. Itsupportshigh-definition
playing(up to1080p)and providesHDMIinterfacestoconnecttoexternaldisplaydevices.
HSIC Interface
TheHi3620 providestheHSICinterfaceastheactivehigh-ratecommunicationandcontrol
interface betweentheAPandthemodem.
USB Interface
TheHi3620 providestwoUSB2.0 interfaces, bothofwhichsupportthehighestspeed480
Mbit/s.
lUSB_NANO interface:Thisinterface staticallysupportsUSB2.0 hostsanddevices.
lUSB_PICOinterface:ThisinterfacesupportsUSB2.0 devicesandBC1.1 (incompliance
withachargingspecificationsupplementarytotheUSB2.0 specification).
PCIe Interface
TheHi3620 supportsonePCIe1.0 interface,whichisreservedforexternaldevices, suchasa
SouthBridgeorSATAdisk.
2.2POP LPDDR2
TheDDR2 chipusesthePOPencapsulationtechnology.Currently, twovendorsELPIDAand
Samsung supplythischiptoHuawei.
Figure2-2 showsthefunctionalblocksofthePOPLPDDR2 chip.

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Figure 2-2 FunctionalblocksofthePOPLPDDR2 chip
Figure2-3 showsthemodelofthePOPLPDDR2 chipprovidedbyELPIDA.
Figure 2-3 ModelofthePOPLPDDR2 chipprovidedbyELPIDA
Figure2-4 showsthemodelofthePOPLPDDR2 chipprovidedbySamsung.

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Figure 2-4 ModelofthePOPLPDDR2 chipprovidedbySamsung
Figure2-5 showsthepinassignmentofthePOPLPDDR2 chip.

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Figure 2-5 PinassignmentofthePOPLPDDR2chip
2.3PMUHi6421
TheHi6421V200 chipisanimportantcomponentofHisiliconK3 applicationprocessor
solution, whichisasemiconductorsolutionformobilephones.Itisanintegratedcircuitthat
providespowermanagement, audioprocessing, and diversifiedinterfaces.Itsfunctionsare
describedasfollows:
Power Supply
BUCK0 and BUCK1 serveastheprimarypowerofthequadcoreA9, andoutput1.1 Vby
default.Themaximumparalleloutputcurrentis4000 mA. BUCK0 and BUCK1 areswitched
onoroffbycontrollingtheexternalhardwiresignalBUCK01_EN.Theoutputvoltageis
adjustedthroughSPIinterfacestomeetthesystemAVSpolicy, sothatthepowerconsumption
ofthesystemisminimizedontheprecondition ofguaranteedsystemperformance.