Infineon TLE986x User manual

User Manual Please read the Important Notice and Warnings at the end of this document Rev. 1.0
www.infineon.com page 1 of 21 2019-01-30
TLE986x EvalBoard User Manual
About this document
Scope and purpose
This user manual is intented to help users use the TLE986x Evalboard. This Evalboard is designed to evaluate
hardware and software functionalities of the TLE986x device family.
This manual provides additional information about the board’s layout, jumper settings, interface and debug
options. It introduces the evaluation platform as well as how to write software and download it to the TLE986x.
Intended audience
This document is for everyone who works with the TLE986x Evalboard.

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A
bout this document
Abbreviations and definitions
Table 1 Abbreviations
A
bbreviation Definition
BLDC Brushless direct current
BSL Bootstrap loader
GH 1, 2 Gate high-side MOSFET for phases 1, 2
GL 1, 2 Gate low-side MOSFET for phase 1, 2
GPIO General purpose input / output
ISP In-system programmer
LIN Local interconnect network
MON Monitor
n.c. Not connected
n/u Not used
OP1 Negative operational amplifier input
OP2 Positive operational amplifier input
RST Reset
S
L Source low-side MOSFETs
S
WD Arm® serial wire debug
T
MS Test mode select
UART Universal asynchronous receiver transmitter
V
AREF Reference voltage
V
BAT Battery voltage supply
V
COM Virtual COM-port
V
CP Voltage charge pump
V
DDC Core supply
V
DDEXT External voltage supply output
V
DDP I/O port supply
V
DH Voltage drain high-side MOSFET
V
S Battery supply input
V
SD Battery supply input for MOSFET driver

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Table of contents
Table of contents
About this document......................................................................................................................... 1
Table of contents .............................................................................................................................. 3
1Concept................................................................................................................................... 4
2Interconnects........................................................................................................................... 5
3Test points and LEDs................................................................................................................. 7
4Jumper settings ....................................................................................................................... 8
5Communication interfaces .......................................................................................................10
5.1LIN (via banana jack and uIO BSL)........................................................................................................10
5.2UART ......................................................................................................................................................10
5.3Debugging..............................................................................................................................................10
6Software toolchain..................................................................................................................11
6.1Keil µVision 5 .........................................................................................................................................11
6.2Infineon ConfigWizard...........................................................................................................................11
6.3TLE986x SDK..........................................................................................................................................11
6.4Debug connection setup .......................................................................................................................11
7Technical data.........................................................................................................................13
8Optional additional placements................................................................................................14
9Schematics and layout.............................................................................................................15
9.1Schematic ..............................................................................................................................................15
9.2Layout ....................................................................................................................................................18
Revision history...............................................................................................................................20

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Interconnects
Figure 3 Pin configuration uIO BSL
Pin header for SWD (marked blue)
There is a 10 pin header (2 x 5) with 1.27 mm pitch on the evaluation board. This interface is meant to be used
for debugging.
Figure 4 Pin configuration SWD interface
5 V 1 2
3 4
5 6
7 8
GND
GND
n.c.
SWDIO (TMS)
SWCLK (P0.0)
n.c.
n.c.
910DBPRE RESET
LIN
RESET
GND
V
S
TXD1
RXD1
V
DD5
GPIO3
1 2
3 4
5 6
7 8
9
11
10
13 14
15 16
GPIO2
GPIO1
SCS
SCL
K
MISO
MOSI AD0
GPIO0
12

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H
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LED 1 to 8
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LED 10 (Mo
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LE986x as s
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TLE986x
.
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. 1.0
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Jumper settings
JP16 This jumper is closed by default. If this jumper is left open the device is not supplied. It is
intended to open the VS line in order to measure the current flowing into the TLE986x
device.
JP17 Close this jumper to connect the motor status LEDs. Open it to disconnect the LEDs.
JP18 Close this Jumper to connect the potentiometer to P2.4. Open this jumper to disconnect
the potentiometer.
+5V_AUX_SEL Open this jumper to disable the board’s voltage regulator.
Table 3 GPIOs’ function
P0.1 LED 1
P0.2 LED 2
P0.3 LED 3
P0.4 LED 8
P1.0 LED 5
P1.1 UART
P1.2 LED 4 / UART
P1.3 LED 6
P1.4 LED 7

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Communication interfaces
5Communication interfaces
5.1 LIN (via banana jack and uIO BSL)
The device integrated LIN transceiver is connected to a banana jack and additionally to the uIO BSL interface.
To integrate the device in a LIN network it is sufficient to use the single wire banana interface. The BSL interface
is intended to program the device via LIN. For further information about the uIO interface see
www.hitex.com/uio.
5.2 UART
A RS232 connector on the board enables a serial communication.
5.3 Debugging
Debugging is possible via the SWD interface; the signals are routed through the 10 pin header SWD interface
(see Figure 4).

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Software toolchain
6Software toolchain
6.1 Keil µVision 5
The recommended Integrated Software Development Environment is Keil® µVision5®.
Infineon’s embedded Power family is supported. For more information about the installation process, go to
www.keil.com.
6.2 Infineon ConfigWizard
In addition to the IDE, Infineon provides ConfigWizard. The tool is designed for code configuration, in
combination with the IDE. Infineon ConfigWizard can be downloaded via the Infineon Toolbox. The Infineon
Toolbox is a central place to download and update all your Infineon tools. It can be downloaded from
www.infineon.com/toolbox.
6.3 TLE986x SDK
All embedded Power products can be installed to Keil® µVision5® via “Pack Installer”. Browsing to the Infineon
chapter in “All Devices” will lead to the “TLE98xx Series”. The “.pack” file comes with several code examples, to
provide an easy start up and speed up software development.
6.4 Debug connection setup
For a proper Flash and Debug Connection, install V5.10 (or newer) from: www.segger.com/jlink-
software.html. Keil® µVision5® has to be configured in the IDE Menu “Options for Target”. After connecting the
USB-cable and power up the EvalBoard, go to the “Debug” register-card, choose “J-LINK / J-TRACE Cortex” and
press “Settings”.

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Technical data
7Technical data
Table 4 Technical data
Voltage supply: max. 28 V
Motor current: max. 20 A
Pin ports: 5 V

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_
DG_H2(NB)
_
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-side MOS
F
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-side MOS
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ts
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FET phase 1
F
ET phase 1
FET phase 2
F
ET phase2
epending o
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/
3
3
3
3
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33 - 330 pF
33 - 330 pF
33 - 330 pF
33 - 330 pF
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v
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Schematics and layout
9Schematics and layout
9.1 Schematic
Figure 9 Schematics: Sheet 1

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Schematics and layout
Figure 10 Schematics: Sheet 2

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Schematics and layout
Figure 11 Schematics: Sheet 3

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Schematics and layout
9.2 Layout
Figure 12 Top layer

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Schematics and layout
Figure 13 Bottom layer

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Revision history
Revision history
Major changes since the last revision
Date Version Description
2019-01-30 1.0 Initial release.