Infineon MERUS EVAL AUDIO MA12070 B User manual

User Manual Please read the Important Notice and Warnings at the end of this document V 1.0
www.infineon.com/audiosolutions page 1 of 23 2023-03-02
UM_2301_PL88_2302_002220
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
About this document
Scope and purpose
This user manual describes the EVAL_AUDIO_MA120xxx_B evaluation and demonstration board for MA12070
and MA12070P proprietary multilevel amplifiers.
Intended audience
Audio amplifier design engineers
Attention: Please read through this user manual before operating the board. When powering up the
board make sure to follow the instructions in the “Start sequence” section.
Attention: Please observe proper electrostatic discharge (ESD) handling procedures. Failure to do so
may result in damage to components on the board.

User Manual 2 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Table of contents
Table of contents
About this document....................................................................................................................... 1
Table of contents............................................................................................................................ 2
1Overview............................................................................................................................... 3
1.1 Board features and audio performance.................................................................................................3
1.2 EVK device type .......................................................................................................................................4
2Setup guide ........................................................................................................................... 5
2.1 Connections and interfaces ....................................................................................................................5
2.2 Notes to digital audio and analog audio headers..................................................................................8
3Operating the demonstration board......................................................................................... 9
3.1 Recommended operating conditions.....................................................................................................9
3.2 Toggle switches.......................................................................................................................................9
3.3 Speaker load............................................................................................................................................9
3.4 GUI ...........................................................................................................................................................9
3.5 Start sequence.......................................................................................................................................10
3.6 Analog input configuration (MA12070 devices)....................................................................................10
3.7 Digital (I2S) input configuration (MA12070P devices) ..........................................................................11
4Measurement methods ..........................................................................................................13
5EVK schematic ......................................................................................................................15
6EVK PCB layout .....................................................................................................................16
7Bill of materials (BOM)...........................................................................................................19
Revision history.............................................................................................................................22

User Manual 3 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Overview
1Overview
This is an evaluation and demonstration board for MERUS™ audio MA12070 and MA12070P amplifiers.
It contains a variety of digital/analog input, output and setup/selection features. It also contains two onboard
power supply generators (5 V and 3.3 V buck-converted) so only one external power supply (PVDD) is necessary.
The board can be used for evaluating or demonstrating key features/advantages of the MERUS™ technology:
•Energy efficiency
−Power losses at normal user operating conditions (listening levels)
−Idle power loss
•Adaptive power management system
•No output filter components
−Solution cost and size reduction
•Audio performance
−Total harmonic distortion (THD) performance and audio quality
1.1 Board features and audio performance
•Number of audio channels 2 x BTL, 1 x BTL + 2 x SE, 4 x SE
•Audio input format
−MA12070 Analog
−MA12070P Digital (I2S)
•Amplifier gain 20 dB/Configurable 26 dB
•Supply voltage PVDD
−Max. PVDD for MA12070/MA12070P 26 V
•Output noise level
−MA12070 Less than 100 µVrms (AW)
−MA12070P Less than 150 µVrms (AW)
•Dynamic range
−MA12070 More than 100 dB
−MA12070P More than 95 dB
•Idle consumption at PVDD = 18 V
−MA12070 Less than 16 mA*
−MA12070P Less than 19 mA*
•Crosstalk Less than -85 dB
•Efficiency, full-scale, 8 Ω91 percent
Note: Idle consumption is the sum of output stage current and 5 V supply and 3.3 V supply current. As all
the supplies are tied to PVDD, the efficiency of the buck-converted 5 V and 3.3 V should be
considered when measuring idle current consumption directly from PVDD. Features on the EVK
make it possible to break the 5 V and 3.3 V supply lines after the buck converters (see Table 1).
Please refer to the MA12070/P device datasheet for exact current figures.

User Manual 4 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Overview
1.2 EVK device type
The type of device (MA12070 or MA12070P) on the EVK is printed on the top of the board and is also stated on
the serial number label on the bottom side of the EVK PCB.

User Manual 5 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Setup guide
2Setup guide
Equipment required for operating and evaluating:
•Single power supply for PVDD
•Analog audio source or signal generator with line-level output (MA12070)
•Digital I2S audio source (MA12070P)
•Cables for input and output connectors
•Audio analyzer with measurement filter
2.1 Connections and interfaces
Figure 1 Top block view of EVK board
Note: For schematic: see Figure 5 on page 15.

User Manual 6 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Setup guide
Table 1 EVK headers and connectors
Name
Schem. ref.
Description
Comment
MSEL0
JMSEL
Selects in conjunction with MSEL1
the output configuration (see Table
2).
Default: 2CH BTL.
Jumpered high (H).
MSEL1
JMSEL
Selects in conjunction with MSEL0
the output configuration (see Table
2).
Default: 2CH BTL.
Jumpered low (L).
/CLIP
CLIP
Audio clipping indicator (open drain
output), pulled low when clipping
occurs.
I/O pin. Do not jumper.
/ERROR
ERR
Error indicator (open drain output),
pulled low when an error occurs.
I/O pin. Do not jumper.
CLKMS
CLKMS
Selects clock mode.
M = Master clock (non-P
versions). S = Slave
(external) clock (P
versions).
AD0 AD1
ADD
Selects I2C address (see Table 3).
Default: I2C address
0B100000. Both
jumpered low (GND).
B2_EN
B2_EN
When removed, enables 5 V and
3.3 V supply buck converters.
Default: Not jumpered
(enabled)
PVDD MEAS
JPVDD1
Breaks PVDD for PVDD current
measurements.
Default: Jumpered.
Parallel with JPVDD2.
PVDD MEAS
JPVDD2
Breaks PVDD for current
measurements.
Default: Jumpered.
Parallel with JPVDD1.
5V MEAS
5V0
Breaks 5 V supply for 5 V circuit
current measurements.
Default: Jumpered.
3V3 MEAS
3V3
Breaks 3.3 V supply for 3.3 V circuit
current measurements.
Default: Jumpered.
GND GND
JGND
Two ground connections.
Default: Not jumpered.
SCL SDA
I2C
I2C bus serial clock and data.
I/O pin. Do not jumper.
CH0
SPK_LEFT
Channel0 speaker connection.
Three-way screw
terminal with positive
and negative speaker
outputs. Center GND.
CH1
SPK_RIGHT
Channel1 speaker connection.
Three-way screw
terminal with positive
and negative speaker
outputs. Center GND.
JACK
JACK_3.5mm
Single-ended, stereo analog audio
input.
Tip = CH0.
Ring = CH1.
Sleeve = GND.
DIGITAL AUDIO1
J2
I2S digital audio input.
Note: See Section 2.2 for setting up.
I/O pins. Do not jumper.

User Manual 7 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Setup guide
Name
Schem. ref.
Description
Comment
ANALOG AUDIO
J1
Balanced analog audio input
connector. Also selects “JACK”
input
Note: See Section 2.2 for setting up
Jack input = All
Jumpered
Balanced input = Use
pins for balanced analog
audio input
Note: Should NOT be
jumpered for P (digital
audio) versions
PVDD
PVDD
External power supply POSITIVE
terminal
PVDD: +26 V max.
(MA12070/-P)
GND
GND
External power supply GND terminal
GND
DIGITAL AUDIO2
J3
I2S digital audio input
Note: See Section 2.2 for setting up
I/O pins. Do not jumper.
OUT0A
OUT0A
Direct connection to device output
node vsw_a0
Output measuring pin
OUT0B
OUT0B
Direct connection to device output
node vsw_b0
Output measuring pin
OUT1B
OUT1B
Direct connection to device output
node vsw_b1
Output measuring pin
OUT1A
OUT1A
Direct connection to device output
node vsw_a1
Output measuring pin
Table 2 Signal configuration (JMSEL)
MSEL0
MSEL1
Configuration
L
L
Single-channel parallel bridge-tied load
(PBTL)
L
H
Dual-channel single-ended (SE) load and
single-channel bridge-tied load (BTL)
H
L
Dual-channel BTL
H
H
Four-channel SE load

User Manual 8 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Setup guide
Table 3 I2C address decoding (ADD)
I2C device address
AD0
AD1
7-bit I2C address
0x20
L
L
0b0100000
0x21
L
H
0b0100010
0x22
H
L
0b0100001
2.2 Notes to digital audio and analog audio headers
When using the “digital audio header”for digital I2S input stream (MA12070P), the connection scheme should
appear as follows (from top to bottom, left side of the header):
•SCK: Word clock; also known as bit clock
•WS: Word select; also known as left right clock (LRCLK)
•SD0: Multiplexed data line 0 containing two digital input stream channels
•SD1: Multiplexed data line 1 containing two digital input stream channels
•MCLK: Master clock (typically 256 x fs)
When using analog input, the board has been set up to initially evaluate with an unbalanced input source (see
“analog audio header”, jumpers connected). However, for full system performance evaluation it is
recommended to apply a balanced analog input signal. This can be done by removing the four jumpers from
the “analog input header”and connecting the analog balanced input signal as follows (from top to bottom, left
side of the header):
•CH0 input in0a (+)
•CH0 input in0b (-)
•CH1 input in1a (+)
•CH1 input in1b (-)

User Manual 9 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Operating the demonstration board
3Operating the demonstration board
3.1 Recommended operating conditions
Table 4 Recommended operating conditions
Minimum
Nominal
Maximum
Unit
PVDD (MA12070/MA12070P)
5.5
26
V
Output peak current (MA12070/MA12070P)
8.0
A
3.2 Toggle switches
The board has two toggle switches. The toggle switches have the following functions:
Table 5 Switch function
Function
Switch 1
Shutdown/Enable (default set to “shutdown”)
Switch 2
Mute/Play (default set to “mute”)
3.3 Speaker load
The demonstration board is configured as a filterless amplifier. This means that no LC filter is placed between
the amplifier outputs and the load. In normal use the amplifier relies on the inherent inductance of the
loudspeaker and therefore no extra inductance is needed.
Inductors for use in series with power resistors are included with the demonstration board. These can be used
when making any measurements without a real loudspeaker as the load, and having no external low-pass filter
(LPF) in front of the audio analyzer input section.
Please note that many audio measurement analyzers do not perform correctly when connected directly to a
filterless amplifier output.
3.4 GUI
The demonstration board is used with graphical user interface (GUI) PC software to control the MA12070/P
device. The GUI software is included with the demonstration board and runs on Windows PCs.
Unzip the file package on your PC in your preferred location. See the next section for the correct start-up
sequence including starting the GUI.

User Manual 10 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Operating the demonstration board
Figure 2 GUI main window
By default the MA12xx/P will automatically select the relevant power mode (PM1, PM2 or PM3), based on
detection of audio level during operation. The selected power mode is indicated by a blue color in the power
mode indicator.
A set of sliders are available above the power mode indicator. The first slider is used for setting the levels for
transitions between PM1 and PM2. When setting the values at higher levels the transition from PM1 to PM2 will
occur at a higher output power level. The second slider is used in the same way, for transitions between PM2
and PM3.
Power mode profiles can be selected in the “Power Mode Profile Select” section. This gives a specific profile to
the amplifier for optimization on low idle power consumption, audio performance or EMI. Please refer to the
specific device datasheet for more detailed information on power mode profiles.
The “Digital Audio Processor” button is for digital input (I2S) use and will be discussed in the start-up section for
I2S configuration. Note that the digital audio processor part of the GUI can only be used with MA12070P devices.
3.5 Start sequence
Important –GUI software revisions: The current GUI software version is 6.5.0. Please note that the current GUI
only accepts I2C address 0x20.
3.6 Analog input configuration (MA12070 devices)
Follow this (recommended) sequence to start the EVK:
1. Make sure toggle buttons are in “shutdown” and “mute” positions.
2. Connect all cables, including the PC by USB cable.
3. Make sure active analog audio source is connected.
4. Turn on the PVDD supply.
5. Start the board by setting the toggle switch to the “enable” position.

User Manual 11 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Operating the demonstration board
6. Start the GUI software by running the executable file to monitor device status.
7. Make sure the GUI indicates a valid device ID and connection status (bottom right GUI).
8. Start playing music by setting the toggle switch to the “play” position.
9. Additional “optimized” settings can be programmed to the device: Hit “Load”→ select config file in configs
subfolder → hit “Program”.
Mute and turn off the PVDD power supply.
3.7 Digital (I2S) input configuration (MA12070P devices)
Follow this (recommended) sequence to start the board:
1. Make sure toggle buttons are in “shutdown” and “mute” positions.
2. Connect all cables, including the PC by USB cable.
3. Connect I2S to the I2S audio input header.
4. Make sure the clock select jumper is set to “slave”mode.
5. Turn on the PVDD power supply.
6. Make sure the I2S master clock is present before enabling the amplifier.
7. Start the board by setting the toggle switch to the “enable” position.
8. Start the GUI software by running the “MA Device GUI 6.5.0.exe” file.
9. Make sure the GUI indicates a valid device ID and connection status (bottom right GUI).
10. Open the “Digital Audio Processor” in the GUI.
11. In the DAP window check “Digital audio enable” and “Audio processor enable”.
12. The I2S set-up window will open when clicking “I2S setup”. The correct I2S settings should be set here.
13. Start playing sound by setting the toggle switch to the “play” position.
14. Additional “optimized” settings can be programmed to the device: Hit “Load”→ select config file in configs
subfolder → hit “Program”.
Mute and turn off the PVDD power supply.

User Manual 12 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Operating the demonstration board
Figure 3 Digital audio processing window (top) and I2S setup window (bottom)

User Manual 13 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Measurement methods
4Measurement methods
Setting up a reliable measurement configuration for MA12070 or MA12070P takes a little bit more effort than
linear amplifiers and even “regular” switching amplifiers. This is mainly because MA12070 and MA12070P are
filterless amplifiers, which means they do not require an external (usually expensive and bulky) LC filter to
remove switching residuals. The filterless application is enabled by the MERUS™ audio multilevel technique,
which makes sure that the switching residual is orders lower compared to “regular” switching amplifiers. For
more information on the multilevel switching technique, please refer to the datasheet.
To obtain reliable measurement results when measuring MA12070 or MA12070P devices requires a separate
external LPF in front of the input stage of the audio analyzer. Most audio analyzers are bandwidth limited at
their input stage, which means that they cannot follow the rapid changes of the amplifier’s output stage. This
can result in inaccurate and high THD + N measurements.
Figure 4 shows the recommended measurement setup. The setup shows an LPF stage (AUX-2500) in front of the
audio analyzer (APX-515). In this case the measurement setup has been built around Audio Precision hardware,
but this can also be some other audio analyzer hardware. Please note that it is recommended to use both
balanced input and output measurement configurations. Note that Figure 4 shows the setup for analog input
(MA12070). To use the setup for digital input (MA12070P), simply replace the balanced analog input path with
the I2S input path.

User Manual 14 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Measurement methods
Figure 4 Recommended measurement setup for analog input (MA12070)

User Manual 15 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
EVK schematic
5EVK schematic
Figure 5 EVK schematic
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
DD CC
BB
AA
EVAL_AUDIO_MA12070P_B_V1_0.SchDoc
1 *
1/12/2023 2:13:46 PM
Date: Sheet of
Time:
Author:
PSS DCDC Class-D Audio
Title Size: Rev.
A2 Document Name
EVAL_AUDIO_MA12070P_B_V1_0.SchDoc
Rel.
Variant EVAL_AUDIO_MA12070P_B_V1.0
[No Variations] Approved *
SVN Revision: Not in version control
EVAL_AUDIO_MA12070P_B_V1_0.SchDoc
PVDD
GND GND
GND
GNDGND
GND
GND
GND
PVDD
GND GND
GND
GND
OUT0A OUT0B
OUT1A OUT1B
OUT0A
OUT0B
GND GND
GND
GND
C0A3 CAP 1nF
CF0A0 CAP 10uF
OUT1B
OUT1A
PVDD
GND
GND
CIN0 CAP 22nF
GND
CFGD CAP 0.1uF
GND
CAVDD0 CAP1uF
GND
CPVDD1B CAP 1uF
CIN1 CAP 22nF
CCREF
CAP 1uF
CGD0
CAP 1uF
CFDC CAP 1uF
CCDC CAP1uF
CVGDC CAP 1uF
CGD1 CAP 1uF
DVDD0 CAP1uF
CGD0N0 CAP 0.1uF
CGD1N0
CAP 0.1uF
CPVDD0A CAP 0.1uF
CPVDD1A
CAP 0.1uF
CPVDD0B
CAP 1uF
CF0A1
CAP 10uF
CF0B0 CAP 10uF
CF0B1
CAP 10uF
CF1A0
CAP 10uF CF1A1
CAP10uF
CF1B0
CAP 10uF CF1B1
CAP10uF
C0B3 CAP 1nF C1B3 CAP 1nF C1A3 CAP 1nF
CGD0N1 CAP 1uF
CGD1N1 CAP 1uF
GND
1 2
LSUP
Ferrite 2743019447
GND
MA120xxx
PVSS
1
PVSS
2
CF0AN
3
OUT0A
4
OUT0A
5
CF0AP
6
PVDD
7
PVDD
8
CF0BP
9
OUT0B
10
OUT0B
11
CF0BN
12
PVSS
13
PVSS
14
/CLIP
15
/ERROR
16
AVDD
17
CMSER
18
AVSS
19
CREF
20
IN0A
21
IN0B
22
IN1A
23
IN1B
24
AVSS
25
DVSS
26
SCL
27
AD0
28
AD1
29
SDA
30
CLKMS
31
CLKIO
32
/ENABLE 33
/MUTE 34
PVSS 35 PVSS 36
CF1BN 37
OUT1B 38 OUT1B 39
CF1BP 40
PVDD 41 PVDD 42
CF1AP 43
OUT1A 44 OUT1A 45
CF1AN 46
PVSS 47 PVSS 48
DVDD 49
MSEL1 50
MSEL0 51
CGD1N 52
CGD1P 53
VGDC 54
DVDD 55
CDC 56
CFDCP 57
CFDCN 58
DVSS 59
CGD0P 60
CGD0N 61
CFGDP 62
CFGDN 63
DVDD 64
EPAD
65
U1 MA120xxx
12
220uF 35V
CSUP2
1
2
3
SPK_LEFT
1
2
3
SPK_RIGHT
GND GND
TP_GND1 3.14mm TH TP_GND4
3.14mm TH
TP_GND2 3.14mm TH TP_GND3
3.14mm TH
GND
Mounting holes Size changed in PCB
1
2
54
3 6
MUTE JS202011SCQN
GND 1
2 54
3 6
ENABLE JS202011SCQN
Renable 10K1% 0402
Rmute 10K1% 0402
GND
12
220uF 35V CSUP1
3V3
2
1
3
CLKMS
61300311121
GND
2 1
CLIP 61300211121 2
1
ERR 61300211121
2
1I2C
61300211121
2
13V3
61300211121
2
1
JPVDD2 61300211121
2
1
JPVDD1 61300211121
2
1JGND
61300211121
3
14
2
5 6
ADD 61300621121
3 1
4 2
56
JMSEL 61300621121
1
OUT1A 61300111121
1
OUT0A 61300111121
1
OUT1B 61300111121
1
OUT0B 61300111121
GND
GND
GND GND
GND
GND
RERROR 10K1% 0402
RCLIP 10K1% 0402
CMSER
CAP 1uF
GND
SDA 5K1 1% 0402 SCL 5K1 1% 0402
GND
GND
GND
SRN4026-100M 10uH
LB2
GND
5V0
GND
2
15V0
61300211121
2 1
B2_EN 61300211121
GND
3V3
3V3
3V3 3V3
3V3
3V3
5V0
5V0
5V0 5V0
C0B1 CAP2 .2uF 50V 080 5
C0B2
CAP1 uF 50V 080 5
C0A2
CAP1 uF 50V 080 5
C0A1
CAP2 .2uF 50V 080 5
C1A1 CAP2 .2uF 50V 080 5 C1B1 CAP2 .2uF 50V 080 5
C1A2
CAP1 uF 50V 080 5
C1B2
CAP1 uF 50V 080 5
RPVDD 100mOhm
12
D1A2 PMEG3010ER,115
12
D1A1 PMEG3010ER,115
12
D1B2 PMEG3010ER,115
12
D1B1 PMEG3010ER,115
12
D0B1 PMEG3010ER,115
12
D0A2 PMEG3010ER,115
12
D0A1 PMEG3010ER,115
12
D0B2 PMEG3010ER,115
GND GND GND GND
PVDD PVDD PVDD PVDD
5V0
R0A 3R6 1% 1206( 3216)
R0B 3R6 1% 1206( 3216)
R1B 3R6 1% 1206( 3216)
R1A 3R6 1% 1206( 3216)
5V0
1
GND 111-2223-001
1
PVDD 111-2223-001
1
2
3
4
5
6 7 8 9
18 17 16 15 14 13 12 11 10
USB_Interface
DIP18
3 1
4 2
56 78 910 J1
61301021121
3
14 2
5 6
7 8
9 10
J2 61301021121
L1A2 3.3 uH L1B2 3.3 uH
L0A2 3.3 uH L0B2 3.3 uH
CAPIN0A 10V,10uF CAPIN0B
10V,10uF
CAPIN1A 10V,10uF CAPIN1B
10V,10uF
3
14 2
5 6
7 8
9 10
J3
613010243121
11 1 3 10 2
JACK_3.5mm SJ1-3515-SMT-TR
L0A1 BLE32PN300SZ1L L0B1 BLE32PN300SZ1L
L1B1 BLE32PN300SZ1L L1A1 BLE32PN300SZ1L
GND and AGND connected on PCB via short track
SW 9
VIN
2
EN
4
BIAS 7
NC 5
AGND
12
FB 14
MODE 1
VCC
11 PG
6
PGND
3
PGND
8
FREQ
15
SS
13
BST 10
U3 MP2269GD-P
100K 1% 0402
RB2_EN
4.7uF X5R 25V
C13
0402 1 % 165K
R10 12nF
X7R 25 V
C15
50 V 2.2uF X5R CB2_IN
AGNDAGNDAGND
0402 1 % 1MRB2_FB1
0402 1 % 191K
RB2_FB2
X7R 0.1uF 50V C9
0402 1 % 10R
R8
50V 5.6pF NP0 C11
AGND
GNDAGND
22uF
10V X5R
CB2_OUTA
X5R
0.1uF 25V
CB2_OUTB
GND GND
SRN4026-100M 10uH
LB3
GND GND and AGND connected on PCB via short track
SW 9
VIN
2
EN
4
BIAS 7
NC 5
AGND
12
FB 14
MODE 1
VCC
11 PG
6
PGND
3
PGND
8
FREQ
15
SS
13
BST 10
U4 MP2269GD-P
100K 1% 0402
RB1
4.7uF X5R 25V
C14
0402 1 % 165K
R11 12nF
X7R 25 V
C16
50 V 2.2uF X5R CB3_IN
AGNDAGNDAGND
0402 1 % 1MRB3_FB1
0402 1 % 324K
RB3_FB2
X7R 0.1uF 50V C10
0402 1 % 10R
R9
50V 5.6pF NP0 C12
AGND
GNDAGND
22uF
10V X5R
CB3_OUTA
X5R
0.1uF 25V
CB3_OUTB
GND GND
GND

User Manual 16 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
EVK PCB layout
6EVK PCB layout
Figure 6 PCB layout (top x-ray view)
Figure 7 PCB layout (top layer)

User Manual 17 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
EVK PCB layout
Figure 8 PCB layout (layer 1)
Figure 9 PCB layout (layer 2)

User Manual 18 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
EVK PCB layout
Figure 10 PCB layout (bottom layer)
Figure 11 PCB layout (bottom x-ray view, mirrored)

User Manual 19 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Bill of materials (BOM)
7Bill of materials (BOM)
Table 6 BOM
S. no.
Reference
Qty
Description
Manufacturer
Part number
1
3V3, 5V0, B2_EN,
CLIP, ERR, I2C, JGND,
JPVDD1, JPVDD2
9
THT vertical pin
header WR-PHD,
pitch 2.54 mm,
single row, 2 pins
Würth Elektronik
61300211121
2
ADD, JMSEL
2
THT vertical pin
header WR-PHD,
pitch 2.54 mm, dual
row, 6 pins
Würth Elektronik
61300621121
3
C0A3, C0B3, C1A3,
C1B3
4
Capacitor, 1000 pF,
±10%, X7R, 50 V,
0402 [1005 metric]
TDK
C1005X7R1H102K050BA
4
C9, C10
2
Ceramic capacitor,
0.1 µF, 50 V, X7R,
0402
Murata Electronics
GRM155R71H104KE14D
5
C11, C12
2
Ceramic capacitor,
5.6 pF, 50 V,
C0G/NP0, 0402
Samsung Electro-
Mechanics
CL05C5R6DB5NNNC
6
C13, C14
2
Ceramic capacitor,
4.7 µF, 25 V, X5R,
0603
Samsung Electro-
Mechanics
CL10A475KA8NQNC
7
C15, C16
2
Ceramic capacitor,
12 nF, 25 V, X7R,
0402
Murata Electronics
GCM155R71E123KA55J
8
CAPIN0A, CAPIN0B,
CAPIN1A, CAPIN1B
4
WCAP-CSGP
ceramic capacitors,
0805, X7R, 10 V, 10
µF
Würth Elektronik
885012207026
9
CAVDD0, CCDC,
CCREF, CFDC, CGD0,
CGD1, CMSER,
CVGDC, DVDD0
9
Capacitor, 1 μF,
±10%, X7R, 25 V,
0603 [1608 metric]
Multicomp
MC0603X105K250CT
10
CB2_IN, CB3_IN
2
Ceramic capacitor,
2.2 µF, 50 V, X5R,
0805
Samsung Electro-
Mechanics
CL21A225KBQNNNE
11
CB2_OUTA,
CB3_OUTA
2
Ceramic capacitor,
22 µF, 10 V, X5R,
0805
Samsung Electro-
Mechanics
CL21A226MPCLRNC
12
CB2_OUTB,
CB3_OUTB
2
Ceramic capacitor,
0.1 µF, 25 V, X5R,
0402
Samsung Electro-
Mechanics
CL05A104KA5NNND
13
CF0A0, CF0A1,
CF0B0, CF0B1,
8
Capacitor, 10 μF,
±10%, X5R, 25 V,
TDK
TMK212BBJ106MG-T

User Manual 20 of 23 V 1.0
2023-03-02
User manual for MERUS™ evaluation boards
EVAL_AUDIO_MA12070_B and EVAL_AUDIO_MA12070P_B
Bill of materials (BOM)
S. no.
Reference
Qty
Description
Manufacturer
Part number
CF1A0, CF1A1,
CF1B0, CF1B1
0805 [2012 metric]
14
CFGD, CGD0N0,
CGD1N0, CPVDD0A,
CPVDD1A
5
Capacitor, 0.1 μF,
±10%, X7R, 50 V,
0603 [1608 metric]
Multicomp
MC0603B104K500CT
15
CGD0N1, CGD1N1,
CPVDD0B, CPVDD1B
4
Capacitor, 1 µF,
50 V, ±10%, X5R,
0805 [2012 metric]
Multicomp
MC0805X105K500CT
16
CIN0, CIN1
2
Capacitor, 0.022 μF,
±10%, X7R, 50 V,
0402 [1005 metric]
Murata
GRM155R71H223KA12D
17
CLKMS
1
THT vertical pin
header WR-PHD,
pitch 2.54 mm,
single row, 3 pins
Würth Elektronik
61300311121
18
CSUP1, CSUP2
2
SMD aluminum
electrolytic
capacitor, 330 µF,
35 V, EEE-
FN1V331UV
Multicomp Pro
MCESL35V227M8X10.5
19
ENABLE, MUTE
2
Switch slide DPDT,
0.3 A, 6 V
C&K Components
JS202011SCQN
20
GND, PVDD
2
Binding post
uninsulated with
knurled thumb-nut-
grounded type
Cinch
111-2223-001
21
J1, J2
2
THT vertical pin
header WR-PHD,
pitch 2.54 mm, dual
row, 10 pins
Würth Elektronik
61301021121
22
J3
1
THT angled socket
header WR-PHD,
pitch 2.54 mm, dual
row, 10 pins
Würth Elektronik
613010243121
23
JACK_3.5mm
1
Audio jack, 5 pins
CUI
SJ1-3515-SMT-TR
24
L0A1, L0B1, L1A1,
L1B1
4
Murata ferrite bead,
size 1210, 30 Ω, 10 A
Murata Electronics
BLE32PN300SZ1L
25
LB2, LB3
2
SRN4026-150M
Bourns
SRN4026-100M
26
LSUP
1
SMD power bead
ferrite, Z = 47 Ω
Fair-Rite
2743019447
27
OUT0A, OUT0B,
OUT1A, OUT1B
4
THT vertical pin
header WR-PHD,
pitch 2.54 mm,
single row, 1 pin
Würth Elektronik
61300111121
28
R8, R9
2
Resistor SMD, 10 Ω,
Vishay/Dale
CRCW040210R0FKEE