JYTEK PCIe-5211 User manual

PCIe/PXIe-5211
Timer/Counter
Board
User Manual
User Manual Version: V1.0
Revision Date: Apr.7, 2020

Table of Contents
1. Overview...................................................................................................1
1.1 Introduction.........................................................................................1
1.2 Main Features.....................................................................................1
1.3 Abbreviations......................................................................................1
2. Hardware Specifications.........................................................................2
2.1 System Diagram .................................................................................2
2.2 Digital IO Specifications......................................................................2
2.3 Counter/Timer Specifications..............................................................4
2.4 Other Specifications............................................................................5
2.5 Front Panel and Pin Definition ............................................................7
2.6 Default Routing for Counter Input/Output Signals...............................9
3. Software .................................................................................................10
3.1 System Requirements.......................................................................10
3.2 System Software...............................................................................10
3.3 C# Programming Language..............................................................10
3.4 PCIe/PXIe-5211 Series Hardware Driver..........................................10
3.5 Install the SeeSharpTools from JYTEK.............................................11
3.6 Running C# Programs in Linux.........................................................11
4. Operating PCIe/PXIe-5211.....................................................................12
4.1 Quick Start........................................................................................12
4.2 Digital I/O Operations........................................................................12
4.3 Counter Input Operations..................................................................12
4.3.1 Edge Counting........................................................................13
4.3.2 Pulse Measurement................................................................16
4.3.3 Frequency Measurement........................................................18
4.3.4 Period Measurement ..............................................................20
4.3.5 Two-Edge Separation.............................................................20
4.3.6 Quadrature Encoder...............................................................23
4.3.7 Two-Pulse Encoder ................................................................25
4.4 Counter Output Operations...............................................................27
4.5 Clocks...............................................................................................29
4.5.1 PLL.........................................................................................30
4.5.2 Sample Clock..........................................................................31
4.5.3 Timebase................................................................................32
4.6 Start Trigger......................................................................................32
4.7 Logic Level........................................................................................33
4.8 Multi-Card Synchronization...............................................................33
5. Calibration..............................................................................................35
6. Using PCIe/PXIe-5211 in Other Software.............................................36

6.1 Python...............................................................................................36
6.2 C++...................................................................................................36
6.3 LabVIEW...........................................................................................36
7. About JYTEK..........................................................................................37
7.1 JYTEK China ....................................................................................37
7.2 JYTEK Korea and JYTEK In Other Countries...................................37
7.3 JYTEK Hardware Products...............................................................37
7.4 JYTEK Software Platform.................................................................38
7.5 JYTEK Warranty and Support Services............................................38
8. Statement ...............................................................................................39
Figure 2-1 PCIe/PXIe-5211 Series System Block Diagram ......................2
Figure 2-2 Front Pannel............................................................................7
Figure 4-1 Counter Input Diagram..........................................................12
Figure 4-2 Simple Edge Counting in Single Mode ..................................13
Figure 4-3 Bufferd Edge Counting with Explicit Sample Clock................14
Figure 4-4 Simple Edge Counting with Implicit SampleClk.....................14
Figure 4-5 Pause Trigger........................................................................15
Figure 4-6 Count Direction......................................................................15
Figure 4-7 Pulse Measurement in Single Mode......................................16
Figure 4-8 Pulse Measurement with Explicit SampleClk.........................17
Figure 4-9 Pulse Measurement with Implicit SampleClk.........................17
Figure 4-10 Frequency Measurement with Explicit Sample Clock..........19
Figure 4-11 Two-Edge Separation in Single Mode .................................21
Figure 4-12 Two-Edge Seperation with Explicit Sample Clock ...............21
Figure 4-13 Two-Edge Seperation with Implicit Sample Clock ...............22
Figure 4-14 Quadrature Endcoder x1 Mode ...........................................23
Figure 4-15 Quadrature Encoder x2 Mode .............................................23
Figure 4-16 Quadrature Encoder x4 mode .............................................24
Figure 4-17 Quadrature Encoder x4 with Explicit Sample Clock.............25
Figure 4-18 Quadrature Encoder x4 with Implicit Sample Clock.............25
Figure 4-19 Two-Pulse Encoder in Single Mode.....................................26
Figure 4-20 Two-Pulse Encoder with Explicit Sample Clock...................26
Figure 4-21 Two-Pulse Encoder with Implicit Sample Clock...................27
Figure 4-22 Pulse Output in Single Mode...............................................28
Figure 4-23 Pulse Output in Single Mode with Dynamic Update ............28
Figure 4-24 Buffered Pulse Sequence Generation .................................29
Figure 4-25 Clocks Diagram...................................................................29
Figure 4-26 Rising Edge Digital Trigger..................................................32
Figure 4-27 Master-Slave Synchronization.............................................33

Table 2-1 Basic.........................................................................................2
Table 2-2 DIO...........................................................................................3
Table 2-3 PFI............................................................................................3
Table 2-4 Recommended Operating Conditions.......................................3
Table 2-5 Electrical...................................................................................3
Table 2-6 Basic.........................................................................................4
Table 2-7 Maximum Frequency of the Source..........................................4
Table 2-8 Minimum Pulse Measurement ..................................................4
Table 2-9 Other Functions........................................................................4
Table 2-10 PLL (Phase lock loop).............................................................5
Table 2-11 TCXO......................................................................................5
Table 2-12 External Digital Trigger ...........................................................5
Table 2-13 Bus and Power .......................................................................5
Table 2-14 Physical Size and Enviroment ................................................6
Table 2-15 Pin Defination .........................................................................8
Table 2-16 Counter Input Default Routing ................................................9
Table 3-1 Supported Linux Versions.......................................................10

PCIe/PXIe-5211 | jytek.com | 1
1.Overview
This chapter presents the information how to use this manual and how to quick
start if you are already familiar with Microsoft Visual Studio and C#
programming language.
1.1 Introduction
PCIe / PXIe-5211 series products are multi-purpose counter data acquisition
modules, which can provide 8 counter channels, supporting edge counting,
frequency measurement, period measurement, pulse measurement, two-edge
separation measurement, encoder and pulse generation. The device utilizes a
high-throughput PCI Express bus and multi-core optimized drivers and
application software to provide high-performance capabilities.
Please check with JYTEK for the latest 5211 series offering.
1.2 Main Features
8ch counter
40ch multi-purpose PFI
Up to 200MHz clock rate
1.8V / 2.5V / 3.3V / 5V logic level optional
Edge Counting / Pulse measurement / Frequency Measurement / Period
Measurement / Two-Edge Seperation
Quadrature (X1/X2/X4) Encoder with Z Reloding
Two-Pulse Encoder
Pulse Generation
Support multi-card synchronization
On-board high-performance TCXO clock
On-board clock generator for sampling
1.3 Abbreviations
DI: Digital Input
DO: Digital Output
CI: Counter Input
CO: Counter Output
DAQ: Data Acquisition
PFI: Programmable Function Interface
TXCO: Temperature Compensate X'tal (crystal) Oscillator

PCIe/PXIe-5211 | jytek.com | 2
2.Hardware Specifications
2.1 System Diagram
Figure 2-1 PCIe/PXIe-5211 Series System Block Diagram
The system block diagram of PCIe/PXIe-5211 series is shown in Figure 2-1.
It is mainly composed of one DIO module and eight Timer/Counter modules,
providing digital input, digital output, counter input, counter output functions.
JYTEK's FPGA-based driver FirmDrive provides a stable and efficient PCIe /
PXIe / USB interface.
2.2 Digital IO Specifications
Table 2-1 Basic
Basic
Number of channels 40
Ground Reference GND
Direction control Independently Controlled
Pull-down resister NONE
Logic signal levels
1.8 V
2.5 V
3.3 V
5 V
Input voltage protection -0.5-(UserVcc+0.5 V)
Output impedance 50 Ω
UserVcc ：user select the logic signal level

PCIe/PXIe-5211 | jytek.com | 3
Table 2-2 DIO
Table 2-3 PFI
Table 2-4 Recommended Operating Conditions
Table 2-5 Electrical
DIO
Terminals used. Port 0 (P0.<0-39>)
Port width 32 bits (Maximum)
PFI
Available PFI PFI<0:39>
Supported functions
Static input
Static output
Timing input
Timing output
Timing output source Counter
Anti-jitter filter options Not Support
Recommended Operating Conditions
Input high voltage (VIH)
1.2 V (UserVcc=1.8 V)
1.7 V (UserVcc=2.5 V)
2 V (UserVcc=3.3 V)
3.5 V (UserVcc=5 V)
Maximum high-level input voltage UserVcc+0.5 V
Minimum low-level input level -0.5 V
Input low voltage (VIL)
0.65 V (UserVcc=1.8 V)
0.7 V (UserVcc=2.5 V)
0.8 V (UserVcc=3.3 V)
1.5 V (UserVcc=5 V)
Output High current (IOH)
-4 mA(UserVcc=1.8 V)
-8 mA(UserVcc=2. 5V)
-24 mA(UserVcc=3.3 V)
-32 mA(UserVcc=5 V)
Output Low current (IOL)
4 mA(UserVcc=1.8 V)
8 mA(UserVcc=2.5 V)
24 mA(UserVcc=3.3 V)
32 mA(UserVcc=5 V)
Electrical
Maximum input current of low-level voltage -2 µA
Maximum current of high-level voltage 2 µA

PCIe/PXIe-5211 | jytek.com | 4
2.3 Counter/Timer Specifications
Table 2-6 Basic
Table 2-7 Maximum Frequency of the Source
Table 2-8 Minimum Pulse Measurement
Table 2-9 Other Functions
Basic
Number of counter/timer 8
Resolution 32 bits
Measurement functions
Edge Counting
Frequency
Period
Pulse
Two-Edge Separation
Maximum Frequency of the Source
PFI
Frequency Measurement 50 MHz
Edge Counting 50 MHz
Minimum Pulse Measurement
PFI
Period Measurement 15 ns
Pulse Measurement 20 ns
Two-Edge Separation 20 ns
Other Functions
Position measurement
Quadrature encoder (X1/X2/X4) with Z reloading;
Two-pulse encoder
Output applications
Pulse Generation with Dynamic Update
Buffered Pulse Sequence Generation
Internal timebase 200 MHz, 5 MHz,
100 kHz
Internal timebase accuracy 2 ppm
External timebase 0-50 MHz
Counter input
Gate
Source
AUX
A, B, Z
Up_Down
Sample Clock

PCIe/PXIe-5211 | jytek.com | 5
2.4 Other Specifications
Table 2-10 PLL (Phase lock loop)
Table 2-11 TCXO
Table 2-12 External Digital Trigger
Table 2-13 Bus and Power
PLL(Phase lock loop)
Number of PLL 1
PXIe_DSTAR A 100 MHz Max
PXIe_CLK100：100 MHz
Onboard TXCO 10 MHz
Output option 200MHz Base Clock
TCXO
Nominal frequency 10 MHz
Warm-up time 15 minutes
Temperature drift ±20 ppb
temperature drift and 1 year drift ±0.5 ppm
Basic Property
External Digital Trigger
Trigger source PFI<0:39> PXI_Trig<0:7>
PXI_Star
Polarity Rising Edge
Counter/Timer functions Start trigger
Input source PXI_Trig<0:7>
PXI_Star
Output destination PXI_Trig<0:7>
Output options Sync Trigger Routing
Debounce filter settings Not Support
Device to device
trigger bus
Trigger functions
Bus and Power
PXIe standard
x8 PXIe peripheral module
Specification V1.0 compliant
slot supported
x1 and x4 PXI Express hybrid
slots
Recommended warm-up time >=15 min
Recommended calibration interval One year
Bus interface
Calibration

PCIe/PXIe-5211 | jytek.com | 6
Table 2-14 Physical Size and Enviroment
Physical Size and Environment
External physical size 3 U PXIe
Weight TBD
Indoor only Yes
Operating temperature 0-55 ℃
Environment
Size

PCIe/PXIe-5211 | jytek.com | 7
2.5 Front Panel and Pin Definition
Figure 2-2 Front Pannel

PCIe/PXIe-5211 | jytek.com | 8
Table 2-15 Pin Defination
Signal Pin Pin Signal
PFI30 35 1 PFI31
GND 36 2 GND
PFI28 37 3 PFI29
GND 38 4 GND
PFI26 39 5 PFI27
GND 40 6 GND
PFI24 41 7 PFI25
GND 42 8 PFI32
PFI22 43 9 PFI23
GND 44 10 GND
PFI20 45 11 PFI21
GND 46 12 GND
PFI18 47 13 PFI19
GND 48 14 GND
PFI16 49 15 PFI17
GND 50 16 GND
PFI14 51 17 PFI15
PFI33 52 18 GND
PFI12 53 19 PFI13
GND 54 20 GND
PFI10 55 21 PFI11
GND 56 22 GND
PFI8 57 23 PFI9
GND 58 24 GND
PFI6 59 25 PFI7
PFI35 60 26 PFI34
PFI4 61 27 PFI5
GND 62 28 GND
PFI2 63 29 PFI3
PFI37 64 30 PFI36
PFI0 65 31 PFI1
GND 66 32 GND
PFI39 67 33 PFI38
GND 68 34 GND
SCSI-VHDCI 68pin

PCIe/PXIe-5211 | jytek.com | 9
2.6 Default Routing for Counter Input/Output Signals
All counter input and output ports are routed to a certain PFI by default as shown in Table 2-16.
Table 2-16 Counter Input Default Routing
Application Signal Type Ctr0 Ctr1 Ctr2 Ctr3 Ctr4 Ctr5 Ctr6 Ctr7
Signal to Measure PFI0 PFI4 PFI8 PFI12 PFI16 PFI20 PFI24 PFI28
Pause PFI1 PFI5 PFI9 PFI13 PFI17 PFI21 PFI25 PFI29
Direction PFI2 PFI6 PFI10 PFI14 PFI18 PFI22 PFI26 PFI30
Signal to Measure PFI1 PFI5 PFI9 PFI13 PFI17 PFI21 PFI25 PFI29
Ext Timebase PFI0 PFI4 PFI8 PFI12 PFI16 PFI20 PFI24 PFI28
Signal to Measure PFI1 PFI5 PFI9 PFI13 PFI17 PFI21 PFI25 PFI29
Ext Timebase PFI0 PFI4 PFI8 PFI12 PFI16 PFI20 PFI24 PFI28
Signal to Measure PFI1 PFI5 PFI9 PFI13 PFI17 PFI21 PFI25 PFI29
Ext Timebase PFI0 PFI4 PFI8 PFI12 PFI16 PFI20 PFI24 PFI28
1st Signal to Measure PFI1 PFI5 PFI9 PFI13 PFI17 PFI21 PFI25 PFI29
2nd Signal to Measure PFI2 PFI6 PFI10 PFI14 PFI18 PFI22 PFI26 PFI30
Ext Timebase PFI0 PFI4 PFI8 PFI12 PFI16 PFI20 PFI24 PFI28
A Input PFI0 PFI4 PFI8 PFI12 PFI16 PFI20 PFI24 PFI28
B Input PFI2 PFI6 PFI10 PFI14 PFI18 PFI22 PFI26 PFI30
Z Input PFI1 PFI5 PFI9 PFI13 PFI17 PFI21 PFI25 PFI29
A Input PFI0 PFI4 PFI8 PFI12 PFI16 PFI20 PFI24 PFI28
B Input PFI2 PFI6 PFI10 PFI14 PFI18 PFI22 PFI26 PFI30
Pulse Generation Signal to Output PFI3 PFI7 PFI11 PFI15 PFI19 PFI23 PFI27 PFI31
Two-Pulse Encoder
Edge Counting
Frequency Measurement
Period Measurement
Pulse Measurement
Two-Edge Separation Measurement
Quad Encoder

PCIe/PXIe-5211 | jytek.com | 10
3.Software
3.1 System Requirements
PCIe/PXIe-5211 boards can be usedin aWindowsor a Linuxoperating system.
Microsoft Windows: Windows 7 32/64 bit, Windows 10 32/64 bit.
Linux Kernel Versions: There are many Linux versions. It is not possible JYTEK
can support and test our devices under all different Linux versions. JYTEK will
at the best support the following Linux versions.
Table 3-1 Supported Linux Versions
3.2 System Software
When using the PCIe/PXIe-5211 in the Window environment, you need to
install the following software from Microsoft website:
Microsoft Visual Studio Version 2015 or above,
.NET Framework version is 4.0 or above.
.NET Framework is coming with Windows 10. For Windows 7, please
check .NET Framework version and upgrade to 4.0 or later version.
Given the resources limitation, JYTEK only tested PCIe/PXIe-5211 with .NET
Framework 4.0 with Microsoft Visual Studio 2015. JYTEK relies on Microsoft to
maintain the compatibility for the newer versions.
3.3 C# Programming Language
All JYTEK default programming language is Microsoft C#. This is Microsoft
recommended programming language in Microsoft Visual Studio and is
particularly suitable for the test and measurement applications. C# is also a
cross platform programming language.
3.4 PCIe/PXIe-5211 Series Hardware Driver
Linux Version
Ubuntu LTS
16.04：4.4.0-21-generic(desktop/server)
16.04.6：4.15.0-45-generic(desktop) 4.4.0-142-generic(server)
18.04：4.15.0-20-generic(desktop) 4.15.0-91-generic(server)
18.04.4：5.3.0-28-generic (desktop) 4.15.0-91-generic(server)
Localized Chinese Version
中标麒麟桌面操作系统软件（兆芯版）V7.0（Build61）: 3.10.0-862.9.1.nd7.zx.18.x86_64
中标麒麟高级服务器操作系统软件V7.0U6: 3.10.0-957.el7.x86_64

PCIe/PXIe-5211 | jytek.com | 11
After installing the required application development environment as described
above, you need to install the PCIe/PXIe-5211 hardware driver.
JYTEK hardware driver has two parts: the shared common driver kernel
software (FirmDrive) and the specific hardware driver.
Common Driver Kernel Software (FirmDrive): FirmDrive is the JYTEK’s kernel
software for all hardware products of JYTEK instruments. You need to install
the FirmDrive software before using any other JYTEK hardware products.
FirmDrive only needs to be installed once. After that, you can install the specific
hardware driver.
Specific Hardware Driver: Each JYTEK hardware has a C# specific hardware
driver. This driver provides rich and easy-to-use C# interfaces for users to
operate various PCIe/PXIe-5211 function. JYTEK has standardized the ways
which JYTEK and other vendor’s DAQ boards are used by providing a
consistent user interface, using the methods, properties and enumerations in
the object-oriented programming environment. Once you get yourself familiar
with how one JYTEK DAQ card works, you should be able to know how to use
all other DAQ hardware by using the same methods.
3.5 Install the SeeSharpTools from JYTEK
To efficiently and effectively use PCIe/PXIe-5211 boards, you need to install a
set of free C# utilities, SeeSharpTools from JYTEK. The SeeSharpTools offers
rich user interface functions you will find convenient in developing your
applications. They are also needed to run the examples come with PCIe/PXIe-
5211 hardware. Please register and down load the latest SeeSharpTools from
our website, www.jytek.com.
3.6 Running C# Programs in Linux
Most C# written programs in Windows can be run by MonoDevelop
development system in a Linux environment. You would develop your C#
applications in Windows using Microsoft Visual Studio. Once it is done, run this
application in the MonoDevelop environment. This is JYTEK recommended
way to run your C# programs in a Linux environment.
If you want to use your own Linux development system other than
MonoDevelop, you can do it by using our Linux driver. However, JYTEK does
not have the capability to support the Linux applications. JYTEK completely
relies upon Microsoft to maintain the cross-platform compatibility between
Windows and Linux using MonoDevelop.

PCIe/PXIe-5211 | jytek.com | 12
4.Operating PCIe/PXIe-5211
This chapter provides the operation guides for PCIe/PXIe-5211, including AI,
AO, DI, DO, Timer and programmable I/O interface, etc.
JYTEK provides extensive examples, on-line help and documentation to assist
you to operate the PCIe/PXIe-5211 board. JYTEK strongly recommends you
go through these examples before writing his own application. In many cases,
an example can also be a good starting point for a user application.
4.1 Quick Start
After you have installed the driver software and the SeeSharpTools, you are
ready to use Microsoft Visual Studio C# to operate the PCIe/PXIe-5211
products.
If you are already familiar with Microsoft Visual Studio C# , the quickest way to
use PCIe/PXIe-5211 boards is to go through our extensive examples. We
provide source code of our examples. In many cases, you can modify the
source code and start to write your applications.
4.2 Digital I/O Operations
The PCIe/PXIe-5211 provides programable I/O function, and contains 40
Programmable Function Interface (PFI).
All 40 PFIs can be used as static digital inputs and outputs. The direction and
output state of each PFI can be controlled independently. Users can operate
these PFIs by polling in the software.
4.3 Counter Input Operations
The PCIe/PXIe-5211 haseight identical 32bit timer/counters as shown in Figure
4-1.
Figure 4-1 Counter Input Diagram

PCIe/PXIe-5211 | jytek.com | 13
Each counter has five input terminals and one output terminal, and these
terminals have different functions in different counter input application type,
including:
Edge Counting
Pulse Measurement
Frequency Measurement
Period Measurement
Two-Edge Separation
Quadrature Encoder (X1, X2, X4)
Two-Pulse Encoder
For buffered acquisition, each counter has an separate DDR storage space and
requires a sample clock. For more information about sample clock, please refer
to chapter 4.5.2.
4.3.1 Edge Counting
The counter counts the number of active edges of input signal.
Set JY5211CITask.Type to CIType.EdgeCounting to use this function.
Timing
1) Single Mode
The count value is written to the register on each rising edge of the signal to
measure as shown in Figure 4-2
Figure 4-2 Simple Edge Counting in Single Mode
To configure the counter to work in this mode, set JY5211CITask.Mode to
CIMode.Single.

PCIe/PXIe-5211 | jytek.com | 14
2) Finite/Continuous Mode with Explicit Sample Clock
The count value is stored into the buffer on each rising edge of the sample clock
as shown in Figure 4-3
Figure 4-3 Bufferd Edge Counting with Explicit Sample Clock
To configure the counter to work in this mode, set JY5211CITask.Mode to
CIMode.Finite or CIMode.Continuous, and set
JY5211CITask.SampleClock.Source to CISampleClockSource.Internal or
CISampleClockSource.External.
3) Finite/Continuous Mode with Implicit Sample Clock
The count value is stored into the buffer on each rising edge of the signal to
measure as shown in Figure 4-4
Figure 4-4 Simple Edge Counting with Implicit SampleClk
To configure the counter to work in this mode, set JY5211CITask.Mode to
CIMode.Finite or CIMode.Continuous, and set
JY5211CITask.SampleClock.Source to CISampleClockSource.Implicit.

PCIe/PXIe-5211 | jytek.com | 15
Pause Trigger
Pause trigger is used to pause counting when the input signal is high (or low,
depend on active polarity configuration as shown inFigure 4-5.
Figure 4-5 Pause Trigger
To cofigure the pause trigger, use the properties as belows:
JY5211CITask.EdgeCounting.Pause.ActivePolarity –To set at which level
(high or low) to pause counting.
Count Direction
User can control the counting direction through software configuration or by an
input signal.
When using an input signal to control the counting direction, the counter counts
up when the signal is high and counts down when the signal is low as shown in
Figure 4-6
Figure 4-6 Count Direction
To cofigure the count direction, use the properties as belows:
JY5211CITask.EdgeCounting.Direction –To specify count up, count down,
or controled by an external signal.

PCIe/PXIe-5211 | jytek.com | 16
Terminals
To change the terminal of signals instead of using its default value shown in
chapter 2.6, use following properties:
JY5211CITask.EdgeCounting.InputTerminal –Signal-to-measure input
terminal.
JY5211CITask.EdgeCounting.Pause.Terminal –Pause signal input
terminal.
JY5211CITask.EdgeCounting.DirTerminal –External direction control
signal input terminal.
4.3.2 Pulse Measurement
The counter measures the high-level and low-level duration of signal to
measure.
Set JY5211CITask.Type to CIType.PulseMeas to use this function.
Timing
1) Single Mode
The count value of the duration of the high-level or low-level is written to the
register on each rising or falling edge of the pulse to measure, as shown in
Figure 4-7
Figure 4-7 Pulse Measurement in Single Mode
To configure the counter to work in this mode, set JY5211CITask.Mode to
CIMode.Single.
2) Finite/Continuous Mode with Explicit Sample Clock
The count value of the duration of the high or low level is stored into the buffer
on each rising edge of the sample clock, as shown in Figure 4-8