JYTEK PCIe-5211 User manual

PCIe/PXIe-5211
Timer/Counter
Board
User Manual
User Manual Version: V1.0
Revision Date: Apr.7, 2020

Table of Contents
1. Overview...................................................................................................1
1.1 Introduction.........................................................................................1
1.2 Main Features.....................................................................................1
1.3 Abbreviations......................................................................................1
2. Hardware Specifications.........................................................................2
2.1 System Diagram .................................................................................2
2.2 Digital IO Specifications......................................................................2
2.3 Counter/Timer Specifications..............................................................4
2.4 Other Specifications............................................................................5
2.5 Front Panel and Pin Definition ............................................................7
2.6 Default Routing for Counter Input/Output Signals...............................9
3. Software .................................................................................................10
3.1 System Requirements.......................................................................10
3.2 System Software...............................................................................10
3.3 C# Programming Language..............................................................10
3.4 PCIe/PXIe-5211 Series Hardware Driver..........................................10
3.5 Install the SeeSharpTools from JYTEK.............................................11
3.6 Running C# Programs in Linux.........................................................11
4. Operating PCIe/PXIe-5211.....................................................................12
4.1 Quick Start........................................................................................12
4.2 Digital I/O Operations........................................................................12
4.3 Counter Input Operations..................................................................12
4.3.1 Edge Counting........................................................................13
4.3.2 Pulse Measurement................................................................16
4.3.3 Frequency Measurement........................................................18
4.3.4 Period Measurement ..............................................................20
4.3.5 Two-Edge Separation.............................................................20
4.3.6 Quadrature Encoder...............................................................23
4.3.7 Two-Pulse Encoder ................................................................25
4.4 Counter Output Operations...............................................................27
4.5 Clocks...............................................................................................29
4.5.1 PLL.........................................................................................30
4.5.2 Sample Clock..........................................................................31
4.5.3 Timebase................................................................................32
4.6 Start Trigger......................................................................................32
4.7 Logic Level........................................................................................33
4.8 Multi-Card Synchronization...............................................................33
5. Calibration..............................................................................................35
6. Using PCIe/PXIe-5211 in Other Software.............................................36

6.1 Python...............................................................................................36
6.2 C++...................................................................................................36
6.3 LabVIEW...........................................................................................36
7. About JYTEK..........................................................................................37
7.1 JYTEK China ....................................................................................37
7.2 JYTEK Korea and JYTEK In Other Countries...................................37
7.3 JYTEK Hardware Products...............................................................37
7.4 JYTEK Software Platform.................................................................38
7.5 JYTEK Warranty and Support Services............................................38
8. Statement ...............................................................................................39
Figure 2-1 PCIe/PXIe-5211 Series System Block Diagram ......................2
Figure 2-2 Front Pannel............................................................................7
Figure 4-1 Counter Input Diagram..........................................................12
Figure 4-2 Simple Edge Counting in Single Mode ..................................13
Figure 4-3 Bufferd Edge Counting with Explicit Sample Clock................14
Figure 4-4 Simple Edge Counting with Implicit SampleClk.....................14
Figure 4-5 Pause Trigger........................................................................15
Figure 4-6 Count Direction......................................................................15
Figure 4-7 Pulse Measurement in Single Mode......................................16
Figure 4-8 Pulse Measurement with Explicit SampleClk.........................17
Figure 4-9 Pulse Measurement with Implicit SampleClk.........................17
Figure 4-10 Frequency Measurement with Explicit Sample Clock..........19
Figure 4-11 Two-Edge Separation in Single Mode .................................21
Figure 4-12 Two-Edge Seperation with Explicit Sample Clock ...............21
Figure 4-13 Two-Edge Seperation with Implicit Sample Clock ...............22
Figure 4-14 Quadrature Endcoder x1 Mode ...........................................23
Figure 4-15 Quadrature Encoder x2 Mode .............................................23
Figure 4-16 Quadrature Encoder x4 mode .............................................24
Figure 4-17 Quadrature Encoder x4 with Explicit Sample Clock.............25
Figure 4-18 Quadrature Encoder x4 with Implicit Sample Clock.............25
Figure 4-19 Two-Pulse Encoder in Single Mode.....................................26
Figure 4-20 Two-Pulse Encoder with Explicit Sample Clock...................26
Figure 4-21 Two-Pulse Encoder with Implicit Sample Clock...................27
Figure 4-22 Pulse Output in Single Mode...............................................28
Figure 4-23 Pulse Output in Single Mode with Dynamic Update ............28
Figure 4-24 Buffered Pulse Sequence Generation .................................29
Figure 4-25 Clocks Diagram...................................................................29
Figure 4-26 Rising Edge Digital Trigger..................................................32
Figure 4-27 Master-Slave Synchronization.............................................33

Table 2-1 Basic.........................................................................................2
Table 2-2 DIO...........................................................................................3
Table 2-3 PFI............................................................................................3
Table 2-4 Recommended Operating Conditions.......................................3
Table 2-5 Electrical...................................................................................3
Table 2-6 Basic.........................................................................................4
Table 2-7 Maximum Frequency of the Source..........................................4
Table 2-8 Minimum Pulse Measurement ..................................................4
Table 2-9 Other Functions........................................................................4
Table 2-10 PLL (Phase lock loop).............................................................5
Table 2-11 TCXO......................................................................................5
Table 2-12 External Digital Trigger ...........................................................5
Table 2-13 Bus and Power .......................................................................5
Table 2-14 Physical Size and Enviroment ................................................6
Table 2-15 Pin Defination .........................................................................8
Table 2-16 Counter Input Default Routing ................................................9
Table 3-1 Supported Linux Versions.......................................................10

PCIe/PXIe-5211 | jytek.com | 1
1.Overview
This chapter presents the information how to use this manual and how to quick
start if you are already familiar with Microsoft Visual Studio and C#
programming language.
1.1 Introduction
PCIe / PXIe-5211 series products are multi-purpose counter data acquisition
modules, which can provide 8 counter channels, supporting edge counting,
frequency measurement, period measurement, pulse measurement, two-edge
separation measurement, encoder and pulse generation. The device utilizes a
high-throughput PCI Express bus and multi-core optimized drivers and
application software to provide high-performance capabilities.
Please check with JYTEK for the latest 5211 series offering.
1.2 Main Features
8ch counter
40ch multi-purpose PFI
Up to 200MHz clock rate
1.8V / 2.5V / 3.3V / 5V logic level optional
Edge Counting / Pulse measurement / Frequency Measurement / Period
Measurement / Two-Edge Seperation
Quadrature (X1/X2/X4) Encoder with Z Reloding
Two-Pulse Encoder
Pulse Generation
Support multi-card synchronization
On-board high-performance TCXO clock
On-board clock generator for sampling
1.3 Abbreviations
DI: Digital Input
DO: Digital Output
CI: Counter Input
CO: Counter Output
DAQ: Data Acquisition
PFI: Programmable Function Interface
TXCO: Temperature Compensate X'tal (crystal) Oscillator

PCIe/PXIe-5211 | jytek.com | 2
2.Hardware Specifications
2.1 System Diagram
Figure 2-1 PCIe/PXIe-5211 Series System Block Diagram
The system block diagram of PCIe/PXIe-5211 series is shown in Figure 2-1.
It is mainly composed of one DIO module and eight Timer/Counter modules,
providing digital input, digital output, counter input, counter output functions.
JYTEK's FPGA-based driver FirmDrive provides a stable and efficient PCIe /
PXIe / USB interface.
2.2 Digital IO Specifications
Table 2-1 Basic
Basic
Number of channels 40
Ground Reference GND
Direction control Independently Controlled
Pull-down resister NONE
Logic signal levels
1.8 V
2.5 V
3.3 V
5 V
Input voltage protection -0.5-(UserVcc+0.5 V)
Output impedance 50 Ω
UserVcc ：user select the logic signal level

PCIe/PXIe-5211 | jytek.com | 3
Table 2-2 DIO
Table 2-3 PFI
Table 2-4 Recommended Operating Conditions
Table 2-5 Electrical
DIO
Terminals used. Port 0 (P0.<0-39>)
Port width 32 bits (Maximum)
PFI
Available PFI PFI<0:39>
Supported functions
Static input
Static output
Timing input
Timing output
Timing output source Counter
Anti-jitter filter options Not Support
Recommended Operating Conditions
Input high voltage (VIH)
1.2 V (UserVcc=1.8 V)
1.7 V (UserVcc=2.5 V)
2 V (UserVcc=3.3 V)
3.5 V (UserVcc=5 V)
Maximum high-level input voltage UserVcc+0.5 V
Minimum low-level input level -0.5 V
Input low voltage (VIL)
0.65 V (UserVcc=1.8 V)
0.7 V (UserVcc=2.5 V)
0.8 V (UserVcc=3.3 V)
1.5 V (UserVcc=5 V)
Output High current (IOH)
-4 mA(UserVcc=1.8 V)
-8 mA(UserVcc=2. 5V)
-24 mA(UserVcc=3.3 V)
-32 mA(UserVcc=5 V)
Output Low current (IOL)
4 mA(UserVcc=1.8 V)
8 mA(UserVcc=2.5 V)
24 mA(UserVcc=3.3 V)
32 mA(UserVcc=5 V)
Electrical
Maximum input current of low-level voltage -2 µA
Maximum current of high-level voltage 2 µA

PCIe/PXIe-5211 | jytek.com | 4
2.3 Counter/Timer Specifications
Table 2-6 Basic
Table 2-7 Maximum Frequency of the Source
Table 2-8 Minimum Pulse Measurement
Table 2-9 Other Functions
Basic
Number of counter/timer 8
Resolution 32 bits
Measurement functions
Edge Counting
Frequency
Period
Pulse
Two-Edge Separation
Maximum Frequency of the Source
PFI
Frequency Measurement 50 MHz
Edge Counting 50 MHz
Minimum Pulse Measurement
PFI
Period Measurement 15 ns
Pulse Measurement 20 ns
Two-Edge Separation 20 ns
Other Functions
Position measurement
Quadrature encoder (X1/X2/X4) with Z reloading;
Two-pulse encoder
Output applications
Pulse Generation with Dynamic Update
Buffered Pulse Sequence Generation
Internal timebase 200 MHz, 5 MHz,
100 kHz
Internal timebase accuracy 2 ppm
External timebase 0-50 MHz
Counter input
Gate
Source
AUX
A, B, Z
Up_Down
Sample Clock

PCIe/PXIe-5211 | jytek.com | 5
2.4 Other Specifications
Table 2-10 PLL (Phase lock loop)
Table 2-11 TCXO
Table 2-12 External Digital Trigger
Table 2-13 Bus and Power
PLL(Phase lock loop)
Number of PLL 1
PXIe_DSTAR A 100 MHz Max
PXIe_CLK100：100 MHz
Onboard TXCO 10 MHz
Output option 200MHz Base Clock
TCXO
Nominal frequency 10 MHz
Warm-up time 15 minutes
Temperature drift ±20 ppb
temperature drift and 1 year drift ±0.5 ppm
Basic Property
External Digital Trigger
Trigger source PFI<0:39> PXI_Trig<0:7>
PXI_Star
Polarity Rising Edge
Counter/Timer functions Start trigger
Input source PXI_Trig<0:7>
PXI_Star
Output destination PXI_Trig<0:7>
Output options Sync Trigger Routing
Debounce filter settings Not Support
Device to device
trigger bus
Trigger functions
Bus and Power
PXIe standard
x8 PXIe peripheral module
Specification V1.0 compliant
slot supported
x1 and x4 PXI Express hybrid
slots
Recommended warm-up time >=15 min
Recommended calibration interval One year
Bus interface
Calibration

PCIe/PXIe-5211 | jytek.com | 6
Table 2-14 Physical Size and Enviroment
Physical Size and Environment
External physical size 3 U PXIe
Weight TBD
Indoor only Yes
Operating temperature 0-55 ℃
Environment
Size