Kirisun DR600 User manual

DR600 Service Manual
Contents
1. Overview...................................................................................................................................................1
1.1 Scope of Manual....................................................................................................................................1
1.2 Safey Precautions .................................................................................................................................1
2. Product Controls and LED Indicator Introduction...............................................................................2
2.1 Product Controls....................................................................................................................................2
2.2 LED Indicators.......................................................................................................................................3
3. Circuit Description..................................................................................................................................4
3.1 RF Circuit...............................................................................................................................................4
3.1.1 Tx Circuit.............................................................................................................................................4
3.1.2 RF Power Amplifier Module Circuit.....................................................................................................5
3.1.3 Rx Module Circuit................................................................................................................................6
3.2 GPS Ciruit..............................................................................................................................................8
3.3 Baseband Section .................................................................................................................................9
3.3.1 Circuit Description...............................................................................................................................9
3.3.2 Power Section....................................................................................................................................11
3.3.3 Audio Processing..............................................................................................................................14
3.3.4 Ethernet Interface .............................................................................................................................15
3.3.5 Boot Mode.........................................................................................................................................15
3.3.6 Hardware Version Encode................................................................................................................16
3.3.7 Baseband Board Interface and Indicator..........................................................................................17
3.3.8 Tx Unit Interface Definition (J17)......................................................................................................18
3.3.9 RF Power Amplifier Module Interface (J18)......................................................................................19
3.3.10 Rx Unit Interface Definition (J15)......................................................................................................20
3.3.11 Front Panel Interface Definition (J19)...............................................................................................22
3.3.12 Serial Port Definition (J23)................................................................................................................22
3.3.13 JTAG Simulator Interface Definition (J2)..........................................................................................23
3.3.14 External Interface Definition (J9) ......................................................................................................24
3.3.15 Case External Interface Definition....................................................................................................26
4. Function and Parameter Setting..........................................................................................................28
4.1 Conventional Functions.......................................................................................................................28
4.2 Parameter Setting................................................................................................................................28
4.2.1 Parameters setting............................................................................................................................28
4.2.2 Install CPSp user programming software.........................................................................................28
5. Assembly and Disassembly.................................................................................................................31
5.1 Case Disassembly...............................................................................................................................31
5.2 Exploded View.....................................................................................................................................34
5.3 Wiring...................................................................................................................................................37
6. Adjustment.............................................................................................................................................40
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6.1 Preparation..........................................................................................................................................40
6.2 Method of Modulation and Test...........................................................................................................40
6.2.1 Local Oscillator Adjustment...............................................................................................................40
6.2.2 Tx Adjustment ...................................................................................................................................41
6.2.3 Rx Adjustment...................................................................................................................................42
7. Main Technical Functions and Specifications ...................................................................................44
8. Maintenance and Test Equipment.......................................................................................................46
9. Troubleshooting....................................................................................................................................47
Appendix 1 Band Spare Part List................................................................................................................50
Table 1 400-470 Parts List (Rx Module Section)............................................................................................50
Table 2 400-470 Parts List (Tx Module Section)............................................................................................60
Table 3 400-470 Parts List (Power Amplification Section).............................................................................66
Table 4 136-174 Part List(RX Module Section)..............................................................................................70
Table 5 136-174 Part List(TX Module Section)..............................................................................................85
Table 6 136-174 Part List(Power Amplification Module Section)...................................................................91
Table 7 Parts List (Baseband Mainboard)......................................................................................................95
Table 8 Parts List (Front Panel)....................................................................................................................102
Table 9 Parts List (Power Board)..................................................................................................................103
Table 10 Parts List (Accessory Board).........................................................................................................103
Table 11 Parts List (Enternet Board) ............................................................................................................104
Appendix 2 PCB View and Schematic Diagram......................................................................................105
Figure 1 Rx Module Top Board PCB View...................................................................................................105
Figure 2 Rx Module Bottom Board PCB View..............................................................................................106
Figure 3 Tx Module Top Board PCB View....................................................................................................107
Figure 4 Power Amplifier Module Top Board PCB View ..............................................................................108
Figure 5 Power Amplifier Module Bottom Board PCB View.........................................................................108
Figure 6 Baseband Mainboard Top Board PCB View..................................................................................109
Figure 7 Baseband Mainboard Bottom Board PCB View ............................................................................ 110
Figure 8 Front Panel Top Board PCB View...................................................................................................111
Figure 9 Front Panel Bottom Board PCB View.............................................................................................111
Figure 10 Power Board Top Board PCB View.............................................................................................. 112
Figure 11 Accessory Board Top Board PCB View........................................................................................ 113
Figure 12 Accessory Board Bottom Board PCB View.................................................................................. 113
Figure 13 Enternet Board Top Board PCB View.......................................................................................... 114
Figure 14 Enternet Board Bop Board PCB View.......................................................................................... 115
Figure 15 400-470 Rx Module Schematic Diagram..................................................................................... 116
Figure 16 400-470 Tx Module Schematic Diagram .....................................................................................123
Figure 17 400-470 PowerAmplifier Module Schematic Diagram................................................................128
Figure 18 136-174 Rx module schematic Diagram......................................................................................131
Figure 19 136-174 Tx Module Schematic Diagram .....................................................................................138
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Figure 20 136-174 PowerAmplifier Module Schematic Diagram................................................................143
Figure 21 Baseband Mainboard Schematic Diagram..................................................................................146
Figure 22 Front Pannel Schemetic Diagram................................................................................................161
Figure 23 Power Board Schemetic...............................................................................................................162
Figure 24 Accessory Schematic Diagram....................................................................................................163
Figure 25 Enternet Board Schematic Diagram............................................................................................164
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DR600 Service Manual
1.Overview
1.1 Scope of Manual
This manual is intended for use by trained engineers and professional technicians for the maintenance and
repair of DR600 Repeater. Data changes in this manual may occur with the improvement of technology. To
get the latest technology information, please contact us or your local distributors.
Before repairing the unit, please read this manual.
1.2 Safey Precautions
Electromagnetic Radiation
Radios generate and radiate electromagnetic energy, the security design of Kirisun radios’ electromagnetic
radiation on human meets national and international standards.
Electromagnetic Interference
Installation should be in accordance with local radio regulations.
Explosive and Harmful Gases
Do not install the repeater in areas with explosive and harmful gases, such as the lower deck of the hull,
fuel or chemical storage facilities, area where the air contains chemicals or particles, dust or metal dust.
Do not install the repeater when close to the blasting area, electric blasting detonators.
Replacement Parts
When replacing any replacement part, please be aware of the model. Do not arbitrarily replace the
component that does not match with the radio.
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2.Product Controls and LED Indicator
Introduction
2.1 Product Controls
The appearance of the the DR600 repeater is shown in the Figure 2-1.
Figure 2-1 DR600Appearance
No. Part Name No. Part Name
1 Handle 2 Fan
3 LED Indicator 4 Power Switch
5 Grouding Rod 6 100~240V AC port
7 13.6V DC port 8 RX Interface
9 ACCY interface 10 Ethenet Interface
11 GPS interface 12 TX Interface
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2.2 LED Indicators
LED Indicator Description
TX-A Indicates slot 1 is transmitting.
RX-A Indicates slot 1 is receiving.
TX-B Indicates slot 2 is transmitting.
RX-B Indicates slot 2 is receiving.
Repeater mode. When illuminated, the repeater is active. When the
repeater is inactive, the LED is off.
Analog mode. For analog or mixed signals the LED flashes when active.
The LED is off when inactive.
Digital mode. For digital or mixed signals the LED flashes when active. The
LED is off when inactive.
Alarm mode. Illuminates when there is a problem with the repeater.
Illuminates when the repeater is switched on.
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3.Circuit Description
3.1 RF Circuit
The RF part is composed of transmitter module, power amplifier module and receiver module.
3.1.1 Tx Circuit
Figure 3-1 Transmitter Circuit
X100
MODE1
SDATA
TXPLLCS
SCLK
TXLD
MODEIN
Q2002
IC100 SKY72310
IC306
U402
TOTXPA
MODE2
TXVCOSELECT
TXVCO1+TXVCO2
Q105
Q106
TXENABLE
Transmitter circuit includes three parts:
Two Point Modulation Circuit
The RF center frequency calibration from the baseband and the low frequency part of 4FSK signal will
be processed with addition algorithm, then sent to the DAC to get MODE1 signal. The MODE1 directly
enters the reference clock X100, which is used for center frequency control and low frequency modulation.
The MODE2 signal, which passes the two-level low pass filter which is composed of IC301s for DAC
sampling interference filter, will be sent into VCO for high frequency part modulation.
Transmitter Frequency Generation Unit Circuit
The transmitter PLL includes two VCOs,one PLL(IC100) IC SKY72310 and reference clock X100. The
transmitting frequencies of the two VCOs controlled by the TXVCOSELECT signal are 400~435MHz and
435~470MHz respectively.(VHF is 136~155MHz and 155~174MHz)
a.Working Principle of Voltage Controlled Oscillator
The Tx Module employs two VCOs which cover the band of 400~435MHz and 435~470MHz (VHF is
136~155MHz and 155~174MHz). The switch of VCO is controlled by the TXVCOSELECT signal. VCO
employs three point capacitance oscillation circuit. The VCO that covers the band of 400~435MHz (VHF is
136~155MHz) is composed of D106~D109、L119、Q106 and some other components, while the VCO
covers the band of 435~470MHz (VHF is 155~174MHz) is composed of D101~D104、L107、Q105 and
some other components.
b.Working Principle of Frequency Generation Unit
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The 12.8 MHz reference clock (X100) output signal which is controlled by MODE1 signal will enter the
reference input port of PLL IC (IC100 SKY72310), then according to the configuration of register, it will be
divided to get 3.2MHz reference frequency, and the frequency will be compared in phase difference with the
signal generated by the frequency division which is resulted from the VCO’s enter into the input port of PLL
chip. The PLL (IC100 SKY72310) PD pin will output the positive or negative pulse current which is in output
pulse width, is directly proportional to the aforementioned signal phase difference. When the pulse current
passes the loop filter, it will be converted to CV voltage via RC integral. The the CV voltage will be sent to
the VCO varactor to adjust and control the output frequency from the VCO until the CV voltage becomes
constant. The loop is locked in the meantime.
Buffer Amplifier Circuit
VCO outputs the modulated carrier signal to enter Q2002 for buffer amplication and then passes the LPF
U402 to eliminate the harmonic wave. After that, the signal will go into IC306 for pre-amplification, then
passes the LPF to filter the harmonic wave again, and the signal is output to the SMA connector which is
connected to the transmitting power amplification.
3.1.2 RF Power Amplifier Module Circuit
Figure 3-2 RF power amplification module
D103
SWR-R
IC100
POWERCONTROL
IC101
DS18B20
RFOUT
SWR-T
Q102
RF IN
U100
D104
The power amplifier module will amplify the modulated carrier signal from the transmitter module to a
certain power level, then send to the transmitter port.
The power amplifier module includes the three parts:
PowerAmplification Part
The modulated carrier from the transmitter module will enter Q102 for pre-amplification, then the signal will
attenuate to a certain level to make the amplitude of the signal which will be input with U100 operates
between 17~20dBm. Under the control of POWERCONTROL signal, the RF signal output from U100 will
pass the LPF to suppress the harmonic wave and collect power stationary wave sample from the
directional coupler before being sent to the antenna port.
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APC and Stationary Wave Protection Circuit
The directional coupler detects the forward and reverse directions RF signal and passes the Q103,Q104 to
convert the signal to the DC voltage which is corresponding to the forwardand reverse direction power.
After the voltage division, the forward direction DC voltage with the reverse direction voltage pass the
selection switch which is composed of D201,D202 and enter IC100(NJM2904) for buffer amplification
before being sent to the reverse phase input port of the operational amplifier of IC100(NJM2904). The
POWERCONTROL control signal form the baseband will be sent to the identical phase input port of
IC100(NJM2904)’s operational amplifier. After the operational amplification and external circuit’s function
calculation, the signal is output as a conrol signal which controls the U100 gain control port to ensure that
the actual output power remains stable when the impedance matches and to decrease the output power for
power amplifier protection when the impedance mismatches.
Temperature Detection Circuit
The continuous temperature rise can lead to a decrease of transmitting power. The temperature detection
employs IC101(DS18B20) to collect the digital temperature sample.When the temperature exceeds the
threshold value, the fan will be switched on for heat dissipation.
3.1.3 Rx Module Circuit
Figure 3-3 Receiver Module
IC6003
FS
DATAOUTB
CLK
DATAOUTA
IC6001
AD9864SYNCB
IC1000
Q1009/1011
U5002
Q2002
PD
PC
PE
PLL
PLL CONFIG
12.8MHz
BPF ADJUST
IC3000
L3006/8/9
L3000/1/2 Z3001 IC3005
L3010/11/12 Z3000 Q3001/2
U4000 AD9864
2rd LO 18MHz CLOCK
IC3003
RXVCOSELECT
Receiver Circuit
The receiver circuit includes RF Band pass filter, Low-noise amplifier, mixer, IF filter, IF amplifier and IF
processor.
The signal from the receiving port first passes the low pass filter to suppress the high frequency
interference, and passes the electrical tuning BPF to suppress the image interference and the out-band
interference.The in-band signal is sent to the low noise amplifier (IC3000) and the amplified signal passes
the electrical tuning BPF controlled by BPFADJUST to filter the out-band interference, so the effective high
frequency will be sent to the mixer(IC3005). Meanwhile, the first local oscillation passes the LPF and gets
mixed with the effective signal in IC3005 to generate the first IF signal (51.65MHz). The first IF signal
passes the crystal filter (Z3001) to suppress the out-band signal. The signal is then sent to IF amplifier
(IC6003) for amplification before being sent to the crystal filter to strenghthen the suppression of the the
adjacent channel. After being sent to the limiting amplifier composed of Q3001 and Q3002, the signal
enters AD9864 (U4000) for the second frequency mixing ,IF amplification and AD sampling. The digital IQ
signal will be finally output to the baseband for further processing.
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IF Processor Circuit
Figure 3-4 IF Processor
The 51.65MHz IF signal output from the IF amplifier enters the AD9864 via its pin 47, and it finishes the
second frequency mixing in the AD9864 to convert the fisrt IF to the second IF. The second IF signal is
converted to the digital signal through theADC sampling and output from the SSI port, and the digital signal
is sent to FPGA for demodulation.
The reference frequency of AD9864 is 12.8MHz. The second local oscillation VCO is composed of external
oscillation tube, varactor, and related components. The VCO provides the 49.4MHz local oscillation signal.
The clock frequency of AD9864 is18MHz and it is generated by external LC resonance circuit.
Rx Module Frequency Generation Unit Circuit
The Rx Module Frequency Generation Unit Circuit is composed of two VCOs and one PLL. Two VCOs
cover the band of 400~435MHz and 435~470MHz respectively (VHF is 136~155MHz and 155~174MHz).
a.Working Principle of PLL
The 12.8MHz clock frequency provided by the baseband will enter the frequency divider for division, and
then the 3.2MHz phase detecting frequency will be generated. The signal generated by VCO enters the
PLL chip for frequency division, and goes into the PD to get compared in phase difference with the signal
generated by frequency division of reference clock, thus the continuous pulse current is generated. The
continuous pulse current passes the loop filter and will be converted to CV voltage via RC integral. The CV
voltage will be sent to the varactor, and it controls and adjusts the VCO output frequency until the CV
becomes constant. In the mean time, the PLL is locked, and the stable output frequency from VCO
passes the two buffer amplifier to enter the frequency mixer.
b.Working Principle of VCO
The Rx module employs two VCOs which cover the band of 348.35~383.35MHz and 383.35~418.35MHz
(VHF is 84.35~103.35MHz and 103.35~122.35MHz) respectively, and the switch of VCO is controlled by
the RXVCOSELECT signal. VCO employs three point capacitance oscillation circuit. The VCO that covers
the band of 348.35~383.35MHz (VHF is 84.35~103.35MHz) is composed of D1006~D1009、L1017、Q1011
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and some other components, while while the VCO covers the band of 383.35~418.35MHz (VHF is
103.35~122.35MHz) is composed of D1002~D1005、L1016、Q1009 and some other components.
3.2 GPS Ciruit
Figure 3-5 GPS Schematic Diagram
As Figure 3-5 shows, the repeater baseband board includes the GPS module (U9) and the GPS antenna
interface J8(SMA). The corresponding equipment box is also assembled with a GPS antenna interface
which supports the outdoor active antenna. The GPS module integrates a baseband processor, LNA and
SAW. The antenna receives the 1575.42MHz GPS signal, after the inner amplification and filter process, it
will be sent to the baseband section for further calculating, to get the geographical location and time
information of the equipment. The output data information will be sent to processor (U4). Meanwhile, the
GPS module hardware will provide the one-pulse-per-second signal (1PPS) for OMAP and FPGA
respectively.
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3.3 Baseband Section
3.3.1 Circuit Description
Figure 3-6 Baseband Circuit
As Figure 3-6 shows, inside the dotted line box is the baseband section circuits, which includes the four
major modules of dual core processor(U4), DDR2(U6), NAND FLASH(U7) and FPGA (U14). They are used
to run the Linux operation system with various drivers and protocols to achieve call forwarding.
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Figure 3-7 Processor Internal Circuit
The internal circuit of the processor is as Figure 3-7 shows, which is composed of various serial interfaces
such as 300MHzARM926EJ MPU、300MHz C674x DSP、DMAcontroller、SDRAM EMIF interface、EMAC
Ethernet IC RMII interface、McASP digital audio interface and McBSP, SPI, I2C, UART.
U6 is DDR2 SDRAM with the capacity of 1Gb(64Mx16), and it is used to store the running program
codes and various dynamic data.
U7 is NAND FLASH with the capacity of 2GB, and it is used to store the drivers of all the devices,
operation system and application program code which includes the program code of FPGA.
The digital IF signal sent from the FPGA processing receiving unit communicate with the processor U4
via EMA BUS, and it communicate with DAC via the analog SPI interface to process the transmitting and
receiving data, which includes the data framing, filter, interpolation, extracting and etc. to achieve the
calculation and synchronization of frame number. The PLL module inside the FPGA IC will process the
external 12.8MHz, +/-1.5ppm reference clock to generate a 61.44MHz master clock via 24/5 frequency
doubling and frequency division.
The external circuit includes the parts of ADC, DAC, CODEC, AUDIO AMP, ETHERNET, RS232 and etc.
The Analog-Digital Convertor ADC (U22) collects data such as stationary wave signal detection and
power supply voltage detection which are controlled by RF power.
Digital-Analog Convertor DAC (U24) is used for transmitter two point modulation output, and the other
DAC(U27) is used to achieve the band pass adjusting and the RF power amplification control of the RF
receiver, the tuning control of the receiver local oscillation reference clock.
CODEC(U30) achieves the digital-analog converting. It is connected to the OMAP processor via I2S
digital audio interface to achieve the local monitoring, output and input of interposed speech or audio Tx/Rx
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index testing.
The output power of audio power amplifier (U31) is 1W, which is used for local monitoring or tested
speech output.
Network interface (U17) is the TRx components of 10/100M single Ethernet physical layer, and it is used
to the tuning of various parameter setting and communication control.
UART- Universal Asynchronous Receiver/Transmitter(U32)achieves the RS232 electrical level switch,
when it communicates with the PC, it can initiate the programming burning, programming tuning
information printing, and etc.
3.3.2 Power Section
Figure 3-8 Whole Unit Power
As Figure 3-8 shows, the whole unit power supply employs adaptive ac/dc power supply with AC priority
and DC/AC auto switch. The output DC voltage which is switched and protected by the electric relay will be
divided into two paths. One path is for the RF power amplification, and the other is for banseband
mainboard. The switch in the front panel turns the power on/off via the electric relay U2. The protection
circuit will cut off all the DC output when the DC exceeds 18V.
The AC/DC switching part employs an independent module power supply(320W), and it supports the AC
input range between 100V-240V, nominal output DC voltage is 12V, and the factory set is 13.2V.
The rated AC input voltage is between 100-240V, the socket is built in the dual protective tube.
Specification of the protective tube is 2.5A, 5x20mm ceramic tube, slow type.
The rated DC input voltage is 13.6V with the rated current being 15A. The protective tube is included in the
DC accessories.
Power Switch and AC/DC Switch
As the Figure 3-8 shows, the electric relay is switched on for the AC power supply and it will cut off the DC
point. The 13.2VDC output from the ACDC module is connected to U2 through the U1 contact. If the panel
switch (J5) is on, the electric relay (U2) will be switched on, so is the repeater.
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DR600 Service Manual
When AC power supply is off, the electric relay (U1) is released. The DC is connected to U2 via the
electric relay (U1) contact. If the panel switch (J5) is on, the electric relay U2 will be switched on, so is the
repeater.
The panel switch (J5) is off, and U2 is released, which cut off the baseband DC power supply B13V
including the RF power supply R13V.
Over-voltage Protection
Figure 3-9 Over-voltage Circuit Protection
As the Figure 3-9 shows, the breakdown voltage of the voltage stabilizing diode is 18V+/-0.5V. If the input
DC volatage is over 18V+/-0.5V, the Q1 breaks over with Q2 being cut off, and the electric relay U2 will be
released to cut off the DC power supply B13V, including the RF power supply R13V.
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Baseband Board Power Supply
Figure 3-10 Baseband Board Power Supply Distribution Diagram
As Figure 3-10 shows, the baseband and RF employs isolated power supply. B13V will be divided into
three paths. One path provides power for baseband circuit, the second one is provided for Tx and Rx
module after being isolated by magnetic bead, and the last one is provided for heat dissipation fan after
being isolated by the ferrite Inductor.
The digital and analog part of the baseband circuit own separate power supply.
The power supply of the digital circuit is composed of two-level switch circuit. The first level decreases
the B13V to 5V via DC/DC (U1) ; the second level switches 5V to 3.3V, 1.8V, 1.2V and etc.. which are
isolated by various magnetic beads before being supplied to the circuit modules.
The analog circuit power supply will be directly supplied to analog audio power amplification circuit after
being switched to 8V via LDO. One power path outputs 5V_DA via the low voltage LDO (U26) and provide
it for the analog power of DAC(U24, U27), and the other oupts 3.3V_A via the low voltage LDO (U5) and
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DR600 Service Manual
provide it for the analog power of CODEC (U30).
3.3.3 Audio Processing
Figure 3-11 Audio Processing Schematic Diagra
As the Figure 3-11 shows, the audio processing module mainly achieves encoding and decoding with ADC
and DAC of the audio signal, including air audio forwarding and local audio TRx.
Air Audio Forwarding
The digital IF signal from the RF receiver will be first sent to the FPGA(U14) for time slot processing and
achieving the framing, filtering and extracting of the data to realize the calculation and synchronization of
the frame number; the signal will be send to the DSP of CPU (U4)via the McBSP interface for 4FSK
decoding, digital audio signal decoding and etc.. Meanwhile, the internal DSP will send the digital audio
signal which achieves the decoding and encoding to the FPGA(U14) for time slot processing and finishing
the framing, filtering and interpolation and other synchronization calculation of the data, and the digital
audio signal will then be sent to the DAC (U24) via the SPI interface for the audio digital/analog switch,
generating the analog speech two point modulation signal before being sent to the transmitter for the audio
forwarding.
Local Audio TRx
The internal DSPin the main processor(U4) connects to the CODEC(U30) via the I2S digital audio interface.
The CODEC(U30) will convert the analog audio input from the external to digital audio, then send into the
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DR600 Service Manual
internal DSP. In the meantime, converts the received digital audio from the internal DSP to analog audio,
then send the audio to audio power amplifier(U31), before finally send to the ACCY external interface,
which is to drive the 1W, 16Ω speaker.
3.3.4 Ethernet Interface
Figure 3-12 Ethernet Interface
As Figure 3-12 shows, A RMII simplified interface is used between the CUP(U4) and network interface
chip(U17) . RMII interface independent clock uses external clock mode and share 50MHz clock with U17.
CPU (U4) achieves the hardware information of internet interface U17 through the independent
configuration interface MDIO. CPU also initiate it and assign MAC and IP address.
The data transmitting and receiving between network interface chip(U17) and interface connector(J12) are
achieved through connecting the transformer inside the connector jack RJ45 and LED through 2 pairs of
differential line.
The network interface can realize parameter adjustment and parameter configure, user programming and
firmware upgrade.
3.3.5 Boot Mode
A boot mode selection switch (J4) is provided on the baseband. The four position 1 to 4 of DIP encode
switcher are correspondingly connected with boot 1 to boot 4 of OMAP (U4), so the boot operation mode
will be changed after being powered on.
The level of position “ON” of encode switcher corresponding to boot which is connected to GND is
“0”.Conversely, the level of position “OFF” is “1”.
As showing in Figure 3-13, the level of boot1 to boot4 of switcher is 0101, and it enters to firmware
download mode after power on. It can upgrade the guide program and the low driver program by booting
from serial port(UART2).
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DR600 Service Manual
Figure 3-13 Firmware Download Mode Figure 3-14 User Mode
As showing in Figure 3-14, the level of boot 1 to boot4 is 1110, and it enters to normal running user mode
after power on. It starts from NAND FLASH. In this mode, it can upgrade operation system kernel, device
driver program, files system and application program by network interface.
Please configure the boot mode as user mode as shown in Figure 3-15 in normal use.
3.3.6 Hardware Version Encode
Figure 3-15 Hardware Version Encode
According to the position of chip resistor in Figure 3-15 the encoder is “001” and the corresponding version
is Ver3.0.
2 1 0 D2 D1 D0 Version
NULL NULL 0R 1 0 0 1 Ver1.0
0R 0R NULL 0
NULL 0R NULL 1 0 1 0 Ver2.0
0R NULL 0R 0
NULL 0R 0R 1 0 1 1 Ver3.0
0R NULL NULL 0
0R NULL NULL 1 1 0 0 Ver4.0
NULL 0R 0R 0
0R NULL 0R 1 1 0 1 Ver5.0
NULL NULL NULL 0
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