Korg SDD-1200 User manual

DUAL DIGITAL DELAY
SDD-1200
SERVICE
MANUAL
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CONTENTS
1. SPECIFICATIONS 2
2. STRUCTURAL DIAGRAM 3
3. BLOCK DIAGRAM 4
4. CIRCUIT DIAGRAM 5
5. P.C. BOARD 6
6. CIRCUIT DESCRIPTIONS
7. CHECK AND ADJUSTMENT
PROCEDURE
8. PARTS LIST
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1. SPECIFICATIONS
0 - +110% (positive phase)
0 110% (negative phase)
] Filter (EFFECT sound)
HIGH-CUT 10kHz 0 18dB, changes in succession
LOW-CUT 100kHz 0 18dB, changes in succession
i Modulation
MODULATION WAVEFORM triangle waveform
MODULATION FREQUENCY 0.05 - 8Hz
DELAY TIME MOD. RANGE 4 : 1
SAMPLING FREQUENCY 42kHz (FACTOR = x1) - 170kHz (FACTOR = x0.25)
METHOD 12bit quantitized + analog logarithm compression
M Dimensions
482 (W) x 44 (H) x 340 (D) mm
M Weight
4.2 kg
M Power supply
100V 50/60HZ
M Power consumption
11W
M Supplied accessories
AC cord. Rack mounting screws.
SH Optional accessories
pedal switches (PS-1, PS-2), patch cord sets (A, B, C), IU rack case (HC-IU)
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2. STRUCTURAL DIAGRAM
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3. BLOCK DIAGRAM
LOW CUT
LPF COMPRESSOR m. .y ■, LPF EXPANOOR HI CUT
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D101-D111; 1SS133T77
This circuit diagram shows KLM-6000 A
channel only.
The circuit or KLM-6000 B channel is
quite same as A channel except silk part
number on the board.
Parts number of A channel 100-199
Parts number of B channel 200-299
M5224 i !-!5vl >'
8 IC107 l/4 0I03V —> ?
CI46 V2 ^ ^
I it ! I T i 1
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KLM-6000 MAIN BOARD
A B A B A B
cjvw
T I. ^
S tJS S fcX? g o/S" <J? ^/ * ^* h0hD/rR.G)B^O
1KLM-6O17
^ I
KLM-6001 PANEL BOARD
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5. P.C. BOARD
KLM-6000
knae saoAi ivj KHN-eOOOB
Ot tiKE BEWVCE OMFA MUH 06 HETC lAbE
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KLM-6001
KLM-6001, 2, 3, 4,17,18
KLM-6003, 2,17
©
c
_ED I LgQ2
KLM-6002
AC CMB
BW CN1
CAUTION
FOR CONTINUED PROTECTION
AGAINST THE RISK OF FIRE
REPLACE ONLY WITH SAME TYPE FUSE
ATTENTION
UTILISER UN FUSIBLE
DE RECHANGE
DE MEME TYPE
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6. CIRCUIT DESCRIPTIONS
1. SYSTEM EXPLANATION
The SDD-1200 is a Dual Digital Delay that includes
KORG's custom LSI UPD65010CW-133 (Gate Array)
and consists of 2 independent systems. Since using
two dynamic RAM of 256K bits (4 bits x 64 words for
each unit), there is totally 128K words. It uses 12 bits
(3 words) per sampling. That is, if the sampling fre
quency is 42.66KHz, SDD-1200 provides a maximum
delay time of 1024msec.
2. MAIN CIRUIT EXPLANATION
■SIGNAL INPUTS
The audio signal input to INPUT A is buffered at
FET (F101), and adjusted to the adaquete level by
INPUT LEVEL VR (VR1) on the front panel, and
then amplified about 4 times as much by OP AMP
(1/2 IC101). This signal goes through the MIXER
(1/2 IC101) mixing with Feedback Input, and the
mixed signal is filtered by the FILTER (fc =
16KHz), consists of transistors (Q101, Q102), then
compressed at Compressor Circuit, consists of
Compressor (1/2 IC107) and OP AMP (1/2 IC106),
and pre-emphasized by CR which consists of
C132, R153andR154.
The output signal from Compressor Circuit goes
through the S/H Circuit, which consists fo13700
(1/2 IC111) and FET (F105) and digitalized at the
A/D Converting Comparator (IC110). Then it inputs
to Gate Array (IC112) as digital data.
[Note? f
11. IC 13700 is a high-speed analog switch controll-!
[ ed by the signal from SH terminal of the Gate Ar-i
I ray. The frequency of the signal is the sampling I
I frequency. I
I I
[2. Most part of the circuit to convert S/H signal from!
i analog to digital is in the Gate Array. Only high-i
| speed Comparator (IC110) is in external. '
I SIGNAL OUTPUT
The effect signal conducted at the Gate Array out
puts from D00 - D011 of the Gate Array (IC112) as
a 12-bit digital data and converted to analog data
by the Block Resistor (RA101), which consists of
R-2R, and goes through the S/H Circuit, which
consists of 13700 (1/2 IC111) and FET (F106).
Then it goes through LPF (consists of Q103) to
eliminate the clock signal used for sampling, then
pass through Expander Circuit, which consists of
expander (1/2 IC107), and OP AMP (1/2 IC106) to
bring the compressed dynamic range back to nor
mal.
This signal is output after passing through the
Filter Circuit (Hi-cut, Lo-cut) and Output Mixer Cir
cuit.
ICONTROL
Since a normal Rotary VR is used for selecting
Delay Time range (2ms, 8ms, 32ms, 128ms,
512ms, 1024ms), the Range Selecting Circuit con
sists of Compators (IC 109, IC108). See below for
details.
To prevent noise when unit is turned on or when
the delay time is changed, the Gate Array outputs
mute signal.
MUTE...for stopping S/H "H" is active
MUTB...for stopping Expander "L"is active
Clock Oscillation Circuit consists of 74HC00
(IC113) and oscillates 32 times faster than the
Sampling Frequency. A transistor (Q105) is used
as Fixed Current Circuit) to change frequency
logarithmically by linear control voltage (signal
modulated by Factor + Modulation).
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7. CHECK AND ADJUSTMENT PROCEDURE
1. Power Supply Voltage Check
Connect a Digital Volt Meter (DVM) to TPs on
KLM-6000 and confirm if the voltage at each test
point is within the ranges as shown below.
2. Modulation Check
The settings are as follows. Mode Sw. = separate
1) Modulation
Connect an Oscilloscope (DC 2v/div, 50ms/div) to
TP-6A and TP-6B on KLM-6001 and confirm
modulation waveform refering to the chart below.
Fig. 1 (DC Changes)
Fig. 2 (Amplitude changes)
Fig. 3 (Frequency changes)
2) Modulation LED lighting
Adjust the FREQ volume of UNIT A and B to "5",
and check each LED by following procedure
below.
© Mode Sw.: IN PHASE
Add modulation on both channels and confirm if
both are syncronized in same phase.
(2) Mode Sw.: SEPARATE
Confirm if the modulation on each unit is controlled
independently.
<3> Mode Sw.: OUT PHASE
Add modulation on both channels and confirm if
both are syncronized in inverted phase.
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