LG ME820 User manual

Date: March, 2007 / Issue 1.0
Service Manual Model : ME820
Service Manual
ME820
Internal Use Only

- 119 -
VBAT
PWR
URXD
UTXD
3G 2.5G
GND
RX
TX
UFLS
ON_SW
DIGD
ON BOARD ARM9 JTAG & ETM INTERFACE
LG Electronics
G
RTC
BASE BAND PROCESSOR
DIGC1~2
12
R&D CHK:
MMC
6
Changed by:
7
DIGB
128M SDRAM
9
DIGA
10
VBR
DOC CTRL CHK:
v1.0
12
QA CHK:
DIGC2
Page:
11
PLL
USB
DIGD
DIGC1
JP3
10
EBU
ETM
DIGC1
A
Engineer:
3
Time Changed:
Open
Short
JP2
JP3
7
B
DIGD
JP2
H
Drawn by:
MFG ENGR CHK:
3
Short
Date Changed:
2
JP0
5
D
DIGD
SIM
W.J.KIM
RTC
C
81
BB
D
DIGA
DIGD
E
F
TITLE:
E
JP1
C
DIGC1~2
DIGD
DIGD
Open
256M SDRAM
Open
8
REV:
DIGA
G
DIGA
Size:
F
4
Drawing Number:
6
Short
M
Issue 1.0
9
RTC
DIGA
5
BB
DIGC2
INTEL Memory(512NOR+128SDRAM, 1.8 I/O)
1
H
T.K.CHOI
A
JP0
JP1
4
3:07:35 pm2005-10-11mentor 1/5
ME820
12 1 8 A
A3
Open
2
11
B
Short
0.01u
TP129
C114
C103
0.1u
NAR115
J9
VSS_DSPMAIN2 VSS_DSPMAIN3 J10 VSS_DSPMAIN4 J11
L8
VSS_DSPMAIN5 L9 VSS_DSPMAIN6 VSS_DSPMAIN7 L10 VSS_DSPMAIN8 L11
T12
VSS_PLL_RTC
VSS_USB R12
L15
VSSBB
VSSBG N19
VSSD U16
VSSM V15
J15
VSSP_DIG1 VSSP_DIG2 E13 VSSP_DIG3 E10
E8
VSSP_DIG4
VSSP_EBU1 J5
M5
VSSP_EBU2 R8 VSSP_EBU3
VSSP_ETM P5
VSSVBR_1 T17
P17
VSSVBR_2
R16
VSSVBT
J8
VSS_DSPMAIN1
H9
VDD_DSP1 VDD_DSP2 H10 VDD_DSP3 H11
VDD_MAIN1 M9
M10
VDD_MAIN2 K8 VDD_MAIN3 VDD_MAIN4 K9 VDD_MAIN5 K10
K11
VDD_MAIN6
W12
VDD_PLL
VDD_RTC W13
VDD_USB W11
VMICN
K16
L16 VMICP
VREFN P16
VREFP L17
T14
VDDD
V14
VDDM
G19
VDDP_DIGA A9 VDDP_DIGB
VDDP_DIGC1 A15 VDDP_DIGC2 B19
B1
VDDP_DIGD
J1
VDDP_EBU1 W2 VDDP_EBU2 VDDP_EBU3 W7
VDDP_ETM W10
A13
VDDP_MMC
VDDP_SIM L19
VDDVBR_1 U18
R17
VDDVBR_2
VDDVBT T15
USART0_CTS_N
G3
H4 USART0_RTS_N
G1 USART0_RXD
USART0_TXD
G4
USART1_CTS_N
F15
E19 USART1_RTS_N
F17 USART1_RXD
USART1_TXD
G18
V11 USB_DMINUS
USB_DPLUS
U11
B7 USIF_RXD_MRST
USIF_SCLK
D9 A7 USIF_TXD_MTSR
K19 VCXO_EN
VDDBB M15
K17
VDDBG
TRACESYNC
U8
E14 TRIG_IN
C19 TRST_N
B17 T_OUT0
T_OUT1
B16
T_OUT10
A16
C13 T_OUT11
T_OUT12
D17
B15 T_OUT2
T_OUT3
D13
B14 T_OUT4
T_OUT5
C18
D15 T_OUT6
D14 T_OUT7
T_OUT8
A18
C14 T_OUT9
J17 SSC1_MRST
SSC1_MTSR
K18
SSC1_SCLK
H15
TCK
E16
D19 TDI
TDO
E17
TMS
F16
V8 TRACECLK
TRACEPKT0
R9
W9 TRACEPKT1
TRACEPKT2
T10
V9 TRACEPKT3
TRACEPKT4
U10
V10 TRACEPKT5
TRACEPKT6
R10
T11 TRACEPKT7
PAOUT1A
L12
M11 PAOUT1B
PAOUT2A
K12
J12 PAOUT2B
PIPESTAT0
T9
U9 PIPESTAT1
W8 PIPESTAT2
T13 PM_INT
U14
RESET_N
RF_CLK
B18
RF_DATA
C16
RF_STR0
C17
A17 RF_STR1
RSTOUT_N
F18
RTCK
D18
RTC_OUT V12
C12 MMCI_DAT0
MMCI_DAT1
D12
B12 MMCI_DAT2
A12 MMCI_DAT3
MON1
B13
A14 MON2
W19
NC1 W14 NC2 NC3 W1 NC4 A19
A1
NC5 NC6 U15 NC7 R11 NC8 L5 NC9 H5
OSC32K V13
F4 KP_OUT1
C2 KP_OUT2
KP_OUT3
C1
U17 M0
M1
W17
W18 M10
W16 M2
M7
W15
V16 M8
M9
V17
M18 MICN1
MICN2
P19 MICP1
M17
N18 MICP2
C11 MMCI_CLK
MMCI_CMD
E12
H16 I2S2WA1
J18 I2S2_CLK0
H17 I2S2_CLK1
I2S2_RX
H19
I2S2_TX
H18
IRDA_RX
B2
A2 IRDA_TX
M16
IREF
D2 KP_IN0 D1 KP_IN1
KP_IN2
D5
KP_IN3
F5
E3 KP_IN4 E2 KP_IN5
KP_IN6
E1
KP_OUT0
D3
EPPA12
R18
EPPA2
V18
EPREF1
V19
U19 EPREF2
F26M
U12
U13
F32K
G2
FCDP_RB_N
GUARD K15
I2C_SCL
C3
I2C_SDA
E4
I2S1_CLK0
F19
G16 I2S1_CLK1 G17 I2S1_RX
I2S1_TX
G15
I2S1_WA0
E18
J19 I2S2WA0
T3
EBU_CKE
EBU_CS0_N P4
V1
EBU_CS1_N
EBU_CS2_N T2
EBU_CS3_N P3
EBU_RAS_N M2
N3
EBU_RD_N
EBU_SDCLK1 U4
U3
EBU_SDCLKO
T6
EBU_WAIT_N
EBU_WR_N U1
EPN11
P18
N17 EPN12 R19 EPP11
EPP12
T19 T18 EPPA11
EBU_AD14 V7
R7
EBU_AD15
W3
EBU_AD2
EBU_AD3 T5
R6
EBU_AD4
EBU_AD5 U5
W4
EBU_AD6
EBU_AD7 W5
U6
EBU_AD8 V5
EBU_AD9
EBU_ADV_N T7
EBU_BC0_N M3
P2
EBU_BC1_N
EBU_BFCLKI V3
R3
EBU_BFCLKO
M4
EBU_CAS_N
R2
EBU_A22
EBU_A23 U2
EBU_A24 V2
EBU_A3 J2
EBU_A4 J3
K1
EBU_A5
EBU_A6 K2
K3
EBU_A7
EBU_A8 K5
L2
EBU_A9
V4
EBU_AD0
EBU_AD1 R4
EBU_AD10 V6
W6
EBU_AD11
EBU_AD12 T8
U7
EBU_AD13
DSP_OUT1
F2
H2
EBU_A0
EBU_A1 H3
EBU_A10 L1
M1
EBU_A11
EBU_A12 N1
K4
EBU_A13 L4
EBU_A14
EBU_A15 P1
L3
EBU_A16
EBU_A17 R1
N2
EBU_A18
EBU_A19 N4
J4
EBU_A2
N5
EBU_A20
EBU_A21 T1
DIF_D1
C7
DIF_D2
B6 D8 DIF_D3
E7 DIF_D4
DIF_D5
A5
DIF_D6
D7 C6 DIF_D7 B4 DIF_HD C5 DIF_RD
DIF_RESET1
D6 C4 DIF_RESET2
DIF_VD
B3 DIF_WR A3
DSP_IN0
F3
G5 DSP_IN1
F1 DSP_OUT0
A11 CIF_D3
CIF_D4
D11
CIF_D5
B10 A10 CIF_D6
B9 CIF_D7
CIF_HSYNC
A8 CIF_PCLK C9
CIF_PD
B8 CIF_RESET C8
D10 CIF_VSYNC
E9 CLKOUT
H1 CLKOUT0
B5 DIF_CD A4 DIF_CS1
DIF_CS2
E6
A6 DIF_D0
C15 AFC
N16
AGND
R13 BB_I
BB_IX
R14
BB_Q
P15 BB_QX
N15
J16 CC_CLK
CC_IO
L18
CC_RST
M19
CIF_D0
E11
CIF_D1
B11 C10 CIF_D2
C109
U102
PMB8876
1u
2V72_IO
R105
NA
C111
0.01u
C108
0.1u
0.1u
C126
C116
1u
R118
R114 10K
100K
CTS
12
DSR
10
GND
1
NC1
4
7
NC2
NC3
8
9
NC4
5
ON_SW
11
RTS
RX
2
3
TX
VBAT
6
2V85_SIM
UART1
220nC131
R103
4.7
1V5_CORE
VSUPPLY
TP115
1V8_MEM
0.1u
C120
1u
C119C115
0.1u
C125
0.1u
R126 22K
C104
1V8_MEM
0.1u
22
TP106
R123
C121C118
0.01u
0.1u
0.01u
C135
R117 0
NAR446
R445 NA
R109
3.3K
H3
_F3_CE
_F4_CE_A27 E6
D5
_F_ADV
G7
_F_RST
_F_WP1 E1
_F_WP2 F1
_OE H7
_S_CS1 F6
E2
_WE
R106
22K
VSS2
C3
C4 VSS3
C6 VSS4
VSS5
C7
C8 VSS6
K2 VSS7
VSS8
K3
K4 VSS9
F2
_D1_CS E3
_D2_CS
F3
_D_CAS
_D_CLK H5
_D_RAS F4
H6
_D_WE
_F1_CE G3
G2
_F2_CE
J1 F_VPP
J9
F_WAIT
D8
N_ALE
E5
N_CLE
N_RY__BY H1
G1
RFU
H2
S_CS2
S_VCC
D2
VCCQ1
J2
J3 VCCQ2
J7 VCCQ3
J8 VCCQ4
C2 VSS1
K6 VSS10
VSS11
K7
K8 VSS12
H4
D_BA1
G6
D_CKE
J5
D_CLK
D_DM0__S_LB H9
D_DM1__S_UB H8
D_LDQS M3
M7
D_UDQS
D_VCC1
C5
D3 D_VCC2
D7 D_VCC3
F_CLK K5
B6
F_DPD
F_VCC1
D4
F_VCC2
D6
F_VCC3
J4
F_VCC4
J6
DQ13 K9
L9
DQ14 M8
DQ15
DQ2 K1
DQ3 L2
M4
DQ4 L3
DQ5 L4
DQ6 L5
DQ7
DQ8 M5
DQ9 L6
A1
DU1 A9
DU2
DU3 M1
M9
DU4
D_BA0 G4
A6 A23
A7 A24
A25
A8
B8 A26
B2 A3
A4
A2
B3 A5
A6
A3
A7
A4
G8 A8
F8 A9
M2
DQ0 L1
DQ1
M6
DQ10 L7
DQ11
DQ12 L8
A0
D1
C1 A1
E8 A10
G9 A11
A12
F9
A13
E9
A14
D9
C9 A15
A16
B9
A17
B4
A18
B5
A5 A19
A2
B1
A20
F7
A21
E7
A22
B7
23
24
G1 G2
G3 G4
U101 PF38F5060M0Y0B0
7
8
9
16
25
26
27
28
29
30
17
18
19
20
21
22
1
10
11
12
13
14
15
2
3
4
5
6
CN101
C136
0.1u0.1u
C134
22R112
2V72_IO
1V8_MEM
R444 0
3V1_USB
TP130
1V5_CORE
C117
0.1u
2V72_IO
1V8_MEM
TP119
2V85_CARD 2V11_RTC
2V72_IO
R131 NA
R443 0
15p15p
C133C132
C107
0.1u0.1u
C105
1KR136
0.1u
C127
C129
0.1u
0.1u
0.1u
C130
C128
NA
R104
0.1u
C106
0.1u
C102
0
R101
R102
0
R122
3.3K
1V8_MEM
1V8_MEM
TP116
22R113
C113C112
0.1u1u
R110
100K
1V5_DSP
32.768KHz
X101
12
TP101
R108
390K
C122
0.1u
R137
TP117
1V8_MEM
1K
22R124
2V65_ANA
TP114
C110
0.1u0.1u
C124C123
0.1u
1V5_DSP
0.1u
C101
VCXO_EN
JACK_TYPE
VMICN VMICP
RCV_P
_ADV
_BC0
_BC1
RPWRON
ANT_SW3
HOOK_DETECT
A(14)
A(13)
A(12)
TF_PWR_EN
F_DPD
AU_PWR_EN
JACK_DETECT
TDI
TMS
TCK
RTCK
TDO
_EXTRST
TRIG_IN
TRACEPKT(7)
TRACEPKT(0:7)
MON1
MON2
_FLASH1_CS
FM_INT
AF_PWR_EN
_FM_RESET
FM_BBP_SEL
KP_OUT(4)
REMOTE_INT
MIC_GAIN_SEL
LCD_BACKLIGHT
CHG_LED_CTRL
_RD
BFCLKI
_WP
SDCLKI
_RESET
A(0:24) D(0:15)
TRACEPKT(4)
TRACEPKT(5)
TRACEPKT(6)
TRACECLK
TRACESYNC
PIPESTAT0
PIPESTAT1
PIPESTAT2
TRACEPKT(0)
TRACEPKT(1)
TRACEPKT(2)
TRACEPKT(3)
TRIG_OUT
_TRST
D(13)
D(14)
D(15)
D(2)
D(3)
D(4)
D(5)
D(6)
D(7)
D(8)
D(9)
CKE
SDCLKO
BFCLKO
F_DPD
_WAIT
_RAM_CS
_CAS
_RAS
_WR
A(21)
A(22)
A(23)
A(24)
A(3)
A(4)
A(5)
A(6)
A(7)
A(8)
A(9)
D(0)
D(1)
D(10)
D(11)
D(12)
_BT_RESET
DIF_CD
_USB_EOC
MON1
A(0)
A(1)
A(10)
A(11)
A(12)
A(13)
A(14)
A(15)
A(16)
A(17)
A(18)
A(19)
A(2)
A(20)
CIF_D(3) CIF_D(2) CIF_D(1) CIF_D(0)
USIF_TXD
USIF_RXD
TX_DEBUG
RX_DEBUG
TXD_0
RXD_0
RTS_0 CTS_0
CLK32K
KP_IN(5)
PM_INT
_SIM_EN
SPK_RCV_SEL
CIF_PD
TRIG_OUT
TRACEPKT(0)
TRACEPKT(1)
TRACEPKT(2)
TRACEPKT(3)
TRACEPKT(4)
TRACEPKT(5)
TRACEPKT(6)
TRACEPKT(7)
FLASH_EN
RF_TEMP
DIF_D(0:7)
CIF_D(0:7)
AFC
DSR
TRACEPKT(0:7)
A(0:24)
DIF_D(7) DIF_D(6) DIF_D(5) DIF_D(4) DIF_D(3) DIF_D(2) DIF_D(1) DIF_D(0)
CIF_D(7) CIF_D(6) CIF_D(5) CIF_D(4)
SDCLKO
BFCLKO
I_MONITOR
CTS_0
RPWRON_EN
RXD_0
RTS_0
DSR
TXD_0
VSUPPLY
D(0:15)
PIPESTAT0
PIPESTAT1
PIPESTAT2
_RESET
RF_CLK
RF_DA
RF_EN
TF_DETECT
RTCK
RTC_OUT
TCK
TDI
TDO
TMS
TRACECLK
TRACESYNC
TRIG_IN
_TRST
TXON_PA
VIBRATOR_EN
PA_BAND
ANT_SW1
ANT_SW2
MODE
USB_DM
USB_DP
VCXO_EN
KP_IN(0) KP_IN(1) KP_IN(2) KP_IN(3) KP_IN(4)
KP_OUT(5) KP_OUT(0) KP_OUT(1) KP_OUT(2) KP_OUT(3)
BATT_TEMP
REMOTE_ADC
MIC1_N MIC2_N
MIC1_P MIC2_P
TF_CLK
TF_CMD
TF_DAT0
TF_DAT1
TF_DAT2
TF_DAT3
MON2
PA_LEVEL
_ADV
_BC0
_BC1
BFCLKI
_CAS
CKE
_FLASH1_CS
_RAM_CS
_FLASH2_CS
_CS3
_RAS
_RD
SDCLKI
_WAIT
_WR
RCV_N
BBP_SND_L
BBP_SND_R
26MHZ_MCLK
FCDP
SCL
SDA
I2S1_CLK
I2S1_RX
I2S1_TX
I2S1_WA
_WP
A(18)
A(19)
A(2)
A(20)
A(21)
A(22)
A(23)
A(24)
A(3)
A(4)
A(5)
A(6)
A(7)
A(8)
A(9)
D(0)
D(1)
D(10)
D(11)
D(12)
D(13)
D(14)
D(15)
D(2)
D(3)
D(4)
D(5)
D(6)
D(7)
D(8)
D(9)
I
IX
Q
QX
SIM_CLK
SIM_IO
SIM_RST
CIF_HS
CIF_PCLK
CIF_RESET
CIF_VS
CIF_MCLK
DIF_CS
DIF_RESET
DIF_WR
A(0)
A(1)
A(10)
A(11)
A(12)
A(13)
A(14)
A(15)
A(16)
A(17)
7. CIRCUIT DIAGRAM
LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 120 -
GND
IN
OUT
E
42
R&D CHK:
T.K.CHOI
Engineer:
EXTERNAL RESET
REV:
3
7
Pin7
64
D
Pin6
PMIC & Li-ion CHARGER LCD BACKLIGHT & CAMERA FLASH LED DRIVER
F
Drawing Number:
9
8
Changed by:
G
E
Drawn by:
A
MFG ENGR CHK:
9
QA CHK:Date Changed:
F
D
3
52
Page:
12
MULTI-PORT SWITCH 1
8
5
Pin7
1
B
12
AUDIO AMP SUB SYSTEM & SIGNAL DISTRIBUTOR
C
W.J.KIM
DOC CTRL CHK:
Pin7
TITLE:
H
Issue 1.0
B
6
C
G
2/5
ME820
A3
12 1 8 A
11
Time Changed:
AUDIO POWER EXTERNAL LDO
LG Electronics
REMOTE POWER ON
10
BATTERY CURRENT MONITOR
Pin6
101
Pin6
Pin7
11
Size:
Pin7
7
Pin6
Pin6
H
A
C235
mentor 2005-06-01 3:07:35 pm
1V5_DSP
100u
0R437
VBAT
120R209
TP206
R218
1000p
C448
0
CRS08
D201
100K
R217
C210
2.2u
ZXCT1010E5TA
GND 2
3
IOUT
LOAD
51
NC
VIN
4
C226
U201
C447
2.2u
1u
C211
2.2u
R439 NA
C438
1000p
2V72_IO
VSUPPLY
R453
100K
C231
1u
120R206
R233
10K
2V85_RF
100p
C460 C461
1000p
R452
1K
470K
R208
R447 NA
VBAT
1u
C202
6CE
GND1 2
GND2 5
NC
4
1VDD VOUT 3
U403 R1114D281D-TR-F
3V3_AUDIO
2.2u
C208
1u
C215
R201 120
B2 SDA
A1
C2
VDD1 VDD2 C3
C4
VDD3
VOC A5
R434 0
I2CSPIVDD
I2CSPI_SEL
E1
B3 ID_ENB
D3 LHP3D1
LHP3D2
E3
E4 LIN
LOUT E5
D1
MONO+
B1
MONO-
B5
NC1
NC2 D2
B4 PHONE_IN
RHP3D1
A4
RHP3D2
A3
RIN
D4
D5
ROUT
SCL
U210
LM4845
E2
CBYPASS
GND1
C1 C5 GND2
A2
C230
1u
C209
2.2u
VSUPPLY
R216
100K
2V11_RTC
1u
C237
22u
C219
6
5NC1
7
NC2
NC3 8
11
PGND
VIN
1
VO1 10
9
VO2
U205 ISL9014IRJNZ
4CBYP
EN1
2
EN2
3
GND
2.2u
2V85_IO2
C218
0.1u
2V72_IO
L201
10uH
VBAT
2V72_IO
C234
TP208
VBAT
U206 NC7WZ08L8X
R219
100K
C248
470n
22u
C220
1K
R214
0.1u
C247
0.1uC216
0.15
R220
C240
100p
C459C458
NA
C456
NA
82K
100p
R236 4.7K
R213
5COM
GND
3 1
IN
NC4
6NO
2
VCC
U204 NLAST4599DFT2G
C222
2.2u
1K
R207
22R235
C201
VBAT
1u
0.1u
C246
D1 D2 D3 D4
G
S
FB201
Q201
SI3457BDV
R438 NA
C232
1u
VBAT
0.1u
C244
1VCC
4.7KR237
NLAS5223BMNR2GU208
COM1
3
COM2 9
GND 6
4
IN1
8
IN2
NC1
5
7
NC2
2NO1
10
NO2
R234
10K
1.5K
VCHG
R224
R238 22
2V7_VCXO
GND 6
4IN1
8
IN2
NC1
5
7
NC2
2NO1
10
NO2
1VCC
R229 100K
U211 NLAS5223BMNR2G
COM1
3
COM2 9
2.2u
C221
VBAT
C233
1u
C212
2.2u
C236
0.1u
VBAT
R204
47mohm
2V85_SIM
100p
C241
20
VRF1 40 VRF2 38
37
VRF3
VRFC
3
VRTC 42
18 VSIM1 19 VSIM2
27
VSSAU
8VSSFB
7VSSPW
VSSR 33
VUPU
10
VUSB
11
2V65_BT
2
12 VBUS
VCHC 44
1VCHS 36
VCXOEN
VDDA 35
VDDAU 30
VDDB
17
VDDC 46
VDDCH 43
VDDPW
5
39
VDDRF
VIB
13
VINT
21
45
VLBB1
47
VLBB2
VMMC
AUOP
BYP 31
9FB
GND 49
41
INTOUT
32
IREF
LED
16 22 LRF3EN
4ON
RESETQ 48
23 SCL
SDA
24 15 SLED1 14 SLED2
6SW
34
VANA
VBATS
PMB6812
U203
25
AUIN
AUIP 26
AUON 28
29
1u
C451
1u
C203
TP205
C207
2.2u
R211
100K
27p
C205
2V65_ANA
8
ISINK4
17 PGND
VIN
4
VOUT_BL 13
VOUT_FL 3
C1+ 11
12
C1- 14
C2+
C2- 15
C3+ 2
1
C3-
16 EN_FLSH
10 EN_SET
GND
9
ISINK1 5
ISINK2 6
7
ISINK3
AAT2805IXN-4.5-T1
U202
2.2u
C213
C204
1V5_CORE
1u
10K
R231
1V8_MEM
C214
2.2u
G1
G2
1
2
3
R205 120
CN201
C245 220n
C239 220n
C251
0.1u
3V3_AUDIO
C243
100p
VBAT
22K
R203
R212
VBAT
2V8_AF
3V3_AUDIO
100K
220nC462
4.7u
2.2u
VCHG
C238
VBAT
C229
C224
2.2u
C250
2V85_CARD
0.068u
100p
C242
IN1_2
2
10
IN3_4
NC1
1
5NC2
NC3 9
13
NC4
15
NO1
3NO2
NO3
7
11
NO4
V+ 14
U209
DG2018DN_T1_E4
17
BGND
COM1 16
COM2
4
8COM3
COM4 12
GND
6
0
1V5_RF3V1_USB
VBAT
R451
R228
10K
0R436
TP207
2.2u
C227 C228
2.2u
C206
1u
2.2u
C223
C217
2.2u
220K
2V11_RTC
2V72_IO
3V3_AUDIO
R202
0.068u
0R215
2V72_IO
C249
E
2.2K
R210
Q202
RN1307
B
C
AMP_IN_R
AMP_IN_L
BBP_SND_R
FM_BBP_SEL BBP_SND_L
FM_SND_L
AMP_IN_L
AMP_IN_R
FM_SND_R
SPK_N
SPK_RCV_N
RCV_N
RPWRON_EN
RPWRON
AU_PWR_EN
JACK_DETECT
MULTI_PORT_1
MULTI_PORT_0
TXD_0
SPK_P
SPK_RCV_P
RCV_PSPK_RCV_SEL
VCHS
USB_PU
VBUS_USB
RXD_0
USB_DM
USB_DP
REMOTE_ADC
REMOTE_INT
AF_PWR_EN
KEY_BACKLIGHT
RPWRON
_EXTRST
_PMRST
PM_INTSPOWER_INT
_RESET
VCH_CTL
MLED_C1
LCD_BACKLIGHT
FLASH_EN
PWRONRTC_OUT VBACKUP
VBUS_USB
FLASH_LEDA
HS_OUT_L
SPK_P
SPK_N
HS_OUT_R
SDA
SCL
MLED_A
MLED_C4
MLED_C3
MLED_C2
USB_PU
PWRON
END_KEY
BATT_TEMP
I_MONITOR
SPOWER_INT
BT_VCXO_EN
PWRON
_PMRST
SCL
SDA
VCH_CTL
VCHS VCXO_EN
7. CIRCUIT DIAGRAM
LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 121 -
LCD CONNECTOR
MFG ENGR CHK:
E
117
JOG KEY & END KEY SWITCH
12
T.K.CHOI
4 8
D
Changed by: Date Changed:
3
F
TITLE:
W.J.KIM
11
H
D
A
Page:
Size:
Time Changed:
VIBRATOR
MAIN PCB & SUB PCB INTERFACE CONNECTOR
10
REV:
Engineer:
4
1
Issue 1.0
C
5
6
3
Drawing Number:
125
A
C
1
E
G
B
9
H
F
3:07:35 pm 4/5
ME820
A3
12 1 8 A
G
2 6
CAMERA CONNECTOR
R&D CHK:
END-KEY DETECT
SIM CONNECTOR
LG Electronics
2 107
B
QA CHK:
8
DOC CTRL CHK:
Drawn by:
9
C306
mentor 2005-06-01
VA301
0.1u
ZD2
R305 680
VA304
2V8_AF
0R309
680R304
SUY98005LT1G
U207
GND
2
1
VIN
VOUT
3
30
17
18
19
20
21
22
23
24
G1 G2
G3 G4
14
15
2
3
4
5
6
7
8
9
16
25
26
27
28
29
CN303
1
10
11
12
13
100nH
L202
INOUT_A2 2
INOUT_A3 3
INOUT_A4 4
INOUT_B1
9
8INOUT_B2
INOUT_B3
7
6INOUT_B4
2V85_IO2
1V8_MEM
ICVE10184E150R101FR FL302
5G1
10 G2
1
INOUT_A1
R321
10K
0R301
100
R317
2V85_CARD
3
CLK
GND
4
6I_O
RST 2
1
VCC
5VPP
2V85_IO2
VBAT
J301
R223
100K
R315
100K
R303 680
R308 680
R222
12
80
9
G1 G2
G3 G4
2V72_IO
680R311
66
67
68
69
7
70
71
72
73
74
75
76
77
78
79
8
51
52
53
54
55
56
57
58
59
6
60
61
62
63
64
65
37
38
39
4
40 41
42
43
44
45
46
47
48
49
5
50
22
23
24
25
26
27
28
29
3
30
31
32
33
34
35
36
CN302
1
10
11
12
13
14
15
16
17
18
19
2
20
21
INOUT_B4
ICVE10184E150R101FRFL307
5G1
G2
10
1INOUT_A1
INOUT_A2
2
3INOUT_A3
INOUT_A4
4
INOUT_B1 9
8
INOUT_B2
INOUT_B3 7
6
C310
27p
0.1u
C305
VA302
VBAT
VA308
R221
1K
27p
C308
R306 680
FB301
R307
2V85_SIM
680
VA303
R302 0
R313 680 R314 680
VBUS_USB
3INOUT_A3
INOUT_A4
4
INOUT_B1 9
8
INOUT_B2
INOUT_B3 7
6
INOUT_B4
ICVE10184E150R101FRFL301
5G1
10 G2
1INOUT_A1
INOUT_A2
2
VA307
E
G1
G2
1u
C309
SW301
A
B
C
COM1
COM2COM3
D
R300 0
VA306
Q302
2SC5585
2
3
1
VA309
2V85_IO2
C303
1u
2V72_IO
INOUT_B3
INOUT_B4 6
2V72_IO
FL303 ICVE10184E150R101FR
G1
5
G2
10
INOUT_A1
1
2INOUT_A2
INOUT_A3
3
4INOUT_A4
9
INOUT_B1
INOUT_B2 8
7
1V5_CORE
100K
R322
9
8
INOUT_B2
INOUT_B3 7
6
INOUT_B4
R325 0
ICVE10184E150R101FRFL304
5G1
10 G2
1INOUT_A1
2INOUT_A2
3INOUT_A3
INOUT_A4
4
INOUT_B1
G1
5
10 G2
INOUT_A1
1
2INOUT_A2
INOUT_A3
3
4INOUT_A4
9
INOUT_B1
INOUT_B2 8
7
INOUT_B3
INOUT_B4 6
FL306 ICVE10184E150R101FR
G1
5
10 G2
INOUT_A1
1
2INOUT_A2
INOUT_A3
3
4INOUT_A4
9
INOUT_B1
INOUT_B2 8
7
INOUT_B3
INOUT_B4 6
FL305 ICVE10184E150R101FR
VA305
C436
1u
R326 0
C307
0.1u
R320
4.7K
R324 0
C302
0R323
1u
680R316
6
7
8
9
ZD1
37
38
39
4
40
41
42
43
44
45
46
47
48
49
5
50
22
23
24
25 26
27
28
29
3
30
31
32
33
34
35
36
53 54
1
10
11
12
13
14
15
16
17
18
19
2
20
21
CN301
51 52
Q301
SI1305-E3
D
G
S
680R312
R310 680
1u
C311
1u
C304
1V8_MEM
100p
C301
10u
C450
2V65_ANAVCHG2V65_BT
TX_DEBUG
USIF_TXD
USIF_RXD
FM_INT
CHG_LED_CTRL
_USB_EOC
VIBRATOR_EN
MOTOR_N
VBACKUP
RXD_0
RPWRON
RTS_0
CTS_0
TXD_0
FLASH_LEDA
TF_PWR_EN
KP_OUT(4)
KP_IN(0)
KP_IN(5)
KP_OUT(1)
END_KEY
SCL
_FM_RESET
SDA
HOOK_DETECT
TF_DAT3
KEY_BACKLIGHT
MIC1_N
VMICP
SIM_IO SIM_CLK
SIM_RST
_SIM_EN
KP_OUT(0)
KP_OUT(1)
KP_OUT(2)
KP_OUT(3)
DSR
RPWRON_EN
JACK_DETECT
MULTI_PORT_1
MULTI_PORT_0
HS_OUT_R
HS_OUT_L
JACK_TYPE
MIC2_P
MIC2_N
VMICN
MIC1_P
TF_DETECT
TF_CMD
TF_CLK
TF_DAT0
TF_DAT1
TF_DAT2
MOTOR_N
END_KEY
KP_OUT(4)
KP_IN(2)
KP_IN(3)
KP_IN(4)
KP_OUT(3)
KP_IN(5)
KP_IN(1:4)
KP_IN(1)
KP_IN(2)
KP_IN(3)
KP_IN(4)
KP_OUT(0:3)
KP_OUT(0)
KP_OUT(1)
KP_OUT(2)
KP_OUT(3)
I2S1_TX
I2S1_RX
I2S1_WA
I2S1_CLK
RX_DEBUG
BT_CLK
_BT_RESET
CLK32K
BT_VCXO_EN
FM_SND_R
FM_SND_L
CTS_0
RTS_0
MLED_A
MLED_C1
MLED_C2
MLED_C3
MLED_C4
DIF_RESET
DIF_CS
DIF_WR
DIF_CD
CIF_PCLK
CIF_RESET
SDA
SCL
CIF_HS
CIF_VS
CIF_MCLK
CIF_PD
SPK_RCV_P
SPK_RCV_N
CIF_D(0:7)
CIF_D(7)
CIF_D(0)
CIF_D(1)
CIF_D(2)
CIF_D(3)
CIF_D(4)
CIF_D(5)
CIF_D(6)
DIF_D(0:7)
DIF_D(0)
DIF_D(1)
DIF_D(2)
DIF_D(3)
DIF_D(4)
DIF_D(5)
DIF_D(6)
DIF_D(7)
7. CIRCUIT DIAGRAM
LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 122 -
7 11
3 11
D
8 10
Date Changed:
4
Engineer:
Page:
W.J.KIM
12
Size:
QA CHK:
F
2
REV:Time Changed:
B
10
R&D CHK:
DCS1800 PCS1900
12
C
6
7
A
Drawn by:
E
5
C
Changed by:
GSM850
MFG ENGR CHK:
ME820
A3
12 1 8 A
E
DOC CTRL CHK:
9
H
4
TITLE:
1
D
6
Issue 1.0
Drawing Number:
G
21
GSM900
9
A
3
H
8
5
B
LG Electronics
G
F
mentor 2005-06-01 3:07:35 pm 3/5
3
4
VBATT
VMODE 5
6
VRAMP
100p
C402
23 9
GND2 GND3 11 GND4 13 GND5 14
16
GND6 GND7 17 GND8 19 GND9 21
HB_RFIN 118 HB_RFOUT
LB_RFIN 7
12 LB_RFOUT
10 NC1
NC2
15
20 NC3
TX_EN
U401
RF3158
2
BAND_SEL
8
GND1
22
GND10 GND11
R454
0
33nH
L410
1000p
1000pC427
C423
10nH
L406
R449
0
0
R448
NA
C433
L402
5.6nH
R413
2V85_RF
0
2V85_RF
C455
1500p
C444
NA
C432
1.8p
R440
NA
NA
R416
C463
15p
2V85_RF
C440
1.8p
C426 100p
R429
0
C454
820
R414
100p
C446
R415
NA
1.8p
R430
0
C425
0.1u
2V7_VCXO
0.1u
C420
R412
0
11 XO
XOX
12
10
R423
RX4X 23
TX1
36
37 TX2
VBIAS
34
18
VCO_RC
VDDBIAS2V8 31
VDDDIG1V5
8 5VDDDIG2V8
VDDLNA1V5 21
39 VDDMIX2V8
19
VDDRX1V5
VDDRX2V8 2035 VDDTX1V5
VDDTX2V8
38 17
VDDVCO2V8
15
VDDXO2V8
32
FE1
33 FE2
FSYS1 14
FSYS2
10
9FSYS3
GND1 13
26
GND2
GND3
40
41 GND4
RX1 29
30
RX1X
RX2 27
28
RX2X
24
RX3
RX3X 25
22
RX4
U402
1A
AX
2 3B
BX
4 7CLK
DA
6
EN 16
C409
100p
PMB6272
C424
0.1u
100p
PCS_RX-
12
6TX1G 8TX2G
22
VCTRL1 VCTRL2 21 VCTRL3 20
VDD 3
VSUPPLY
C403
17 EGSM_RX+
EGSM_RX-
16
GMS_RX-
18
GND1 2
GND10 25
26
GND11
GND2 4
5
GND3 GND4 7
9
GND5 GND6 10
GND7 11
23
GND8 24
GND9
19 GSM_RX+ 13 PCS_RX+
YGHF-S006A FL308
1ANT
15 DCS_RX+
DCS_RX-
14
C419
47n
0.1u
C428
0
R426
R424
0
0
R427
PT401
0.1u
C421
10K
R431
0
C416
C435
NA
0.1u
2V7_VCXO
C443
1.8p
100p
C404
1KR425
C429
0.1u
R428
0
1nH
L408
15nH
L409
5.6nH
L403
C417
1u
C445
1.8p
2V85_RF
ANT406
100p
100p
C452
C401
1
R420
NA
2V85_RF
ANT405
0
R419
C410
0.5p
KMS-506
SW401
ANT G1
G2 RF
1V5_RF
C431
1uF
27p
0
R407
C406
C414
2.2p
L404
18nH
C437
0.1u
1.8p
C441
C408
68u
R405 100
NA
1V5_CORE
0.1u
C418
R421
C439
1.8p
C434
NA
NA
C430
R41722K
1V5_RF
100p
100R441
C453
10
R418
0.1u
C422
1
VCONT
18nH
L405
X401
26MHz
2
GND
OUT
3
4VCC
0
R406
L407
3.9nH
GND405
C457
C442
10u
1.8p
100R403
ANT_SW3
MODE
HBAND_PAM_IN
LBAND_PAM_IN
I
IX
Q
QX
RF_TEMP
AFC
ANT_SW2
ANT_SW1
RF_DA
RF_EN
TXON_PA
PA_BAND
RF_CLK
26MHZ_MCLK
BT_CLK
PA_LEVEL
HBAND_PAM_IN
LBAND_PAM_IN
7. CIRCUIT DIAGRAM
LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 123 -
KEY BACKLIGHT LEDS
H
G
Page:
7
USB CHARGING CIRCUIT WITH INDICATE LED
E
KEYPAD
1
12
R&D CHK:
C
4
W.J.KIM
MAIN PCB & SUB PCB INTERFACE CONNECTOR
Engineer:
1
LG Electronics
11
E
10
MICRO SD SOCKET
Date Changed:
BACK UP BATTERY 2V 0.5mAh
Drawing Number:
2
FM RADIO
3
MULTI-PORT SWITCH 2
6 8
v1.0
18PIN MUILTIPORT RECEPTACEL
3
HANDSET MICROPHONE
F
4
F
BLUETOOTH
5
N.A.
A
T.K.CHOI
MFG ENGR CHK:
Issue 1.0
1608
9105 8
7
ME820
A3
12 1 8 A
Changed by:
C
11
DOC CTRL CHK:
6
9
REV:
B
D
1608
Drawn by:
D
QA CHK:
2
A
Size:
Time Changed:
B
12
TITLE:
ADC Voltage mode
22K
G
H
mentor Tuesday, November 22, 2005 5:31:08 pm 1/5
SHARP
100K
R133
R111 2.2K
0.1u
VCHG
C140
27pC162
R187
1K
2V85_IO2
10uC108
1K
R186
10K
R177
27pC164
C124
1000p
2
VCC
2V65_ANA
VCHG
U108
NLAST4599DFT2G
5 COM
GND
3 1
IN
NC 4
6NO
R130 100K
C114
2V72_IO
C127
10u
22n
LD101
R158 47
47KR182
TP111
R154 680
R156 47
0
R176
1.8nH
R127
C149
0.1u
U100
LMV7291MGX-NOPB
2
GND
OUT
1
VCC
5
3
VIN+
VIN-
4
VBUS_USB
VBALUN
10KR105
2V65_BT
2V85_IO2
100nHL101
ZD1
C133
2V72_IO
NAR107
100p
C169
100p
2V85_IO2
106
105
107
R102
1M
2V72_IO
C141
0.1u
VA102
L109 100nH
LD108
10K
100p
C117
R106
OUT
R164 47
FL100
LFB212G45SG8A166
GND1 GND2
IN
LD103
2V72_IO
SEND
VBAT
C125
27p
1V5_CORE
LD105
2V65_ANA
R178
1K
C168
C160 2.2u
0.1u
R165 47
VA101
R151 680
C123
R136
100K
0.01u
L100 100nH
C105
R152 680
1V8_MEM
0.1u
22p
0.1u
C142
C121
6
IREF 7
9PGND
VIN
1
3_CHG
_EN
4
2_PPR
C135
NA
ISL6294U104
8
BAT
5
GND
IMIN
C120
0.1u
LD107
0
R181
2V72_IO
R183 0
R128
100p
R148
220K
R110
680
R103
47
2V85_CARD
14
VCC
5
TC7SH04FS
U107
GND
2
100nHL107
R153 680
47R118
47R184
0R120
VBAT
R149 680
R134
100K
0.1u
C111
1V5_CORE
C147
1V8_MEM
27p
C100
0.1u
BAT100
VBAT
2V85_IO2
C166 27p
25
RCLK
11
RF_GND
3
ROUT 15
SCLK
9
10 SDIO
18
VA
VD 13
12 VIO
_RST
7 8_SEN
FB100
4FMIN
2FMIP
GND1
1
GND2
5
6GND3
14
GND4
GND5 17
24
GND6
GPIO1 21
20
GPIO2 GPIO3 19
16
LOUT
22
NC1 NC2 23
PGND
R162 47
U105
SI4701
VBUS_USB
100
103
ZD4
C154 0.1u
27p
VBUS_USB 2V85_IO2
F101
C110
100nHL112
2V72_IO VBAT
VBACKUP
STAR
C144 100p
100nHL113
FB101
D1
3
1
2
ZD6
KDS121E
ZD5
100p
C102
C131 0.1u
C167 27p
1u
C157
0.1u
680R144
C122
3
2G1 G25
S11
4S2
R119 47
Q1 NTJD4105CT1G
6D1
D2
75
76
77
78
79
8
80
9
G1 G2
G3 G4
60
61
62
63
64
65
66
67
68
69
7
70
71
72
73
74
46
47
48
49
5
50
51
52
53
54
55
56
57
58
59
6
30
31
32
33
34
35
36
37
38
39
4
40 41
42
43
44
45
17
18
19
2
20
21
22
23
24
25
26
27
28
29
3
CN101
1
10
11
12
13
14
15
16
DC
G1
5
G2
6
UB 1
2V72_IO
330R131
FL101DBF71B601
B1
3
B2
4
2
100nH
L104
FB102
100K
R135
DUMMY1
DUMMY2
VDD
VSS
CD_DAT3_CS
CLK_SCLK
CMD_DI
COMMON
DAT0_DO
DAT1_RSV
DAT2_RSV
DETECT
8
9
101
S100
SCHA1B0102
13
14
15
16
17
18
19
2
20
21
22
3
4
5
6
7
CN100
1
10
11
12
109
L111 100nH
C143
1uF
C148
1u
CLEAR
R160 47
NA
C134
ZD2
TP105
10K
R150
47KR108
C118
0.1u
VCHG
102
104
100p
R180
100K
C128
2.2u
C130
C129
10uC109
100p
4
IN2
8
5NC1
NC2 7
NO1
2
NO2 10 VCC
1
NLAS5223BMNR2GU106
3
COM1
9
COM2
GND 6
IN1
LD102
27p
C126
108
C151 27p
100nHL108
10u
C112
R137
100K
0.1uC153
47R163
1K
NA
C152
R116
C119
0.1u
ZD3
27p
C155
R143 680
100K
R132
R117 NA
100nHL110
47R159
LD106
LD100
SML-521MUWT86
12
34
F6
F4
VSSRF1
VSSRF2 E5
F5
VSSRF3 E4
VSSRF4
VSSVCO F2
WAKEUP_BT_P1_7 B2
B1
WAKEUP_HOST_P1_8
B5
VDDCREG
D2
VDDPCM E9
H1 VDDPLL
VDDPMREG
G2
VDDRF
H4
E1 VDDRFREG1
VDDRFREG2
E2
VDDSUP
F1
H9
VDDUART
A8 VDD_1
VDD_2
B3
VSS1
D4 D5 VSS2
VSS3
D6
E6 VSS4
VSS5
TDI
TDO
B6
TMS
B4
TRST_
A6
J3 TXA1
TXA2
H3
J2 TXAX
H7 TX_CONF_P0_14
A2
TX_CONF_RXON
UARTCTS G8
J8
UARTRTS
UARTRXD J7
H8
UARTTXD
VCOCAP1
J6
VCOCAP2
H6
F9 VDDC1
VDDC2
PAON
D9
PCMCLK
PCMFR1 D8
PCMFR2_SDA0_P0_12 C8
G9
PCMIN
PCMOUT E8
PSEL0 A3
B8
PSEL1
RESET_ D1
J4 RFIO
RFIOX
J5
H5
RFOUT
B9 RTCK
C9
SCL0_P0_13
F8
SLEEPX_P0_15
B7 TCK
A7
PMB8753
CLK32_P1_5 C2
CLKIN_XTAL
G1
JTAG_
A5
LOAD
H2
A1
NC1 NC2 A9 NC3 J1
J9
NC4
P1_6
C1
A4
U102
L105
100nH
ZD7
C163 27p
C132
R122 0
GND1
GND2
27p
F100
ANT100 AMAN542015LG02
FEED
VBALUN
100nH
27pC113
2V65_BT
L102
R168
10K
1V8_MEM
47R157
2V72_IO
1.5K
R109
VA100
2p
C161
0R185
MIC100
SP0102BE3
2
G1
G2
3
G3
5
OUT
1
4
PWR
220K
R141
39K
R142
27pC103
C156
1000p
C104 0.1u
2V85_CARD
1.8nH
R129
27pC165
0.1u C115
100p
C101
22n
C116
JACK_DETECT
MULTI_PORT_2
HS_OUT_R
RTS_0
CTS_0
MULTI_PORT_3
HS_OUT_L
JACK_DETECT
FM_ANT
MULTI_PORT_2
MULTI_PORT_1
MULTI_PORT_0
JACK_TYPE
CHG_LED_CTRL
CHG_LED_CTRL
VBUS_USB
_USB_EOC
TF_CLK
TF_DAT0
TF_DAT1
TF_PWR_EN
TF_PWR_EN
KEY_BACKLIGHT
CLK32K
TF_DETECT
TF_DAT2
TF_DAT3
TF_CMD
RX_DEBUG
MULTI_PORT_3
FM_INT
_USB_EOC
TF_DETECT
USIF_TXD
FM_SND_R
FM_SND_L
FM_INT
FM_SND_L
SCL
SDA
_FM_RESET
FM_ANT
FM_SND_R
USIF_RXD
TX_DEBUG
TX_DEBUG
CTS_0
RTS_0
MIC2_N
MIC2_P
JACK_TYPE
I2S1_CLK
I2S1_WA
I2S1_RX
I2S1_TX
BT_VCXO_EN
_BT_RESET
BT_CLK
CLK32K
RX_DEBUG
KP_IN(1)
KP_IN(2)
KP_IN(3)
KP_IN(4)
VMICP
VBACKUP
HOOK_DETECT
KP_IN(1:4)
KP_OUT(0:3)
HS_OUT_R
HS_OUT_L
JACK_DETECT
RPWRON_EN
DSR
MULTI_PORT_0
MULTI_PORT_1
KP_OUT(0)
KP_OUT(1)
KP_OUT(2)
KP_OUT(3)
_FM_RESET
MIC1_P
TF_CMD
TF_CLK
TF_DAT0
TF_DAT1
TF_DAT2
TF_DAT3
KEY_BACKLIGHT
MIC1_N
RPWRON_EN
DSR
MIC2_N
MIC2_P
HOOK_DETECT
VMICN
SCL
SDA
USIF_TXD
USIF_RXD
CLK32K
BT_CLK
I2S1_CLK
I2S1_WA
I2S1_TX I2S1_RX
_BT_RESET
BT_VCXO_EN
KP_IN(1:4)
KP_IN(1)
KP_IN(2)
KP_IN(3)
KP_IN(4)
KP_OUT(0:3)
KP_OUT(0)
KP_OUT(1)
KP_OUT(2)
KP_OUT(3)
VMICN
MIC1_P
MIC1_N
VMICP
7. CIRCUIT DIAGRAM
LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 124 -
Size:
98
C
4
B
TITLE:
3
H
AF
A
5
T.K.CHOI
9
Time Changed:
Rev.G
Date Changed:
Drawn by:
2M AF CAMERA I/F CONNECTOR
Engineer:
1211
6
R&D CHK:
FPCB INTERFACE CONNECTOR
F
MFG ENGR CHK:
D
SIDE KEYS
2
Page:
C
10
3
VIBRATOR PAD PHOTO FLASH LED
E
*Caution: Can not use Rev.E FPCB with previous Rev. PCBs
shutter
LG Electronics
E
Drawing Number:
v1.0
W.J.KIM
D
5
7
QA CHK:
11
A
G
Changed by:
1
F
4
7
1 6
DOC CTRL CHK:
8
TEST PAD
1.5phi, 3mm pitch, Non OSP, Gold plating, Need text seal
B
122
10
H
G
SPEAKER PAD
3:07:35 pm2005-10-11mentor 1/5
KE820
12 1 8 A
A3
REV:
CTS_0
RXD_0
2V8_CAM_IO2V8_CAM_ANA
CN3
1
2
2V8_CAM_ANA
9
VBAT
24
25
26
27
28
29
3
30
31
32
33
34
4
5
6
7
8
1
10
11
12
13
14
15
16
17 18
19
2
20
21
22
23
CN2
G1 G2
G3 G4
3
1V8_CAM1V8_CAM VBAT
1 2 3
CN5
1 2
TXD_0
CN4
SW1
1
23
4
V_DOWN
V_UP
MP3
RPWRON
2V8_CAM_IO 2V8_AF
43
44
45
46
47
48
49
5
50
6
7
8
9
29
3
30
31
32
33
34
35
36
37
38
39
4
40
41
42
14
15
16
17
18
19
2
20
21
22
23
24
25 26
27
28
CN1
51 52
53 54
1
10
11
12
13
LD400
2V8_AF
VBAT
END
RTS_0
CIF_D(0)
CIF_D(1)
CIF_D(2)
CIF_D(3)
CIF_D(4)
CIF_D(5)
CIF_D(6)
CIF_D(7)
SPK_RCV_N
SPK_RCV_P
CIF_PD
CIF_D(0:7)
RTS_0
CIF_MCLK
CIF_VS
CIF_HS
SCL
SDA
CIF_RESET
CIF_PCLK
FLASH_EN
SPK_RCV_N
SPK_RCV_P
MOTOR_N
FLASH_LEDA
END_KEY
KP_IN(5)
KP_OUT(4)
KP_OUT(3)
KP_OUT(3:4)
KP_IN(4)
KP_IN(3)
KP_IN(2)
KP_IN(2:5)
KP_IN(5)
KP_OUT(3)
KP_IN(4)
KP_IN(3)
KP_IN(2)
KP_OUT(4)
END_KEY
MOTOR_N
CTS_0
RXD_0
TXD_0
CIF_PD
CIF_D(0:7)
CIF_D(4)
CIF_D(5)
CIF_D(6)
CIF_D(7)
CIF_VS
CIF_HS
CIF_D(1)
CIF_D(2)
CIF_D(0)
CIF_D(3)
CIF_MCLK
SCL
SDA
CIF_RESET
CIF_PCLK
FLASH_LEDA
RPWRON_EN
CTS_0
RXD_0
TXD_0
RTS_0
RPWRON_EN
7. CIRCUIT DIAGRAM
LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 125 -
8. PCB LAYOUT
LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 126 -
8. PCB LAYOUT
LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 127 -
8. PCB LAYOUT
LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes

- 128 -
8. PCB LAYOUT
LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes