LG 32LV355T User manual

LED LCD TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : LD11U
MODEL : 32LV355T 32LV355T-ZC
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
Internal Use Only
Printed in KoreaP/NO : MFL67084803 (1104-REV00)

LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
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CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION ................................................................ 9
BLOCK DIAGRAM...................................................................................16
EXPLODED VIEW .................................................................................. 17
SCHEMATIC CIRCUIT DIAGRAM ..............................................................

LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 3 -
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument's
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1
*Base on Adjustment standard
IMPORTANT SAFETY NOTICE
0.15 uF
Ω

LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
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CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
unit under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
SERVICING PRECAUTIONS

LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
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IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
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SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
4. Model General Specification
1. Application range
This specification is applied to the LCD TV used LD11U
chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety: CE, IEC specification
- EMC:CE, IEC
No. Item Specification Remarks
1 Market England/Ireland
2 Broadcasting system 1) PAL-I/I’ 2) DVB-T/C 3) DVB-T2
3 Receiving system Analog : Upper Heterodyne GDVB-T
Digital : COFDM, QAM - Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
GDVB-C
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s
- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM
GDVB-T2
- Guard Interval(Bitrate_Mbit/s)
1/4,1/8,1/16,1/32,1/128,19/128,19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
4 Scart Jack (1EA) PAL, SECAM Scart Jack is Full scart and support RF-OUT(analog & DTV)
Not support DTV Auto AV
5 Video Input RCA(1EA) PAL, SECAM, NTSC 4System : PAL, SECAM, NTSC, PAL60
6 Component Input(1EA) Y/Cb/Cr, Y/Pb/Pr
7 RGB Input RGB-PC Analog(D-SUB 15PIN)
8 HDMI Input (3EA) HDMI1-DTV (DVI), HDMI2-DTV, HDMI3-DTV PC(HDMI version 1.3), Support HDCP
9 Audio Input (3EA) RGB/DVI Audio, Component, AV L/R Input
10 SDPIF out (1EA) SPDIF out
11 LAN Jack(1EA) LAN(Wired) HD MHEG
12 Earphone out (1EA) Antenna, AV1, AV2, Component, RGB, HDMI1, HDMI2,
HDMI3, USB
13 USB (1EA) EMF JPEG, MP3
For Service (download), DivX HD

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5. Component Video Input (Y, CB/PB, CR/PR)
No. Specification Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.5 60 HDTV 1080p
No. Specification Proposed Remark
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60 Hz, 852*480 60 Hz
-> 640*480 60 Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1360*768 47.72 59.8 84.75 WXGA
6. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
6. RGB (PC)

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7. HDMI Input
(1) DTV Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1360*768 47.72 59.8 84.75 WXGA HDCP
6. 1280*1024 63.981 60.02 108.875 SXGA HDCP/FHD model
7. 1920*1080 67.5 60 148.5 WUXGA HDCP/FHD model
(2) PC Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469/ 31.5 59.94/60 27.00/ 27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96/ 45 59.94/ 60 74.17/ 74.25 HDTV 720P
5. 1920*1080 33.72/ 33.75 59.94/ 60 74.17/ 74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97/27 23.97/24 74.17/ 74.25 HDTV 1080P
8. 1920*1080 33.716/ 33.75 29.976/ 30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43/ 67.5 59.94/ 60 148.35/ 148.50 HDTV 1080P

LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 9 -
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LCD TV with
LD11U chassis.
2. Designation
1) The adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
4) Input signal Unit: Product Specification Standard
5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25 ºC ± 5 ºC
Relative humidity : 65 % ± 10 %
Input voltage : 220 V, 60 Hz
6) Adjustment equipments: Color Analyzer(CA-210 or CA-110),
DDC Adjustment Jig equipment, Service remote control.
7) Push the “IN STOP” key - For memory initialization.
3. Main PCB check process
* APC - After Manual-Insult, executing APC
* Boot file Download
1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
2) Set as below, and then click “Auto Detect” and check “OK”
message
If “Error” is displayed, check connection between computer,
jig, and set.
3) Click “Read” tab, and then load download file(XXXX.bin) by
clicking “Read”
4) Click “Connect” tab. If “Can’t” is displayed, check connection
between computer, jig, and set.
5) Click “Auto” tab and set as below.
6) Click “Run”.
7) After downloading, check “OK” message.
* USB DOWNLOAD
1) Put the USB Stick to the USB socket.
2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting.
3) Show the message “Copying files from memory”.
filexxx.bin
(4)
(7) ……….OK
(5)
(6)
(1)
filexxx.bin
(2) (3)
Please Check the Speed :
To use speed between
from 200KHz to 400KHz
Case1 : Software version up
1. After downloading S/W by USB, TV set will reboot
automatically.
2. Push “In-stop” key.
3. Push “Power on” key.
4. Function inspection
5. After function inspection, Push “In-stop” key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
“In-stop” key at first.
2. Push “Power on” key for turning it on.
-> If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.

4) Updating is starting.
5) Uploading completed, the TV will restart automatically.
6) If your TV is turned on, check your updated version and
Tool option.(explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
* After downloading, have to adjust Tool option again.
1) Push “IN-START” key in service remote control.
2) Select “Tool option 1” and push “OK” key.
3) Punch in the number. (Each model has their number)
4) Completed selecting Tool option.
3.1. ADC Process
(1) ADC
- Enter Service Mode by pushing “ADJ” key,
- Enter Internal ADC mode by pushing “G” key at “7. ADC
Calibration”.
<Caution> Using ‘P-ONLY’ key on Adjustment remote control,
power on TV.
* ADC Calibration Protocol (RS232)
Adjust Sequence
• aa 00 00 [Enter Adjust Mode]
• xb 00 40 [Component1 Input (480i)]
• ad 00 10 [Adjust 480i Comp1]
• xb 00 60 [RGB Input (1024*768)]
• ad 00 10 [Adjust 1024*768 RGB]
• aa 00 90 End Adjust mode
* Required equipment : Adjustment remote control.
3.2. Function Check
* Check display and sound.
- Check Input and Signal items. (cf. work instructions)
1) TV
2) AV1/2
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60 Hz)
5) HDMI
6) PC Audio In
* Display and Sound check is executed by Remote control.
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Only for training and service purposes
Module Tool option1 Tool option2 Tool option3 Tool option4 Tool option5
AUO 18280 18986 55338 28952 352
CMI 18276 18986 55338 28952 352
Item CMD1 CMD2 Data0
Adjust ‘Mode In’ A A 0 0 When transfer the ‘Mode In’,
Carry the command.
ADC Adjust A D 1 0 Automatically adjustment
(The use of a internal pattern)

4. MAC Address & CI+ key download
4.1. MAC Address
(1) Equipment & Condition
- Play file: Serial.exe
- MAC Address edit
- Input Start / End MAC address
(2) Download method
1) Communication Port connection
Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port
2) MAC Address & CI+ key Download
- Set CI+ key path Directory at start Mac & CI Download
Program
- Com 1,2,3,4 and 115200(Baud rate)
- Click Port “connection” button(1).
- Push the (2) MAC Address write.
- At success Download, check the OK.(3)
- Start CI+ Download, push the (4).
- Check the OK or NG.
4.2. LAN
(1) Equipment & Condition
- Each other connection to LAN Port of IP Hub and Jig
(2) LAN inspection solution
- LAN Port connection with PCB
- Network setting at MENU Mode of TV
- setting automatic IP
- Setting state confirmation
-> If automatic setting is finished, you confirm IP and
MAC Address.
4.3. LAN PORT INSPECTION(PING TEST)
Connect SET -> LAN port == PC -> LAN Port
(1) Equipment setting
1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2
(2) LAN PORT inspection (PING TEST)
1) Play the LAN Port Test Program.
2) Connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) Remove LAN CABLE.
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Only for training and service purposes
PCBA PC(RS-232C)
RS-232C Po rt
SET PC

5. Total Assembly line process
5.1. Adjustment Preparation
· W/B Equipment condition
CA210
: CCFL/EEFL -> CH9, Test signal: Inner pattern(80IRE)
LED -> CH14, Test signal: Inner pattern(80IRE)
· Above 5 minutes H/run in the inner pattern. (“power on” key
on Adjustment remote control)
· Edge LED W/B Table is process of time (Only LGD Module)
CA210: CH14, Test signal : Inner pattern(80IRE)
* Connecting picture of the measuring instrument
(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment R/C POWER ON ->
Enter the mode of White-Balance, the pattern will come out.
* Auto-control interface and directions
1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10 lux).
2) Adhere closely the Color Analyzer (CA210) to the module
less than 10 cm distance, keep it with the surface of the
Module and Color Analyzer’s prove vertically.(80° ~ 100°).
3) Aging time
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 5 minutes.
- Using ‘no signal’ or ‘full white pattern’ or the others,
check the back light on.
• Auto adjustment Map(RS-232C)
RS-232C COMMAND
[CMD ID DATA]
Wb 00 00 White Balance Start
Wb 00 ff White Balance End
** Caution **
Color Temperature : COOL, Medium, Warm.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range
of Module)
* Manual W/B process using adjustment remote control.
• After enter Service Mode by pushing “ADJ” key,
• Enter White Balance by pushing “G” key at “8. White
Balance”.
* After you finished all adjustments, Press “In-start” key and
compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
For correct it to the model’s module from factory Jig model.
* Push the “IN STOP” key after completing the function
inspection. And Mechanical Power Switch must be set “ON”.
- 12 - LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Cool 13,000 K X=0.269(±0.002)
Y=0.273(±0.002) <Test Signal>
Medium 9,300 K X=0.285(±0.002) Inner pattern
Y=0.293(±0.002) (204 gray, 80 IRE)
Warm 6,500 K X=0.313(±0.002)
Y=0.329(±0.002)
Full White Pattern
COLOR
ANALYZER
TYPE: CA-210
RS-232C Communication
CA-210
RS-232C COMMAND MIN CENTER MAX
[CMD ID DATA] (DEFAULT)
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 172 192 192 192
G Gain jh Jb je 00 172 192 192 192
B Gain ji Jc jf 00 192 192 172 192
R Cut 64 64 64 128
G Cut 64 64 64 128
B Cut 64 64 64 128
Aging Time Cool Medium Warm
GP2R (Min.) X Y X Y X Y
269 273 285 293 313 329
1 0-2 279 288 295 308 319 338
2 3-5 278 286 294 306 318 336
3 6-9 277 285 293 305 317 335
4 10-19 276 283 292 303 316 333
5 20-35 274 280 290 300 314 330
6 36-49 272 277 288 297 312 327
7 50-79 271 275 287 295 311 325
8 80-149 270 274 286 294 310 324
9 Over 150 269 273 285 293 309 323

5.2. EYE-Q function check
Step 1) Turn on TV
Step 2) Press EYE key of Adjustment remote control.
Step 3) Cover the Eye Q II sensor on the front of the using
your hand and wait for 6 seconds
Step 4) Confirm that R/G/B value is lower than 10 of the “Raw
Data(Sensor data, Back light)”. If after 6 seconds, R/G
/B value is not lower than 10, replace Eye Q II sensor.
Step 5) Remove your hand from the Eye Q II sensor and wait
for 6 seconds.
Step 6) Confirm that “ok” pop up.
If change is not seen, replace Eye Q II sensor.
5.3. DDC EDID Write (RGB 128Byte )
• Connect D-sub Signal Cable to D-sub Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For Service main assembly, EDID have to be downloaded to
Insert Process in advance.
5.4. DDC EDID Write (HDMI 256Byte)
• Connect HDMI Signal Cable to HDMI Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For Service main assembly, EDID have to be downloaded to
Insert Process in advance.
5.5. EDID DATA
1) All Data : HEXA Value
2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check sum
- Auto Download
• After enter Service Mode by pushing “ADJ” key,
• Enter EDID D/L mode.
• Enter “START” by pushing “OK” key.
* Caution : Never connect HDMI & D-sub Cable when EDID
download
* Edid data and Model option download (RS232)
- Manual Download
* Caution
1) Use the proper signal cable for EDID Download.
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
2) Never connect HDMI & D-sub Cable at the same time.
3) Use the proper cables below for EDID Writing.
4) Download HDMI1, HDMI2, separately because HDMI1 is
different from HDMI2.
- 13 - LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EZ ADJUT
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Tool Option5
5. Country Group
6. Area Option
7. ADC Calibration
8. White Balance
9. 10 Point WB
10. Test Pattern
11. EDID D/L
12. Sub B/C
13. V-Com
EDID D/L
HDMI1
HDMI2
HDMI3
RGB
NG
NG
NG
NG
Reset
Start
EDID D/L
Reset
Start
HDMI1
HDMI2
HDMI3
RGB
OK
OK
OK
OK
Item CMD1 CMD2 Data0
Download A A 0 0 When transfer the ‘Mode In’,
‘Mode In’ Carry the command.
Download A E 00 10 Automatically Download
(The use of a internal pattern)
Item
Manufacturer ID
Version
Revision
Condition
GSM
Digital : 1
Digital : 3
Data(Hex)
1E6D
01
03
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
For HDMI EDIDFor Analog EDID

1) FHD RGB EDID data
2) FHD HDMI EDID data
* Detail EDID Options are below.
ⓐProduct ID
ⓑSerial No: Controlled on production line.
ⓒMonth, Year: Week : ‘01’ -> ‘01’
Year : ‘2011’ -> ‘15’ fix
ⓓModel Name(Hex):
ⓔChecksum: Changeable by total EDID data.
ⓕVendor Specific(HDMI)
5.6. Outgoing condition Configuration
When pressing “IN-STOP” key by Service remote control, Red
LED are blinked alternatively. And then Automatically turn off.
(Must not AC power OFF during blinking)
5.7. Hi-pot Test
Confirm whether is normal or not when between power
board’s ac block and GND is impacted on 1.5 kV(dc) or 2.2
kV(dc) for one second.
6. Model name & Serial number D/L
• Press “Power on” key of service remote control.
(Baud rate : 115200 bps)
• Connect RS232 Signal Cable to RS-232 Jack.
• Write Serial number by use RS-232.
• Must check the serial number at the INSTART menu.
6.1. Signal TABLE
CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +…+ Data_n
Delay : 20ms
6.2. Command Set
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model Name and Serial Number write in
EEPROM,.
6.3. Method & notice
A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing
Technology Group.
C. Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0.
- 14 - LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
012 3 4 5 6 7 8 9 ABCD EF
00 00 FF FF FF FF FF FF 00 1E 6D a b
10 c 0103681009780AEE91A3544C9926
20 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 d
70 d 00 e
80 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
90 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
A0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
B0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
C0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
D0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
F0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
012 3 4 5 6 7 8 9 ABCD EF
00 00 FF FF FF FF FF FF 00 1E 6D a b
10 c 0103801009780AEE91A3544C9926
20 0F 50 54 A1 08 00 71 4F 81 80 01 01 01 01 01 01
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 A0 5A 00 00 00 1E 1B 21 50 A0 51 00 1E 30
50 48 88 35 00 A0 5A 00 00 00 1C 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 d
70 d 01 e
80 02 03 26 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
90 22 15 01 26 15 07 50 09 57 07 f
A0 f E3 05 03 01 01 1D 80 18 71 1C 16 20 58 2C
B0 25 00 A0 5A 00 00 00 9E 01 1D 00 72 51 D0 1E 20
C0 6E 28 55 00 A0 5A 00 00 00 1E 02 3A 80 18 71 38
D0 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 01 1D 00 BC
E0 52 D0 1E 20 B8 28 55 40 A0 5A 00 00 00 1E 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e
Model Name HEX EDID Table DDC Function
ALL Model 0001 01 00 Analog/Digital
MODEL MODEL NAME(HEX)
all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
INPUT MODEL NAME(HEX)
HDMI1 67030C001000B82D
HDMI2 67030C002000B82D
HDMI3 67030C003000B82D
CMD LENGTH ADH ADL DATA_1 . . . Data_n CS DELAY
No. Adjust mode CMD(hex) LENGTH(hex) Description
1 EEPROM WRITE A0h 84h+n n-bytes Write(n=1~16)

* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or Service man, sometimes
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
1) Press the ‘Instart’ key of Adjustment remote control.
2) Go to the menu ‘6.Model Number D/L’ like below photo.
3) Input the Factory model name(ex 37LV4500-ZC) or Serial
number like photo.
4) Check the model name Instart menu. -> Factory name
displayed. (ex 37LV4500-ZC)
5) Check the Diagnostics. (DTV country only) -> Please press
Customer Support at the menu.
- 15 - LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 16 - LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
USB_DN/DP
HP_L/R OUT
C-TMDQ[0:15]
DDR3 MEMORY
FOR SYSTEM
B-TMDQ[0:15]
PCMA_[0:7]
CI_TS_DATA[0:7]
FE_TS_DATA[0:7]
NAND FLASH
MEMORY
CMOS IC
CVBS/RGB
LVDS
CI
CLOT
COMP_Y/Pb/Pr
DSUB_RGD,H/V/SYNC
A-TMDQ[0:15]
COMP2_R/L
TU_CVBS/SIF
PCMA_A[0:7]
CEC
TMDS[0:7]
TUNER
DDR3 MEMORY
FOR FRC
IF P/N MSTAR
CVBS
AV_R/L
LVDS[0:9]
IF_AGC
COMP2_R/L
S7_TX/RX
MAIN IC CI_ADDR[0:7]
DDR3 MEMORY
FOR SYSTEM
CEC
SPK
AUDIO
AMP
PC_R/L
SUB ASSY
NEC_SDA/SCL
NEC_TX/RX
I2S
AMP_SDA/SCL
TMDS[0:7]
MAX3232
MICOM
IR
KEY1/2
S/T_SDA/SCL
LED_R/BUZZ/
LED_B/LG_LOGO
SPEAKER_L/R
SPDIF_OUT
LAN

- 17 - LGE Internal Use OnlyCopyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A2
A21
A10
A5
* Set + Stand
* Stand Base + Body
300
200
510 810
910
900
511 710
120
400
LV1
530
540
521
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
CI_TS_DATA[1]
FE_TS_DATA[6]
PCM_A[0]
PCM_A[4]
PCM_D[6]
PCM_D[0]
PCM_A[12]
PCM_A[0]
PCM_A[13]
PCM_A[6]
PCM_A[7]
PCM_A[2]
PCM_A[2]
PCM_A[4]
FE_TS_DATA[5]
PCM_A[1]
PCM_A[10]
CI_TS_DATA[5]
FE_TS_DATA[0]
PCM_A[5]
PCM_D[3]
PCM_A[3]
FE_TS_DATA[7]
PCM_A[3]
PCM_D[4]
FE_TS_DATA[3]
PCM_A[14]
CI_TS_DATA[7]
CI_TS_DATA[6]
FE_TS_DATA[1]
PCM_A[8]
FE_TS_DATA[2]
PCM_A[9]
PCM_A[6]
PCM_A[5]
PCM_A[7]
PCM_D[2]
PCM_D[7]
PCM_A[1]
PCM_A[11]
CI_TS_DATA[3]
FE_TS_DATA[4]
PCM_D[1]
PCM_D[5]
CI_TS_DATA[2]
CI_TS_DATA[0]
CI_TS_DATA[4]
NEC_SCL
/PF_WE
5V_DET_HDMI_2
/PCM_IRQA
R104
10K
OPT
/PF_WP
AUD_LRCH
AMP_SDA
R111 22
PWM2
R144
2.2K
RGB_DDC_SCL
PCM_D[0-7]
R143
3.3K
C106
8pF
OPT
R145
2.2K
/SPI_CS
FRC_PWM0
PWM0
R142
3.3K
AUD_SCK
FRC_SDA
DSUB_DET
/PF_CE0
AR102
22
IC104
M24M01-HRMN6TP
EEPROM_1MBIT_ST
3
E2
2
E1
4
VSS
1
NC
5SDA
6SCL
7WP
8VCC
/PF_OE
CI_TS_DATA[0-7]
/PCM_OE
/F_RB
SCAN_BLK1/OPC_OUT
R125
1K
OPT
R160
1K
MODEL_OPT_2
/PF_WP
SIDEAV_DET
SCAN_BLK2
SPI_SDO
/F_RB
NEC_SDA
SC1/COMP1_DET
IC104-*1
AT24C1024BN-SH-T
EEPROM_1MBIT_ATMEL
3
A2
2
A1
4
GND
1
NC
5SDA
6SCL
7WP
8VCC
I2C_SCL
TUNER_RESET
5V_DET_HDMI_4
SPI_SCK
R117
1K
PCM_A[0-14]
PWM2
I2C_SDA
C102
10uF
R102
3.3K
SPI_SDI
DEMOD_RESET
USB1_CTL
+3.3V_Normal
R116
1K OPT
SC_RE1
C109
0.1uF
FE_TS_DATA[0-7]
RGB_DDC_SDA
CI_TS_VAL
R138 22
AR101
22
PF_ALE
CONTROL_ATTEN
IC102
NAND01GW3B2CN6E
NAND_FLASH_1G_NUMONYX
EAN60762401
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VDD_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
AL
3
NC_3
6
NC_6
16
CL
15
NC_10
14
NC_9
13
VSS_1
12
VDD_1
11
NC_8
10
NC_7
9
E
8
R
7
RB
4
NC_4
5
NC_5
25 NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
W
PCM_5V_CTL
S7_NEC_RXD
ERROR_OUT
R1081K
OPT
MODEL_OPT_1
R109 3.9K
R118
1K OPT
/PF_WE
IC102-*1
H27U1G8F2BTR-BC
NAND_FLASH_1G_HYNIX
EAN35669102
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
I2C_SDA FE_TS_VAL_ERR
PWM1
R126
1K
PWM1
R129 22
/PCM_REG
USB1_OCD
+5V_Normal
R105
1K
OPT
FRC_RESET
C103
0.1uF
R121
1K
PCM_A[0-7]
MODEL_OPT_3
C111
2.2uF
5V_DET_HDMI_1
R124
1K
MODEL_OPT_0
/PCM_CE
R139 22
AUD_MASTER_CLK_0
+3.3V_Normal
/PCM_IORD
C105
0.1uF
/PF_CE1
P3904
12505WS-03A00
URSA_DEBUG
1
2
3
4
/PCM_WE
/PF_CE1
R158 100
OPT
R113
4.7K
C101
0.1uF
R14633
R123
1K
OPT
+3.3V_Normal
+3.3V_Normal
SC_RE2
/PCM_CD
AR103
22
Q101
KRC103S
OPT
E
B
C
C107
0.1uF AMP_SCL
FRC_PWM1
R15133
FRC_SCL
R14733
CI_TS_CLK
R137 22
/PCM_WAIT
I2C_SDA
R132
10K
A_DIM
R157 100
R128 22
I2C_SCL
CI_TS_SYNC
I2C_SCL
/PF_CE0
R155
0OPT
R136 22
PWM_DIM
/PCM_IOWR
R133
10K
IC103
CAT24WC08W-T
HDCP_EEPROM_CATALYST_OLD
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
/PF_OE
PF_ALE
R107 1K
PCM_RST
S7_NEC_TXD
FE_TS_CLK
R159 100
OPT
MODEL_OPT_6
R106
1K
AV_CVBS_DET
R140
1K
R141
1K
R135 22
C108
0.1uF
OPT
+3.3V_Normal
PWM0
/FLASH_WP
R156 10K
I2C_SDA
R134 22
AR104
22
FE_TS_SYNC
HP_DET
+3.3V_Normal
+3.3V_Normal
R127 4.7K
C104
8pF
OPT
PWM0
I2C_SCL
R115
1K
R112 22
ET_RXER
/RST-PHY
AUD_MASTER_CLK R148
56
C112
100pF
50V
LGE101DC-R [S7R DIVX/MS10]
IC101-*4
S7R_DivX_MS10
NC_48
AE1
NC_78
AF16
NC_64
AF1
NC_50
AE3
NC_45
AD14
NC_34
AD3
NC_77
AF15
NC_65
AF2
NC_62
AE15
NC_33
AD2
NC_47
AD16
NC_46
AD15
NC_63
AE16
NC_66
AF3
NC_76
AF14
NC_32
AD1
NC_44
AD13
NC_61
AE14
NC_60
AE13
NC_51
AE4
NC_36
AD5
NC_67
AF4
NC_35
AD4
NC_49
AE2
NC_71
AF8
NC_40
AD9
NC_56
AE9
NC_72
AF9
NC_58
AE11
NC_69
AF6
NC_53
AE6
NC_74
AF11
NC_37
AD6
NC_43
AD12
NC_52
AE5
NC_75
AF12
NC_68
AF5
NC_59
AE12
NC_57
AE10
NC_70
AF7
NC_42
AD11
NC_38
AD7
NC_41
AD10
NC_54
AE7
NC_73
AF10
NC_39
AD8
NC_55
AE8
NC_12
Y11
GND_105
Y19
LVACLKP/LLV6P/BLUE[3] W26
LVACLKN/LLV6N/BLUE[2] W25
LVA0P/LLV3P/BLUE[9] U26
LVA0N/LLV3N/BLUE[8] U25
LVA1P/LLV4P/BLUE[7] U24
LVA1N/LLV4N/BLUE[6] V26
LVA2P/LLV5P/BLUE[5] V25
LVA2N/LLV5N/BLUE[4] V24
LVA3P/LLV7P/BLUE[1] W24
LVA3N/LLV7N/BLUE[0] Y26
LVA4P/LLV8P Y25
LVA4N/LLV8N Y24
LVBCLKP/LLV0P/GREEN[5] AC26
LVBCLKN/LLV0N/GREEN[4] AC25
LVB0P/RLV6P/RED[1] AA26
LVB0N/RLV6N/RED[0] AA25
LVB1P/RLV7P/GREEN[9] AA24
LVB1N/RLV7N/GREEN[8] AB26
LVB2P/RLV8P/GREEN[7] AB25
LVB2N/RLV8N/GREEN[6] AB24
LVB3P/LLV1P/GREEN[3] AC24
LVB3N/LLV1N/GREEN[2] AD26
LVB4P/LLV0P/GREEN[1] AD25
LVB4N/LLV0N/GREEN[0] AD24
RLV3P/RED[7] AD23
RLV3N/RED[6] AE23
RLV0P/LVSYNC AE26
RLV0N/LHSYNC AE25
RLV1N/LCK AF26
RLV2P/RED[9] AF25
RLV1P/LDE AE24
RLV2N/RED[8] AF24
RLV4P/RED[5] AF23
RLV4N/RED[4] AD22
RLV5P/RED[3] AE22
RLV5N/RED[2] AF22
TCON3/OE/GOE/GCLK2 AD19
TCON15/SCAN_BLK1 AE19
TCON18/CS7/GCLK5 AD21
TCON19/CS8/GCLK6 AE21
TCON11/CS5/HCON AF21
TCON10/CS4/OPT_N AD20
TCON9/CS3/OPT_P AE20
TCON16/WPWM AF20
TCON12/DPM AF19
TCON1/STV/GSP/VST AD18
TCON5/TP/SOE AE18
TCON14/SACN_BLK AF18
TCON21/CS10/VGH_ODD AB22
TCON20/CS9/VGH_EVEN AB23
TCON13/LEDON AC23
TCON17/CS6/GCLK4 AC22
NC_26 AB16
NC_19 AA14
NC_30 AC15
NC_15 Y16
NC_31 AC16
NC_29 AC14
NC_21 AA16
NC_20 AA15
NC_11 Y10
NC_17 AA11
NC_25 AB15
NC_24 AB14
LGE101C-R-1 [S7R BASIC]
IC101-*1
S7R_BASIC
NC_48
AE1
NC_78
AF16
NC_64
AF1
NC_50
AE3
NC_45
AD14
NC_34
AD3
NC_77
AF15
NC_65
AF2
NC_62
AE15
NC_33
AD2
NC_47
AD16
NC_46
AD15
NC_63
AE16
NC_66
AF3
NC_76
AF14
NC_32
AD1
NC_44
AD13
NC_61
AE14
NC_60
AE13
NC_51
AE4
NC_36
AD5
NC_67
AF4
NC_35
AD4
NC_49
AE2
NC_71
AF8
NC_40
AD9
NC_56
AE9
NC_72
AF9
NC_58
AE11
NC_69
AF6
NC_53
AE6
NC_74
AF11
NC_37
AD6
NC_43
AD12
NC_52
AE5
NC_75
AF12
NC_68
AF5
NC_59
AE12
NC_57
AE10
NC_70
AF7
NC_42
AD11
NC_38
AD7
NC_41
AD10
NC_54
AE7
NC_73
AF10
NC_39
AD8
NC_55
AE8
NC_12
Y11
GND_105
Y19
LVACLKP/LLV6P/BLUE[3] W26
LVACLKN/LLV6N/BLUE[2] W25
LVA0P/LLV3P/BLUE[9] U26
LVA0N/LLV3N/BLUE[8] U25
LVA1P/LLV4P/BLUE[7] U24
LVA1N/LLV4N/BLUE[6] V26
LVA2P/LLV5P/BLUE[5] V25
LVA2N/LLV5N/BLUE[4] V24
LVA3P/LLV7P/BLUE[1] W24
LVA3N/LLV7N/BLUE[0] Y26
LVA4P/LLV8P Y25
LVA4N/LLV8N Y24
LVBCLKP/LLV0P/GREEN[5] AC26
LVBCLKN/LLV0N/GREEN[4] AC25
LVB0P/RLV6P/RED[1] AA26
LVB0N/RLV6N/RED[0] AA25
LVB1P/RLV7P/GREEN[9] AA24
LVB1N/RLV7N/GREEN[8] AB26
LVB2P/RLV8P/GREEN[7] AB25
LVB2N/RLV8N/GREEN[6] AB24
LVB3P/LLV1P/GREEN[3] AC24
LVB3N/LLV1N/GREEN[2] AD26
LVB4P/LLV0P/GREEN[1] AD25
LVB4N/LLV0N/GREEN[0] AD24
RLV3P/RED[7] AD23
RLV3N/RED[6] AE23
RLV0P/LVSYNC AE26
RLV0N/LHSYNC AE25
RLV1N/LCK AF26
RLV2P/RED[9] AF25
RLV1P/LDE AE24
RLV2N/RED[8] AF24
RLV4P/RED[5] AF23
RLV4N/RED[4] AD22
RLV5P/RED[3] AE22
RLV5N/RED[2] AF22
TCON3/OE/GOE/GCLK2 AD19
TCON15/SCAN_BLK1 AE19
TCON18/CS7/GCLK5 AD21
TCON19/CS8/GCLK6 AE21
TCON11/CS5/HCON AF21
TCON10/CS4/OPT_N AD20
TCON9/CS3/OPT_P AE20
TCON16/WPWM AF20
TCON12/DPM AF19
TCON1/STV/GSP/VST AD18
TCON5/TP/SOE AE18
TCON14/SACN_BLK AF18
TCON21/CS10/VGH_ODD AB22
TCON20/CS9/VGH_EVEN AB23
TCON13/LEDON AC23
TCON17/CS6/GCLK4 AC22
NC_26 AB16
NC_19 AA14
NC_30 AC15
NC_15 Y16
NC_31 AC16
NC_29 AC14
NC_21 AA16
NC_20 AA15
NC_11 Y10
NC_17 AA11
NC_25 AB15
NC_24 AB14
LGE101C-R [S7R MS10]
IC101-*2
S7R_MS10
NC_48
AE1
NC_78
AF16
NC_64
AF1
NC_50
AE3
NC_45
AD14
NC_34
AD3
NC_77
AF15
NC_65
AF2
NC_62
AE15
NC_33
AD2
NC_47
AD16
NC_46
AD15
NC_63
AE16
NC_66
AF3
NC_76
AF14
NC_32
AD1
NC_44
AD13
NC_61
AE14
NC_60
AE13
NC_51
AE4
NC_36
AD5
NC_67
AF4
NC_35
AD4
NC_49
AE2
NC_71
AF8
NC_40
AD9
NC_56
AE9
NC_72
AF9
NC_58
AE11
NC_69
AF6
NC_53
AE6
NC_74
AF11
NC_37
AD6
NC_43
AD12
NC_52
AE5
NC_75
AF12
NC_68
AF5
NC_59
AE12
NC_57
AE10
NC_70
AF7
NC_42
AD11
NC_38
AD7
NC_41
AD10
NC_54
AE7
NC_73
AF10
NC_39
AD8
NC_55
AE8
NC_12
Y11
GND_105
Y19
LVACLKP/LLV6P/BLUE[3] W26
LVACLKN/LLV6N/BLUE[2] W25
LVA0P/LLV3P/BLUE[9] U26
LVA0N/LLV3N/BLUE[8] U25
LVA1P/LLV4P/BLUE[7] U24
LVA1N/LLV4N/BLUE[6] V26
LVA2P/LLV5P/BLUE[5] V25
LVA2N/LLV5N/BLUE[4] V24
LVA3P/LLV7P/BLUE[1] W24
LVA3N/LLV7N/BLUE[0] Y26
LVA4P/LLV8P Y25
LVA4N/LLV8N Y24
LVBCLKP/LLV0P/GREEN[5] AC26
LVBCLKN/LLV0N/GREEN[4] AC25
LVB0P/RLV6P/RED[1] AA26
LVB0N/RLV6N/RED[0] AA25
LVB1P/RLV7P/GREEN[9] AA24
LVB1N/RLV7N/GREEN[8] AB26
LVB2P/RLV8P/GREEN[7] AB25
LVB2N/RLV8N/GREEN[6] AB24
LVB3P/LLV1P/GREEN[3] AC24
LVB3N/LLV1N/GREEN[2] AD26
LVB4P/LLV0P/GREEN[1] AD25
LVB4N/LLV0N/GREEN[0] AD24
RLV3P/RED[7] AD23
RLV3N/RED[6] AE23
RLV0P/LVSYNC AE26
RLV0N/LHSYNC AE25
RLV1N/LCK AF26
RLV2P/RED[9] AF25
RLV1P/LDE AE24
RLV2N/RED[8] AF24
RLV4P/RED[5] AF23
RLV4N/RED[4] AD22
RLV5P/RED[3] AE22
RLV5N/RED[2] AF22
TCON3/OE/GOE/GCLK2 AD19
TCON15/SCAN_BLK1 AE19
TCON18/CS7/GCLK5 AD21
TCON19/CS8/GCLK6 AE21
TCON11/CS5/HCON AF21
TCON10/CS4/OPT_N AD20
TCON9/CS3/OPT_P AE20
TCON16/WPWM AF20
TCON12/DPM AF19
TCON1/STV/GSP/VST AD18
TCON5/TP/SOE AE18
TCON14/SACN_BLK AF18
TCON21/CS10/VGH_ODD AB22
TCON20/CS9/VGH_EVEN AB23
TCON13/LEDON AC23
TCON17/CS6/GCLK4 AC22
NC_26 AB16
NC_19 AA14
NC_30 AC15
NC_15 Y16
NC_31 AC16
NC_29 AC14
NC_21 AA16
NC_20 AA15
NC_11 Y10
NC_17 AA11
NC_25 AB15
NC_24 AB14
LGE101DC-R-1 [S7R DIVX]
IC101-*3
S7R_DivX
NC_48
AE1
NC_78
AF16
NC_64
AF1
NC_50
AE3
NC_45
AD14
NC_34
AD3
NC_77
AF15
NC_65
AF2
NC_62
AE15
NC_33
AD2
NC_47
AD16
NC_46
AD15
NC_63
AE16
NC_66
AF3
NC_76
AF14
NC_32
AD1
NC_44
AD13
NC_61
AE14
NC_60
AE13
NC_51
AE4
NC_36
AD5
NC_67
AF4
NC_35
AD4
NC_49
AE2
NC_71
AF8
NC_40
AD9
NC_56
AE9
NC_72
AF9
NC_58
AE11
NC_69
AF6
NC_53
AE6
NC_74
AF11
NC_37
AD6
NC_43
AD12
NC_52
AE5
NC_75
AF12
NC_68
AF5
NC_59
AE12
NC_57
AE10
NC_70
AF7
NC_42
AD11
NC_38
AD7
NC_41
AD10
NC_54
AE7
NC_73
AF10
NC_39
AD8
NC_55
AE8
NC_12
Y11
GND_105
Y19
LVACLKP/LLV6P/BLUE[3] W26
LVACLKN/LLV6N/BLUE[2] W25
LVA0P/LLV3P/BLUE[9] U26
LVA0N/LLV3N/BLUE[8] U25
LVA1P/LLV4P/BLUE[7] U24
LVA1N/LLV4N/BLUE[6] V26
LVA2P/LLV5P/BLUE[5] V25
LVA2N/LLV5N/BLUE[4] V24
LVA3P/LLV7P/BLUE[1] W24
LVA3N/LLV7N/BLUE[0] Y26
LVA4P/LLV8P Y25
LVA4N/LLV8N Y24
LVBCLKP/LLV0P/GREEN[5] AC26
LVBCLKN/LLV0N/GREEN[4] AC25
LVB0P/RLV6P/RED[1] AA26
LVB0N/RLV6N/RED[0] AA25
LVB1P/RLV7P/GREEN[9] AA24
LVB1N/RLV7N/GREEN[8] AB26
LVB2P/RLV8P/GREEN[7] AB25
LVB2N/RLV8N/GREEN[6] AB24
LVB3P/LLV1P/GREEN[3] AC24
LVB3N/LLV1N/GREEN[2] AD26
LVB4P/LLV0P/GREEN[1] AD25
LVB4N/LLV0N/GREEN[0] AD24
RLV3P/RED[7] AD23
RLV3N/RED[6] AE23
RLV0P/LVSYNC AE26
RLV0N/LHSYNC AE25
RLV1N/LCK AF26
RLV2P/RED[9] AF25
RLV1P/LDE AE24
RLV2N/RED[8] AF24
RLV4P/RED[5] AF23
RLV4N/RED[4] AD22
RLV5P/RED[3] AE22
RLV5N/RED[2] AF22
TCON3/OE/GOE/GCLK2 AD19
TCON15/SCAN_BLK1 AE19
TCON18/CS7/GCLK5 AD21
TCON19/CS8/GCLK6 AE21
TCON11/CS5/HCON AF21
TCON10/CS4/OPT_N AD20
TCON9/CS3/OPT_P AE20
TCON16/WPWM AF20
TCON12/DPM AF19
TCON1/STV/GSP/VST AD18
TCON5/TP/SOE AE18
TCON14/SACN_BLK AF18
TCON21/CS10/VGH_ODD AB22
TCON20/CS9/VGH_EVEN AB23
TCON13/LEDON AC23
TCON17/CS6/GCLK4 AC22
NC_26 AB16
NC_19 AA14
NC_30 AC15
NC_15 Y16
NC_31 AC16
NC_29 AC14
NC_21 AA16
NC_20 AA15
NC_11 Y10
NC_17 AA11
NC_25 AB15
NC_24 AB14
LGE101RC-R [S7R RM]
IC101-*5
S7R_RM
NC_48
AE1
NC_78
AF16
NC_64
AF1
NC_50
AE3
NC_45
AD14
NC_34
AD3
NC_77
AF15
NC_65
AF2
NC_62
AE15
NC_33
AD2
NC_47
AD16
NC_46
AD15
NC_63
AE16
NC_66
AF3
NC_76
AF14
NC_32
AD1
NC_44
AD13
NC_61
AE14
NC_60
AE13
NC_51
AE4
NC_36
AD5
NC_67
AF4
NC_35
AD4
NC_49
AE2
NC_71
AF8
NC_40
AD9
NC_56
AE9
NC_72
AF9
NC_58
AE11
NC_69
AF6
NC_53
AE6
NC_74
AF11
NC_37
AD6
NC_43
AD12
NC_52
AE5
NC_75
AF12
NC_68
AF5
NC_59
AE12
NC_57
AE10
NC_70
AF7
NC_42
AD11
NC_38
AD7
NC_41
AD10
NC_54
AE7
NC_73
AF10
NC_39
AD8
NC_55
AE8
NC_12
Y11
GND_105
Y19
LVACLKP/LLV6P/BLUE[3] W26
LVACLKN/LLV6N/BLUE[2] W25
LVA0P/LLV3P/BLUE[9] U26
LVA0N/LLV3N/BLUE[8] U25
LVA1P/LLV4P/BLUE[7] U24
LVA1N/LLV4N/BLUE[6] V26
LVA2P/LLV5P/BLUE[5] V25
LVA2N/LLV5N/BLUE[4] V24
LVA3P/LLV7P/BLUE[1] W24
LVA3N/LLV7N/BLUE[0] Y26
LVA4P/LLV8P Y25
LVA4N/LLV8N Y24
LVBCLKP/LLV0P/GREEN[5] AC26
LVBCLKN/LLV0N/GREEN[4] AC25
LVB0P/RLV6P/RED[1] AA26
LVB0N/RLV6N/RED[0] AA25
LVB1P/RLV7P/GREEN[9] AA24
LVB1N/RLV7N/GREEN[8] AB26
LVB2P/RLV8P/GREEN[7] AB25
LVB2N/RLV8N/GREEN[6] AB24
LVB3P/LLV1P/GREEN[3] AC24
LVB3N/LLV1N/GREEN[2] AD26
LVB4P/LLV0P/GREEN[1] AD25
LVB4N/LLV0N/GREEN[0] AD24
RLV3P/RED[7] AD23
RLV3N/RED[6] AE23
RLV0P/LVSYNC AE26
RLV0N/LHSYNC AE25
RLV1N/LCK AF26
RLV2P/RED[9] AF25
RLV1P/LDE AE24
RLV2N/RED[8] AF24
RLV4P/RED[5] AF23
RLV4N/RED[4] AD22
RLV5P/RED[3] AE22
RLV5N/RED[2] AF22
TCON3/OE/GOE/GCLK2 AD19
TCON15/SCAN_BLK1 AE19
TCON18/CS7/GCLK5 AD21
TCON19/CS8/GCLK6 AE21
TCON11/CS5/HCON AF21
TCON10/CS4/OPT_N AD20
TCON9/CS3/OPT_P AE20
TCON16/WPWM AF20
TCON12/DPM AF19
TCON1/STV/GSP/VST AD18
TCON5/TP/SOE AE18
TCON14/SACN_BLK AF18
TCON21/CS10/VGH_ODD AB22
TCON20/CS9/VGH_EVEN AB23
TCON13/LEDON AC23
TCON17/CS6/GCLK4 AC22
NC_26 AB16
NC_19 AA14
NC_30 AC15
NC_15 Y16
NC_31 AC16
NC_29 AC14
NC_21 AA16
NC_20 AA15
NC_11 Y10
NC_17 AA11
NC_25 AB15
NC_24 AB14
LGE107DC-R [S7MR DIVX/MS10]
IC101-*9
S7MR_DivX_MS10
FRC_DDR3_A0/DDR2_NC
AE1
FRC_DDR3_A1/DDR2_A6
AF16
FRC_DDR3_A2/DDR2_A7
AF1
FRC_DDR3_A3/DDR2_A1
AE3
FRC_DDR3_A4/DDR2_CASZ
AD14
FRC_DDR3_A5/DDR2_A10
AD3
FRC_DDR3_A6/DDR2_A0
AF15
FRC_DDR3_A7/DDR2_A5
AF2
FRC_DDR3_A8/DDR2_A2
AE15
FRC_DDR3_A9/DDR2_A9
AD2
FRC_DDR3_A10/DDR2_A11
AD16
FRC_DDR3_A11/DDR2_A4
AD15
FRC_DDR3_A12/DDR2_A8
AE16
FRC_DDR3_BA0/DDR2_BA2
AF3
FRC_DDR3_BA1/DDR2_ODT
AF14
FRC_DDR3_BA2/DDR2_A12
AD1
FRC_DDR3_MCLK/DDR2_MCLK
AD13
FRC_DDR3_CKE/DDR2_RASZ
AE14
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE13
FRC_DDR3_ODT/DDR2_BA1
AE4
FRC_DDR3_RASZ/DDR2_WEZ
AD5
FRC_DDR3_CASZ/DDR2_CKE
AF4
FRC_DDR3_WEZ/DDR2_BA0
AD4
FRC_DDR3_RESETB/DDR2_A3
AE2
FRC_DDR3_DQSL/DDR2_DQS0
AF8
FRC_DDR3_DQSLB/DDR2_DQSB0
AD9
FRC_DDR3_DQSU/DDR2_DQS1
AE9
FRC_DDR3_DQSUB/DDR2_DQSB1
AF9
FRC_DDR3_DML/DDR2_DQ7
AE11
FRC_DDR3_DMU/DDR2_DQ11
AF6
FRC_DDR3_DQL0/DDR2_DQ6
AE6
FRC_DDR3_DQL1/DDR2_DQ0
AF11
FRC_DDR3_DQL2/DDR2_DQ1
AD6
FRC_DDR3_DQL3/DDR2_DQ2
AD12
FRC_DDR3_DQL4/DDR2_DQ4
AE5
FRC_DDR3_DQL5/DDR2_NC
AF12
FRC_DDR3_DQL6/DDR2_DQ3
AF5
FRC_DDR3_DQL7/DDR2_DQ5
AE12
FRC_DDR3_DQU0/DDR2_DQ8
AE10
FRC_DDR3_DQU1/DDR2_DQ14
AF7
FRC_DDR3_DQU2/DDR2_DQ13
AD11
FRC_DDR3_DQU3/DDR2_DQ12
AD7
FRC_DDR3_DQU4/DDR2_DQ15
AD10
FRC_DDR3_DQU5/DDR2_DQ9
AE7
FRC_DDR3_DQU6/DDR2_DQ10
AF10
FRC_DDR3_DQU7/DDR2_DQM1
AD8
FRC_DDR3_NC/DDR2_DQM0
AE8
FRC_REXT
Y11
FRC_TESTPIN
Y19
ACKP/RLV3P/RED[3] W26
ACKM/RLV3N/RED[2] W25
A0P/RLV0P/RED[9] U26
A0M/RLV0N/RED[8] U25
A1P/RLV1P/RED[7] U24
A1M/RLV1N/RED[6] V26
A2P/RLV2P/RED[5] V25
A2M/RLV2N/RED[4] V24
A3P/RLV4P/RED[1] W24
A3M/RLV4N/RED[0] Y26
A4P/RLV5P/GREEN[9] Y25
A4M/RLV5N/GREEN[8] Y24
BCKP/TCON13/GREEN[1] AC26
BCKM/TCON12/GREEN[0] AC25
B0P/RLV6P/GREEN[7] AA26
B0M/RLV6N/GREEN[6] AA25
B1P/RLV7P/GREEN[5] AA24
B1M/RLV7N/GREEN[4] AB26
B2P/RLV8P/GREEN[3] AB25
B2M/RLV8N/GREEN[2] AB24
B3P/TCON11/BLUE[9] AC24
B3M/TCON10/BLUE[8] AD26
B4P/TCON9/BLUE[7] AD25
B4M/TCON8/BLUE[6] AD24
CCKP/LLV3P AD23
CCKM/LLV3N AE23
C0P/LLV0P/BLUE[5] AE26
C0M/LLV0N/BLUE[4] AE25
C1P/LLV1P/BLUE[3] AF26
C1M/LLV1N/BLUE[2] AF25
C2P/LLV2P/BLUE[1] AE24
C2M/LLV2N/BLUE[0] AF24
C3P/LLV4P AF23
C3M/LLV4N AD22
C4P/LLV5P AE22
C4M/LLV5N AF22
DCKP/TCON5 AD19
DCKM/TCON4 AE19
D0P/LLV6P AD21
D0M/LLV6N AE21
D1P/LLV7P AF21
D1M/LLV7N AD20
D2P/LLV8P AE20
D2M/LLV8N AF20
D3P/TCON3 AF19
D3M/TCON2 AD18
D4P/TCON1 AE18
D4M/TCON0 AF18
GPIO0/TCON15/HSYNC/VDD_ODD AB22
GPIO1/TCON14/VSYNC/VDD_EVEN AB23
GPIO2/TCON7/LDE/GCLK4 AC23
GPIO3/TCON6/LCK/GCLK2 AC22
FRC_GPIO0/UART_RX AB16
FRC_GPIO1 AA14
FRC_GPIO3 AC15
FRC_GPIO8 Y16
FRC_GPIO9/UART_TX AC16
FRC_GPIO10 AC14
FRC_I2CM_DA AA16
FRC_I2CM_CK AA15
FRC_I2CS_DA Y10
FRC_I2CS_CK AA11
FRC_PWM0 AB15
FRC_PWM1 AB14
LGE107C-R-1 [S7MR BASIC]
IC101-*6
S7MR_BASIC
FRC_DDR3_A0/DDR2_NC
AE1
FRC_DDR3_A1/DDR2_A6
AF16
FRC_DDR3_A2/DDR2_A7
AF1
FRC_DDR3_A3/DDR2_A1
AE3
FRC_DDR3_A4/DDR2_CASZ
AD14
FRC_DDR3_A5/DDR2_A10
AD3
FRC_DDR3_A6/DDR2_A0
AF15
FRC_DDR3_A7/DDR2_A5
AF2
FRC_DDR3_A8/DDR2_A2
AE15
FRC_DDR3_A9/DDR2_A9
AD2
FRC_DDR3_A10/DDR2_A11
AD16
FRC_DDR3_A11/DDR2_A4
AD15
FRC_DDR3_A12/DDR2_A8
AE16
FRC_DDR3_BA0/DDR2_BA2
AF3
FRC_DDR3_BA1/DDR2_ODT
AF14
FRC_DDR3_BA2/DDR2_A12
AD1
FRC_DDR3_MCLK/DDR2_MCLK
AD13
FRC_DDR3_CKE/DDR2_RASZ
AE14
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE13
FRC_DDR3_ODT/DDR2_BA1
AE4
FRC_DDR3_RASZ/DDR2_WEZ
AD5
FRC_DDR3_CASZ/DDR2_CKE
AF4
FRC_DDR3_WEZ/DDR2_BA0
AD4
FRC_DDR3_RESETB/DDR2_A3
AE2
FRC_DDR3_DQSL/DDR2_DQS0
AF8
FRC_DDR3_DQSLB/DDR2_DQSB0
AD9
FRC_DDR3_DQSU/DDR2_DQS1
AE9
FRC_DDR3_DQSUB/DDR2_DQSB1
AF9
FRC_DDR3_DML/DDR2_DQ7
AE11
FRC_DDR3_DMU/DDR2_DQ11
AF6
FRC_DDR3_DQL0/DDR2_DQ6
AE6
FRC_DDR3_DQL1/DDR2_DQ0
AF11
FRC_DDR3_DQL2/DDR2_DQ1
AD6
FRC_DDR3_DQL3/DDR2_DQ2
AD12
FRC_DDR3_DQL4/DDR2_DQ4
AE5
FRC_DDR3_DQL5/DDR2_NC
AF12
FRC_DDR3_DQL6/DDR2_DQ3
AF5
FRC_DDR3_DQL7/DDR2_DQ5
AE12
FRC_DDR3_DQU0/DDR2_DQ8
AE10
FRC_DDR3_DQU1/DDR2_DQ14
AF7
FRC_DDR3_DQU2/DDR2_DQ13
AD11
FRC_DDR3_DQU3/DDR2_DQ12
AD7
FRC_DDR3_DQU4/DDR2_DQ15
AD10
FRC_DDR3_DQU5/DDR2_DQ9
AE7
FRC_DDR3_DQU6/DDR2_DQ10
AF10
FRC_DDR3_DQU7/DDR2_DQM1
AD8
FRC_DDR3_NC/DDR2_DQM0
AE8
FRC_REXT
Y11
FRC_TESTPIN
Y19
ACKP/RLV3P/RED[3] W26
ACKM/RLV3N/RED[2] W25
A0P/RLV0P/RED[9] U26
A0M/RLV0N/RED[8] U25
A1P/RLV1P/RED[7] U24
A1M/RLV1N/RED[6] V26
A2P/RLV2P/RED[5] V25
A2M/RLV2N/RED[4] V24
A3P/RLV4P/RED[1] W24
A3M/RLV4N/RED[0] Y26
A4P/RLV5P/GREEN[9] Y25
A4M/RLV5N/GREEN[8] Y24
BCKP/TCON13/GREEN[1] AC26
BCKM/TCON12/GREEN[0] AC25
B0P/RLV6P/GREEN[7] AA26
B0M/RLV6N/GREEN[6] AA25
B1P/RLV7P/GREEN[5] AA24
B1M/RLV7N/GREEN[4] AB26
B2P/RLV8P/GREEN[3] AB25
B2M/RLV8N/GREEN[2] AB24
B3P/TCON11/BLUE[9] AC24
B3M/TCON10/BLUE[8] AD26
B4P/TCON9/BLUE[7] AD25
B4M/TCON8/BLUE[6] AD24
CCKP/LLV3P AD23
CCKM/LLV3N AE23
C0P/LLV0P/BLUE[5] AE26
C0M/LLV0N/BLUE[4] AE25
C1P/LLV1P/BLUE[3] AF26
C1M/LLV1N/BLUE[2] AF25
C2P/LLV2P/BLUE[1] AE24
C2M/LLV2N/BLUE[0] AF24
C3P/LLV4P AF23
C3M/LLV4N AD22
C4P/LLV5P AE22
C4M/LLV5N AF22
DCKP/TCON5 AD19
DCKM/TCON4 AE19
D0P/LLV6P AD21
D0M/LLV6N AE21
D1P/LLV7P AF21
D1M/LLV7N AD20
D2P/LLV8P AE20
D2M/LLV8N AF20
D3P/TCON3 AF19
D3M/TCON2 AD18
D4P/TCON1 AE18
D4M/TCON0 AF18
GPIO0/TCON15/HSYNC/VDD_ODD AB22
GPIO1/TCON14/VSYNC/VDD_EVEN AB23
GPIO2/TCON7/LDE/GCLK4 AC23
GPIO3/TCON6/LCK/GCLK2 AC22
FRC_GPIO0/UART_RX AB16
FRC_GPIO1 AA14
FRC_GPIO3 AC15
FRC_GPIO8 Y16
FRC_GPIO9/UART_TX AC16
FRC_GPIO10 AC14
FRC_I2CM_DA AA16
FRC_I2CM_CK AA15
FRC_I2CS_DA Y10
FRC_I2CS_CK AA11
FRC_PWM0 AB15
FRC_PWM1 AB14
LGE107C-R [S7MR MS10]
IC101-*7
S7MR_MS10
FRC_DDR3_A0/DDR2_NC
AE1
FRC_DDR3_A1/DDR2_A6
AF16
FRC_DDR3_A2/DDR2_A7
AF1
FRC_DDR3_A3/DDR2_A1
AE3
FRC_DDR3_A4/DDR2_CASZ
AD14
FRC_DDR3_A5/DDR2_A10
AD3
FRC_DDR3_A6/DDR2_A0
AF15
FRC_DDR3_A7/DDR2_A5
AF2
FRC_DDR3_A8/DDR2_A2
AE15
FRC_DDR3_A9/DDR2_A9
AD2
FRC_DDR3_A10/DDR2_A11
AD16
FRC_DDR3_A11/DDR2_A4
AD15
FRC_DDR3_A12/DDR2_A8
AE16
FRC_DDR3_BA0/DDR2_BA2
AF3
FRC_DDR3_BA1/DDR2_ODT
AF14
FRC_DDR3_BA2/DDR2_A12
AD1
FRC_DDR3_MCLK/DDR2_MCLK
AD13
FRC_DDR3_CKE/DDR2_RASZ
AE14
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE13
FRC_DDR3_ODT/DDR2_BA1
AE4
FRC_DDR3_RASZ/DDR2_WEZ
AD5
FRC_DDR3_CASZ/DDR2_CKE
AF4
FRC_DDR3_WEZ/DDR2_BA0
AD4
FRC_DDR3_RESETB/DDR2_A3
AE2
FRC_DDR3_DQSL/DDR2_DQS0
AF8
FRC_DDR3_DQSLB/DDR2_DQSB0
AD9
FRC_DDR3_DQSU/DDR2_DQS1
AE9
FRC_DDR3_DQSUB/DDR2_DQSB1
AF9
FRC_DDR3_DML/DDR2_DQ7
AE11
FRC_DDR3_DMU/DDR2_DQ11
AF6
FRC_DDR3_DQL0/DDR2_DQ6
AE6
FRC_DDR3_DQL1/DDR2_DQ0
AF11
FRC_DDR3_DQL2/DDR2_DQ1
AD6
FRC_DDR3_DQL3/DDR2_DQ2
AD12
FRC_DDR3_DQL4/DDR2_DQ4
AE5
FRC_DDR3_DQL5/DDR2_NC
AF12
FRC_DDR3_DQL6/DDR2_DQ3
AF5
FRC_DDR3_DQL7/DDR2_DQ5
AE12
FRC_DDR3_DQU0/DDR2_DQ8
AE10
FRC_DDR3_DQU1/DDR2_DQ14
AF7
FRC_DDR3_DQU2/DDR2_DQ13
AD11
FRC_DDR3_DQU3/DDR2_DQ12
AD7
FRC_DDR3_DQU4/DDR2_DQ15
AD10
FRC_DDR3_DQU5/DDR2_DQ9
AE7
FRC_DDR3_DQU6/DDR2_DQ10
AF10
FRC_DDR3_DQU7/DDR2_DQM1
AD8
FRC_DDR3_NC/DDR2_DQM0
AE8
FRC_REXT
Y11
FRC_TESTPIN
Y19
ACKP/RLV3P/RED[3] W26
ACKM/RLV3N/RED[2] W25
A0P/RLV0P/RED[9] U26
A0M/RLV0N/RED[8] U25
A1P/RLV1P/RED[7] U24
A1M/RLV1N/RED[6] V26
A2P/RLV2P/RED[5] V25
A2M/RLV2N/RED[4] V24
A3P/RLV4P/RED[1] W24
A3M/RLV4N/RED[0] Y26
A4P/RLV5P/GREEN[9] Y25
A4M/RLV5N/GREEN[8] Y24
BCKP/TCON13/GREEN[1] AC26
BCKM/TCON12/GREEN[0] AC25
B0P/RLV6P/GREEN[7] AA26
B0M/RLV6N/GREEN[6] AA25
B1P/RLV7P/GREEN[5] AA24
B1M/RLV7N/GREEN[4] AB26
B2P/RLV8P/GREEN[3] AB25
B2M/RLV8N/GREEN[2] AB24
B3P/TCON11/BLUE[9] AC24
B3M/TCON10/BLUE[8] AD26
B4P/TCON9/BLUE[7] AD25
B4M/TCON8/BLUE[6] AD24
CCKP/LLV3P AD23
CCKM/LLV3N AE23
C0P/LLV0P/BLUE[5] AE26
C0M/LLV0N/BLUE[4] AE25
C1P/LLV1P/BLUE[3] AF26
C1M/LLV1N/BLUE[2] AF25
C2P/LLV2P/BLUE[1] AE24
C2M/LLV2N/BLUE[0] AF24
C3P/LLV4P AF23
C3M/LLV4N AD22
C4P/LLV5P AE22
C4M/LLV5N AF22
DCKP/TCON5 AD19
DCKM/TCON4 AE19
D0P/LLV6P AD21
D0M/LLV6N AE21
D1P/LLV7P AF21
D1M/LLV7N AD20
D2P/LLV8P AE20
D2M/LLV8N AF20
D3P/TCON3 AF19
D3M/TCON2 AD18
D4P/TCON1 AE18
D4M/TCON0 AF18
GPIO0/TCON15/HSYNC/VDD_ODD AB22
GPIO1/TCON14/VSYNC/VDD_EVEN AB23
GPIO2/TCON7/LDE/GCLK4 AC23
GPIO3/TCON6/LCK/GCLK2 AC22
FRC_GPIO0/UART_RX AB16
FRC_GPIO1 AA14
FRC_GPIO3 AC15
FRC_GPIO8 Y16
FRC_GPIO9/UART_TX AC16
FRC_GPIO10 AC14
FRC_I2CM_DA AA16
FRC_I2CM_CK AA15
FRC_I2CS_DA Y10
FRC_I2CS_CK AA11
FRC_PWM0 AB15
FRC_PWM1 AB14
LGE107DC-R-1 [S7MR DIVX]
IC101-*8
S7MR_DivX
FRC_DDR3_A0/DDR2_NC
AE1
FRC_DDR3_A1/DDR2_A6
AF16
FRC_DDR3_A2/DDR2_A7
AF1
FRC_DDR3_A3/DDR2_A1
AE3
FRC_DDR3_A4/DDR2_CASZ
AD14
FRC_DDR3_A5/DDR2_A10
AD3
FRC_DDR3_A6/DDR2_A0
AF15
FRC_DDR3_A7/DDR2_A5
AF2
FRC_DDR3_A8/DDR2_A2
AE15
FRC_DDR3_A9/DDR2_A9
AD2
FRC_DDR3_A10/DDR2_A11
AD16
FRC_DDR3_A11/DDR2_A4
AD15
FRC_DDR3_A12/DDR2_A8
AE16
FRC_DDR3_BA0/DDR2_BA2
AF3
FRC_DDR3_BA1/DDR2_ODT
AF14
FRC_DDR3_BA2/DDR2_A12
AD1
FRC_DDR3_MCLK/DDR2_MCLK
AD13
FRC_DDR3_CKE/DDR2_RASZ
AE14
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE13
FRC_DDR3_ODT/DDR2_BA1
AE4
FRC_DDR3_RASZ/DDR2_WEZ
AD5
FRC_DDR3_CASZ/DDR2_CKE
AF4
FRC_DDR3_WEZ/DDR2_BA0
AD4
FRC_DDR3_RESETB/DDR2_A3
AE2
FRC_DDR3_DQSL/DDR2_DQS0
AF8
FRC_DDR3_DQSLB/DDR2_DQSB0
AD9
FRC_DDR3_DQSU/DDR2_DQS1
AE9
FRC_DDR3_DQSUB/DDR2_DQSB1
AF9
FRC_DDR3_DML/DDR2_DQ7
AE11
FRC_DDR3_DMU/DDR2_DQ11
AF6
FRC_DDR3_DQL0/DDR2_DQ6
AE6
FRC_DDR3_DQL1/DDR2_DQ0
AF11
FRC_DDR3_DQL2/DDR2_DQ1
AD6
FRC_DDR3_DQL3/DDR2_DQ2
AD12
FRC_DDR3_DQL4/DDR2_DQ4
AE5
FRC_DDR3_DQL5/DDR2_NC
AF12
FRC_DDR3_DQL6/DDR2_DQ3
AF5
FRC_DDR3_DQL7/DDR2_DQ5
AE12
FRC_DDR3_DQU0/DDR2_DQ8
AE10
FRC_DDR3_DQU1/DDR2_DQ14
AF7
FRC_DDR3_DQU2/DDR2_DQ13
AD11
FRC_DDR3_DQU3/DDR2_DQ12
AD7
FRC_DDR3_DQU4/DDR2_DQ15
AD10
FRC_DDR3_DQU5/DDR2_DQ9
AE7
FRC_DDR3_DQU6/DDR2_DQ10
AF10
FRC_DDR3_DQU7/DDR2_DQM1
AD8
FRC_DDR3_NC/DDR2_DQM0
AE8
FRC_REXT
Y11
FRC_TESTPIN
Y19
ACKP/RLV3P/RED[3] W26
ACKM/RLV3N/RED[2] W25
A0P/RLV0P/RED[9] U26
A0M/RLV0N/RED[8] U25
A1P/RLV1P/RED[7] U24
A1M/RLV1N/RED[6] V26
A2P/RLV2P/RED[5] V25
A2M/RLV2N/RED[4] V24
A3P/RLV4P/RED[1] W24
A3M/RLV4N/RED[0] Y26
A4P/RLV5P/GREEN[9] Y25
A4M/RLV5N/GREEN[8] Y24
BCKP/TCON13/GREEN[1] AC26
BCKM/TCON12/GREEN[0] AC25
B0P/RLV6P/GREEN[7] AA26
B0M/RLV6N/GREEN[6] AA25
B1P/RLV7P/GREEN[5] AA24
B1M/RLV7N/GREEN[4] AB26
B2P/RLV8P/GREEN[3] AB25
B2M/RLV8N/GREEN[2] AB24
B3P/TCON11/BLUE[9] AC24
B3M/TCON10/BLUE[8] AD26
B4P/TCON9/BLUE[7] AD25
B4M/TCON8/BLUE[6] AD24
CCKP/LLV3P AD23
CCKM/LLV3N AE23
C0P/LLV0P/BLUE[5] AE26
C0M/LLV0N/BLUE[4] AE25
C1P/LLV1P/BLUE[3] AF26
C1M/LLV1N/BLUE[2] AF25
C2P/LLV2P/BLUE[1] AE24
C2M/LLV2N/BLUE[0] AF24
C3P/LLV4P AF23
C3M/LLV4N AD22
C4P/LLV5P AE22
C4M/LLV5N AF22
DCKP/TCON5 AD19
DCKM/TCON4 AE19
D0P/LLV6P AD21
D0M/LLV6N AE21
D1P/LLV7P AF21
D1M/LLV7N AD20
D2P/LLV8P AE20
D2M/LLV8N AF20
D3P/TCON3 AF19
D3M/TCON2 AD18
D4P/TCON1 AE18
D4M/TCON0 AF18
GPIO0/TCON15/HSYNC/VDD_ODD AB22
GPIO1/TCON14/VSYNC/VDD_EVEN AB23
GPIO2/TCON7/LDE/GCLK4 AC23
GPIO3/TCON6/LCK/GCLK2 AC22
FRC_GPIO0/UART_RX AB16
FRC_GPIO1 AA14
FRC_GPIO3 AC15
FRC_GPIO8 Y16
FRC_GPIO9/UART_TX AC16
FRC_GPIO10 AC14
FRC_I2CM_DA AA16
FRC_I2CM_CK AA15
FRC_I2CS_DA Y10
FRC_I2CS_CK AA11
FRC_PWM0 AB15
FRC_PWM1 AB14
LGE107RC-R [S7MR RM]
IC101-*10
S7MR_RM
FRC_DDR3_A0/DDR2_NC
AE1
FRC_DDR3_A1/DDR2_A6
AF16
FRC_DDR3_A2/DDR2_A7
AF1
FRC_DDR3_A3/DDR2_A1
AE3
FRC_DDR3_A4/DDR2_CASZ
AD14
FRC_DDR3_A5/DDR2_A10
AD3
FRC_DDR3_A6/DDR2_A0
AF15
FRC_DDR3_A7/DDR2_A5
AF2
FRC_DDR3_A8/DDR2_A2
AE15
FRC_DDR3_A9/DDR2_A9
AD2
FRC_DDR3_A10/DDR2_A11
AD16
FRC_DDR3_A11/DDR2_A4
AD15
FRC_DDR3_A12/DDR2_A8
AE16
FRC_DDR3_BA0/DDR2_BA2
AF3
FRC_DDR3_BA1/DDR2_ODT
AF14
FRC_DDR3_BA2/DDR2_A12
AD1
FRC_DDR3_MCLK/DDR2_MCLK
AD13
FRC_DDR3_CKE/DDR2_RASZ
AE14
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE13
FRC_DDR3_ODT/DDR2_BA1
AE4
FRC_DDR3_RASZ/DDR2_WEZ
AD5
FRC_DDR3_CASZ/DDR2_CKE
AF4
FRC_DDR3_WEZ/DDR2_BA0
AD4
FRC_DDR3_RESETB/DDR2_A3
AE2
FRC_DDR3_DQSL/DDR2_DQS0
AF8
FRC_DDR3_DQSLB/DDR2_DQSB0
AD9
FRC_DDR3_DQSU/DDR2_DQS1
AE9
FRC_DDR3_DQSUB/DDR2_DQSB1
AF9
FRC_DDR3_DML/DDR2_DQ7
AE11
FRC_DDR3_DMU/DDR2_DQ11
AF6
FRC_DDR3_DQL0/DDR2_DQ6
AE6
FRC_DDR3_DQL1/DDR2_DQ0
AF11
FRC_DDR3_DQL2/DDR2_DQ1
AD6
FRC_DDR3_DQL3/DDR2_DQ2
AD12
FRC_DDR3_DQL4/DDR2_DQ4
AE5
FRC_DDR3_DQL5/DDR2_NC
AF12
FRC_DDR3_DQL6/DDR2_DQ3
AF5
FRC_DDR3_DQL7/DDR2_DQ5
AE12
FRC_DDR3_DQU0/DDR2_DQ8
AE10
FRC_DDR3_DQU1/DDR2_DQ14
AF7
FRC_DDR3_DQU2/DDR2_DQ13
AD11
FRC_DDR3_DQU3/DDR2_DQ12
AD7
FRC_DDR3_DQU4/DDR2_DQ15
AD10
FRC_DDR3_DQU5/DDR2_DQ9
AE7
FRC_DDR3_DQU6/DDR2_DQ10
AF10
FRC_DDR3_DQU7/DDR2_DQM1
AD8
FRC_DDR3_NC/DDR2_DQM0
AE8
FRC_REXT
Y11
FRC_TESTPIN
Y19
ACKP/RLV3P/RED[3] W26
ACKM/RLV3N/RED[2] W25
A0P/RLV0P/RED[9] U26
A0M/RLV0N/RED[8] U25
A1P/RLV1P/RED[7] U24
A1M/RLV1N/RED[6] V26
A2P/RLV2P/RED[5] V25
A2M/RLV2N/RED[4] V24
A3P/RLV4P/RED[1] W24
A3M/RLV4N/RED[0] Y26
A4P/RLV5P/GREEN[9] Y25
A4M/RLV5N/GREEN[8] Y24
BCKP/TCON13/GREEN[1] AC26
BCKM/TCON12/GREEN[0] AC25
B0P/RLV6P/GREEN[7] AA26
B0M/RLV6N/GREEN[6] AA25
B1P/RLV7P/GREEN[5] AA24
B1M/RLV7N/GREEN[4] AB26
B2P/RLV8P/GREEN[3] AB25
B2M/RLV8N/GREEN[2] AB24
B3P/TCON11/BLUE[9] AC24
B3M/TCON10/BLUE[8] AD26
B4P/TCON9/BLUE[7] AD25
B4M/TCON8/BLUE[6] AD24
CCKP/LLV3P AD23
CCKM/LLV3N AE23
C0P/LLV0P/BLUE[5] AE26
C0M/LLV0N/BLUE[4] AE25
C1P/LLV1P/BLUE[3] AF26
C1M/LLV1N/BLUE[2] AF25
C2P/LLV2P/BLUE[1] AE24
C2M/LLV2N/BLUE[0] AF24
C3P/LLV4P AF23
C3M/LLV4N AD22
C4P/LLV5P AE22
C4M/LLV5N AF22
DCKP/TCON5 AD19
DCKM/TCON4 AE19
D0P/LLV6P AD21
D0M/LLV6N AE21
D1P/LLV7P AF21
D1M/LLV7N AD20
D2P/LLV8P AE20
D2M/LLV8N AF20
D3P/TCON3 AF19
D3M/TCON2 AD18
D4P/TCON1 AE18
D4M/TCON0 AF18
GPIO0/TCON15/HSYNC/VDD_ODD AB22
GPIO1/TCON14/VSYNC/VDD_EVEN AB23
GPIO2/TCON7/LDE/GCLK4 AC23
GPIO3/TCON6/LCK/GCLK2 AC22
FRC_GPIO0/UART_RX AB16
FRC_GPIO1 AA14
FRC_GPIO3 AC15
FRC_GPIO8 Y16
FRC_GPIO9/UART_TX AC16
FRC_GPIO10 AC14
FRC_I2CM_DA AA16
FRC_I2CM_CK AA15
FRC_I2CS_DA Y10
FRC_I2CS_CK AA11
FRC_PWM0 AB15
FRC_PWM1 AB14
LGE107DC-RP [S7M+ DIVX/MS10]
IC101
S7M-PLUS_DivX_MS10
PCM_D0
U22
PCM_D1
T21
PCM_D2
T22
PCM_D3
AB18
PCM_D4
AC18
PCM_D5
AC19
PCM_D6
AC20
PCM_D7
AC21
PCM_A0
U21
PCM_A1
V21
PCM_A2
Y22
PCM_A3
AA22
PCM_A4
R22
PCM_A5
R21
PCM_A6
T23
PCM_A7
T24
PCM_A8
AA23
PCM_A9
Y20
PCM_A10
AB17
PCM_A11
AA21
PCM_A12
U23
PCM_A13
Y23
PCM_A14
W23
PCM_REG_N
W22
PCM_OE_N
AA17
PCM_WE_N
V22
PCM_IORD_N
W21
PCM_IOWR_N
Y21
PCM_CE_N
AA20
PCM_IRQA_N
V23
PCM_CD_N
P23
PCM_WAIT_N
R23
PCM_RESET
P22
PCM_PF_CE0Z
AC17
PCM_PF_CE1Z
AB20
PCM_PF_OEZ
AA18
PCM_PF_WEZ
AB21
PCM_PF_ALE
AB19
PCM_PF_AD[15]
AD17
PCM_PF_RBZ
AA19
UART_TX2/GPIO65
M23
UART_RX2/GPIO64
N23
DDCR_DA/GPIO71
M22
DDCR_CK/GPIO72
N22
DDCA_DA/UART0_TX
A5
DDCA_CK/UART0_RX
B5
PWM0/GPIO66
K23
PWM1/GPIO67
K22
PWM2/GPIO68
G23
PWM3/GPIO69
G22
PWM4/GPIO70
G21
SAR0/GPIO31
C6
SAR1/GPIO32
B6
SAR2/GPIO33
C8
SAR3/GPIO34
C7
SAR4/GPIO35
A6
GPIO143/TCON0 N21
GPIO145/TCON2 M21
GPIO147/TCON4 L22
GPIO149/TCON6 L21
GPIO151/TCON8 P21
GPIO36/UART3_RX K21
GPIO37/UART3_TX L23
GPIO38 K20
GPIO39 L20
GPIO40 M20
GPIO41 G20
GPIO42 G19
GPIO50/UART1_RX F20
GPIO51/UART1_TX F19
GPIO6/PM0/INT0 E7
GPIO7/PM1/PM_UART_TX D7
GPIO8/PM2 E11
GPIO9/PM3 G9
GPIO10/PM4 F9
GPIO11/PM5/PM_UART_RX/INT1 C5
PM_SPI_CS1/GPIO12/PM6 E8
PM_SPI_WP1/GPIO13/PM7 E9
PM_SPI_WP2/GPIO14/PM8/INT2 F7
GPIO15/PM9 F6
PM_SPI_CS2/GPIO16/PM10 D8
GPIO17/PM11/INT3 G12
GPIO18/PM12/INT4 F10
PM_SPI_CK/GPIO1 D9
GPIO0/PM_SPI_CZ D11
PM_SPI_DI/GPIO2 E10
PM_SPI_DO/GPIO3 D10
TS0_CLK AA9
TS0_VLD AA5
TS0_SYNC AA10
TS0_D0 AB5
TS0_D1 AC4
TS0_D2 Y6
TS0_D3 AA6
TS0_D4 W6
TS0_D5 AA7
TS0_D6 Y9
TS0_D7 AA8
TS1_CLK AC5
TS1_VLD AC6
TS1_SYNC AB6
TS1_D0 AC10
TS1_D1 AB10
TS1_D2 AC9
TS1_D3 AB9
TS1_D4 AC8
TS1_D5 AB8
TS1_D6 AC7
TS1_D7 AB7
MPIF_CLK D12
MPIF_CS_N D14
MPIF_BUSY E14
MPIF_D0 E12
MPIF_D1 F12
MPIF_D2 D13
MPIF_D3 E13
LGE107C-RP-1 [S7M+ BASIC]
IC101-*11
S7M-PLUS_BASIC
FRC_DDR3_A0/DDR2_NC
AE1
FRC_DDR3_A1/DDR2_A6
AF16
FRC_DDR3_A2/DDR2_A7
AF1
FRC_DDR3_A3/DDR2_A1
AE3
FRC_DDR3_A4/DDR2_CASZ
AD14
FRC_DDR3_A5/DDR2_A10
AD3
FRC_DDR3_A6/DDR2_A0
AF15
FRC_DDR3_A7/DDR2_A5
AF2
FRC_DDR3_A8/DDR2_A2
AE15
FRC_DDR3_A9/DDR2_A9
AD2
FRC_DDR3_A10/DDR2_A11
AD16
FRC_DDR3_A11/DDR2_A4
AD15
FRC_DDR3_A12/DDR2_A8
AE16
FRC_DDR3_BA0/DDR2_BA2
AF3
FRC_DDR3_BA1/DDR2_ODT
AF14
FRC_DDR3_BA2/DDR2_A12
AD1
FRC_DDR3_MCLK/DDR2_MCLK
AD13
FRC_DDR3_CKE/DDR2_RASZ
AE14
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE13
FRC_DDR3_ODT/DDR2_BA1
AE4
FRC_DDR3_RASZ/DDR2_WEZ
AD5
FRC_DDR3_CASZ/DDR2_CKE
AF4
FRC_DDR3_WEZ/DDR2_BA0
AD4
FRC_DDR3_RESETB/DDR2_A3
AE2
FRC_DDR3_DQSL/DDR2_DQS0
AF8
FRC_DDR3_DQSLB/DDR2_DQSB0
AD9
FRC_DDR3_DQSU/DDR2_DQS1
AE9
FRC_DDR3_DQSUB/DDR2_DQSB1
AF9
FRC_DDR3_DML/DDR2_DQ7
AE11
FRC_DDR3_DMU/DDR2_DQ11
AF6
FRC_DDR3_DQL0/DDR2_DQ6
AE6
FRC_DDR3_DQL1/DDR2_DQ0
AF11
FRC_DDR3_DQL2/DDR2_DQ1
AD6
FRC_DDR3_DQL3/DDR2_DQ2
AD12
FRC_DDR3_DQL4/DDR2_DQ4
AE5
FRC_DDR3_DQL5/DDR2_NC
AF12
FRC_DDR3_DQL6/DDR2_DQ3
AF5
FRC_DDR3_DQL7/DDR2_DQ5
AE12
FRC_DDR3_DQU0/DDR2_DQ8
AE10
FRC_DDR3_DQU1/DDR2_DQ14
AF7
FRC_DDR3_DQU2/DDR2_DQ13
AD11
FRC_DDR3_DQU3/DDR2_DQ12
AD7
FRC_DDR3_DQU4/DDR2_DQ15
AD10
FRC_DDR3_DQU5/DDR2_DQ9
AE7
FRC_DDR3_DQU6/DDR2_DQ10
AF10
FRC_DDR3_DQU7/DDR2_DQM1
AD8
FRC_DDR3_NC/DDR2_DQM0
AE8
FRC_VSYNC_LIKE
Y11
FRC_TESTPIN
Y19
ACKP/RLV3P/RED[3] W26
ACKM/RLV3N/RED[2] W25
A0P/RLV0P/RED[9] U26
A0M/RLV0N/RED[8] U25
A1P/RLV1P/RED[7] U24
A1M/RLV1N/RED[6] V26
A2P/RLV2P/RED[5] V25
A2M/RLV2N/RED[4] V24
A3P/RLV4P/RED[1] W24
A3M/RLV4N/RED[0] Y26
A4P/RLV5P/GREEN[9] Y25
A4M/RLV5N/GREEN[8] Y24
BCKP/TCON13/GREEN[1] AC26
BCKM/TCON12/GREEN[0] AC25
B0P/RLV6P/GREEN[7] AA26
B0M/RLV6N/GREEN[6] AA25
B1P/RLV7P/GREEN[5] AA24
B1M/RLV7N/GREEN[4] AB26
B2P/RLV8P/GREEN[3] AB25
B2M/RLV8N/GREEN[2] AB24
B3P/TCON11/BLUE[9] AC24
B3M/TCON10/BLUE[8] AD26
B4P/TCON9/BLUE[7] AD25
B4M/TCON8/BLUE[6] AD24
CCKP/LLV3P AD23
CCKM/LLV3N AE23
C0P/LLV0P/BLUE[5] AE26
C0M/LLV0N/BLUE[4] AE25
C1P/LLV1P/BLUE[3] AF26
C1M/LLV1N/BLUE[2] AF25
C2P/LLV2P/BLUE[1] AE24
C2M/LLV2N/BLUE[0] AF24
C3P/LLV4P AF23
C3M/LLV4N AD22
C4P/LLV5P AE22
C4M/LLV5N AF22
DCKP/TCON5 AD19
DCKM/TCON4 AE19
D0P/LLV6P AD21
D0M/LLV6N AE21
D1P/LLV7P AF21
D1M/LLV7N AD20
D2P/LLV8P AE20
D2M/LLV8N AF20
D3P/TCON3 AF19
D3M/TCON2 AD18
D4P/TCON1 AE18
D4M/TCON0 AF18
GPIO0/TCON15/HSYNC/VDD_ODD AB22
GPIO1/TCON14/VSYNC/VDD_EVEN AB23
GPIO2/TCON7/LDE/GCLK4 AC23
GPIO3/TCON6/LCK/GCLK2 AC22
FRC_SPI_CZ AB16
FRC_GPIO1 AA14
FRC_SPI1_CK AC15
FRC_GPIO8 Y16
FRC_SPI_DO AC16
FRC_SPI1_DI AC14
FRC_SPI_CK AA16
FRC_SPI_DI AA15
FRC_I2CS_DA Y10
FRC_I2CS_CK AA11
FRC_PWM0 AB15
FRC_PWM1 AB14
LGE107C-RP [S7M+ MS10]
IC101-*12
S7M-PLUS_MS10
FRC_DDR3_A0/DDR2_NC
AE1
FRC_DDR3_A1/DDR2_A6
AF16
FRC_DDR3_A2/DDR2_A7
AF1
FRC_DDR3_A3/DDR2_A1
AE3
FRC_DDR3_A4/DDR2_CASZ
AD14
FRC_DDR3_A5/DDR2_A10
AD3
FRC_DDR3_A6/DDR2_A0
AF15
FRC_DDR3_A7/DDR2_A5
AF2
FRC_DDR3_A8/DDR2_A2
AE15
FRC_DDR3_A9/DDR2_A9
AD2
FRC_DDR3_A10/DDR2_A11
AD16
FRC_DDR3_A11/DDR2_A4
AD15
FRC_DDR3_A12/DDR2_A8
AE16
FRC_DDR3_BA0/DDR2_BA2
AF3
FRC_DDR3_BA1/DDR2_ODT
AF14
FRC_DDR3_BA2/DDR2_A12
AD1
FRC_DDR3_MCLK/DDR2_MCLK
AD13
FRC_DDR3_CKE/DDR2_RASZ
AE14
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE13
FRC_DDR3_ODT/DDR2_BA1
AE4
FRC_DDR3_RASZ/DDR2_WEZ
AD5
FRC_DDR3_CASZ/DDR2_CKE
AF4
FRC_DDR3_WEZ/DDR2_BA0
AD4
FRC_DDR3_RESETB/DDR2_A3
AE2
FRC_DDR3_DQSL/DDR2_DQS0
AF8
FRC_DDR3_DQSLB/DDR2_DQSB0
AD9
FRC_DDR3_DQSU/DDR2_DQS1
AE9
FRC_DDR3_DQSUB/DDR2_DQSB1
AF9
FRC_DDR3_DML/DDR2_DQ7
AE11
FRC_DDR3_DMU/DDR2_DQ11
AF6
FRC_DDR3_DQL0/DDR2_DQ6
AE6
FRC_DDR3_DQL1/DDR2_DQ0
AF11
FRC_DDR3_DQL2/DDR2_DQ1
AD6
FRC_DDR3_DQL3/DDR2_DQ2
AD12
FRC_DDR3_DQL4/DDR2_DQ4
AE5
FRC_DDR3_DQL5/DDR2_NC
AF12
FRC_DDR3_DQL6/DDR2_DQ3
AF5
FRC_DDR3_DQL7/DDR2_DQ5
AE12
FRC_DDR3_DQU0/DDR2_DQ8
AE10
FRC_DDR3_DQU1/DDR2_DQ14
AF7
FRC_DDR3_DQU2/DDR2_DQ13
AD11
FRC_DDR3_DQU3/DDR2_DQ12
AD7
FRC_DDR3_DQU4/DDR2_DQ15
AD10
FRC_DDR3_DQU5/DDR2_DQ9
AE7
FRC_DDR3_DQU6/DDR2_DQ10
AF10
FRC_DDR3_DQU7/DDR2_DQM1
AD8
FRC_DDR3_NC/DDR2_DQM0
AE8
FRC_VSYNC_LIKE
Y11
FRC_TESTPIN
Y19
ACKP/RLV3P/RED[3] W26
ACKM/RLV3N/RED[2] W25
A0P/RLV0P/RED[9] U26
A0M/RLV0N/RED[8] U25
A1P/RLV1P/RED[7] U24
A1M/RLV1N/RED[6] V26
A2P/RLV2P/RED[5] V25
A2M/RLV2N/RED[4] V24
A3P/RLV4P/RED[1] W24
A3M/RLV4N/RED[0] Y26
A4P/RLV5P/GREEN[9] Y25
A4M/RLV5N/GREEN[8] Y24
BCKP/TCON13/GREEN[1] AC26
BCKM/TCON12/GREEN[0] AC25
B0P/RLV6P/GREEN[7] AA26
B0M/RLV6N/GREEN[6] AA25
B1P/RLV7P/GREEN[5] AA24
B1M/RLV7N/GREEN[4] AB26
B2P/RLV8P/GREEN[3] AB25
B2M/RLV8N/GREEN[2] AB24
B3P/TCON11/BLUE[9] AC24
B3M/TCON10/BLUE[8] AD26
B4P/TCON9/BLUE[7] AD25
B4M/TCON8/BLUE[6] AD24
CCKP/LLV3P AD23
CCKM/LLV3N AE23
C0P/LLV0P/BLUE[5] AE26
C0M/LLV0N/BLUE[4] AE25
C1P/LLV1P/BLUE[3] AF26
C1M/LLV1N/BLUE[2] AF25
C2P/LLV2P/BLUE[1] AE24
C2M/LLV2N/BLUE[0] AF24
C3P/LLV4P AF23
C3M/LLV4N AD22
C4P/LLV5P AE22
C4M/LLV5N AF22
DCKP/TCON5 AD19
DCKM/TCON4 AE19
D0P/LLV6P AD21
D0M/LLV6N AE21
D1P/LLV7P AF21
D1M/LLV7N AD20
D2P/LLV8P AE20
D2M/LLV8N AF20
D3P/TCON3 AF19
D3M/TCON2 AD18
D4P/TCON1 AE18
D4M/TCON0 AF18
GPIO0/TCON15/HSYNC/VDD_ODD AB22
GPIO1/TCON14/VSYNC/VDD_EVEN AB23
GPIO2/TCON7/LDE/GCLK4 AC23
GPIO3/TCON6/LCK/GCLK2 AC22
FRC_SPI_CZ AB16
FRC_GPIO1 AA14
FRC_SPI1_CK AC15
FRC_GPIO8 Y16
FRC_SPI_DO AC16
FRC_SPI1_DI AC14
FRC_SPI_CK AA16
FRC_SPI_DI AA15
FRC_I2CS_DA Y10
FRC_I2CS_CK AA11
FRC_PWM0 AB15
FRC_PWM1 AB14
LGE107DC-RP-1 [S7M+ DIVX]
IC101-*13
S7M-PLUS_DivX
FRC_DDR3_A0/DDR2_NC
AE1
FRC_DDR3_A1/DDR2_A6
AF16
FRC_DDR3_A2/DDR2_A7
AF1
FRC_DDR3_A3/DDR2_A1
AE3
FRC_DDR3_A4/DDR2_CASZ
AD14
FRC_DDR3_A5/DDR2_A10
AD3
FRC_DDR3_A6/DDR2_A0
AF15
FRC_DDR3_A7/DDR2_A5
AF2
FRC_DDR3_A8/DDR2_A2
AE15
FRC_DDR3_A9/DDR2_A9
AD2
FRC_DDR3_A10/DDR2_A11
AD16
FRC_DDR3_A11/DDR2_A4
AD15
FRC_DDR3_A12/DDR2_A8
AE16
FRC_DDR3_BA0/DDR2_BA2
AF3
FRC_DDR3_BA1/DDR2_ODT
AF14
FRC_DDR3_BA2/DDR2_A12
AD1
FRC_DDR3_MCLK/DDR2_MCLK
AD13
FRC_DDR3_CKE/DDR2_RASZ
AE14
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE13
FRC_DDR3_ODT/DDR2_BA1
AE4
FRC_DDR3_RASZ/DDR2_WEZ
AD5
FRC_DDR3_CASZ/DDR2_CKE
AF4
FRC_DDR3_WEZ/DDR2_BA0
AD4
FRC_DDR3_RESETB/DDR2_A3
AE2
FRC_DDR3_DQSL/DDR2_DQS0
AF8
FRC_DDR3_DQSLB/DDR2_DQSB0
AD9
FRC_DDR3_DQSU/DDR2_DQS1
AE9
FRC_DDR3_DQSUB/DDR2_DQSB1
AF9
FRC_DDR3_DML/DDR2_DQ7
AE11
FRC_DDR3_DMU/DDR2_DQ11
AF6
FRC_DDR3_DQL0/DDR2_DQ6
AE6
FRC_DDR3_DQL1/DDR2_DQ0
AF11
FRC_DDR3_DQL2/DDR2_DQ1
AD6
FRC_DDR3_DQL3/DDR2_DQ2
AD12
FRC_DDR3_DQL4/DDR2_DQ4
AE5
FRC_DDR3_DQL5/DDR2_NC
AF12
FRC_DDR3_DQL6/DDR2_DQ3
AF5
FRC_DDR3_DQL7/DDR2_DQ5
AE12
FRC_DDR3_DQU0/DDR2_DQ8
AE10
FRC_DDR3_DQU1/DDR2_DQ14
AF7
FRC_DDR3_DQU2/DDR2_DQ13
AD11
FRC_DDR3_DQU3/DDR2_DQ12
AD7
FRC_DDR3_DQU4/DDR2_DQ15
AD10
FRC_DDR3_DQU5/DDR2_DQ9
AE7
FRC_DDR3_DQU6/DDR2_DQ10
AF10
FRC_DDR3_DQU7/DDR2_DQM1
AD8
FRC_DDR3_NC/DDR2_DQM0
AE8
FRC_VSYNC_LIKE
Y11
FRC_TESTPIN
Y19
ACKP/RLV3P/RED[3] W26
ACKM/RLV3N/RED[2] W25
A0P/RLV0P/RED[9] U26
A0M/RLV0N/RED[8] U25
A1P/RLV1P/RED[7] U24
A1M/RLV1N/RED[6] V26
A2P/RLV2P/RED[5] V25
A2M/RLV2N/RED[4] V24
A3P/RLV4P/RED[1] W24
A3M/RLV4N/RED[0] Y26
A4P/RLV5P/GREEN[9] Y25
A4M/RLV5N/GREEN[8] Y24
BCKP/TCON13/GREEN[1] AC26
BCKM/TCON12/GREEN[0] AC25
B0P/RLV6P/GREEN[7] AA26
B0M/RLV6N/GREEN[6] AA25
B1P/RLV7P/GREEN[5] AA24
B1M/RLV7N/GREEN[4] AB26
B2P/RLV8P/GREEN[3] AB25
B2M/RLV8N/GREEN[2] AB24
B3P/TCON11/BLUE[9] AC24
B3M/TCON10/BLUE[8] AD26
B4P/TCON9/BLUE[7] AD25
B4M/TCON8/BLUE[6] AD24
CCKP/LLV3P AD23
CCKM/LLV3N AE23
C0P/LLV0P/BLUE[5] AE26
C0M/LLV0N/BLUE[4] AE25
C1P/LLV1P/BLUE[3] AF26
C1M/LLV1N/BLUE[2] AF25
C2P/LLV2P/BLUE[1] AE24
C2M/LLV2N/BLUE[0] AF24
C3P/LLV4P AF23
C3M/LLV4N AD22
C4P/LLV5P AE22
C4M/LLV5N AF22
DCKP/TCON5 AD19
DCKM/TCON4 AE19
D0P/LLV6P AD21
D0M/LLV6N AE21
D1P/LLV7P AF21
D1M/LLV7N AD20
D2P/LLV8P AE20
D2M/LLV8N AF20
D3P/TCON3 AF19
D3M/TCON2 AD18
D4P/TCON1 AE18
D4M/TCON0 AF18
GPIO0/TCON15/HSYNC/VDD_ODD AB22
GPIO1/TCON14/VSYNC/VDD_EVEN AB23
GPIO2/TCON7/LDE/GCLK4 AC23
GPIO3/TCON6/LCK/GCLK2 AC22
FRC_SPI_CZ AB16
FRC_GPIO1 AA14
FRC_SPI1_CK AC15
FRC_GPIO8 Y16
FRC_SPI_DO AC16
FRC_SPI1_DI AC14
FRC_SPI_CK AA16
FRC_SPI_DI AA15
FRC_I2CS_DA Y10
FRC_I2CS_CK AA11
FRC_PWM0 AB15
FRC_PWM1 AB14
LGE107RC-RP [S7M+ RM]
IC101-*14
S7M-PLUS_RM
FRC_DDR3_A0/DDR2_NC
AE1
FRC_DDR3_A1/DDR2_A6
AF16
FRC_DDR3_A2/DDR2_A7
AF1
FRC_DDR3_A3/DDR2_A1
AE3
FRC_DDR3_A4/DDR2_CASZ
AD14
FRC_DDR3_A5/DDR2_A10
AD3
FRC_DDR3_A6/DDR2_A0
AF15
FRC_DDR3_A7/DDR2_A5
AF2
FRC_DDR3_A8/DDR2_A2
AE15
FRC_DDR3_A9/DDR2_A9
AD2
FRC_DDR3_A10/DDR2_A11
AD16
FRC_DDR3_A11/DDR2_A4
AD15
FRC_DDR3_A12/DDR2_A8
AE16
FRC_DDR3_BA0/DDR2_BA2
AF3
FRC_DDR3_BA1/DDR2_ODT
AF14
FRC_DDR3_BA2/DDR2_A12
AD1
FRC_DDR3_MCLK/DDR2_MCLK
AD13
FRC_DDR3_CKE/DDR2_RASZ
AE14
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE13
FRC_DDR3_ODT/DDR2_BA1
AE4
FRC_DDR3_RASZ/DDR2_WEZ
AD5
FRC_DDR3_CASZ/DDR2_CKE
AF4
FRC_DDR3_WEZ/DDR2_BA0
AD4
FRC_DDR3_RESETB/DDR2_A3
AE2
FRC_DDR3_DQSL/DDR2_DQS0
AF8
FRC_DDR3_DQSLB/DDR2_DQSB0
AD9
FRC_DDR3_DQSU/DDR2_DQS1
AE9
FRC_DDR3_DQSUB/DDR2_DQSB1
AF9
FRC_DDR3_DML/DDR2_DQ7
AE11
FRC_DDR3_DMU/DDR2_DQ11
AF6
FRC_DDR3_DQL0/DDR2_DQ6
AE6
FRC_DDR3_DQL1/DDR2_DQ0
AF11
FRC_DDR3_DQL2/DDR2_DQ1
AD6
FRC_DDR3_DQL3/DDR2_DQ2
AD12
FRC_DDR3_DQL4/DDR2_DQ4
AE5
FRC_DDR3_DQL5/DDR2_NC
AF12
FRC_DDR3_DQL6/DDR2_DQ3
AF5
FRC_DDR3_DQL7/DDR2_DQ5
AE12
FRC_DDR3_DQU0/DDR2_DQ8
AE10
FRC_DDR3_DQU1/DDR2_DQ14
AF7
FRC_DDR3_DQU2/DDR2_DQ13
AD11
FRC_DDR3_DQU3/DDR2_DQ12
AD7
FRC_DDR3_DQU4/DDR2_DQ15
AD10
FRC_DDR3_DQU5/DDR2_DQ9
AE7
FRC_DDR3_DQU6/DDR2_DQ10
AF10
FRC_DDR3_DQU7/DDR2_DQM1
AD8
FRC_DDR3_NC/DDR2_DQM0
AE8
FRC_VSYNC_LIKE
Y11
FRC_TESTPIN
Y19
ACKP/RLV3P/RED[3] W26
ACKM/RLV3N/RED[2] W25
A0P/RLV0P/RED[9] U26
A0M/RLV0N/RED[8] U25
A1P/RLV1P/RED[7] U24
A1M/RLV1N/RED[6] V26
A2P/RLV2P/RED[5] V25
A2M/RLV2N/RED[4] V24
A3P/RLV4P/RED[1] W24
A3M/RLV4N/RED[0] Y26
A4P/RLV5P/GREEN[9] Y25
A4M/RLV5N/GREEN[8] Y24
BCKP/TCON13/GREEN[1] AC26
BCKM/TCON12/GREEN[0] AC25
B0P/RLV6P/GREEN[7] AA26
B0M/RLV6N/GREEN[6] AA25
B1P/RLV7P/GREEN[5] AA24
B1M/RLV7N/GREEN[4] AB26
B2P/RLV8P/GREEN[3] AB25
B2M/RLV8N/GREEN[2] AB24
B3P/TCON11/BLUE[9] AC24
B3M/TCON10/BLUE[8] AD26
B4P/TCON9/BLUE[7] AD25
B4M/TCON8/BLUE[6] AD24
CCKP/LLV3P AD23
CCKM/LLV3N AE23
C0P/LLV0P/BLUE[5] AE26
C0M/LLV0N/BLUE[4] AE25
C1P/LLV1P/BLUE[3] AF26
C1M/LLV1N/BLUE[2] AF25
C2P/LLV2P/BLUE[1] AE24
C2M/LLV2N/BLUE[0] AF24
C3P/LLV4P AF23
C3M/LLV4N AD22
C4P/LLV5P AE22
C4M/LLV5N AF22
DCKP/TCON5 AD19
DCKM/TCON4 AE19
D0P/LLV6P AD21
D0M/LLV6N AE21
D1P/LLV7P AF21
D1M/LLV7N AD20
D2P/LLV8P AE20
D2M/LLV8N AF20
D3P/TCON3 AF19
D3M/TCON2 AD18
D4P/TCON1 AE18
D4M/TCON0 AF18
GPIO0/TCON15/HSYNC/VDD_ODD AB22
GPIO1/TCON14/VSYNC/VDD_EVEN AB23
GPIO2/TCON7/LDE/GCLK4 AC23
GPIO3/TCON6/LCK/GCLK2 AC22
FRC_SPI_CZ AB16
FRC_GPIO1 AA14
FRC_SPI1_CK AC15
FRC_GPIO8 Y16
FRC_SPI_DO AC16
FRC_SPI1_DI AC14
FRC_SPI_CK AA16
FRC_SPI_DI AA15
FRC_I2CS_DA Y10
FRC_I2CS_CK AA11
FRC_PWM0 AB15
FRC_PWM1 AB14
IC102-*2
K9F1G08U0D-SCB0
NAND_FLASH_1G_SS
EAN61857001
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
IC102-*3
TC58NVG0S3ETA0BBBH
NAND_FLASH_1G_TOSHIBA
EAN61508001
26 NC_17
27 NC_18
28 NC_19
29 I/O1
30 I/O2
31 I/O3
32 I/O4
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O5
42 I/O6
43 I/O7
44 I/O8
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
RY/BY
4
NC_4
5
NC_5
25 NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
M_RFModule_RESET
M_REMOTE_RX
M_REMOTE_TX
DC_MREMOTE
DD_MREMOTE
IC103-*1
CAT24C08WI-GT3-H-RECV(TV)
HDCP_EEPROM_ON_SEMI_NEW
3
A2
2
NC_2
4
VSS
1
NC_1
5SDA
6SCL
7WP
8VCC
GP3_Saturn7M Ver. 0.1
1
FLASH/EEPROM/GPIO
NAND FLASH MEMORY
/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L : 8 bit
from CI SLOT
Boot from SPI flash : 1’b0
Boot from NOR flash : 1’b1
TO SCART1
Addr:10101--
MIPS_no_EJ_NOR8 : 4’h3 (MIPS as host. No EJ PAD. Byte mode NAND flash.)
MIPS_EJ1_NOR8 : 4’h4 (MIPS as host. EJ use PAD1. Byte mode NAND flash.)
MIPS_EJ2_NOR8 : 4’h5 (MIPS as host. EJ use PAD2. Byte mode NAND flash.)
B51_Secure_no scramble : 4’hb (8051 as host. Internal SPI flash secure boot, no scramble)
B51_Sesure_scramble : 4’hc (8051 as host. Internal SPI flash secure boot with scarmble)
I2C
for SYSTEM/HDCP
EEPROM&URSA3
A0’h
<T3 CHIP Config>
(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)
Internal demod out
/External demod in
$0.199
<T3 CHIP Config(AUD_LRCH)>
LD650 Scan
Delete /PIF_SPI_CS
DIMMING
HDCP EEPROM EEPROM
for SERIAL FLASH
S7R S7MR
S7MR-PLUS
3D SG
3D SG
3D SG
3D SG
3D SG
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R293 1K
OPT
TP202
R212 1K
PHM_OFF
C292 0.1uF
OPT
MVREF
10uFC4001
C204 0.047uF
TU_CVBS
D0+_HDMI1
C4044 0.1uF
OPT
C263
10uF
L207
BLM18PG121SN1D
SCART1_Lout
L226
BLM18SG700TN1D
C290
0.1uF
OPT
DSUB_R+
D1+_HDMI1
D2+_HDMI1
VDD33_DVI
AVDD_DMPLL
AU33
AVDD_DDR0
C4056 0.1uF
C4060 2.2uF
10uFC276
D1+_HDMI4
SIDE_USB_DM
DSUB_HSYNC
C4008
0.1uF
OPT
AU33
C4011 0.1uF
OPT
C285 0.1uF
D2-_HDMI2
AUD_LRCK
VDD_RSDS
C4004
0.1uF
OPT
C253
1uF
AVDD_DMPLL
L223
BLM18SG121TN1D
C210 1000pF VDD_RSDS
R4016 33
SC1_FB
L228
BLM18SG700TN1D
C4045 1uF
AU25
+1.26V_VDDC
D1-_HDMI4
D0-_HDMI4
C4042
0.1uF
OPT
HP_LOUT
CK+_HDMI4
C214 0.047uF
+2.5V_Normal
R4026
10K
C208 0.047uF
C4022
10uF
OPT
L227
BLM18PG121SN1D
L217
BLM18PG121SN1D
C4032
0.1uF
C245 2.2uF PC_R_IN
C231 0.047uF
AVDD25_PGA
R249 33
C286 0.1uF
OPT
R257 33
AVDD_DDR0
R236 0
NON_EU
C4026 0.1uF
D2+_HDMI2
C4028
0.1uF
VDD33_DVI
R201 100
OPT
TP209
D0-_HDMI1
C4019 0.1uF
OPT
AVDD_DMPLL
C4014 0.1uF
AUD_SCK
VDD33
HPD2
R288 100
TU_SCL
C242 2.2uF
C4061 10uF
FRC
C251 0.1uF
VDD33
C283 0.1uF
OPT
AVDD_DDR0
IR
+3.3V_Normal
+2.5V_Normal
FRCVDDC
+1.5V_FRC_DDR
C291
0.1uF
FRC
COMP2_R_IN
VDD33
R231 68
RF_SWITCH_CTL
CEC_REMOTE_S7
+1.26V_VDDC
C238 2.2uF
MODEL_OPT_1
D1-_HDMI1
R292 22
FULL_NIM
AVDD2P5
R248 33
10uFC275
COMP2_Pb+
MODEL_OPT_4
C4043 0.1uF
R258 68
C279
10uF
FRC L210
BLM18PG121SN1D
FRC
AVDD2P5
MODEL_OPT_4
C223 0.047uF
SIDE_USB_DP
DDC_SDA_2
COMP2_DET
C4058 0.1uF
FRC
R226 1K
FRC_H/W_OPT
C4016 0.1uF
C209 0.047uF
+2.5V_Normal
+3.3V_Normal
R4019
1K
R297 1K
50/60Hz LVDS
L206
BLM18PG121SN1D
C225 0.047uF
C221 0.047uF
C213 0.047uF
C4038
0.1uF
CK-_HDMI2
AV_R_IN
D2-_HDMI1
DSUB_B+
TP210
C222 0.047uF
C4046
0.1uF
SIDEAV_L_IN
SC1_R+/COMP1_Pr+
R242 68
L215
BLM18PG121SN1D
R202 100
BOOSTER_OPT
R210 100
OPT
R227 1K
NO_FRC
SC1_G+/COMP1_Y+
R211 1K
PHM_ON
R4014
1K
1/16W
1%
VDD33
C218 0.047uF
X201
24MHz
C4065
0.022uF
16V
C4062 0.1uF
D0-_HDMI2
C220 0.047uF
R4023
10K
TP201
C247 2.2uF OPT
R255 33
AU25
R250 33
MIU1VDDC
C240
0.1uF
FRC
R4018
22
FRC
MODEL_OPT_2
L204
BLM18PG121SN1D
AVDD_DDR0
D0+_HDMI4
+3.3V_Normal
+2.5V_Normal
SC1_SOG_IN
MODEL_OPT_5
C217 1000pF
SC1_B+/COMP1_Pb+
VDD33
L222
BLM18PG121SN1D
FRC
R4003 47
C4041 0.1uF
FRC
CK-_HDMI4
R4025 22
L203 5.6uH
CM2012F5R6KT HEAD_PHONE
DDC_SDA_4
C288
0.1uF
R4020
10K
C4007 0.1uF
OPT
R215 1K
OPT
C4017
0.1uF
SCART1_Rout
AVDD2P5
R289 100
DDC_SDA_1
C4031 0.1uF
R207 1K
HD
C239 2.2uF
C4005
0.1uF
LED_DRIVER_D/L_SDA
R291 22
FULL_NIM
R256 68 FRC_VDD33_DDR
TP203
R245 33
MIU0VDDC
AUD_LRCH
C4024 0.1uF
R237 33
HP_ROUT
R206 1K
FHD
C216 0.047uF
D1+_HDMI2
MODEL_OPT_5
C230 0.047uF
C244 2.2uF
C4003
0.1uF
+1.26V_VDDC
C4057 0.047uF
R239 33
C207 0.047uF
C4040 0.1uF
AVDD_DDR0
C289 10uF
C258 0.1uF
C4063 10uF
C298
0.1uF
OPT
R296 100
C234 2.2uF
OPT
C232 0.047uF
C295 0.1uF
IF_P_MSTAR
HPD4
MODEL_OPT_0IF_AGC_SEL
C227 0.047uF
C287
10uF
C262 27pF
D0+_HDMI2
TP211
C272
4.7uF
HEAD_PHONE
C4009
0.1uF
C294
0.1uF
C4020 0.1uF
OPT
D1-_HDMI2
AUD_MASTER_CLK_0
SPDIF_OUT
C211 0.047uF
+1.5V_DDR
C215 0.047uF
MODEL_OPT_6
TP205
SOC_RESET
C246 2.2uF OPT
TU_SIF
SC1/COMP1_R_IN
R287
1M
FRC_AVDD
CK+_HDMI1
L219
BLM18PG121SN1D
C4066 10uF
AVDD_DDR0
AVDD2P5
10uFC293
OPT
AV_CVBS_IN
L221
BLM18PG121SN1D
FRC
DDC_SCL_4
LED_DRIVER_D/L_SCL
R4017
10K
OPT
R295 1K
OPT
DDC_SCL_2
HPD1
R233 68
C226 0.047uF
PC_L_IN
TP207
R4015
1K
1/16W
1%
R228 33
R246 33
IF_AGC_MAIN
C4012 0.1uF
R253 33
MODEL_OPT_3
AMP_SCL
D2-_HDMI4
FRCVDDC
AV_CVBS_IN2
VDD33
FRC_VDD33_DDR
D2+_HDMI4
AV_L_IN
C241
0.1uF
C4025 0.1uF
R294 1K
100/120Hz LVDS
C4027 0.1uF
R214 1K
OPT
DSUB_G+ C206 0.047uF
L213
BLM18PG121SN1D
OPT
R244 33
L212
BLM18PG121SN1D
NEC_SCL
+1.26V_VDDC
AVDD2P5
NEC_SDA
R240 68
DEMOD_SDA
IF_N_MSTAR
R229 68
FRC_LPLL
C233 0.047uF
SC1/COMP1_L_IN
+2.5V_Normal
R205
10K
FRC
L202
BLM18SG121TN1D
C212 0.047uF
R241 33
DTV/MNT_VOUT
L214
BLM18PG121SN1D
FRC
C219 0.047uF
C297
0.1uF
OPT
C281
10uF
OPT
TU_SDA
SC1_CVBS_IN
AVDD2P5
DEMOD_SCL
C4002
0.1uF
C4015
0.1uF
OPT
CK-_HDMI1 MIU0VDDC
TP208
C237 2.2uF
C257 0.1uF
AVDD_DDR_FRC
10uFC284
COMP2_L_IN
L205 5.6uH
CM2012F5R6KT HEAD_PHONE
LNA2_CTL
AVDD_DDR_FRC
C229 0.047uF
R204 100
OPT
C282
10uF
FRC
+3.3V_Normal
+1.26V_VDDC
TP204
DDC_SCL_1
C205 0.047uF
R238 68
L209
BLM18PG121SN1D
R251 33
AVDD25_PGA
R4002 47
COMP2_Pr+
R203 100
RF_SW_OPT
COMP2_Y+
C236 2.2uF
10uFC228
R4006
10K
C4036
0.1uF
OPT
C4064
0.1uF
VDD33
SIDEAV_CVBS_IN
C4010
0.1uF
FRC
AMP_SDA
SIDEAV_R_IN
C243 2.2uF
FRC_RESET
R209 1K
NON_DVB_T2
CK+_HDMI2
C264
1000pF
OPT
C261 27pF
DSUB_VSYNC
C4023 0.1uF
R4024 22
AV_CVBS_IN2
R298 100
OPT
R254 68
C250 0.1uF
C224 1000pF
C203
1000pF
OPT
SC1_ID
C4059 2.2uF
FRC_AVDD
+3.3V_Normal
C249
4.7uF
MVREF
R230 33
C268
4.7uF
HEAD_PHONE
C4018
10uF
L225
BLM18SG700TN1D
FRC
C278
10uF
C256
0.1uF
FRC_LPLL
L211
BLM18PG121SN1D
C235 2.2uF
OPT
C296 0.1uF
TP206
MIU1VDDC
R232 33
R208 1K
DVB_T2
R252 68
C280 0.1uF
ET_MDC
ET_TXD1
ET_CRS
ET_TXD0
ET_REF_CLK
ET_RXD1
ET_MDIO
ET_TX_EN
ET_RXD0
LGE107DC-RP [S7M+ DIVX/MS10]
IC101
S7M-PLUS_DivX_MS10
A_RXCP
F1
A_RXCN
F2
A_RX0P
G2
A_RX0N
G3
A_RX1P
H3
A_RX1N
G1
A_RX2P
H1
A_RX2N
H2
DDCDA_DA/GPIO24
F5
DDCDA_CK/GPIO23
F4
HOTPLUGA/GPIO19
E6
B_RXCP
D3
B_RXCN
C1
B_RX0P
D1
B_RX0N
D2
B_RX1P
E2
B_RX1N
E3
B_RX2P
F3
B_RX2N
E1
DDCDB_DA/GPIO26
D4
DDCDB_CK/GPIO25
E4
HOTPLUGB/GPIO20
D5
C_RXCP
AA2
C_RXCN
AA1
C_RX0P
AB1
C_RX0N
AA3
C_RX1P
AB3
C_RX1N
AB2
C_RX2P
AC2
C_RX2N
AC1
DDCDC_DA/GPIO28
AB4
DDCDC_CK/GPIO27
AA4
HOTPLUGC/GPIO21
AC3
D_RXCP
A2
D_RXCN
A3
D_RX0P
B3
D_RX0N
A1
D_RX1P
B1
D_RX1N
B2
D_RX2P
C2
D_RX2N
C3
DDCDD_DA/GPIO30
B4
DDCDD_CK/GPIO29
C4
HOTPLUGD/GPIO22
E5
CEC/GPIO5
D6
HSYNC0
G5
VSYNC0
G6
RIN0P
K1
RIN0M
L3
GIN0P
K3
GIN0M
K2
BIN0P
J3
BIN0M
J2
SOGIN0
J1
HSYNC1
G4
VSYNC1
H6
RIN1P
K5
RIN1M
K4
GIN1P
J4
GIN1M
K6
BIN1P
H4
BIN1M
J6
SOGIN1
J5
HSYNC2
H5
RIN2P
N3
RIN2M
N2
GIN2P
M2
GIN2M
M1
BIN2P
L2
BIN2M
L1
SOGIN2
M3
CVBS0P
N4
CVBS1P
N6
CVBS2P
L4
CVBS3P
L5
CVBS4P
L6
CVBS5P
M4
CVBS6P
M5
CVBS7P
K7
CVBS_OUT1
M6
CVBS_OUT2
M7
VCOM0
N5
VIFP W2
VIFM W1
IP V2
IM V1
SSIF/SIFP Y2
SSIF/SIFM Y1
QP U3
QM V3
IFAGC Y5
RF_TAGC Y4
TGPIO0/UPGAIN U1
TGPIO1/DNGAIN U2
TGPIO2/I2C_CLK R3
TGPIO3/I2C_SDA T3
XTALIN T2
XTALOUT T1
SPDIF_IN/GPIO177 G14
SPDIF_OUT/GPIO178 G13
DM_P0 B7
DP_P0 A7
DM_P1 AF17
DP_P1 AE17
I2S_IN_BCK/GPIO175 F14
I2S_IN_SD/GPIO176 F13
I2S_IN_WS/GPIO174 F15
I2S_OUT_BCK/GPIO181 D20
I2S_OUT_MCK/GPIO179 E20
I2S_OUT_SD/GPIO182 D19
I2S_OUT_SD1/GPIO183 F18
I2S_OUT_SD2/GPIO184 E18
I2S_OUT_SD3/GPIO185 D18
I2S_OUT_WS/GPIO180 E19
LINE_IN_0L N1
LINE_IN_0R P3
LINE_IN_1L P1
LINE_IN_1R P2
LINE_IN_2L P4
LINE_IN_2R P5
LINE_IN_3L R6
LINE_IN_3R T6
LINE_IN_4L U5
LINE_IN_4R V5
LINE_IN_5L U6
LINE_IN_5R V6
LINE_OUT_0L U4
LINE_OUT_2L W3
LINE_OUT_3L W4
LINE_OUT_0R V4
LINE_OUT_2R Y3
LINE_OUT_3R W5
MIC_DET_IN R4
MICCM T5
MICIN R5
AUCOM T4
VRM P7
VAG R7
VRP P6
HP_OUT_1L R1
HP_OUT_1R R2
ET_RXD0 E21
ET_TXD0 E22
ET_RXD1 D21
ET_TXD1 F21
ET_REFCLK E23
ET_TX_EN D22
ET_MDC F22
ET_MDIO D23
ET_CRS F23
AVLINK F8
IRINT G8
TESTPIN K8
RESET A4
U3_RESET Y17
LGE107DC-RP [S7M+ DIVX/MS10]
IC101
S7M-PLUS_DivX_MS10
VDDC_1
H11
VDDC_2
H12
VDDC_3
H13
VDDC_4
H14
VDDC_5
H15
VDDC_6
J12
VDDC_7
J13
VDDC_8
J14
VDDC_9
J15
VDDC_10
J16
VDDC_11
L18
A_DVDD
H16
B_DVDD
K19
FRC_VDDC_0
L19
FRC_VDDC_1
M18
FRC_VDDC_2
M19
FRC_VDDC_3
N18
FRC_VDDC_4
N19
FRC_VDDC_5
N20
FRC_VDDC_6
P18
FRC_VDDC_7
P19
FRC_VDDC_8
P20
U3_DVDD_DDR
Y12
AVDD1P2
J11
DVDD_NODIE
L7
AVDD2P5_ADC_1
H7
AVDD2P5_ADC_2
J7
AVDD25_REF
J8
AVDD_AU25
L8
PVDD_1
W15
PVDD_2
Y15
AVDD25_PGA
U8
AVDD_NODIE
M8
AVDD_DVI_1
N9
AVDD_DVI_2
P9
AVDD3P3_CVBS
N8
AVDD_DMPLL
P8
AVDD_AU33
T7
AVDD_EAR33
U7
AVDD33_T
T9
VDDP_1
R8
VDDP_2
R9
VDDP_3
T8
FRC_VD33_2_1
V20
FRC_VD33_2_2
W20
FRC_AVDD_RSDS_1
U19
FRC_AVDD_RSDS_2
U20
FRC_AVDD_RSDS_3
V19
FRC_AVDD
W19
FRC_AVDD_LPLL
U18
FRC_AVDD_MPLL
T20
FRC_VDD33_DDR
Y14
AVDD_MEMPLL
R19
FRC_AVDD_MEMPLL
W14
AVDD_DDR0_D_1
D15
AVDD_DDR0_D_2
D16
AVDD_DDR0_D_3
E15
AVDD_DDR0_D_4
E16
AVDD_DDR0_C
E17
AVDD_DDR1_D_1
F16
AVDD_DDR1_D_2
F17
AVDD_DDR1_D_3
G16
AVDD_DDR1_D_4
G17
AVDD_DDR1_C
H17
FRC_AVDD_DDR_D_1
AB11
FRC_AVDD_DDR_D_2
AB12
FRC_AVDD_DDR_D_3
AC11
FRC_AVDD_DDR_D_4
AC12
FRC_AVDD_DDR_C
AA12
MVREF
G15
NC_1
Y7
NC_2
Y8
GND_1 G18
GND_2 H9
GND_3 H10
GND_4 H18
GND_5 H19
GND_6 J10
GND_7 J17
GND_8 J18
GND_9 J19
GND_10 K9
GND_11 K10
GND_12 K11
GND_13 K12
GND_14 K13
GND_15 K14
GND_16 K15
GND_17 K16
GND_18 K17
GND_19 K18
GND_20 L9
GND_21 L10
GND_22 L11
GND_23 L12
GND_24 L13
GND_25 L14
GND_26 L15
GND_27 L16
GND_28 L17
GND_29 M9
GND_30 M10
GND_31 M11
GND_32 M12
GND_33 M13
GND_34 M14
GND_35 M15
GND_36 M16
GND_37 M17
GND_38 N10
GND_39 N11
GND_40 N12
GND_41 N13
GND_42 N14
GND_43 N15
GND_44 N16
GND_45 N17
GND_46 P10
GND_47 P11
GND_48 P12
GND_49 P13
GND_50 P14
GND_51 P15
GND_52 P16
GND_53 P17
GND_54 R10
GND_55 R11
GND_56 R12
GND_57 R13
GND_58 R14
GND_59 R15
GND_60 R16
GND_61 R17
GND_62 R18
GND_63 T10
GND_64 T11
GND_65 T12
GND_66 T13
GND_67 T14
GND_68 T15
GND_69 T16
GND_70 T17
GND_71 T18
GND_72 T19
GND_73 U10
GND_74 U11
GND_75 U12
GND_76 U13
GND_77 U14
GND_78 U15
GND_79 U16
GND_80 U17
GND_81 V7
GND_82 V8
GND_83 V9
GND_84 V10
GND_85 V11
GND_86 V12
GND_87 V13
GND_88 V14
GND_89 V15
GND_90 V16
GND_91 V17
GND_92 V18
GND_93 W7
GND_94 W8
GND_95 W9
GND_96 W10
GND_97 W11
GND_98 W12
GND_99 W13
GND_100 W16
GND_101 W17
GND_102 W18
GND_103 Y13
GND_104 Y18
GND_105 AA13
GND_106 AB13
GND_107 AC13
GND_FU J9
PGA_VCOM U9
GND_108 D17
GND_109 H23
GND_110 AF13
C277 0.1uF
C299 0.1uF
C4006 0.1uF
C4013 0.1uF
C248 0.047uF
3D_GPIO_1
3D_GPIO_2
R213 0
3D_SG
R216 0
3D_SG
D18
MODEL_OPT_3
DVB_T2
reserved for FRC : LOW HIGH
HD
B6
FRC_AVDD:60mAAU33:31mA
TU/DEMOD_I2C
E18
AUDIO OUT
CVBS In/OUT
U5_EXTERNALBOOT :HIGH HIGH
MODEL_OPT_0
Close to MSTAR
FRC_MPLL:4mA
MODEL_OPT_5
AVDD_DDR1:55mA
AVDD_DMPLL/AVDD_NODIE:7.362mA
VDD33_T/VDDP/U3_VD33_2:47mA
100/120Hz LVDS
MODEL_OPT_6
DTV_IF
F9
Normal Power 3.3V
LCD
AVDD_DDR_FRC:55mA
FRC_LPLL:13mA
MODEL OPTION
OLED
MODEL_OPT_2
Close to MSTAR
HDMI
B/T USB
Normal 2.5V
AVDD2P5/ADC2P5:162mA
RSDS Power OPT
DSUB
50/60Hz LVDS
PIN NAME
MODEL_OPT_1
I2S_I/F
VDD_RSDS:88mA
Close to MSTAR
NO FRC FRC_HW_OPT
PIN NO.
DDR3 1.5V
AUDIO IN
U3_INTERNAL : HIGH LOW
VDDC 1.26V
LOW
H/P OUT
HIGH
AVDD_DDR0:55mA
Ready
VDDC : 2026mA
AVDD25_PGA:13mA
G19
C5
MODEL_OPT_4
SCART1_RGB/COMP1
SIDE USB
FHD
default
MODEL OPTION
VDD33_DVI:163mA
F7
FRC_VDD33_DDR:50mA
NO_FRC : LOW LOW
NON_DVB_T2
AVDD_MEMPLL:24mA
Delete CHB_CVBS_IN
Close to MSTAR
OPT_0
RSDS Power OPT
AU25:10mA
-->In case of GP2, This port was used for GIP/NON_GIP
ANALOG SIF
COMP2
PHM_ON
OPT_4
PHM_OFF --> This option is only applied in EU.
In case of NON_EU, default value set LOW.
GP2R
MAIN2, HW OPT 2
20101023
--> MODEL_OPT_5, MODEL_OPT_6
: Only 3D_SG GPIO OUTPUT CONTROL
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C-MDQU7
I2C_SDA
C-MDQU0
C-TMA12
FRC_MODEL_OPT_0
C-MA1
C-TMA0
RXA0-
C-MDQU7
C-TMDQL5
RXB0-
R338
1K
OPT
VCC1.5V_U3_DDR
C-TMA6
C-MBA2
C-MA11
C317
0.1uF
L/DIM_SCLK
RXC0+
C-MDQU2
RXCCK+
RXACK-
RXA1+
C-TMA3
C-MDML
FRC_PWM1
C-MBA0
C-TMA0
R334 22
OPT
C-MDQL2
C-MA7
R307
22
RXA1-
RXD2+
C-TMCKB
C-TMDQU1
C306
0.1uF
C-TMCKE
R330
10
S7M-PLUS
C-TMA7
C-TMA12
R329
10
S7M-PLUS
C-MDQSU
RXD1+
R323
1K
FRC
C-MA4
C304
1000pF
C-TMRESETB
R311
22
FRC_CONF0
+1.5V_FRC_DDR
R301
1K 1%
C-TMA4
C-MDQU5
RXD4+
C320
0.1uF
R325
1K
S7M-R
RXA2-
FRC_SPI_SDI
C301
10uF
C-MDQU6
C-TMDQU5
RXCCK-
FRC_MODEL_OPT_2
R322
1K
OPT
C-TMA5
+3.3V_Normal
C-TMDQU4
C-TMDQL0
C-TMDQU5
2D/3D_CTL
C-TMA11
C-MA5
VCC1.5V_U3_DDR
C-MODT
C-TMDMU
RXA2+
C-TMA10
AR308
22
AR309
22
C-MBA0
C-MDQSLB
C-MDQU2
RXB4-
FRC_SPI_SCK
C-MA2
C-MVREFDQ
C-TMDML
C-TMDQL6
C-MCK
C-MCKE
C-MDQL6
C-MCKB
C-TMCKB
R341
1K
LVDS_S7M-PLUS
R316
22
RXB1-
C-TMA6
AR303
22
R317
820
S7M-R
C-TMDQU6
C-MA9
RXB1+
R321
1K
S7M-PLUS
C-MA3
C305
0.1uF
C-TMDQL4
FRC_SPI_SDI
C-TMDQU6
C-MDQL4
C323
0.1uF
C-MA7
C-MDQL3
FRC_PWM1
R300 33
FRC_L/DIM
AR307
22
C-MDQSL
AR305
22
C-TMA9
C-TMDQU4
C-MDQSL
R314
22
RXA3+
C308
0.1uF
R327
10
S7M-PLUS
RXC4+
C322
0.1uF
R313
22
FRC_/SPI_CS
C-MRASB
C-TMDQL7
C-TMCKE
RXB4+
C-MDQL3
2D/3D_CTL
RXD3+
C-MA1
FRC_PWM0
RXDCK-
C-TMA3
RXD0+
C-TMRASB
RXC2-
C-TMDQU7
VCC1.5V_U3_DDR
C-TMDQU3
C-MDML
C316
0.1uF
RXB0+
C303
0.1uF
OPT
C-TMA8
C-TMA2
C-TMDQSL
C318
0.1uF
RXA3-
C310
0.1uF
C-TMDQL2
C-MA12
C-TMCK
R308
22
C-TMDQL1
C-TMA7
R340
1K
LVDS_EXT_URSA5
FRC_MODEL_OPT_0
C-MDQU3
RXD4-
C314
1000pF
C-MA10
R343
1K
OPT
FRC_CONF0
C-MDQU5
C-MVREFCA
C-TMBA0
R309
22
RXBCK-
C-TMDQL4
C-MBA1
RXA4+
C-MDQU6
C319
0.1uF
C-MWEB
C-TMCASB
C302
0.1uF
RXB2+
C-MDQU1
C-MA10
C-MBA2
C-MVREFCA
R310
22
C-MDQSLB
C321
0.1uF
C-TMDQL3
C-TMDQU0
VCC1.5V_U3_DDR
RXD1-
FRC_SDA
C-TMA10
C-MA4
R312
22
FRC_MODEL_OPT_1
C-MDQU4
RXC4-
C-TMBA2
FRC_CONF1
R306
150
OPT
C-MDMU
C-TMDQSUB
R303
240
1%
R319
1K
OPT
R335 22
OPT
C-TMODT
R305
1K 1%
C-TMDQSU
C-TMBA1
C-TMA9
C-MDQSU
C-TMDQSU
R328
10
S7M-PLUS
C-MDQU0
C-MCK
C-MCASB
C-TMBA1
C-MA12
C-MDQU4
C-MDQSUB C-TMDQU1
C-MA9
C313
0.1uF
C-TMDQU3
C-TMBA0
FRC_SPI_SDO
C-TMA1
C312
0.1uF
R336
1K
L/DIM_EDGE_32/37
C-MRESETB
R318
1K
FRC
RXC3-
C-TMDQSL
I2C_SCL
L301
C-TMDQL3
RXC1+
C-TMBA2
FRC_PWM0
RXA4-
C-MA6
C-MDQL7
FRC_/SPI_CS
R326 22 FRC
C-MA8
C-TMWEB
C-MDQL2
C-TMDQL2
C-TMDQU2
C-TMDQL7
C-TMA8
C311
0.1uF
C315
0.1uF
C-MCKB
C-MA11
C-MWEB
C-MA0
V_SYNC
AR301
22
R324
1K
OPT
C-TMDML
C-MDQL0
C325
0.1uF
16V
FRC_SPI_SCK
C-MA5
C-MDQL1
C-MDQL1
C-MDQL6
C-TMCK
RXC1-
R349
10K
S7M-PLUS
RXC3+
RXACK+
C-MODT
RXB3+
RXD2-
R339
1K
C-MDQSUB
RXBCK+
C-TMDQSLB
R331 22 FRC
R348 33
FRC_L/DIM
R304
1K 1%
R342
1K
OPT
R337
1K
L/DIM_EDGE_42/47/55
C-TMDQL1
C-TMA1
RXD3-
RXDCK+
C-TMRESETB
RXC2+
C-TMWEB
C-MRASB
C-MA3
L/DIM_MOSI
AR304
22
C-MA6
R332
33
FRC_L/DIM
RXD0-
C-TMA5
RXB3-
AR302
22
C307
0.1uF
+3.3V_Normal
C-TMA11
FRC_SPI_SDO
R320
1K
FRC
C-TMDQL0
C309
0.1uF
R333
10K
C-TMDMU
C-TMCASB
C-MA8
C-TMA2
C-TMDQU7
C-MA2
C324
10uF
10V
C-TMA4
C-MCKE
C-MBA1
+3.3V_Normal
FRC_MODEL_OPT_2
C-MDQL0
C-TMDQL5
C-MDMU
VCC1.5V_U3_DDR
R350
4.7K
OPT
C-MVREFDQ
FRC_SCL
C-TMDQSUB
R302
1K 1%
+3.3V_Normal
AR306
22
C-MDQU3
C-MA0
R315
22
FRC_MODEL_OPT_1
C-MDQL5
RXA0+
C-TMDQSLB
C-MDQL7
C-TMDQL6
C-MDQL4
RXB2-
C-TMRASB
C-MRESETB
C-TMDQU0
C-MDQU1
FRC_CONF1
C-MDQL5
VCC1.5V_U3_DDR
C-TMODT
RXC0-
C-TMDQU2
C-MCASB
LGE107DC-RP [S7M+ DIVX/MS10]
IC101
S7M-PLUS_DivX_MS10
FRC_DDR3_A0/DDR2_NC
AE1
FRC_DDR3_A1/DDR2_A6
AF16
FRC_DDR3_A2/DDR2_A7
AF1
FRC_DDR3_A3/DDR2_A1
AE3
FRC_DDR3_A4/DDR2_CASZ
AD14
FRC_DDR3_A5/DDR2_A10
AD3
FRC_DDR3_A6/DDR2_A0
AF15
FRC_DDR3_A7/DDR2_A5
AF2
FRC_DDR3_A8/DDR2_A2
AE15
FRC_DDR3_A9/DDR2_A9
AD2
FRC_DDR3_A10/DDR2_A11
AD16
FRC_DDR3_A11/DDR2_A4
AD15
FRC_DDR3_A12/DDR2_A8
AE16
FRC_DDR3_BA0/DDR2_BA2
AF3
FRC_DDR3_BA1/DDR2_ODT
AF14
FRC_DDR3_BA2/DDR2_A12
AD1
FRC_DDR3_MCLK/DDR2_MCLK
AD13
FRC_DDR3_CKE/DDR2_RASZ
AE14
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE13
FRC_DDR3_ODT/DDR2_BA1
AE4
FRC_DDR3_RASZ/DDR2_WEZ
AD5
FRC_DDR3_CASZ/DDR2_CKE
AF4
FRC_DDR3_WEZ/DDR2_BA0
AD4
FRC_DDR3_RESETB/DDR2_A3
AE2
FRC_DDR3_DQSL/DDR2_DQS0
AF8
FRC_DDR3_DQSLB/DDR2_DQSB0
AD9
FRC_DDR3_DQSU/DDR2_DQS1
AE9
FRC_DDR3_DQSUB/DDR2_DQSB1
AF9
FRC_DDR3_DML/DDR2_DQ7
AE11
FRC_DDR3_DMU/DDR2_DQ11
AF6
FRC_DDR3_DQL0/DDR2_DQ6
AE6
FRC_DDR3_DQL1/DDR2_DQ0
AF11
FRC_DDR3_DQL2/DDR2_DQ1
AD6
FRC_DDR3_DQL3/DDR2_DQ2
AD12
FRC_DDR3_DQL4/DDR2_DQ4
AE5
FRC_DDR3_DQL5/DDR2_NC
AF12
FRC_DDR3_DQL6/DDR2_DQ3
AF5
FRC_DDR3_DQL7/DDR2_DQ5
AE12
FRC_DDR3_DQU0/DDR2_DQ8
AE10
FRC_DDR3_DQU1/DDR2_DQ14
AF7
FRC_DDR3_DQU2/DDR2_DQ13
AD11
FRC_DDR3_DQU3/DDR2_DQ12
AD7
FRC_DDR3_DQU4/DDR2_DQ15
AD10
FRC_DDR3_DQU5/DDR2_DQ9
AE7
FRC_DDR3_DQU6/DDR2_DQ10
AF10
FRC_DDR3_DQU7/DDR2_DQM1
AD8
FRC_DDR3_NC/DDR2_DQM0
AE8
FRC_VSYNC_LIKE
Y11
FRC_TESTPIN
Y19
ACKP/RLV3P/RED[3] W26
ACKM/RLV3N/RED[2] W25
A0P/RLV0P/RED[9] U26
A0M/RLV0N/RED[8] U25
A1P/RLV1P/RED[7] U24
A1M/RLV1N/RED[6] V26
A2P/RLV2P/RED[5] V25
A2M/RLV2N/RED[4] V24
A3P/RLV4P/RED[1] W24
A3M/RLV4N/RED[0] Y26
A4P/RLV5P/GREEN[9] Y25
A4M/RLV5N/GREEN[8] Y24
BCKP/TCON13/GREEN[1] AC26
BCKM/TCON12/GREEN[0] AC25
B0P/RLV6P/GREEN[7] AA26
B0M/RLV6N/GREEN[6] AA25
B1P/RLV7P/GREEN[5] AA24
B1M/RLV7N/GREEN[4] AB26
B2P/RLV8P/GREEN[3] AB25
B2M/RLV8N/GREEN[2] AB24
B3P/TCON11/BLUE[9] AC24
B3M/TCON10/BLUE[8] AD26
B4P/TCON9/BLUE[7] AD25
B4M/TCON8/BLUE[6] AD24
CCKP/LLV3P AD23
CCKM/LLV3N AE23
C0P/LLV0P/BLUE[5] AE26
C0M/LLV0N/BLUE[4] AE25
C1P/LLV1P/BLUE[3] AF26
C1M/LLV1N/BLUE[2] AF25
C2P/LLV2P/BLUE[1] AE24
C2M/LLV2N/BLUE[0] AF24
C3P/LLV4P AF23
C3M/LLV4N AD22
C4P/LLV5P AE22
C4M/LLV5N AF22
DCKP/TCON5 AD19
DCKM/TCON4 AE19
D0P/LLV6P AD21
D0M/LLV6N AE21
D1P/LLV7P AF21
D1M/LLV7N AD20
D2P/LLV8P AE20
D2M/LLV8N AF20
D3P/TCON3 AF19
D3M/TCON2 AD18
D4P/TCON1 AE18
D4M/TCON0 AF18
GPIO0/TCON15/HSYNC/VDD_ODD AB22
GPIO1/TCON14/VSYNC/VDD_EVEN AB23
GPIO2/TCON7/LDE/GCLK4 AC23
GPIO3/TCON6/LCK/GCLK2 AC22
FRC_SPI_CZ AB16
FRC_GPIO1 AA14
FRC_SPI1_CK AC15
FRC_GPIO8 Y16
FRC_SPI_DO AC16
FRC_SPI1_DI AC14
FRC_SPI_CK AA16
FRC_SPI_DI AA15
FRC_I2CS_DA Y10
FRC_I2CS_CK AA11
FRC_PWM0 AB15
FRC_PWM1 AB14
H5TQ1G63DFR-H9C
IC301
FRC_DDR_1333_HYNIX
EAN61828901
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
H5TQ1G63DFR-PBC
IC301-*2
FRC_DDR_1600_HYNIX
EAN61829001
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
A15
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
IC302
W25X20BVSNIG
S7M-PLUS_S_FLASH_2MBIT_WIN
3
WP
2
DO
4
GND
1
CS
5DIO
6CLK
7HOLD
8VCC
R317-*1
4.7K
S7M-PLUS
K4B1G1646G-BCH9
IC301-*3
FRC_DDR_1333_SS_NEW
EAN61857101
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
NT5CB64M16DP-CF
IC301-*4
FRC_DDR_1333_NANYA_NEW
EAN61857201
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12
N7
NC_6
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_7 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
R344
0
3D_SG 3D_SYNC_RF
$ 0.17
CLose to Saturn7M IC
(FRC_CONF0)
Close to DDR Power Pin
<U3 CHIP Config>
CLose to DDR3
(FRC_CONF1,FRC_PWM1, FRC_PWM0)
DDR3 1.5V By CAP - Place these Caps near Memory
3’d5 : boot from internal SRAM
3’d6 : boot from EEPROM
3’d7 : boot form SPI flash
HIGH : I2C ADR = B8
LOW : I2C ADR = B4
GP2R
FRC_DDR
20101023
3
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
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