LG 42PA4500 User manual

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Internal Use Only
Printed in KoreaP/NO : MFL67341908 (1202-REV00)
CHASSIS : PB21A
MODEL : 42PA4500 42PA4500-DF
MODEL : 42PA4510 42PA4510-DC
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
PLASMA TV
SERVICE MANUAL

- 2 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS .............................................................................................. 2
SAFETY PRECAUTIONS ........................................................................ 3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION ................................................................ 5
BLOCK DIAGRAM.................................................................................. 12
EXPLODED VIEW .................................................................................. 13
SCHEMATIC CIRCUIT DIAGRAM ..............................................................

- 3 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩand 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
IMPORTANT SAFETY NOTICE
1.5 Kohm/10W
To Instrument's
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
0.15uf
SAFETY PRECAUTIONS

- 4 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement .
1. Application range
This spec sheet is applied all of the PDP TV with PB21A chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
(1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C
(2) Relative Humidity: 65 % ± 10 %
(3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
BOM.
(5) The receiver must be operated for about 5 minutes prior to the adjustment.
3. Test method
(1) Performance: LGE TV test method followed
(2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
4. Model General Specification
No Item Specication Remark
1 Receiving System 1) SBTVD / NTSC / PAL-M / PAL-N 50A6500-SA
50A4900-SA
2) DVB-T 42/50PA4500-DF
2 Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 07-69 (VHF high/UHF)
4) CATV : 02~135
50A6500-SA
50A4900-SA
1) VHF : 02~13
2) UHF : 14~69
3) DTV : 14~69 (UHF)
4) CATV : 02~135
42/50PA4500-DF
3 Input Voltage 1) AC 100 ~ 240V 50/60Hz
4 Market Brazil / chile / Peru / Venezuela / Costarica / Uruguay
5 Screen Size 42 inch Wide(1024 × 768)
50 inch Wide(1024 × 768)
50 inch Wide(1920 × 1080)
60 inch Wide(1920 × 1080)
42PA all model
50PA4 all model
50PA6 all model
60PA6 all model
6 Aspect Ratio 16:9
7 Tuning System FS
8 Module PDP42T4#### (1024 × 768)
PDP50T4#### (1024 × 768)
PDP50R4#### (1920 × 1080)
PDP60R4#### (1920 × 1080)
42PA all model
50PA4 all model
50PA6 all model
60PA6 all model
9 Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10 Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %

- 5 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet applies to PB21A chassis applied PDP TV all
models manufactured in TV factory.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to
use an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order. But it is
flexible when its factory local problem occurs.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240
V~, 50/60 Hz.
(5) Before adjustment, execute Heat-Run for 5 minutes.
■ After Receive 100% Full white pattern (06CH) then
process Heat-run
(or “8. Test pattern” condition of Ez-Adjust status)
■How to make set white pattern
1) Press Power ON button of Service Remocon
2) Press ADJ button of Service remocon. Select “10. Test
pattern” and, after select “White” using navigation
button, and then you can see 100% Full White pattern.
* In this status you can maintain Heat-Run useless any
pattern generator
* Notice: if you maintain one picture over 20 minutes
(Especially sharp distinction black with white
pattern – 13Ch, or Cross hatch pattern – 09Ch)
then it can appear image stick near black level.
3. Adjustment items
3.1. PCB Assembly adjustment
■Adjust 480i Comp1
■Adjust 1080p Comp1/RGB
●If it is necessary, it can adjustment at Manufacture Line
●You can see set adjustment status at “9. ADJUST
CHECK” of the “In-start menu”
3.2. Set Assembly Adjustment
■EDID (The Extended Display Identification Data )
■Color Temperature (White Balance) Adjustment
■Make sure RS-232C control
■Selection Factory output option
4. PCB Assembly Adjustment
4.1. Using RS-232C
- Adjust 3 items at 3.1. PCB assembly adjustments
" 4.1. ■Adjustment sequence" one after the order.
■Adjustment sequence
■Necessary items before Adjustment items
●Pattern Generator : (MSPG-925FA)
●Adjust 480i comp1
(MSPG-925FA:model :209, pattern :65) - comp1 Mode
●Adjust 1080p comp1
(MSPG-925FA:model :225 , pattern :65) - comp1 Mode
●Addjust RGB (MSPG-925FA:model :225 , pattern :65)
- RGB-Pc Mode
* If you want more information then see the below Adjustment
method (Factory Adjustment)
■Adjustment sequence
●aa 00 00: Enter the ADc Adjustment mode.
●xb 00 40: change the mode to component1 (No actions)
●ad 00 10: Adjust 480i comp
●ad 00 10: Adjust 1080p comp
●xb 00 60: change to RGB-Pc mode(No action)
●ad 00 10: Adjust 1080p RGB
●xb 00 90: Endo of Adjustmennt
< See ADC Adjustment RS232C Protocol_Ver1.0 >
Order command Set response
1. Inter the
Adjustment
mode
aa 00 00 a 00 OK00x
2. Change the
Source
XB 00 40
XB 00 60
b 00 OK40x (Adjust 480i Comp1 )
(Adjust 1080p Comp1)
b 00 OK60x (Adjust 1080p RGB)
3. Start
Adjustment
ad 00 10
4. Return the
Response
OKx ( Success condition )
NGx ( Failed condition )
5. Read
Adjustment
data
( main )
ad 00 20
( main )
ad 00 30
(main : component1 480i, RGB 1080p)
000000000000000000000000007c007b006dx
(main : component1 1080p)
000000070000000000000000007c00830077x
6. Conrm
Adjustment
ad 00 99 NG 03 00x (Failed condition)
NG 03 01x (Failed condition)
NG 03 02x (Failed condition)
OK 03 03x (Success condition)
7. End of
Adjustment
ad 00 90 d 00 OK90x

- 6 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. Factory Adjustment
-> PB21A : USE INTERNAL ADC(LM1) : using internal pattern.
5.1. Auto Adjust Component 480i/1080p RGB
1080p
■Summary : Adjustment component 480i/1080i and RGB
1080p is Gain and Black level setting at Analog
to Digital converter, and compensate the RGB
deviation
■Using instrument
●Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator
(It can output 480i/1080i horizontal 100% color bar
pattern signal, and its output level must setting
0.7V±0.1V p-p correctly)
●You must make it sure its resolution and pattern cause
every instrument can have different setting
●Adjustment method 480i Comp1, Adjust 1080p Comp1/
RGB (Factory adjustment)
●ADC 480i Component1 adjustment
- Check connection of Component1
- MSPG-925FA -> Model: 209, Pattern 65
●Set Component 480i mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”
●ADC 1080p Component1 / RGB adjustment
- Check connection both of Component1 and RGB
- MSPG-925FA -> Model: 225, Pattern 65
●Set Component 1080p mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”
●After get each the signal, wait more a second and enter
the “IN-START” with press IN-START key of Service
remocon. After then select “7. External ADC” with
navigator button and press “Enter”.
●After Then Press key of Service remocon “Right Arrow
(VOL+)”
●You can see “ADC Component1 Success”
●Component1 1080p, RGB 1080p Adjust is same method.
●Component 1080p Adjustment in Component1 input
mode
●RGB 1080p adjustment in RGB input mode
●If you success RGB 1080p Adjust. You can see “ADC
RGB-DTV Success”
* caution : Set Volume 0 after adjustment
5.2. Use Internal ADC(S7R)
- ADJ(EZ ADJUST) -> 6.ADC Calibration -> ADC
Calibration(START)
* EDID (The Extended Display Identification Data)/DDC
(Display Data Channel) Download.
■Summary
● It is established in VESA, for communication between
PC and Monitor without order from user for building
user condition. It helps to make easily use realize
“Plug and Play” function.
● For EDID data write, we use DDC2B protocol.
- Auto Download
■ After enter Service Mode by pushing “ADJ” key,
■ Enter EDID D/L mode.
■ Enter “START” by pushing “OK” key.
* Caution:
- Never connect HDMI & D-sub Cable when the user
downloading .
- Use the proper cables below for EDID Writing
< Adjustment pattern : 480i / 1080p 60Hz Pattern >

- 7 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
■ It only needs to PCM EDID D/L for North America Product.
* Edid data and Model option download(RS232)
- Manual Download
■ Write HDMI EDID data
● Using instruments
- Jig. (PC Serial to D-Sub connection) for PC, DDC
adjustment.
- S/W for DDC recording (EDID data write and read)
- D-sub jack
- Additional HDMI cable connection Jig.
● Preparing and setting.
- Set instruments and Jig. Like pic.5), then turn on PC
and Jig.
- Operate DDC write S/W (EDID write & read)
- It will operate in the DOS mode.
■ EDID data (Model name = LG TV)
- RGB HD
- South Centural America _2D_HD HDMI
NO Enter
download MODE
EDID data Model
option download
Item download ‘Mode In’ download
CMD 1 A A
CMD 2 A E
Data 0 0 00
0 10
When transfer the
‘Mode In’,
Carry the command.
Automatically download
(The use of a internal
pattern)
< For write EDID data, setting Jig and another instruments >
00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
01 16 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26
0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20
28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A
3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 58
00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20
28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A
3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 3F
02 03 27 F1 4F 10 1F 84 13 05 14 03 02 12 20 22
15 11 16 01 26 15 07 50 09 57 07 67 03 0C 00 10
00 B8 2D E3 05 03 01 01 1D 00 72 51 D0 1E 20 6E
28 55 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D
40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71
1C 16 20 58 2C 25 00 40 84 63 00 00 9E 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D1

- 8 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- South Centural America _2D_HD HDMI 2
- South Centural America _2D_HD HDMI 3
- See Working Guide if you want more information about EDID
communication.
- Adjustment Color Temperature(White balance)
■ Using Instruments
● Color Analyzer: CA-210 (CH 10)
- Using LCD color temperature, Color Analyzer (CA-
210) must use CH 10, which Matrix compensated
(White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
● Auto-adjustment Equipment (It needs when Auto-adjust-
ment – It is availed communicate with RS-232C : Baud
rate: 115200)
● Video Signal Generator MSPG-925F 720p, 216Gray
(Model: 217, Pattern 78)
■ Connection Diagram (Auto Adjustment)
● Using Inner Pattern
● Using HDMI input
■ White Balance Adjustment
If you can’t adjust with inner pattern, then you can adjust
it using HDMI pattern. You can select option at “Ez-Adjust
Menu – 7. White Balance” there items “NONE, INNER,
HDMI”. It is normally setting at inner basically. If you can’t
adjust using inner pattern you can select HDMI item, and
you can adjust.
In manual Adjust case, if you press ADJ button of service
remocon, and enter “Ez-Adjust Menu – 7. White Balance”,
then automatically inner pattern operates. (In case of
“Inner” originally “Test-Pattern. On” will be selected in The
“Test-Pattern. On/Off”.
● Connect all cables and equipments like Pic.5)
● Set Baud Rate of RS-232C to 115200. It may set 115200
orignally.
● Connect RS-232C cable to set
● Connect HDMI cable to set
< connection Diagram for Adjustment White balance >
00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20
28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A
3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 3F
02 03 27 F1 4F 10 1F 84 13 05 14 03 02 12 20 22
15 11 16 01 26 15 07 50 09 57 07 67 03 0C 00 20
00 B8 2D E3 05 03 01 01 1D 00 72 51 D0 1E 20 6E
28 55 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D
40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71
1C 16 20 58 2C 25 00 40 84 63 00 00 9E 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 C1
00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20
28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A
3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 3F
02 03 27 F1 4F 10 1F 84 13 05 14 03 02 12 20 22
15 11 16 01 26 15 07 50 09 57 07 67 03 0C 00 30
00 B8 2D E3 05 03 01 01 1D 00 72 51 D0 1E 20 6E
28 55 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D
40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71
1C 16 20 58 2C 25 00 40 84 63 00 00 9E 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B1

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Only for training and service purposes
■ RS-232C Command (Commonly apply)
● “wb 00 00”: Start Auto-adjustment of white balance.
● “wb 00 10”: Start Gain Adjustment (Inner pattern)
● “jb 00 c0” :
● …
● “wb 00 1f”: End of Adjustment
* If it needs, offset adjustment (wb 00 20-start, wb 00 2f-
end)
● “wb 00 ff”: End of white balance adjustment (inner pattern
disappear)
■Adjustment Mapping information
● When Color temperature (White balance) Adjustment
(Automatically)
- Press “Power only key” of service remocon and operate
automatically adjustment.
- Set BaudRate to 115200.
● You must start “wb 00 00” and finish it “wb 00 ff”.
● If it needs, then adjustment “Offset”.
■ White Balance Adjustment (Manual adjustment)
● Test Equipment: CA-210
- Using PDP color temperature, Color Analyzer (CA-210)
must use CH 10, which Matrix compensated (White, Red,
Green, Blue compensation) with CS-2100. See the
Coordination bellowed one.
● Manual adjustment sequence is like bellowed one.
- Turn to “Ez-Adjust” mode with press ADJ button of service
remocon.
- Select “10.Test Pattern” with CH+/- button and press
enter. Then set will go on Heat-run mode. Over 30
minutes set let on Heat-run mode.
- Let CA-210 to zero calibration and must has gap more
10cm from center of PDP module when adjustment.
- Press “ADJ” button of service remocon and select
“7.White-Balance” in “Ez-Adjust” then press “►” button of
navigation key. (When press “►” button then set will go to
full white mode)
- Adjust at three mode (Cool, Medium, Warm)
- If “cool” mode
Let B-Gain to 192 and R, G, B-Cut to 64 and then control
R, G gain adjustment High Light adjustment.
- If “Medium” and “Warm” mode Let R-Gain to 192 and R,
G, B-Cut to 64 and then control G, B gain adjustment
High Light adjustment.
- All of the three mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then control
G, B gain adjustment High Light adjustment.
- With volume button (+/-) you can adjust.
- After all adjustment finished, with Enter (■ key) turn to
Ez-Adjust mode. Then with ADJ button, exit from
adjustment mode
* Attachment: White Balance adjustment coordination and
color temperature.
● Using CS-1000 Equipment.
- COOL : T=11000K, ∆uv=0.000, x=0.276 y=0.283
- MEDIUM : T=9300K, ∆uv=0.000, x=0.285 y=0.293
- WARM : T=6500K, ∆uv=0.000, x=0.313 y=0.329
RS-232C
COMMAND
[CMD ID DATA]
M
I
N
CENTER
(DEFAULT)
M
A
X
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 184 192 192 192
G Gain jh Jb je 00 187 183 159 192
B Gain ji Jc jf 00 192 161 95 192
R Cut 64 64 64 127
G Cut 64 64 64 127
B Cut 64 64 64 127
RS-232C COMMAND
[CMD ID DATA]
Meaning
wb 00 00 White Balance adjustment start.
wb 00 10 Start of adjust gain
(Inner white pattern)
wb 00 1f End of gain adjust
wb 00 20 Start of offset adjust
(Inner white pattern)
wb 00 2f End of offset adjust
wb 00 ff End of White Balance adjust
(Inner pattern disappeared)

- 10 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
● When tester will measure on Cool condition, adjust W30 on
TV display menu.
● When tester will measure on medium condition, adjust 0 on
TV display menu.
● When tester will measure on warm condition, adjust W30 on
TV display menu.
● Using CA-210 Equipment. (10 CH)
- Contrast value: 216 Gray
- Brightness spec.
5.3. Test of RS-232C control.
- Press In-Start button of Service Remocon then set the
“4.Baud Rate” to 115200. Then check RS-232C control and
5.4. Selection of Country option.
- Selection of country option is allowed only North American
model (Not allowed Korean model). It is selection of Country
about Rating and Time Zone.
■ Models: All models which PU11A Chassis (See the rst
page.)
■ Press “In-Start” button of Service Remocon, then enter the
“Option” Menu with “PIP CH-“ Button
■ Select one of these three (USA, CANADA, MEXICO) de-
pends on its market using “Vol. +/-“button.
* Caution : Don’t push The INSTOP KEY after completing the
function inspection.
* Caution : Inspection only PAL M / NTSC
6. GND and ESD Testing
6.1. Prepare GND and ESD Testing.
■ Check the connection between set and power cord
6.2. Operate GND and ESD auto-test.
■ Fully connected (Between set and power cord) set enter the
Auto-test sequence.
■ Connect D-Jack AV jack test equipment.
■ Turn on Auto-controller(GWS103-4)
■ Start Auto GND test.
■ If its result is NG, then notice with buzzer.
■ If its result is OK, then automatically it turns to ESD Test.
■ Operate ESD test
■ If its result is NG, then notice with buzzer.
■ If its result is OK, then process next steps. Notice it with
Good lamp and STOPER Down.
6.3. Check Items.
■ Test Voltage
● GND: 1.5KV/min at 100mA
● Signal: 3KV/min at 100mA
■ Test time: just 1 second.
■ Test point
● GND test: Test between Power cord GND and Signal
cable metal GND.
● ESD test: Test between Power cord GND and Live and
neutral.
■ Leakage current: Set to 0.5mA(rms)
6.4. POWER PCB Ass’y Voltage adjustment
(Va, Vs voltage adjustment)
6.4.1. Test equipment : D.M.M 1EA
6.4.2. Connection Diagram for Measuring
: refer to g.1
<XPOWER4 42T4 PSU>
6.4.3. Adjustment method
6.4.3.1. Vs adjustment (refer g.1)
(1) Connect + terminal of D.M.M. to Vs pin of P811, connect
-terminal to GND pin of P811
(2) After turning VR901, voltage of D.M.M adjustment as same
as Vs voltage which on label of panel left/top ( deviation ;
±0.5V)
6.4.3.2. Va adjustment (refer g.1)
(1) After receiving 100% Full White Pattern, HEAT RUN.
(2) Connect + terminal of D.M.M. to Va pin of P811, connect
-terminal to GND pin of P811
(3) After turning VR502,voltage of D.M.M adjustment as same
as Va voltage which on label of panel left/top (deviation;
±0.5V)
Color
temperature
Test
Equipment
Color Coordination
xy
COOL CA-210 0.276 ± 0.002 0.283 ± 0.002
MEDIUM CA-210 0.285 ± 0.002 0.293 ± 0.002
WARM CA-210 0.313 ± 0.002 0.329 ± 0.002
Item White average
brightness
Brightness uniformity
Min 49 -20
Typ 60
Max +20
Unit cd/m² %
Remark - 100% Window White
Pattern
- 100IRE(255Gray)
- Picture: Vivid(Medium)
- 85IRE(216Gray) 100%
Window White Pattern
- Picture: Vivid(Medium)
(g.1) PCB Assy Voltage adjustment

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Only for training and service purposes
7. Default Service option.
7.1. ADC-Set.
■ R-Gain adjustment Value (default 128)
■ G-Gain adjustment Value (default 128)
■ B-Gain adjustment Value (default 128)
■ R-Offset adjustment Value (default 128)
■ G-Offset adjustment Value (default 128)
■ B-Offset adjustment Value (default 128)
7.2. White balance. Value.
7.3. Temperature Threshold
■ Threshold Down Low 20
■ Threshold Up Low 23
■ Threshold Down High 70
■ Threshold Up High 75
8. USB DOWNLOAD(*.epk le download)
■ Put the USB Stick to the USB socket
■ Press Menu key, and move OPTION
■ Press “FAV” Press 7 times
■ Select download le (epk le)
■ After download is nished, remove the USB stick.
■ Press “IN-START” key of ADJ remote control, check the
S/W version.
9. Tool option
Center(Default)
COOL Mid Warm
R Gain 192 192 192
G Gain 192 192 192
B Gain 192 192 192
R Cut 64 64 64
G Cut 64 64 64
B Cut 64 64 64
42PA4500-DF 42PA4510-DC
Tool option 1 24576 24576
Tool option 2 22794 22794
Tool option 3 3697 3697
Tool option 4 54342 54342
Tool option 5 10 10
Country code 10 10
Country Group TW TW
Country CO CO

- 12 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM

- 13 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
120
501
A2
LV1
A10 A9 A12
520 601
201 204
203
304
400
900
910 590
240
202
580
205
200
206
207
302
303
310
540
300
305
301
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
CI_ADDR[7]
CI_ADDR[0]
CI_ADDR[9]
CI_ADDR[14]
CI_ADDR[1]
CI_ADDR[10]
CI_ADDR[4]
CI_ADDR[6]
BUF2_FE_TS_DATA[0-7]
CI_ADDR[12]
CI_ADDR[3]
CI_ADDR[8]
CI_ADDR[5]
CI_ADDR[13]
CI_ADDR[2]
CI_ADDR[11]
PCM_D[0-7]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
PCM_D[0]
PCM_D[1]
PCM_D[2]
BUF2_FE_TS_DATA[0]
BUF2_FE_TS_DATA[1]
BUF2_FE_TS_DATA[2]
BUF2_FE_TS_DATA[3]
BUF2_FE_TS_DATA[4]
BUF2_FE_TS_DATA[5]
BUF2_FE_TS_DATA[6]
BUF2_FE_TS_DATA[7]
BUF1_FE_TS_DATA[0-7]
BUF2_FE_TS_DATA[2]
BUF2_FE_TS_DATA[5] BUF1_FE_TS_DATA[5]
BUF1_FE_TS_DATA[2]
BUF2_FE_TS_DATA[4]
BUF2_FE_TS_DATA[7]
BUF2_FE_TS_DATA[1]
BUF1_FE_TS_DATA[7]
BUF1_FE_TS_DATA[4]
BUF1_FE_TS_DATA[1]
BUF2_FE_TS_DATA[3]
BUF2_FE_TS_DATA[6]
BUF2_FE_TS_DATA[0]
BUF1_FE_TS_DATA[6]
BUF1_FE_TS_DATA[3]
BUF1_FE_TS_DATA[0]
R118
470K
EU
1/16W
5%
JK100
PSC008-02
EU
1AUDIO_R_OUT
2AUDIO_R_IN
3AUDIO_L_OUT
4AUDIO_GND
5B_GND
6AUDIO_L_IN
7B_OUT
8ID
9G_GND
10 D2B_IN
11 G_OUT
12 D2B_OUT
13 R_GND
14 RGB_GND
15 R_OUT
16 RGB_IO
17 SYNC_GND1
18 SYNC_GND2
19 SYNC_OUT
20 SYNC_IN
21 COM_GND
23
SHIELD
22 AV_DET
CI_TS_DATA[7]
C115
27pF
50V
EU
REG
R145
6.8K
EU
BUF2_FE_TS_VAL_ERR
+5V_CI_ON
CI_WE
CI_ADDR[10]
R181
10K
EU
CI_ADDR[11]
CI_TS_DATA[6]
JK102
10067972-000LF
EU
G1G2
57
21
52
16
10
47
41
5
36
59
23
45
54
18
49
43
13
7
38
2
25
56
20
51
15
9
46
40
4
35
58
22
53
17
11
48
42
12
6
37
1
24
55
19
50
44
14
8
39
3
2660
2761
2862
2963
3064
31
32
33
34
65
66
67
68
69
R107
75
C108
5600pF
50V
EU
R142
390
READY
CI_ADDR[13]
PCM_A[9]CI_ADDR[9]
Q100
MMBT3904(NXP)
EU
E
B
C
CI_ADDR[4]
R188
2K
EU
R112
0
READY
C112
10uF
16V
EU
/PCM_WE
R189
10K
EU
SC1_B+/COMP1_Pb+
L100
EU
120-ohm
CI_IORD
R137
2K
EU
C136
0.1uF
16V
READY
Q103-*1
MMBT3906(NXP)
MULTI
E
B
C
MMBT3904(NXP)
Q102
EU
R159
12K
EU
BUF1_FE_TS_SYN
PCM_A[13]
R149
15K
EU
+3.3V
CI_ADDR[12]
/PCM_IORD
BUF2_FE_TS_DATA[0-7]
BUF2_FE_TS_VAL_ERR
SCART1_Rout
+3.3V_ST
R123
33
EU
PCM_A[12]
Q105
MMBT3904(NXP)
EU
E
B
C
SC1_R+/COMP1_Pr+
PCM_A[4]
PCM_A[3]
+5V
L103
EU
120-ohm
Q103
ISA1530AC1
EU
E
B
C
R143
180
EU
C100
22uF
10V
EU
R124
10K
EU
C109
27pF
50V
EU
D112
KDS184
EU
A2
C
A1
C102
1000pF
50V
READY
R187
10K
EU
1/16W
5%
L101
EU
120-ohm
Q114
RSR025P03
EU
SD
G
CI_TS_DATA[0]
PCM_A[10]
R150
10K
EU
Q104
MMBT3904(NXP)
EU
E
B
C
AR101 33
EU
R113
75
EU
R110
0
READY
C107
5600pF
50V
EU
R130 33EU
1/16W
5%
AV/SC1_CVBS_IN
+5V
D112-*1
MMBD6100
MULTI
A2
C
A1
CI_ADDR[2]
DTV/MNT_VOUT
PCM_A[1]
CI_OE
PCM_5V_CTL
R138
2K
EU
R198
10K
READY
REG
R151
10K
EU
BUF1_FE_TS_VAL_ERR
R154
5.6K
EU
R111
10K
EU
CI_TS_CLK
R116
470K
EU
SC_RE1
AR104
33
EU
C137
0.1uF
16V
EU
+5V
CI_ADDR[1]
BUF2_FE_TS_DATA[0-7]
C101
0.1uF
16V
EU
PCM_A[8]
CI_WE
CI_TS_DATA[1]
P_17V
C111
220pF
50V
EU
R135
0
EU
BUF1_FE_TS_CLK
/PCM_CE
CI_IOWR
R148
15K
EU
R105
1K
EU
SC1_ID
MMBT3904(NXP)
Q101
EU
R158
1K
EU
R131 33EU
C105
0.1uF
16V
EU
CI_ADDR[3]
R117
75
EU
Q107
MMBT3904(NXP)
EU
E
B
C
CI_TS_VAL
AV/SC1_DET
AR106 33
EU
PCM_D[0-7]
SCART1_MUTE
CI_OE
PCM_A[5]
/PCM_REG
R136
330
EU
R133
10K
EU
CI_TS_SYNC
R147
10K
EU
+5V
AR108
33 EU
R119
75
EU
R184
10K
READY
R146
18K
EU
PCM_A[0]
R132 100
EU
R125
0
EU
R114
10K
EU
SC1_FB
AR105 33
EU
CI_ADDR[8]
R160
12K
EU
R104
10K
EU
CI_ADDR[0]
C117
0.1uF
16V
READY
Q114-*1
AO3407A
MULTI
G
D S
/CI_CD2
C113
10uF
16V
EU
BUF1_FE_TS_DATA[0-7]
C103
1000pF
50V
READY
R155
3K
EU
SC1_SOG_IN
CI_ADDR[0-14]
CI_TS_DATA[5]
+3.3V_CI
R108
75
AR110
33 EU
R156
7.5K
EU
PCM_A[14]
PCM_A[6]
P_17V
R101 33
EU
C131
0.1uF
16V
READY
AR109
33 EU
R115
470K
EU
/PCM_WAIT
C114
27pF
50V
EU
AV/SC1_R_IN
CI_ADDR[5]
R152
6.8K
EU
R126
12K
EU
R153
5.6K
EU
C106
100uF
16V
EU
BUF2_FE_TS_SYN
R157
1K
EU
IC100
TC74LCX244FT
EU
3
2Y4
2
1A1
4
1A2
1
1OE
6
1A3
5
2Y3
7
2Y2
8
1A4
9
2Y1
10
GND 11 2A1
12 1Y4
13 2A2
14 1Y3
15 2A3
16 1Y2
17 2A4
18 1Y1
19 2OE
20 VCC
R141
220
EU
/PCM_IRQA
R121
10K
EU
SCART1_Lout
AR102 33
EU
CI_TS_DATA[4]
Q113
MMBT3904(NXP)
EU
E
B
C
R100 33
EU
+3.3V_CI
C104
0.1uF
16V
EU
AR100 33
EU
R106
75
C110
1000pF
50V
READY
+3.3V
PCM_RST
CI_TS_DATA[3]
R165
10K
EU
R128 0
READY
PCM_A[11]
CI_IOWR
CI_DET
AR103
33
EU
AV/SC1_L_IN
R102
100
EU
CI_ADDR[7]
BUF2_FE_TS_SYN
IC101
AZ4580MTR-E1
3
IN1+
2
IN1-
4
VEE
1
OUT1
5IN2+
6IN2-
7OUT2
8VCC
R120
2.7K
EU
CI_IORD
SC_RE2
C116
10uF
16V
EU
R122
0
EU
R140
2K
EU
CI_TS_DATA[2]
0
R129
EU
PCM_A[7]
R103
100
EU
R127
12K
EU
R109
10K
EU
+3.3V_CI
/PCM_IOWR
BUF2_FE_TS_CLK
R139
2K
EU
Q106
MMBT3904(NXP)
EU E
B
C
+5V_CI_ON
R134
100
1/4W
EU
CI_ADDR[14]
/PCM_OE
R144
470
EU
SC1_G+/COMP1_Y+
BUF2_FE_TS_CLK
PCM_A[2]
CI_ADDR[6]
/CI_CD1
AR107 33
EU
SCART,CI Slot
GP4_S7LR
1
DTV_R_OUT
SC1_VOUT
REC_8
CI POWER ENABLE CONTROL
CI SLOT
Full SCART
3.3V_CI
2011-10-20
PDP GP4 LM1
EAX64280503
6
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

Fiber Optic
USB DOWN STREAM
Fiber Optic
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R238
470K
NON_EU
R256 10K
D1-_HDMI2
PC_SER_DATA
SC1_G+/COMP1_Y+
R269
27K
READY
R277
100
R213
0
NON_USA
JK206
PEJ027-04
6B T_TERMINAL2
7B B_TERMINAL2
5T_SPRING
4R_SPRING
7A B_TERMINAL1
6A T_TERMINAL1
3E_SPRING
+3.3V
D2-_HDMI3
R254
470K
+3.3V_ST
D0+_HDMI3
JP208
CK+_HDMI3
D1-_HDMI1
DSUB_R+
R278
10K
R289
10K
SIDE_HDMI_2
R220
10K
R288
10K
SIDE_HDMI_2
DSUB_HSYNC
IC206
MAX3232CDR
3C1-
2V+
4C2+
1C1+
6V-
5C2-
7DOUT2
8RIN2 9
ROUT2
10
DIN2
11
DIN1
12
ROUT1
13
RIN1
14
DOUT1
15
GND
16
VCC
R287
10K
SIDE_HDMI_1
5V_DET_HDMI_3
DSUB_DET
R248
10K
NON_EU
D1-_HDMI3
R279
10K
D206
5.6V
ET_NET
C227
0.1uF
16V
5V_DET_HDMI_2
DDC_SCL_1
PM_TXD
CK+_HDMI1
R210
10
USA
C219
0.1uF
16V
C212
0.1uF
16V
PC_SER_CLK
D0+_HDMI1
COMP1_DET
R282
10K
HDMI_1
D222
READY
CK-_HDMI1
HPD3
COMP2_Pb+
R266
1K
R225
1K
C203
10pF
50V
D1+_HDMI3
CEC_REMOTECEC_REMOTE
R227
1.8K SIDE_HDMI_1
CEC_REMOTE_S7
D1+_HDMI1
R271
33
PC_L_IN
JP201
JK201
SIDE_HDMI_1
14
13
5D1_GND
20
BODY_SHIELD
12
11
2D2_GND
19
18
10 CK+
4D1+
1D2+
17
9D0-
8D0_GND
3D2-
16
7D0+
6D1-
15
R255
470K
R219
470K
PC_R_IN
R284 0
R206
33
PC_SER_DATA
RGB_DDC_SCL
R298
10K
DDC_SCL_3
R222
12K
+3.3V_ST
TX
AV2_DET
PC_SER_CLK
COMP2_DET
SPDIF_OUT
JP207
R270
10K
R237
10K
SIDE_HDMI_1
SC1_B+/COMP1_Pb+
COMP1_R_IN
R253
75
+5V_ST
RGB_DDC_SDA
R244
3.3K
SIDE_HDMI_2
R265
10K
R258
33
R283 0
COMP1_L_IN
COMP2_Y+
R212
10
+3.3V_ST
R260
56K
READY
R297
10K
R263
12K
R215
75
R250
10K
SIDE_HDMI_2
C200
0.1uF
16V
ET_NET
HPD2
D0-_HDMI1
GND
R249
1K
NON_EU
S7_RXD
Q202
MMBT3904(NXP)
SIDE_HDMI_2 E
B
C R209
10K
SIDE_HDMI_2
R251
75
R235
470K
NON_EU
DDC_SDA_1
R267
1K
D224
MMBD301LT1G
READY
30V
R218
470K
1/16W 5%
S7_TXD
PM_RXD +2.5V
CK-_HDMI2
R226
1K
SIDE_HDMI_1
R242
12K
NON_EU
DSUB_VSYNC
D2-_HDMI2
SC1_R+/COMP1_Pr+
Q201
MMBT3904(NXP)
SIDE_HDMI_1 E
B
C
D2-_HDMI1
R207
33
HDMI_1
COMP2_L_IN
Q200
MMBT3904(NXP)
HDMI_1 E
B
C
R264
10K
R25710K
SIDE_USB_DP
+5V
JK204-*1
2F01TC1-CLM97-4F
MULTI
3VIN
2VCC
1GND
4
SHIELD
R275 0 NON_RGB
R290
0
ET_NET
R204
3.3K
HDMI_1
C213
10uF
10V
R232
33
SIDE_HDMI_1
R230
3.3K
SIDE_HDMI_1
R299
0
D205
5.6V
ET_NET
R217
10K
HDMI_1
R281
10K
HDMI_1
JK209
3AU04S-305-ZC-(LG)
1234
5
R280
0
ET_NET
R216
75
+5V
R202
10K
HDMI_1
R239
10K
NON_EU
JP205
JK210-*1
BS-R430051
ET_NET_UDE
11
22
33
44
55
66
77
88
9
9
Q204
MMBT3904(NXP)
USA E
B
C
R276 100
R285
100
R224
10K
+5V
JK204
JST1223-001
1
GND
2
VCC
3
VINPUT
4
FIX_POLE
DDC_SDA_3
D2+_HDMI3
R240
1K
SIDE_HDMI_2
R252
75
BSS83
Q203
READY
SB D
G
JK202
SIDE_HDMI_2
14
13
5D1_GND
20
BODY_SHIELD
12
11
2D2_GND
19
18
10 CK+
4D1+
1D2+
17
9D0-
8D0_GND
3D2-
16
7D0+
6D1-
15
R233
100K
USA
R205
33
R228
10K
USA
CK-_HDMI3
5V_DET_HDMI_1
R245
33 SIDE_HDMI_2
+3.3V
R286
10K
SIDE_HDMI_1
R208
33
HDMI_1
5V_HDMI_1
D0-_HDMI2
HPD1
TN
CEC_REMOTE
+3.3V
R243
0
JK210
XRJV-01V-0-D12-080
ET_NET
11
22
33
44
55
66
77
88
9
9
R274 0 NON_RGB
USB1_CTL
DSUB_B+
R262
12K
R246
33 SIDE_HDMI_2
D200
5.6V
ET_NET
R221
10K
SIDE_USB_DM
R296
10K
READY
1/16W
5%
JK200
HDMI_1
14
13
5D1_GND
20
SHIELD
12
11
2D2_GND
19
18
10 CK+
4D1+
1D2+
17
9D0-
8D0_GND
3D2-
16
7D0+
6D1-
15
R231
33
SIDE_HDMI_1
IC204
AP2191SG-13
3IN_2
2IN_1
4EN
1GND
5
FLG
6
OUT_1
7
OUT_2
8
NC
TP
R214
75
R261
0
READY
R236
12K
NON_EU
C220
10pF
50V
JK205
SPG09-DB-010
1
RED
2
GREEN
3
BLUE
4
GND_1
5
DDC_GND
6
RED_GND
7
GREEN_GND
8
BLUE_GND
9
NC
10
SYNC_GND
11
GND_2
12
DDC_DATA
13
H_SYNC
14
V_SYNC
15
DDC_CLOCK
16
SHILED
5V_HDMI_3
DDC_SDA_2
D204
5.6V
ET_NET
+5V
D0+_HDMI2
C202
10pF
50V
RN
R268
100
R241
1.8K SIDE_HDMI_2
C228
0.1uF
16V
+3.3V
JK211
PPJ239-01
NON_EU
5J [GN2]O-SPRING
6J [GN2]E-LUG
4J [GN2]CONTACT
7K [BL2]E-LUG-S
5K [BL2]O-SPRING
7L [RD2]E-LUG-S
5L [RD2]O-SPRING_1
5M [WH2]O-SPRING
4N [RD2]CONTACT
5N [RD2]O-SPRING_2
6N [RD2]E-LUG
6D [GN1]E-LUG
5D [GN1]O-SPRING
4D [GN1]CONTACT
7E [BL1]E-LUG-S
5E [BL1]O-SPRING
7F [RD1]E-LUG-S
5F [RD1]O-SPRING_1
4F [RD1]CONTACT_1
5G [WH1]O-SPRING
4H [RD1]CONTACT_2
5H [RD1]O-SPRING_2
6H [RD1]E-LUG
5V_HDMI_2
D0-_HDMI3
CEC_REMOTE
JK207
PEJ027-04
USA
6B T_TERMINAL2
7B B_TERMINAL2
5T_SPRING
4R_SPRING
7A B_TERMINAL1
6A T_TERMINAL1
3E_SPRING
COMP2_Pr+
D2+_HDMI2
JP204
R223
12K
C225
0.1uF
16V
C226
0.1uF
16V
JK208
PPJ234-02
EU
5A
[GN]O-SPRING
6A
[GN]E-LUG
4A
[GN]CONTACT
7B
[BL]E-LUG-S
5B
[BL]O-SPRING
7C
[RD]E-LUG-S
5C
[RD]O-SPRING_1
4C
[RD]CONTACT_1
5D [WH]O-SPRING
4E [RD]CONTACT_2
5E [RD]O-SPRING_2
6E [RD]E-LUG
CK+_HDMI2
TX
DSUB_G+
R234
10K
NON_EU
RP
+5V
DDC_SCL_2
+5V_ST
USB1_OCD
R291
0
ET_NET
R211
10
R229
100K
USA
JK203
SPG09-DB-009
1
2
3
4
5
6
7
8
9
10
C229
0.1uF
16V
R273
0
ET_NET
JK200-*1
YKF45-7058V
HDMI1_NON Screw
14
NC
13
CEC
5
DATA1_SHIELD
20
SHIELD
12
CLK-
11
CLK_SHIELD
2
DATA2_SHIELD
19
HPD
18
+5V_POWER
10
CLK+
4
DATA1+
1
DATA2+
17
DDC/CEC_GND
9
DATA0-
8
DATA0_SHIELD
3
DATA2-
16
SDA
7
DATA0+
6
DATA1-
15
SCL
R203
10K
SIDE_HDMI_1
HDMI_ARC
IR
R259
10K
R201
1.8K HDMI_1
COMP2_R_IN
D2+_HDMI1
JP202
R200
1K
HDMI_1
D1+_HDMI2
+5V_ST
+3.3V +5V_ST
R247
0
READY
D225
40V
B140A
PEN_TOUCH
IC207
AP2337SA-7
PEN_TOUCH
1
GND
2VOUT 3
VIN
RGB PC
SPDIF
PC AUDIO
RS232C
HDMI_1 SIDE_HDMI_2SIDE_HDMI_1
For CEC
GP4_S7LR
JACK INTERFACE
2
SWITCH ADDED
Capacitors on VBUSA should be
placed as closd to connector as possible.
10mm
$0.11
SIDE USB
COMPONENT2
2011-10-20
ETHERNET
6
1A SPEC
   
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TUNER
FE_TS_DATA[3]
FE_TS_DATA[5]
BUF1_FE_TS_DATA[3]
BUF1_FE_TS_DATA[4]
BUF1_FE_TS_DATA[0]
BUF1_FE_TS_DATA[7]
BUF1_FE_TS_DATA[1]
FE_TS_DATA[6]
BUF1_FE_TS_DATA[2]
BUF1_FE_TS_DATA[6]
FE_TS_DATA[1]
FE_TS_DATA[4]
FE_TS_DATA[2]
FE_TS_DATA[0]
FE_TS_DATA[7]
BUF1_FE_TS_DATA[5]
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
AR301
33 FNIM
AR302
33 FNIM
FE_TS_SYN
FE_TS_CLK
BUF1_FE_TS_DATA[0-7]
AR300
33 FNIM
+1.25V_TU
C301
0.1uF
16V
FNIM
FE_TS_DATA[0-7]
FE_TS_VAL_ERR BUF1_FE_TS_VAL_ERR
C300
10uF
6.3V
FNIM
BUF1_FE_TS_SYN
BUF1_FE_TS_CLK
C310
0.1uF
16V
TUNER_RESET
R313
0
READY
R30722
+3.3V_TU
Q301
MMBT3906(NXP)
E
B
C
IF_AGC_MAIN
+1.8V_TU
R308
2.2K
TU_SIF
IF_N_MSTAR
TU_SCL
C307
0.1uF
16V
RF_SWITCH
RF_SWITCH_CTL
R312
4.7K
C308
0.1uF
16V
R3030
HNIM
FE_TS_VAL_ERR
FE_TS_CLK
TU_CVBS
R311
10K
R309
2.2K
C311
0.1uF
16V
R304
0
HNIM
C302
0.1uF
16V
IF_P_MSTAR
R305
0
HNIM
FE_TS_SYN
+5V
R317
82
R310
1K
RF_SWITCH
+3.3V_TU
R30622 TU_SDA
FE_TS_DATA[0-7]
R300 0
READY
R302
0
DVB_T2
+2.5V_TU
TU303
TDSN_B001F
SBTVD
1RF_S/W_CTL
2RESET
3SCL
4SDA
5+B1[3.3V]
6SIF
7+B2[1.8V]
8CVBS
9NC_1
10 NC_2
11 NC_3
12 +B3[3.3V]
13 +B4[1.23V]
14 NC_4
15 GND
16 ERROR
17 SYNC
18 VALID
19 MCLK
20 D0
21 D1
22 D2
23 D3
24 D4
25 D5
26 D6
27 D7
28
SHIELD
TU302
TDSS-G101D
DVB_T/C
5+3.3V
11 DIF[N]
2RESET
10 DIF[P]
4SDA
1NC
9IF_AGC
8CVBS
3SCL
7+1.8V
6SIF
12
SHIELD
TU301
TDSS-H101F
ATSC
5+B1[3.3V]
11 DIF[N]
2RESET
10 DIF[P]
4SDA
1NC
9IF_AGC
8CVBS
3SCL
7+B2[1.8V]
6SIF
12
SHIELD
TU300
TDSH-T101F
DVB_T_SCA
5+B1[3.3V]
11 DIF[N]
2RESET
10 DIF[P]
4SDA
1RF_S/W_CTL
9IF_AGC
8CVBS
3SCL
7+B2[1.8V]
6SIF
12
SHIELD
C303
10uF
16V
R301
100
C304
68pF
50V
C305
68pF
50V
TU304
TDSN-G301D
DVB_T2
1NC_1
2RESET
3SCL
4SDA
5+B1[3.3V]
6SIF
7+B2[1.8V]
8CVBS
9+B3[2.5V]
10 NC_2
11 NC_3
12 +B4[3.3V]
13 +B5[1.23V]
14 NC_4
15 GND
16 ERROR
17 SYNC
18 VALID
19 MCLK
20 D0
21 D1
22 D2
23 D3
24 D4
25 D5
26 D6
27 D7
28
SHIELD
R316
470
Close to Tuner Pin
Close to Tuner Pin
Tuner block
TUNER
TDSS-G101D
TDSS-H101F
TDSH-T101F
TDSN_B001F
TDSN_G201D
TUNER OPT1 OPT2 OPT3
DVB-T/C
ATSC
DVB-T_SCA
SBTVD
DVB_T2
HNIM
HNIM
HNIM
FNIM
FNIM
RF_SW
RF_SW
X
X
X
36
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PCM_D[0]
PCM_D[1]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_A[13]
PCM_A[14]
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
BUF1_FE_TS_DATA[1]
BUF1_FE_TS_DATA[2]
BUF1_FE_TS_DATA[3]
BUF1_FE_TS_DATA[4]
BUF1_FE_TS_DATA[5]
BUF1_FE_TS_DATA[6]
BUF1_FE_TS_DATA[7]
BUF1_FE_TS_DATA[0]
A-TMA3
AUD_MASTER_CLK
C1407 0.1uF
C452 0.1uF
HNIM
B-TMDQU2
B-TMA8
C437 2.2uF
EU
C471 0.1uF
IC400-*1
LGE2111A-TE
Dvix only
GPIO36
C7
GPIO37
E6
GPIO38
F5
GPIO39
B6
GPIO40
E5
GPIO41
D5
GPIO42
B7
GPIO45
E7
GPIO46
F7
GPIO49
AB5
GPIO50
AB3
GPIO51
A9
GPIO52
F4
I2C_SCKM0/GPIO53
AB1
I2C_SDAM0/GPIO54
N6
GPIO73
AB2
GPIO74
AC2
LVA0P AB25
LVA0N AB23
LVA1P AC25
LVA1N AB24
LVA2P AD25
LVA2N AC24
LVA3P AE23
LVA3N AC23
LVA4P AC22
LVA4N AD23
LVB0P V23
LVB0N U24
LVB1P V25
LVB1N V24
LVB2P W25
LVB2N W23
LVB3P AA23
LVB3N Y24
LVB4P AA25
LVB4N AA24
LVACKP AE24
LVACKN AD24
LVBCKP Y23
LVBCKN W24
GPIO196 T25
GPIO193 U23
GPIO194 T24
GPIO195 T23
+1.10V_VDDC
B-TMDQL1
A-TMCKB
B-TMA11
RL_ON
AMP_MUTE
PCM_5V_CTL
RN
C478 2.2uF
NON_EU
R465 47
C402 0.047uF
R461 22
A-MVREFCA
IF_N_MSTAR
R453 1K
B-TMDQU3
L412
120-ohm
Main
C468
1uF
A-TMA0 C1415 0.1uF
/PCM_OE
SPDIF_OUT
A-TMDQU2
A-TMBA1
B-TMA7
RXA2+
C442
0.1uF
RXA1-
A-TMDQU5
C441
0.1uF
AC_DET
BUF1_FE_TS_DATA[0-7]
B-TMA0
A-TMA2
KEY1
R424 33
B-TMA5
C409 0.047uF
P_SDA
R402 22
EU
A-TMDQSL
D0+_HDMI1
RXB1+
RXB0+
RXACK-
R445
49.9
1%
ET_NET
DSUB_VSYNC
R421 68
B-TMDQL3
C1412 0.1uF
R428 33
EU
B-TMCK
C444 2.2uF
DDC_SCL_3
P_SCL
B-TMDQL2
B-TMDQU6
R486 100
C476 0.1uF
RXBCK-
A-TMA14
R470 22
L400
120-ohm
Main
HNIM
DDC_SDA_1
SC_RE2
R405 22
C428 0.047uF
C461
0.1uF
READY
16V
R462 22
C415 0.047uF
AMP_SDA
LED_RED
IF_P_MSTAR
CK-_HDMI3
R414 68
D0+_HDMI2
/PF_CE0
R420 33
C487
10uF
16V
READY
R467
1K
2D
CK-_HDMI1
R1400
1K
READY
R481 22
AUD_LRCK
B-TMDQSU
A-TMCK
L409
120-ohm
Main
UART_TXD
C493 0.1uF
D1-_HDMI1
10uFC1411
A-TMDQU4
C1416 0.1uF
L414
120-ohm
Main
C414 1000pF
HPD3
CEC_REMOTE_S7
SOC_RESET
A-TMDQL1
C1408 0.1uF
B-TMA14
TU_CVBS
C445 2.2uF
SCART1_MUTE
RXA4+
B-MVREFCA
A-TMRESETB
C485 0.1uF
L413
120-ohm
Main
C475 0.1uF
C434
1uF
B-TMDML
A-TMDQL4
RXB4+
C448 5pF
VCC_1.5V_DDR
AMP_SCL
C472 2.2uF
NON_EU
C1406 0.1uF
D400
KDS181
R425 68
B-TMDQSL
D1+_HDMI3
R413 33
PM_RXD
PM_TXD
A-TMA8
R431
49.9
1%
ET_NET
B-TMA2
C450
100pF
50V
HNIM
DTV/MNT_VOUT
R468
3.3K
R472
2.2K
C403 0.047uF
CI_TS_SYNC
C416 0.047uF
B-TMDQL6
D1-_HDMI3
B-TMDQU7
C404 0.047uF
L405
Main
120-ohm
C492 10uF
DSUB_B+
R418 68
C451 0.1uF
HNIM
R491
1K
1%
A-TMA6
R442
100
EU
B-TMDQL5
C433 0.1uF
R484
1K
1%
L401
BLM18SG121TN1D
/PCM_CE
/PCM_WE
A-TMA5
RXACK+
R452 0
HNIM
R403
2.4K
R456 1K READY
PWM1
B-TMCKE
R464 47
BUF1_FE_TS_VAL_ERR
AUD_SCK
C455
0.1uF
C462
0.1uF
EU
16V
10uF
C488
R408 33
R444
100
EU
A-TMA12
A-TMDQU0
SIDE_USB_DM
R482 22
RP
RXB4-
R457 1K
SCART1_Rout
+3.3V
SC1_SOG_IN
R449100
+3.3V
AUD_SCK
COMP1_R_IN
A-TMA1
10uFC474
MODEL_OPT_1
HDMI_ARC
R434
100K
COMP2_DET
IF_AGC_MAIN
AV/SC1_L_IN
C429
22uF
16V
R47922
D1-_HDMI2
R489 33
C449
0.1uF
/CI_CD2
A-TMODT
A-TMDQU1
A-TMDMU
C483 10uF
MODEL_OPT_3
C497 10uF
COMP2_Y+
B-TMDQSUB
COMP1_DET
C405 0.047uF
B-TMWEB
D2+_HDMI1
VCC_1.5V_DDR
B-TMA1
B-TMODT
CK-_HDMI2
SUB_SDA
IC400
LGE2111A-T8
GPIO36
C7
GPIO37
E6
GPIO38
F5
GPIO39
B6
GPIO40
E5
GPIO41
D5
GPIO42
B7
GPIO45
E7
GPIO46
F7
GPIO49
AB5
GPIO50
AB3
GPIO51
A9
GPIO52
F4
I2C_SCKM0/GPIO53
AB1
I2C_SDAM0/GPIO54
N6
GPIO73
AB2
GPIO74
AC2
LVA0P AB25
LVA0N AB23
LVA1P AC25
LVA1N AB24
LVA2P AD25
LVA2N AC24
LVA3P AE23
LVA3N AC23
LVA4P AC22
LVA4N AD23
LVB0P V23
LVB0N U24
LVB1P V25
LVB1N V24
LVB2P W25
LVB2N W23
LVB3P AA23
LVB3N Y24
LVB4P AA25
LVB4N AA24
LVACKP AE24
LVACKN AD24
LVBCKP Y23
LVBCKN W24
GPIO196 T25
GPIO193 U23
GPIO194 T24
GPIO195 T23
L406
120-ohm
Main
R416 68
COMP1_L_IN
C1613
0.1uF
HNIM
B-TMCKB
A-TMDQL0
TU_SIF
C473 1uF
MODEL_OPT_1
D0-_HDMI3
LGE2111A-T8
IC400
PCMDATA[0]/GPIO126
W21
PCMDATA[1]/GPIO127
AA18
PCMDATA[2]/GPIO128
AB22
PCMDATA[3]/GPIO120
AE20
PCMDATA[4]/GPIO119
AA15
PCMDATA[5]/GPIO118
AE21
PCMDATA[6]/GPIO117
AB21
PCMDATA[7]/GPIO116
Y15
PCMADR[0]/GPIO125
W20
PCMADR[1]/GPIO124
V20
PCMADR[2]/GPIO122
W22
PCMADR[3]/GPIO121
AB18
PCMADR[4]/GPIO99
AA20
PCMADR[5]/GPIO101
AA21
PCMADR[6]/GPIO102
Y19
PCMADR[7]/GPIO103
AB17
PCMADR[8]/GPIO108
Y16
PCMADR[9]/GPIO110
AB19
PCMADR[10]/GPIO114
AB20
PCMADR[11]/GPIO112
AA16
PCMADR[12]/GPIO104
AA19
PCMADR[13]/GPIO107
AC21
PCMADR[14]/GPIO106
AA17
PCMREG_N/GPIO123
Y20
PCMOE_N/GPIO113
AB15
PCMWE_N/GPIO197
AA22
PCMIORD_N/GPIO111
AD22
PCMIOWR_N/GPIO109
AD20
PCMCE_N/GPIO115
AD21
PCMIRQA_N/GPIO105
AC20
PCMCD_N/GPIO130
Y18
PCMWAIT_N/GPIO100
Y21
PCM_RESET/GPIO129
Y22
PCM2_CE_N/GPIO131
U21
PCM2_IRQA_N/GPIO132
V21
PCM2_CD_N/GPIO135
R20
PCM2_WAIT_N/GPIO133
T20
PCM2_RESET/GPIO134
U22
UART1_TX/GPIO43
D4
UART1_RX/GPIO44
E4
UART2_TX/GPIO65
N25
UART2_RX/GPIO64
N24
UART3_TX/GPIO47
B8
UART3_RX/GPIO48
A8
I2C_SCKM2/DDCR_CK/GPIO72
P23
I2C_SDAM2/DDCR_DA/GPIO71
P24
DDCA_DA/UART0_TX
D2
DDCA_CK/UART0_RX
D1
PWM0/GPIO66
P21
PWM1/GPIO67
N23
PWM2/GPIO68
P22
PWM3/GPIO69
R21
PWM4/GPIO70
P20
PWM_PM/GPIO199
F6
SAR0/GPIO31
H6
SAR1/GPIO32
G5
SAR2/GPIO33
G4
SAR3/GPIO34
J5
SAR4/GPIO35
J4
VSYNC_LIKE/GPIO145
R23
SPI1_CK/GPIO201
R24
SPI1_DI/GPIO202
R25
SPI2_CK/GPIO203
T21
SPI2_DI/GPIO204
T22
NF_CE1Z/GPIO138 AE18
NF_WPZ/GPIO198 AC17
NF_CEZ/GPIO137 AD18
NF_CLE/GPIO136 AC18
NF_REZ/GPIO139 AC19
NF_WEZ/GPIO140 AD17
NF_ALE/GPIO141 AE17
NF_RBZ/GPIO142 AD19
GPIO_PM[0]/GPIO6 H5
PM_UART_TX/GPIO_PM[1]/GPIO7 K6
GPIO_PM[2]/GPIO8 K5
GPIO_PM[3]/GPIO9 J6
GPIO_PM[4]/GPIO10 K4
PM_UART_RX/GPIO_PM[5]/GPIO11 L6
PM_SPI_SCZ1/GPIO_PM[6]/GPIO12 C2
GPIO_PM[7]/GPIO13 L5
GPIO_PM[8]/GPIO14 M6
GPIO_PM[9]/GPIO15 M5
PM_SPI_SCZ2/GPIO_PM[10]/GPIO16 C1
GPIO_PM[11]/GPIO17 M4
PM_SPI_SCK/GPIO1 A2
PM_SPI_CZ0/GPIO_PM[12]/GPIO0 D3
PM_SPI_SDI/GPIO2 B2
PM_SPI_SDO/GPIO3 B1
TS0CLK/GPIO87 Y14
TS0VALID/GPIO85 AA10
TS0SYNC/GPIO86 Y12
TS0DATA_[0]/GPIO77 Y13
TS0DATA_[1]/GPIO78 Y11
TS0DATA_[2]/GPIO79 AA12
TS0DATA_[3]/GPIO80 AB12
TS0DATA_[4]/GPIO81 AA14
TS0DATA_[5]/GPIO82 AB14
TS0DATA_[6]/GPIO83 AA13
TS0DATA_[7]/GPIO84 AB11
TS1CLK/GPIO98 AC15
TS1VALID/GPI96 AD15
TS1SYNC/GPIO97 AC16
TS1DATA_[0]/GPIO88 AD16
TS1DATA_[1]/GPIO89 AE15
TS1DATA_[2]/GPIO90 AE14
TS1DATA_[3]/GPIO91 AC13
TS1DATA_[4]/GPIO92 AC14
TS1DATA_[5]/GPIO93 AD12
TS1DATA_[6]/GPIO94 AD13
TS1DATA_[7]/GPIO95 AD14
+3.3V
C446 2.2uF
USB1_OCD
L402
120-ohm
Main
B-TMBA2
R483
1K
1%
B-TMBA0
C435
0.1uF
HNIM
A-TMDML
AV/SC1_DET
R439 1K READY
C426
0.1uF
ET_NET
D2-_HDMI3
C467
1000pF
TOUCH_VER_CHK
AUD_MASTER_CLK
C1419
0.1uF
READY
16V
B-TMA9
A-TMCKE
C470
0.1uF
B-TMBA1
C440
0.1uF
RF_SWITCH_CTL
COMP2_Pb+
RXB3-
R401
1K
FHD
B-TMA3
BUF1_FE_TS_CLK
R436
10
SC1_FB
C422 0.047uF
C456
100pF
50V
READY
R419
1K
HD
PCM_RST
/CI_CD1
C443 2.2uF
D1+_HDMI1
R412 0
+2.5V
CK+_HDMI3
10uFC1413
R1407
63.4
READY
C464
1000pF
B-TMDQU5
R477 22
C431
4.7uF
PC_L_IN
D2+_HDMI3
C498 10uF
L403
120-ohm
Main
PWM0
DDC_SCL_2
COMP2_L_IN
C407 1000pF
C1418 0.1uF
R441
1M
AR401 22
1/16W
A-TMDQSUB
R460
49.9
1%
ET_NET
SUB_SCL
R447 1K READY
C454
10uF
A-TMDQU3
C1612
0.047uF
25V
HNIM
B-TMA10
B-TMDQL7 C494 0.1uF
R454 1KREADY
R406 33
/F_RB
COMP2_R_IN
RXB3+
MODEL_OPT_3
C438 2.2uF
EU
R466
3.3K
R430
1K
3D
SC_RE1
C459
100pF
50V
HNIM
A-TMDQU7
TU_SDA
A-TMA11
C413 0.047uF
RXA3+
R404 22
C423 0.047uF
EU
TUNER_RESET
A-TMA13
S7_TXD
C425 0.1uF
AV/SC1_CVBS_IN
A-TMBA2
R478 22
B-TMDQL0
DISP_EN
R400
10K
+3.3V
C436
0.1uF
B-TMA4
A-TMCASB
LGE2111A-T8
IC400
AVDDLV_USB
K12
VDDC_1
G9
VDDC_2
H9
VDDC_3
K10
VDDC_4
K11
VDDC_5
L10
VDDC_6
M12
VDDC_7
M13
VDDC_8
N12
VDDC_9
P14
VDDC_10
P15
VDDC_11
R10
VDDC_12
R14
VDDC_13
R15
VDDC_14
T10
AVDD1P0
P10
FB_CORE
P19
AVDDL_MOD
R16
AVDD10_LAN
L11
DVDD_DDR
M14
AVDD2P5_ADC_1
W9
AVDD2P5_ADC_2
W10
AVDD2P5_ADC_3
W11
AVDD25_REF
W12
AVDD25_LAN
Y17
AVDD_MOD_1
V18
AVDD_MOD_2
U19
AVDD25_PGA
W14
AVSS_PGA
W15
AVDD_NODIE
U7
AVDD_DVI_USB_1
L7
AVDD_DVI_USB_2
M7
AVDD3P3_MPLL
P7
AVDD_DMPLL
R7
DVDD_NODIE
M19
AVDD_AU33
V7
AVDD_EAR33
W7
VDDP_1
R19
VDDP_2
T19
AVDD_LPLL_1
W18
AVDD_LPLL_2
W19
VDDP_NAND
V19
AVDD_DDR0_D_1
J17
AVDD_DDR0_D_2
K15
AVDD_DDR0_D_3
K16
AVDD_DDR0_C
L15
AVDD_DDR1_D_1
K17
AVDD_DDR1_D_2
L17
AVDD_DDR1_D_3
M17
AVDD_DDR1_C
L16
GND_EFUSE
E9
GND_1
A23
GND_2
B17
GND_3
C23
GND_4
A5
GND_5
C11
GND_6
C19
GND_7
C22
GND_8
D14
GND_9
D18
GND_10
D19
GND_11
E17
GND_12
E18
GND_13
E19
GND_14
E22
GND_15
F8
GND_16
F17
GND_17
F18
GND_18
F19
GND_19
G8
GND_20
H8
GND_21
N22
GND_22
N21
GND_23
N20
GND_24
M22
GND_25
M21
GND_26
M20
GND_27
F10
GND_28
V15
GND_29
W16
GND_30
V8
GND_31
T18
GND_32 G10
GND_33 G11
GND_34 G12
GND_35 G13
GND_36 G14
GND_37 G17
GND_38 G18
GND_39 G19
GND_40 G24
GND_41 H11
GND_42 H12
GND_43 H13
GND_44 H14
GND_45 H15
GND_46 H16
GND_47 H17
GND_48 H18
GND_49 H19
GND_50 J9
GND_51 J10
GND_52 J11
GND_53 J12
GND_54 J13
GND_55 J14
GND_56 J15
GND_57 J16
GND_58 J18
GND_59 J19
GND_60 J25
GND_61 K9
GND_62 K13
GND_63 K14
GND_64 H10
GND_65 K18
GND_66 K19
GND_67 K22
GND_68 L8
GND_69 L9
GND_70 J8
GND_71 L12
GND_72 L13
GND_73 L18
GND_74 L19
GND_75 M8
GND_76 K8
GND_77 M10
GND_78 M11
GND_79 L14
GND_80 M15
GND_81 M16
GND_82 M18
GND_83 M25
GND_84 N10
GND_85 N11
GND_86 N13
GND_87 N14
GND_88 N15
GND_89 N16
GND_90 N17
GND_91 N19
GND_92 K7
GND_93 P8
GND_94 P9
GND_95 M9
GND_96 P11
GND_97 P13
GND_98 P16
GND_99 P17
GND_100 P18
GND_101 P12
GND_102 R8
GND_103 R9
GND_104 R11
GND_105 R12
GND_106 R13
GND_107 R17
GND_108 T8
GND_109 T9
GND_110 N7
GND_111 T11
GND_112 T12
GND_113 T13
GND_114 T14
GND_115 T15
GND_116 T16
GND_117 T17
GND_118 U8
GND_119 U9
GND_120 U10
GND_121 U11
GND_122 U12
GND_123 U13
GND_124 U14
GND_125 U15
GND_126 U16
GND_127 U17
GND_128 R18
GND_129 V9
GND_130 V10
GND_131 V11
GND_132 V12
GND_133 V14
GND_134 V17
GND_135 T7
GND_136 E8
HPD2
B-TMDQU1
A-TMDQL2
R497 100
HNIM
C460
100pF
50V HNIM
SIDE_USB_DP
R409 68
C401 0.047uF
RXA3-
C432 0.1uF
R480
22
B-TMCASB
R488 100
C465
0.1uF
RXA0-
LGE2111A-T8
IC400
A_DDR3_A[0]
A11
A_DDR3_A[1]
C14
A_DDR3_A[2]
B11
A_DDR3_A[3]
F12
A_DDR3_A[4]
C15
A_DDR3_A[5]
E12
A_DDR3_A[6]
A14
A_DDR3_A[7]
D11
A_DDR3_A[8]
B14
A_DDR3_A[9]
D12
A_DDR3_A[10]
C16
A_DDR3_A[11]
C13
A_DDR3_A[12]
A15
A_DDR3_A[13]
E11
A_DDR3_A[14]
B13
A_DDR3_BA[0]
F13
A_DDR3_BA[1]
B15
A_DDR3_BA[2]
E13
A_DDR3_MCLK
C17
A_DDR3_MCLKZ
A17
A_DDR3_MCLKE
B16
A_DDR3_ODT
E14
A_DDR3_RASZ
B12
A_DDR3_CASZ
A12
A_DDR3_WEZ
C12
A_DDR3_RESET
F11
A_DDR3_DQSL
B19
A_DDR3_DQSLB
C18
A_DDR3_DQSU
B18
A_DDR3_DQSUB
A18
A_DDR3_DQML
E15
A_DDR3_DQMU
A21
A_DDR3_DQL[0]
D17
A_DDR3_DQL[1]
G15
A_DDR3_DQL[2]
B21
A_DDR3_DQL[3]
F15
A_DDR3_DQL[4]
B22
A_DDR3_DQL[5]
F14
A_DDR3_DQL[6]
A22
A_DDR3_DQL[7]
D15
A_DDR3_DQU[0]
G16
A_DDR3_DQU[1]
B20
A_DDR3_DQU[2]
F16
A_DDR3_DQU[3]
C21
A_DDR3_DQU[4]
E16
A_DDR3_DQU[5]
A20
A_DDR3_DQU[6]
D16
A_DDR3_DQU[7]
C20
B_DDR3_A[0] B23
B_DDR3_A[1] D25
B_DDR3_A[2] F22
B_DDR3_A[3] G22
B_DDR3_A[4] E24
B_DDR3_A[5] F21
B_DDR3_A[6] E23
B_DDR3_A[7] D22
B_DDR3_A[8] D24
B_DDR3_A[9] D21
B_DDR3_A[10] C24
B_DDR3_A[11] C25
B_DDR3_A[12] F23
B_DDR3_A[13] E21
B_DDR3_A[14] D23
B_DDR3_BA[0] G20
B_DDR3_BA[1] F24
B_DDR3_BA[2] F20
B_DDR3_MCLK G25
B_DDR3_MCLKZ G23
B_DDR3_MCLKE F25
B_DDR3_ODT D20
B_DDR3_RASZ B25
B_DDR3_CASZ B24
B_DDR3_WEZ A24
B_DDR3_RESET E20
B_DDR3_DQSL K24
B_DDR3_DQSLB K25
B_DDR3_DQSU J21
B_DDR3_DQSUB J20
B_DDR3_DQML H24
B_DDR3_DQMU L20
B_DDR3_DQL[0] L23
B_DDR3_DQL[1] J24
B_DDR3_DQL[2] L24
B_DDR3_DQL[3] J23
B_DDR3_DQL[4] M24
B_DDR3_DQL[5] H23
B_DDR3_DQL[6] M23
B_DDR3_DQL[7] K23
B_DDR3_DQU[0] G21
B_DDR3_DQU[1] L22
B_DDR3_DQU[2] H22
B_DDR3_DQU[3] K20
B_DDR3_DQU[4] H20
B_DDR3_DQU[5] L21
B_DDR3_DQU[6] H21
B_DDR3_DQU[7] K21
GND
R443
49.9
1%
ET_NET
C430
0.1uF
16V
5V_ON
R448 1K
R438
1K
R492
1K
1%
R422 33
C400
1000pF
READY 50V
RXA4-
RGB_DDC_SCL
B-TMA6
C1409 10uF
IC400
LGE2111A-T8
RXACKP
J2
RXACKN
J3
RXA0P
K3
RXA0N
J1
RXA1P
K2
RXA1N
K1
RXA2P
L2
RXA2N
L3
DDCDA_DA/GPIO24
T5
DDCDA_CK/GPIO23
T4
HOTPLUGA/GPIO19
V5
HOTPLUGB/GPIO20
R5
RXCCKP
AE9
RXCCKN
AC9
RXC0P
AC10
RXC0N
AD9
RXC1P
AC11
RXC1N
AD10
RXC2P
AE11
RXC2N
AD11
DDCDC_DA/GPIO28
AE8
DDCDC_CK/GPIO27
AD8
HOTPLUGC/GPIO21
AC8
RXDCKP
F2
RXDCKN
F3
RXD0P
G3
RXD0N
F1
RXD1P
G2
RXD1N
G1
RXD2P
H2
RXD2N
H3
DDCDD_DA/GPIO30
R6
DDCDD_CK/GPIO29
U6
HOTPLUGD/GPIO22
P5
CEC/GPIO5
R4
HSYNC0
P2
VSYNC0
R3
RIN0P
N2
RIN0M
P3
GIN0P
N3
GIN0M
N1
BIN0P
M3
BIN0M
M2
SOGIN0
M1
HSYNC1
V2
VSYNC1
V3
RIN1P
U3
RIN1M
U2
GIN1P
T1
GIN1M
T2
BIN1P
R2
BIN1M
R1
SOGIN1
T3
HSYNC2
AA2
RIN2P
Y2
RIN2M
AA3
GIN2P
W2
GIN2M
Y3
BIN2P
V1
BIN2M
W3
SOGIN2
W1
CVBS0
AA8
CVBS1
Y4
CVBS2
W4
CVBS3
AA5
CVBS4
Y5
CVBS5
AA4
CVBSOUT0
Y6
CVBSOUT1
AA1
VCOM
AB4
VIFP AC4
VIFM AD3
IP AC3
IM AE3
SIFP AD4
SIFM AC5
IF_AGC AD2
RF_AGC AE2
I2C_SCKM1/GPIO75 AE6
I2C_SDAM1/GPIO76 AD6
XIN AD1
XOUT AC1
SPDIF_IN/GPIO152 D7
SPDIF_OUT/GPIO153 D6
USB0_DM E3
USB0_DP E2
USB1_DM AC12
USB1_DP AE12
I2S_IN_BCK/GPIO150 C8
I2S_IN_SD/GPIO151 D8
I2S_IN_WS/GPIO149 D9
I2S_OUT_BCK/GPIO156 B10
I2S_OUT_MCK/GPIO154 C9
I2S_OUT_SD/GPIO157 B9
I2S_OUT_WS/GPIO155 C10
AUL0 AB9
AUR0 AA11
AUL1 Y9
AUR1 AA9
AUL2 AA7
AUR2 AB8
AUL3 Y8
AUR3 Y10
AUL4 AC7
AUR4 AD7
AUOUTL0 W6
AUOUTL2 V6
AUOUTL3 V4
AUOUTR0 Y7
AUOUTR2 W5
AUOUTR3 U5
AUVRM AD5
AUVAG AE5
AUVRP AC6
EARPHONE_OUTL AA6
EARPHONE_OUTR AB6
ET_RXD[0]/RP/GPIO60 C6
ET_TXD[0]/TP/GPIO57 C5
ET_RXD[1]/RN/GPIO63 A6
ET_TXD[1]/LED1/GPIO56 C4
ET_TX_CLK/TN/GPIO59 B5
ET_TX_EN/GPIO58 C3
ET_MDC/GPIO61 A3
ET_MDIO/GPIO62 B3
ET_COL/LED0/GPIO55 B4
IRIN/GPIO4 N4
ARC0 T6
HWRESET N5
SC1_B+/COMP1_Pb+
B-TMDQU4
C1410 10uF
R455 1K READY
C469 0.1uF
C463
0.1uF
C453
0.1uF
DDC_SCL_1
TU_SCL
A-TMDQL3
FB_CORE
LED_RED
PF_ALE
/PF_WE
/PF_OE
C412 0.047uF
AR400 22
1/16W
D1+_HDMI2
/PCM_WAIT
C406 0.047uF
10uFC484
B-TMA13
R1406
150
READY
D0-_HDMI2
/PCM_IORD
DDC_SDA_3
RXB0-
C486 0.1uF
R423 68
+1.5V_DDR_IN
A-TMA9
C447 5pF
+3.3V_ST
A-TMDQSU
R446 10K
HNIM RXA1+
C439
0.1uF
X400
24MHz
4
GND_2
1 X-TAL_1 2 GND_1
3
X-TAL_2
A-TMDQL5
AV2_DET
SOC_RESET
R450
100
HNIM
C411 0.047uF
R432 22
READY
+3.3V
R429 33
I2C_SDA
PCM_A[0-14]
RXA0+
/PCM_IOWR
CK+_HDMI1
A-TMA7
R471
2.2K
SC1_ID
R426 0
5V_DET_HDMI_2
DDC_SDA_2
D2-_HDMI2
R451 100
HNIM
CK+_HDMI2
R45822 EU
D0-_HDMI1
A-TMRASB
R433 68
SPI_SDI
A-TMA4
C410 0.047uF
TN
DSUB_G+
SC1_G+/COMP1_Y+
RGB_DDC_SDA
D2+_HDMI2 C457
1000pF
READY
50V
10uFC482
D0+_HDMI3
C408 0.047uF
R410 33
AUD_LRCH
C419 0.047uF
SCART1_Lout
COMP2_Pr+
R463 1K
RXBCK+
R1401
1K
READY
C424 0.047uF
DSUB_R+
C417 0.047uF
TX
C421 1000pF
B-TMA12
D2-_HDMI1
TP
CI_TS_DATA[0-7]
C1417 10uF
HPD1
R487 33
C458
0.1uF
ET_NET
RF_SWITCH_CTL
/PF_WP
5V_DET_HDMI_1
SPI_SCK
A-TMDQL6
A-TMWEB
/SPI_CS
R411 68
/FLASH_WP
BUF1_FE_TS_SYN
B-TMDQSLB
R407 68
+5V
CI_TS_CLK
1uFC479
R427 33
RXB2+
/PF_CE1
/PCM_REG
PWM1
S7_RXD
R476
10K
EU
AV/SC1_R_IN
I2C_SCL
CI_TS_VAL
R45922
EU
5V_DET_HDMI_3
C418 0.047uF
/PCM_IRQA
R498 0
NON_EU
R490 33
R473
10K
EU
SPI_SDO
R469 22
R437
0
READY
RXB1-
+3.3V
L408
120-ohm
Main
DSUB_HSYNC
UART_RXD
PC_R_IN
B-TMRASB
R415 33
PWM0
B-TMRESETB
B-TMDQL4
RXB2-
C477 0.1uF
R417 33
A-TMBA0
A-TMA10
A-TMDQL7
PCM_D[0-7]
DSUB_DET
A-TMDQU6
B-TMDMU
B-TMDQU0
A-TMDQSLB
COMP2_Y+
KEY2
C420 0.047uF
C427 10uF
C466
1000pF
CI_DET
+3.3V_ST
SC1_R+/COMP1_Pr+
R440 1K
RXA2-
ERROR_DET
AMP_RESET_N
USB1_CTL
IC400-*2
LGE2111A-TE SPIL
USA_SPIL_MAIN IC
GPIO36
C7
GPIO37
E6
GPIO38
F5
GPIO39
B6
GPIO40
E5
GPIO41
D5
GPIO42
B7
GPIO45
E7
GPIO46
F7
GPIO49
AB5
GPIO50
AB3
GPIO51
A9
GPIO52
F4
I2C_SCKM0/GPIO53
AB1
I2C_SDAM0/GPIO54
N6
GPIO73
AB2
GPIO74
AC2
LVA0P AB25
LVA0N AB23
LVA1P AC25
LVA1N AB24
LVA2P AD25
LVA2N AC24
LVA3P AE23
LVA3N AC23
LVA4P AC22
LVA4N AD23
LVB0P V23
LVB0N U24
LVB1P V25
LVB1N V24
LVB2P W25
LVB2N W23
LVB3P AA23
LVB3N Y24
LVB4P AA25
LVB4N AA24
LVACKP AE24
LVACKN AD24
LVBCKP Y23
LVBCKN W24
GPIO196 T25
GPIO193 U23
GPIO194 T24
GPIO195 T23
IC400-*3
LGE2111A-T8 SPIL
EU_SPIL_MAIN IC
GPIO36
C7
GPIO37
E6
GPIO38
F5
GPIO39
B6
GPIO40
E5
GPIO41
D5
GPIO42
B7
GPIO45
E7
GPIO46
F7
GPIO49
AB5
GPIO50
AB3
GPIO51
A9
GPIO52
F4
I2C_SCKM0/GPIO53
AB1
I2C_SDAM0/GPIO54
N6
GPIO73
AB2
GPIO74
AC2
LVA0P AB25
LVA0N AB23
LVA1P AC25
LVA1N AB24
LVA2P AD25
LVA2N AC24
LVA3P AE23
LVA3N AC23
LVA4P AC22
LVA4N AD23
LVB0P V23
LVB0N U24
LVB1P V25
LVB1N V24
LVB2P W25
LVB2N W23
LVB3P AA23
LVB3N Y24
LVB4P AA25
LVB4N AA24
LVACKP AE24
LVACKN AD24
LVBCKP Y23
LVBCKN W24
GPIO196 T25
GPIO193 U23
GPIO194 T24
GPIO195 T23
CLose to Saturn7M IC CLose to Saturn7M IC
VDD33_T/VDDP/U3_VD33_2:47mA
VDDC : 2026mA
AU33:31mA
AVDD33
AVDD25_PGA:13mA
AVDD_DDR1:55mA
AVDD_DDR0:55mA
AVDD2P5:172mA
VDD33_NAND
MIUVDDC
VIDEO/AUDIO
4
GP4_S7LR
MAIN
LVDS
DDR
POWER
SOC_RESET
2011-10-20
AVDD_NODIE:7.362mA
<LM1 CHIP Config>
(AUD_SCK,AUD_MASTER_CLK,PWM1,PWM0)
B51_NO_EJ : 4’b0000 Boot from 8051 with SPI flash
SB51_WOS : 4’b0001 Secure B51 without scramble
SB51_WS : 4’b0010 Secure B51 with scramble
MIPS_SPI_NO_EJ : 4’b0100 Boot from MIPS with SPI flash
MIPS_SPI_EJ_1 : 4’b0101 Boot from MIPS with SPI flash
MIPS_SPI_EJ_2 : 4’b0110 Boot from MIPS with SPI flash
MIPS_WOS : 4’b1001 Secure MIPS without scramble
MIPS_WO : 4’b1010 Secure MIPS with scramble
Close to the Main IC
Close to the Main IC
Close to the Main IC
Close to the Main IC
Close to the Main IC
Close to the Main IC
2D
MODEL_OPT_1 3D
HIGH
MODEL OPTION
PIN NAME LOW
A9
PIN NO.
ARC
ETH_LED1
ETH_LED0
FHD HDF4
MODEL_OPT_2
6
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
B-MVREFDQ
PCM_A[0]
PCM_A[4]
PCM_A[1]
PCM_A[7]
PCM_A[2]
PCM_A[6]
PCM_A[5]
PCM_A[3]
A-MVREFDQ
DISP_EN
R542
10K
RXB0-
R573
22
C511 0.1uF
C509 0.1uF
K4B1G1646G-BCH9
IC500-*3
SS_1G_1333
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
B-TMDQL7
B-TMDQU4
A-TMA14
B-TMDQL6
C520
10pF
50V
SPI_SDI
R569
4.7K
READY
K4B2G1646C
IC501-*4
SS_2G_1333
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
C554
10uF
10V
RXA3-
A-TMDQU0
R514
22
RXB1+
+3.3V_ST
A-TMDQSUB
B-TMA4
I2C_SCL
R536 0
A-TMA3
B-TMDQU6
/SPI_CS
RXACK-
B-TMDQL3
RXA3-
+1.5V_DDR_IN
/PF_CE1
R539
4.7K
RXA0-
RXB4-
C555
0.1uF
RXA1+
RXB0+
H5TQ1G63DFR-PBC
IC501-*1
Hynix_1G_1600
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
A15
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
A-TMA1
A-TMODT
C513 0.1uF
RXB4+
A-TMA9
+3.3V
A-TMDQL3
A-TMDQL4
B-TMA0
A-TMDQL1
B-TMBA1
C502
1000pF
R509
56
1%
R500
1K
1%
+3.3V_ST
P500
104060-8017
FHD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
RXB3+
B-TMCKE
C510 0.1uF
A-TMA12
R567
1K
A-TMDQL2
C506 10uF
R506
10K
R508
56
1%
A-TMBA2
+3.3V_ST
RXA1-
IC505
W25Q80BVSSIG
3
%WP[IO2]
2
DO[IO1]
4
GND
1
CS
5DI[IO0]
6CLK
7HOLD[IO3]
8VCC
I2C_SDA
PF_ALE
RXB2-
C527 0.1uF
R510
56
1%
RXB2+
A-TMCKE
A-TMDQU4
C528 0.1uF
KEY1
RXACK+
R503
1K
1%
C515 0.1uF
RXB1+
R504
240
1%
A-TMDQL7
K4B1G1646G-BCH9
IC501-*3
SS_1G_1333
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
A-TMDQSU
B-TMDQSU
VCC_1.5V_DDR
/PF_OE
B-TMDQL1
R538
4.7K
SPI_SCK
I2C_SCL
A-TMA7
C535
220pF
50V
B-TMDQL0
A-MVREFCA
A-TMBA1
A-TMA10
C545
0.1uF
16V
C547
0.1uF
16V
RXB4-
RXBCK+
C501
0.1uF
+3.3V
R516
100
VCC_1.5V_DDR
RXB3+
A-TMDQL6
A-TMWEB
RXB2+
RXA4-
B-TMA8
B-TMA9
AR519
22
A-TMDQU6
RXACK+
B-TMDQSUB
R565
1K
A-TMA0
A-TMA8
A-TMDQU2
A-TMA4
RXA3+
B-TMDQL2
B-TMA7
RXA2-
C507 0.1uF
PC_SER_DATA
A-TMCASB
R507
10K
A-TMDQSL
B-TMA3
R575
33
RXBCK-
R574
22
C552
0.1uF
R576 0
READY
K4B1G1646G-BCK0
IC500-*2
SS_1G_1600
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
B-TMDQU7
B-TMDQU3
B-TMRASB
C533 0.1uF
C522
10pF
50V
READY
RXA4+
B-TMA6
A-TMA2
VCC_1.5V_DDR
B-TMA10
/PF_CE0
PC_SER_CLK
C530 0.1uF
RXA2-
A-TMDQU7
R515
4.7K
USA
C544
10uF
10V
C526 0.1uF
C542
0.01uF
50V
I2C_SDA
C500
0.1uF
C525 0.1uF
A-TMDQU1
C508 0.1uF
RXA0+
/PF_WP
P_SDA
RXB0+
C531 0.1uF
B-TMDML
B-TMBA2
C543
0.01uF
50V
B-TMA11
IC502
CAT24C08WI-GT3-H-RECV(TV)
READY
3
A2
2
NC_2
4
VSS
1
NC_1
5SDA
6SCL
7WP
8VCC
R511
56
1%
C514 0.1uF
R502
1K
1%
RXB2-
B-TMODT
A-TMDMU
+3.3V_ST
RXA4-
A-TMA11
B-TMDQU1
A-TMDML
RXB1-
IC504
H27U1G8F2BTR-BC
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16 24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
A-TMA13
H5TQ1G63DFR-H9C
IC501
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
H5TQ1G63DFR-H9C
IC500
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
VCC_1.5V_DDR
P501
12507WS-08L
1
2
3
4
5
6
7
8
9
B-TMRESETB
C523
10pF
50V
READY
B-MVREFCA
+3.3V
RXBCK+
UART_RXD
A-TMDQU5
RXB3-
PCM_A[0-7]
RXB3-
/FLASH_WP
RXA0-
R540
10K
RXB4+
R505
240
1%
RXBCK-
A-TMRESETB
IC505-*1
MX25L8006EM2I-12G
MX
3
WP#
2
SO/SIO1
4
GND
1
CS#
5SI/SIO0
6SCLK
7HOLD#
8VCC
IR
C517
10pF
50V
RXA2+
RXACK-
R520
100
B-TMA12
SUB_SDA
R563
4.7K
R568
4.7K
RXB0-
RXA3+
KEY2
/F_RB
R561
0
B-TMCKB
RXA4+
C556
0.1uF
A-TMBA0
P_SCL
B-TMWEB
K4B2G1646C
IC500-*4
SS_2G_1333
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
H5TQ1G63DFR-PBC
IC500-*1
Hynix_1G_1600
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
A15
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
RXA1+
B-TMDQL4
C529 0.1uF
R571
22
SPI_SDO
C534
220pF
50V
B-TMBA0
B-TMDQSL
R572
22
A-TMDQU3
B-TMDQL5
L500
Main
500
C503
1000pF
B-TMA1
R537 0
R518
100
B-TMA2
B-TMA13
R566
1K
READY
B-TMA14
A-TMA5
RXA1-
R556
3.3K
SUB_SCL
RXB1-
R517
100
C512 0.1uF
R519
100
B-TMDMU
IC504-*1
K9F1G08U0D-SCB0
SS
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16 24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
B-TMDQU0
B-TMCASB
C550
0.1uF
RXA0+
A-TMDQL0
A-TMDQL5
LED_RED
A-TMCK
C524 10uF
AR518
22
A-TMDQSLB
C532 0.1uF
+3.3V_ST
+3.3V_ST
/PF_WE
+3.3V_ST
R501
1K
1%
R570
4.7K
RXA2+
K4B1G1646G-BCK0
IC501-*2
SS_1G_1600
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
R558
0
VCC_1.5V_DDR
UART_TXD
P503
TF05-51S
HD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
+3.3V
B-TMDQU2
B-TMDQSLB
B-TMA5
B-TMCK
A-TMA6
B-TMDQU5
R564
10K
A-TMCKB
A-TMRASB
IC503
AT24C256C-SSHL-T
3
A2
2
A1
4
GND
1
A0
5SDA
6SCL
7WP
8VCC
IC503-*1
R1EX24256BSAS0A
Renesas_IC503
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
D500
KDS184
A2
C
A1
+5V
R513 4.7K
R579
2K
R577 4.7K
LD500
R578
47K
D500*-1
MMBD6100
MULTI
A2
C
A1
+5V
R512 4.7K
Q500
MMBT3904(NXP)
E
B
C
ZD507
5.48VTO5.76V
ZD500
5.48VTO5.76V
ZD506
5.48VTO5.76V
ZD501
5.48VTO5.76V ZD502
5.48VTO5.76V
ZD504
5.48VTO5.76V
ZD503
5.48VTO5.76V
ZD505
5.48VTO5.76V
Memory.LVDS,IR
GP4_S7LR
5
HDCP EEPROM
8KBit
Addr:10101--
EEPROM
1MBit
A0’h
SERIAL FLASH
8MBit
2011-10-20
NAND Flash
1GBit
DDR3 Memory
1GBit x 2
LVDS Key/IR
* LCI: LVDS Connection Indicator
6
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THERMAL
THERMAL
THERMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C665 0.1uF 50V
R620
1
FNIM
Q600
MMBT3904(NXP)
READY
E
B
C
C673
0.22uF
50V
IC606
STA368BWG
26
GND_PLL
27
XTI
28
BICKI
29
LRCKI
30
SDI
31
RESET
32
INT_LINE
33
SDA
34
SCL
35
GND_DIG_2
36
VDD_DIG_2
17 OUT3B/FFX3B
3TEST_MODE
6OUT2B
16 CONFIG
15 VDD
14 GND_REG
13 OUT1A
12 GND1
11 VCC1
10 OUT1B
9OUT2A
8VCC2
7GND2
4VSS
5VCC_REG
2SA
21
VDD_DIG_1
1GND_SUB
20
TWARN/OUT4A
19
EAPD/OUT4B 18 OUT3A/FFX3A
23
PWRDN
24
VDD_PLL
25
FILTER_PLL
22
GND_DIG_1
37
[EP]GND
P_17V
R646
22
DCON_EN
+5V_ST
R625
2.2
R654
51K
1%
IC605
TPS65253RHDR
1
ROSC
3
CMP1
7
BST1
9LX1_1
10 LX1_2
11 LX2_1
12 LX2_2
13 VIN2
14 BST2
15 EN2 16 RLIM2 17 SS2 18 CMP2 19 FB2 20 LOW_P 21 V7V
22
V3V
23
GND_1
24
PGOOD
25
GND_2
26
GND_3
27
GND_4
28
GND_5
5
RLIM1
8VIN1
6
EN1
4
SS1
2
FB1 29
[EP]GND
C679
1000pF
50V
R686
39
L612
10.0uH
+3.3V_ST
R640
22
C680
1000pF
50V
C655
0.047uF
25V
IC600
AP2121N-3.3TRE1
1
GND
2VOUT 3
VIN
C642 0.01uF
R685
39
L608
NR5040T3R3N
C621
0.1uF
50V
C667
0.1uF
50V
AMP_SDA
+3.3V
AMP_RESET_N C668
68uF
35V
L600
120
L611
10.0uH
AC_DET
IC603
TPS54327DDAR
3
VREG5
2
VFB
4
SS
1
EN
5GND
6SW
7VBST
8VIN
9
[EP]GND
FB_CORE
RL_ON
+3.3V
R647 100K
C669
330pF
50V
C633
0.1uF
16V
R636
0
READY
R630
3K
1%
C635
22pF
50V
READY
R688
39
+3.3V
AMP_MUTE
AUD_SCK
R627
10K
READY
L610
10.0uH
C644
22pF
50V
READY
C672
0.22uF
50V
AC_DET
AMP_SCL
C675
0.22uF
50V
R619
17.4K
1%
R687
39
R644
22
C663 0.1uF 50V
R648 120K
R658
0
READY
R639
10K
R643
22
C652
0.047uF
25V
R631
390K
1%
C678
1000pF
50V
L613
120-ohm
2A
DVB_T2
C640
22pF
50V
READY
P_17V
P601
SMAW250-H04R
1
2
3
4
ERROR_DET
R645
22
IC602
AP1117EG-13
FNIM
ADJ/GND
OUTIN
C646
0.1uF
50V
P_17V
C681
1000pF
50V
R642
22
C660
0.1uF
50V
C628
4700pF
50V
C639
22pF
50V
READY
R661
10K
+1.25V_TU
+1.8V_TU
R624 2K
5V_ON
C649 0.01uF
R622
0
R656
47K
1%
C677
0.22uF
50V
AUD_MASTER_CLK
DCON_EN
R635 10K
C674
0.22uF
50V
DCON_EN
L606 CIS21J121
+3.3V
R655
100K
1%
+5V
R657
43K
1%
C643
0.1uF
50V
R633
10K
R626
0
C620
10uF
25V
P600
SMAW200-H18S1
14
9
4
18
13
8
3
17
12
7
2
16
11
6
1
15
10
5
19
R634
56K
R650
33K
R666
4.7
READY
R617
59K
1%
R662
56K
R649 33K
C676
0.22uF
50V
C659
0.1uF
50V
C638
0.1uF
50V
C670
330pF
50V
R628
10K
READY
C664 1uF 25V
+3.3V
R641
22
+3.3V_TU
L609
10.0uH
R637
0
L604
120-ohm
2A
+3.3V_ST
+5V_ST
+2.5V
C647
680pF
50V
C637
4700pF
50V
R638
22
+5V
L605
NR5040T2R2N
2.2uH
+2.5V_TU
R621
1
R6292K
L607
NR5040T3R3N
+1.10V_VDDC
IC601
TJ3940S-2.5V-3L
1
GND
2VOUT 3
VIN
AUD_LRCH
IC604
AZ1117BH-ADJTRE1
OUTPUT
INPUT ADJ/GND
AUD_LRCK
C683
22uF
16V
C6621uF 25V
C657
22uF
16V
C656
22uF
16V
C651
22uF
16V
C634
10uF
16V
C623
22pF
50V
READY
C636 3300pF
C645 3300pF
C630
0.1uF
16V
C613
10uF
25V
READY
C650
10uF
16V
C626
3300pF
50V
C609
3300pF
READY
C604-*1
1uF
10V
MULTI
C611
3300pF
50V
READY
C661
0.022uF
16V
C666
0.022uF
16V
R612
1C682
0.1uF
16V
DVB_T2
C671
10uF
10V
DVB_T2
C632
4.7uF
10V
C654
10uF
25V
C653
10uF
25V
C641 100pF
READY
C648 100pF
READY
R623 2K
R600
10K
C631
10uF
6.3V
R670
4.7
READY
C627
10uF
6.3V
C625
10uF
6.3V
FNIM
+1.5V_DDR_IN
C617
10uF
6.3V
FNIM
C603
0.1uF
16V
READY
C606
0.1uF
16V
C601
0.1uF
16V
C607
0.1uF
16V
C610
0.1uF
16V
C612
10uF
6.3V
C600
10uF
10V
C624
1uF
10V
C629
10uF
16V
C604
1uF
6.3V
C608
10uF
10V
C602
0.1uF
16V
READY
C605
10uF
6.3V
EMI_GND1
R604
0
R606
0
R602
0
R601
0
R603
0
GND
EMI_GND4
R608
0
EMI_GND2
EMI_GND3
R605
0
R607
0
R609
100
R653
4.3K
1%
R614
220
5% R613
100
5%
R615 1 FNIM
R618
240
FNIM
Power,AMP
GP4_S7LR
6
2011-04-01
Close-by
Close-by
Close-by
Close-by
Audio AMP
Power Wafer +3.3V Multi 1.5V DDR / 1.24V Core
Vout=0.765*(1+R1/R2)
3.3V_TU /1.8V_TU3.3Vst 2.5V Multi/2.5_TU
Vout=1.25*(1+R2/R1)
1.25V_TU
R1
R2
Vout=0.8*(1+R1/R2)
R1
R2
R1
R2
R1
R2
R2
R1
EMI GND
Vout=1.25*(1+R2/R1)
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
P1
12507WS-08L
11
22
33
44
55
66
77
88
9
9
LED_R
EYE_SCL
EYE_SDA
+3.3V_ST
EYE_SCL
+3.3V_ST
EYE_SDA
C1
0.1uF
16V
+3.3V_ST
R3
4.7K
OPT
ZD1
5.6B
ZD3
5.6B
R2
330
C4
0.1uF
16V
R1
47
+3.3V_ST
ZD2
5.6B
LED_R
ZD4
5.6B
LD1
LTST-C191KRKT
EAV60793101
ZD5
5.6B
ZD6
5.6B ZD7 5.6B
IR
IR
KEY1
KEY2
ZD8
5.6B ZD9 5.6B
C6
0.1uF
16V
OPT
C5
0.1uF
16V
OPT
+3.3V_ST
R13
2K
OPT
KEY2
KEY1
SW1
JTP1289
SW2
JTP1289
SW3
JTP1289
SW4
JTP1289
SW5
JTP1289
SW6
JTP1289
SW7
JTP1289
SW8
JTP1289
R4
4.7K
+3.3V_ST
R15
10K
Q1
MMBT3904(NXP)
E
B
C
C2
10uF
6.3V
C3
10uF
6.3V
OPT
C7
10uF
6.3V
OPT
R5
27K R8 27K
R6
3.9K R10 3.9K
R7
10K R11 10K
R9
620 R12 620
IC2
KSM-903SMR1CL
1VOUT
2GND
3VCC
R14
2.7K
IC1
CM3231A3OG
1
GND
2SDAT
3SCLK
4VDD
ZD4-*1
5.48VTO5.76V ZD5-*1 5.48VTO5.76V
ZD6-*1
5.48VTO5.76V ZD7-*1 5.48VTO5.76V
ZD3-*1
5.48VTO5.76V ZD1-*1 5.48VTO5.76V
ZD2-*1
5.48VTO5.76V
ZD8-*1
5.48VTO5.76V ZD9-*1 5.48VTO5.76V
SW8-*1
JTP1283
12
3
SW7-*1
JTP1283 12
3
SW6-*1
JTP1283 12
3
SW5-*1
JTP1283 12
3
SW4-*1
JTP1283 12
3
SW3-*1
JTP1283 12
3
SW2-*1
JTP1283 12
3
SW1-*1
JTP1283 12
3
8Pin Wafer to Main Green Eye Sensor IR Receiver
Tact Switch RED LED
Power Input Home OK Vol- Vol+ CH- CH+
2.4V 0.93V 1.65V 2.4V 0.2V 0.93V 1.65V 0.2V
EAX64342101 12/04/2011
Tact/IR/Eye 1 1
(KEY1)(KEY1) (KEY1)(KEY1)(KEY2)(KEY2) (KEY2)(KEY2)
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only