LG 42PA4500 User manual

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Europe/Africa http://eic.lgservice.com
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Internal Use Only
Printed in KoreaP/NO : MFL67483006 (1205-REV00)
CHASSIS : PB23A
MODEL : 42PA4500 42PA4500-SM
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
PLASMA TV
SERVICE MANUAL

- 2 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS .............................................................................................. 2
SAFETY PRECAUTIONS ........................................................................ 3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION ................................................................ 5
BLOCK DIAGRAM.................................................................................. 12
EXPLODED VIEW .................................................................................. 13
SCHEMATIC CIRCUIT DIAGRAM ..............................................................

- 3 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩand 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
IMPORTANT SAFETY NOTICE
To Instrument's
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
SAFETY PRECAUTIONS

- 4 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement .
1. Application range
This spec sheet is applied all of the PDP TV with PB23A chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
(1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C
(2) Relative Humidity: 65 % ± 10 %
(3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
BOM.
(5) The receiver must be operated for about 5 minutes prior to the adjustment.
3. Test method
(1) Performance: LGE TV test method followed
(2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
4. Model General Specification
No Item Specication Remark
1 Receiving System 1) SBTVD / NTSC / PAL-M / PAL-N 50/60PA6500-SA, 42/50PA4900-SA/D
42/50PA4500-SF, 50/60PA6500-SG
42/50PA4900-SK, 42/50PA4500-SM
2 Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 07-69 (VHF high/UHF)
4) CATV : 02~135
50/60PA6500-SA, 42/50PA4900-SA/D
42/50PA4500-SF, 50/60PA6500-SG
42/50PA4900-SK, 42/50PA4500-SM
3 Input Voltage 1) AC 100 ~ 240V 50/60Hz
4 Market Brazil / chile / Peru / Venezuela / Costarica / Uruguay 50/60PA6500-SA, 42/50PA4900-SA/D
42/50PA4500-SF, 50/60PA6500-SG
42/50PA4900-SK, 42/50PA4500-SM
5 Screen Size 42 inch Wide(1024 × 768)
50 inch Wide(1024 × 768)
50 inch Wide(1920 × 1080)
60 inch Wide(1920 × 1080)
42PA all model
50PA4 all model
50PA6 all model
60PA6 all model
6 Aspect Ratio 16:9
7 Tuning System FS
8 Module PDP42T4#### (1024 × 768)
PDP50T4#### (1024 × 768)
PDP50R4#### (1920 × 1080)
PDP60R4#### (1920 × 1080)
42PA4 all model
50PA4 all model
50PA6 all model
60PA6 all model
9 Operating Environment 1) Temp : 0 deg ~ 40 deg
2) Humidity : ~ 80 %
10 Storage Environment 1) Temp : -20 deg ~ 60 deg
2) Humidity : ~ 85 %

- 5 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet applies to PB23A chassis applied PDP TV all
models manufactured in TV factory.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to
use an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order. But it is
flexible when its factory local problem occurs.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240
V~, 50/60 Hz.
(5) Before adjustment, execute Heat-Run for 5 minutes.
■ After Receive 100% Full white pattern (06CH) then
process Heat-run
(or “8. Test pattern” condition of Ez-Adjust status)
■How to make set white pattern
1) Press Power ON button of Service Remocon
2) Press ADJ button of Service remocon. Select “10. Test
pattern” and, after select “White” using navigation
button, and then you can see 100% Full White pattern.
* In this status you can maintain Heat-Run useless any
pattern generator
* Notice: if you maintain one picture over 20 minutes
(Especially sharp distinction black with white
pattern – 13Ch, or Cross hatch pattern – 09Ch)
then it can appear image stick near black level.
3. Adjustment items
3.1. PCB Assembly adjustment
■Adjust 480i Comp1
■Adjust 1080p Comp1/RGB
●If it is necessary, it can adjustment at Manufacture Line
●You can see set adjustment status at “9. ADJUST
CHECK” of the “In-start menu”
3.2. Set Assembly Adjustment
■EDID (The Extended Display Identification Data )
■Color Temperature (White Balance) Adjustment
■Make sure RS-232C control
■Selection Factory output option
4. PCB Assembly Adjustment
4.1. Using RS-232C
- Adjust 3 items at 3.1. PCB assembly adjustments
" 4.1. ■Adjustment sequence" one after the order.
■Adjustment sequence
■Necessary items before Adjustment items
●Pattern Generator : (MSPG-925FA)
●Adjust 480i comp1
(MSPG-925FA:model :209, pattern :65) - comp1 Mode
●Adjust 1080p comp1
(MSPG-925FA:model :225 , pattern :65) - comp1 Mode
●Addjust RGB (MSPG-925FA:model :225 , pattern :65)
- RGB-Pc Mode
* If you want more information then see the below Adjustment
method (Factory Adjustment)
■Adjustment sequence
●aa 00 00: Enter the ADc Adjustment mode.
●xb 00 40: change the mode to component1 (No actions)
●ad 00 10: Adjust 480i comp
●ad 00 10: Adjust 1080p comp
●xb 00 60: change to RGB-Pc mode(No action)
●ad 00 10: Adjust 1080p RGB
●xb 00 90: Endo of Adjustmennt
< See ADC Adjustment RS232C Protocol_Ver1.0 >
Order command Set response
1. Inter the
Adjustment
mode
aa 00 00 a 00 OK00x
2. Change the
Source
XB 00 40
XB 00 60
b 00 OK40x (Adjust 480i Comp1 )
(Adjust 1080p Comp1)
b 00 OK60x (Adjust 1080p RGB)
3. Start
Adjustment
ad 00 10
4. Return the
Response
OKx ( Success condition )
NGx ( Failed condition )
5. Read
Adjustment
data
( main )
ad 00 20
( main )
ad 00 30
(main : component1 480i, RGB 1080p)
000000000000000000000000007c007b006dx
(main : component1 1080p)
000000070000000000000000007c00830077x
6. Conrm
Adjustment
ad 00 99 NG 03 00x (Failed condition)
NG 03 01x (Failed condition)
NG 03 02x (Failed condition)
OK 03 03x (Success condition)
7. End of
Adjustment
ad 00 90 d 00 OK90x

- 6 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. Factory Adjustment
-> PB23A : USE INTERNAL ADC(LM1) : using internal pattern.
5.1. Auto Adjust Component 480i/1080p RGB
1080p
■Summary : Adjustment component 480i/1080i and RGB
1080p is Gain and Black level setting at Analog
to Digital converter, and compensate the RGB
deviation
■Using instrument
●Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator
(It can output 480i/1080i horizontal 100% color bar
pattern signal, and its output level must setting
0.7V±0.1V p-p correctly)
●You must make it sure its resolution and pattern cause
every instrument can have different setting
●Adjustment method 480i Comp1, Adjust 1080p Comp1/
RGB (Factory adjustment)
●ADC 480i Component1 adjustment
- Check connection of Component1
- MSPG-925FA -> Model: 209, Pattern 65
●Set Component 480i mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”
●ADC 1080p Component1 / RGB adjustment
- Check connection both of Component1 and RGB
- MSPG-925FA -> Model: 225, Pattern 65
●Set Component 1080p mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”
●After get each the signal, wait more a second and enter
the “IN-START” with press IN-START key of Service
remocon. After then select “7. External ADC” with
navigator button and press “Enter”.
●After Then Press key of Service remocon “Right Arrow
(VOL+)”
●You can see “ADC Component1 Success”
●Component1 1080p, RGB 1080p Adjust is same method.
●Component 1080p Adjustment in Component1 input
mode
●RGB 1080p adjustment in RGB input mode
●If you success RGB 1080p Adjust. You can see “ADC
RGB-DTV Success”
* caution : Set Volume 0 after adjustment
5.2. Use Internal ADC(S7R)
- ADJ(EZ ADJUST) -> 6.ADC Calibration -> ADC
Calibration(START)
* EDID (The Extended Display Identification Data)/DDC
(Display Data Channel) Download.
■Summary
● It is established in VESA, for communication between
PC and Monitor without order from user for building
user condition. It helps to make easily use realize
“Plug and Play” function.
● For EDID data write, we use DDC2B protocol.
- Auto Download
■ After enter Service Mode by pushing “ADJ” key,
■ Enter EDID D/L mode.
■ Enter “START” by pushing “OK” key.
* Caution:
- Never connect HDMI & D-sub Cable when the user
downloading .
- Use the proper cables below for EDID Writing
< Adjustment pattern : 480i / 1080p 60Hz Pattern >

- 7 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
■ It only needs to PCM EDID D/L for North America Product.
* Edid data and Model option download(RS232)
- Manual Download
■ Write HDMI EDID data
● Using instruments
- Jig. (PC Serial to D-Sub connection) for PC, DDC
adjustment.
- S/W for DDC recording (EDID data write and read)
- D-sub jack
- Additional HDMI cable connection Jig.
● Preparing and setting.
- Set instruments and Jig. Like pic.5), then turn on PC
and Jig.
- Operate DDC write S/W (EDID write & read)
- It will operate in the DOS mode.
■ EDID data (Model name = LG TV)
- RGB HD
- South Centural America _2D_HD HDMI
NO Enter
download MODE
EDID data Model
option download
Item download ‘Mode In’ download
CMD 1 A A
CMD 2 A E
Data 0 0 00
0 10
When transfer the
‘Mode In’,
Carry the command.
Automatically download
(The use of a internal
pattern)
< For write EDID data, setting Jig and another instruments >
00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
01 16 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26
0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20
28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A
3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 58
00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20
28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A
3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 3F
02 03 25 F1 4D 10 1F 04 93 05 14 03 02 12 20 22
15 01 26 15 07 50 09 57 07 67 03 0C 00 10 00 80
2D E3 05 03 01 01 1D 00 72 51 D0 1E 20 6E 28 55
00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40 58
2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16
20 58 2C 25 00 40 84 63 00 00 9E 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 34

- 8 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- South Centural America _2D_HD HDMI 2
- South Centural America _2D_HD HDMI 3
- See Working Guide if you want more information about EDID
communication.
- Adjustment Color Temperature(White balance)
■ Using Instruments
● Color Analyzer: CA-210 (CH 10)
- Using LCD color temperature, Color Analyzer (CA-
210) must use CH 10, which Matrix compensated
(White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
● Auto-adjustment Equipment (It needs when Auto-adjust-
ment – It is availed communicate with RS-232C : Baud
rate: 115200)
● Video Signal Generator MSPG-925F 720p, 216Gray
(Model: 217, Pattern 78)
■ Connection Diagram (Auto Adjustment)
● Using Inner Pattern
● Using HDMI input
■ White Balance Adjustment
If you can’t adjust with inner pattern, then you can adjust
it using HDMI pattern. You can select option at “Ez-Adjust
Menu – 7. White Balance” there items “NONE, INNER,
HDMI”. It is normally setting at inner basically. If you can’t
adjust using inner pattern you can select HDMI item, and
you can adjust.
In manual Adjust case, if you press ADJ button of service
remocon, and enter “Ez-Adjust Menu – 7. White Balance”,
then automatically inner pattern operates. (In case of
“Inner” originally “Test-Pattern. On” will be selected in The
“Test-Pattern. On/Off”.
● Connect all cables and equipments like Pic.5)
● Set Baud Rate of RS-232C to 115200. It may set 115200
orignally.
● Connect RS-232C cable to set
● Connect HDMI cable to set
< connection Diagram for Adjustment White balance >
00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20
28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A
3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 3F
02 03 25 F1 4D 10 1F 04 93 05 14 03 02 12 20 22
15 01 26 15 07 50 09 57 07 67 03 0C 00 10 00 80
2D E3 05 03 01 01 1D 00 72 51 D0 1E 20 6E 28 55
00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40 58
2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16
20 58 2C 25 00 40 84 63 00 00 9E 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 24
00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20
28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A
3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 3F
02 03 25 F1 4D 10 1F 04 93 05 14 03 02 12 20 22
15 01 26 15 07 50 09 57 07 67 03 0C 00 10 00 80
2D E3 05 03 01 01 1D 00 72 51 D0 1E 20 6E 28 55
00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40 58
2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16
20 58 2C 25 00 40 84 63 00 00 9E 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 14

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Only for training and service purposes
■ RS-232C Command (Commonly apply)
● “wb 00 00”: Start Auto-adjustment of white balance.
● “wb 00 10”: Start Gain Adjustment (Inner pattern)
● “jb 00 c0” :
● …
● “wb 00 1f”: End of Adjustment
* If it needs, offset adjustment (wb 00 20-start, wb 00 2f-
end)
● “wb 00 ff”: End of white balance adjustment (inner pattern
disappear)
■Adjustment Mapping information
● When Color temperature (White balance) Adjustment
(Automatically)
- Press “Power only key” of service remocon and operate
automatically adjustment.
- Set BaudRate to 115200.
● You must start “wb 00 00” and finish it “wb 00 ff”.
● If it needs, then adjustment “Offset”.
■ White Balance Adjustment (Manual adjustment)
● Test Equipment: CA-210
- Using PDP color temperature, Color Analyzer (CA-210)
must use CH 10, which Matrix compensated (White, Red,
Green, Blue compensation) with CS-2100. See the
Coordination bellowed one.
● Manual adjustment sequence is like bellowed one.
- Turn to “Ez-Adjust” mode with press ADJ button of service
remocon.
- Select “10.Test Pattern” with CH+/- button and press
enter. Then set will go on Heat-run mode. Over 30
minutes set let on Heat-run mode.
- Let CA-210 to zero calibration and must has gap more
10cm from center of PDP module when adjustment.
- Press “ADJ” button of service remocon and select
“7.White-Balance” in “Ez-Adjust” then press “►” button of
navigation key. (When press “►” button then set will go to
full white mode)
- Adjust at three mode (Cool, Medium, Warm)
- If “cool” mode
Let B-Gain to 192 and R, G, B-Cut to 64 and then control
R, G gain adjustment High Light adjustment.
- If “Medium” and “Warm” mode Let R-Gain to 192 and R,
G, B-Cut to 64 and then control G, B gain adjustment
High Light adjustment.
- All of the three mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then control
G, B gain adjustment High Light adjustment.
- With volume button (+/-) you can adjust.
- After all adjustment finished, with Enter (■ key) turn to
Ez-Adjust mode. Then with ADJ button, exit from
adjustment mode
* Attachment: White Balance adjustment coordination and
color temperature.
● Using CS-1000 Equipment.
- COOL : T=11000K, ∆uv=0.000, x=0.276 y=0.283
- MEDIUM : T=9300K, ∆uv=0.000, x=0.285 y=0.293
- WARM : T=6500K, ∆uv=0.000, x=0.313 y=0.329
RS-232C
COMMAND
[CMD ID DATA]
M
I
N
CENTER
(DEFAULT)
M
A
X
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 184 192 192 192
G Gain jh Jb je 00 187 183 159 192
B Gain ji Jc jf 00 192 161 95 192
R Cut 64 64 64 127
G Cut 64 64 64 127
B Cut 64 64 64 127
RS-232C COMMAND
[CMD ID DATA]
Meaning
wb 00 00 White Balance adjustment start.
wb 00 10 Start of adjust gain
(Inner white pattern)
wb 00 1f End of gain adjust
wb 00 20 Start of offset adjust
(Inner white pattern)
wb 00 2f End of offset adjust
wb 00 ff End of White Balance adjust
(Inner pattern disappeared)

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Only for training and service purposes
● When tester will measure on Cool condition, adjust W30 on
TV display menu.
● When tester will measure on medium condition, adjust 0 on
TV display menu.
● When tester will measure on warm condition, adjust W30 on
TV display menu.
● Using CA-210 Equipment. (10 CH)
- Contrast value: 216 Gray
- Brightness spec.
5.3. Test of RS-232C control.
- Press In-Start button of Service Remocon then set the
“4.Baud Rate” to 115200. Then check RS-232C control and
5.4. Selection of Country option.
- Selection of country option is allowed only North American
model (Not allowed Korean model). It is selection of Country
about Rating and Time Zone.
■ Models: All models which PU11A Chassis (See the rst
page.)
■ Press “In-Start” button of Service Remocon, then enter the
“Option” Menu with “PIP CH-“ Button
■ Select one of these three (USA, CANADA, MEXICO) de-
pends on its market using “Vol. +/-“button.
* Caution : Don’t push The INSTOP KEY after completing the
function inspection.
* Caution : Inspection only PAL M / NTSC
6. GND and ESD Testing
6.1. Prepare GND and ESD Testing.
■ Check the connection between set and power cord
6.2. Operate GND and ESD auto-test.
■ Fully connected (Between set and power cord) set enter the
Auto-test sequence.
■ Connect D-Jack AV jack test equipment.
■ Turn on Auto-controller(GWS103-4)
■ Start Auto GND test.
■ If its result is NG, then notice with buzzer.
■ If its result is OK, then automatically it turns to ESD Test.
■ Operate ESD test
■ If its result is NG, then notice with buzzer.
■ If its result is OK, then process next steps. Notice it with
Good lamp and STOPER Down.
6.3. Check Items.
■ Test Voltage
● GND: 1.5KV/min at 100mA
● Signal: 3KV/min at 100mA
■ Test time: just 1 second.
■ Test point
● GND test: Test between Power cord GND and Signal
cable metal GND.
● ESD test: Test between Power cord GND and Live and
neutral.
■ Leakage current: Set to 0.5mA(rms)
6.4. POWER PCB Ass’y Voltage adjustment
(Va, Vs voltage adjustment)
6.4.1. Test equipment : D.M.M 1EA
6.4.2. Connection Diagram for Measuring
: refer to g.1
<XPOWER4 42T4 PSU>
6.4.3. Adjustment method
6.4.3.1. Vs adjustment (refer g.1)
(1) Connect + terminal of D.M.M. to Vs pin of P811, connect
-terminal to GND pin of P811
(2) After turning VR901, voltage of D.M.M adjustment as same
as Vs voltage which on label of panel left/top ( deviation ;
±0.5V)
6.4.3.2. Va adjustment (refer g.1)
(1) After receiving 100% Full White Pattern, HEAT RUN.
(2) Connect + terminal of D.M.M. to Va pin of P811, connect
-terminal to GND pin of P811
(3) After turning VR502,voltage of D.M.M adjustment as same
as Va voltage which on label of panel left/top (deviation;
±0.5V)
Color
temperature
Test
Equipment
Color Coordination
xy
COOL CA-210 0.276 ± 0.002 0.283 ± 0.002
MEDIUM CA-210 0.285 ± 0.002 0.293 ± 0.002
WARM CA-210 0.313 ± 0.002 0.329 ± 0.002
Item White average
brightness
Brightness uniformity
Min 49 -20
Typ 60
Max +20
Unit cd/m² %
Remark - 100% Window White
Pattern
- 100IRE(255Gray)
- Picture: Vivid(Medium)
- 85IRE(216Gray) 100%
Window White Pattern
- Picture: Vivid(Medium)
(g.1) PCB Assy Voltage adjustment

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Only for training and service purposes
7. Default Service option.
7.1. ADC-Set.
■ R-Gain adjustment Value (default 128)
■ G-Gain adjustment Value (default 128)
■ B-Gain adjustment Value (default 128)
■ R-Offset adjustment Value (default 128)
■ G-Offset adjustment Value (default 128)
■ B-Offset adjustment Value (default 128)
7.2. White balance. Value.
7.3. Temperature Threshold
■ Threshold Down Low 20
■ Threshold Up Low 23
■ Threshold Down High 70
■ Threshold Up High 75
8. USB DOWNLOAD(*.epk le download)
■ Put the USB Stick to the USB socket
■ Press Menu key, and move OPTION
■ Press “FAV” Press 7 times
■ Select download le (epk le)
■ After download is nished, remove the USB stick.
■ Press “IN-START” key of ADJ remote control, check the
S/W version.
9. Tool option
Center(Default)
COOL Mid Warm
R Gain 192 192 192
G Gain 192 192 192
B Gain 192 192 192
R Cut 64 64 64
G Cut 64 64 64
B Cut 64 64 64
42PA4500-S*
Tool option 1 24576
Tool option 2 22794
Tool option 3 3697
Tool option 4 51270
Tool option 5 10
Country code 03
Country Group BR
Country BR

- 12 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM

- 13 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
120
501
A2
LV1
A10 A9 A12
520 601
201
204
203
304
400
590
240
202
580
205
200
206
207
302
303
310
540
300
305
301
900
910
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
CI_ADDR[7]
CI_ADDR[0]
CI_ADDR[9]
CI_ADDR[14]
CI_ADDR[1]
CI_ADDR[10]
CI_ADDR[4]
CI_ADDR[6]
BUF2_FE_TS_DATA[0-7]
CI_ADDR[12]
CI_ADDR[3]
CI_ADDR[8]
CI_ADDR[5]
CI_ADDR[13]
CI_ADDR[2]
CI_ADDR[11]
PCM_D[0-7]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
PCM_D[0]
PCM_D[1]
PCM_D[2]
BUF2_FE_TS_DATA[0]
BUF2_FE_TS_DATA[1]
BUF2_FE_TS_DATA[2]
BUF2_FE_TS_DATA[3]
BUF2_FE_TS_DATA[4]
BUF2_FE_TS_DATA[5]
BUF2_FE_TS_DATA[6]
BUF2_FE_TS_DATA[7]
BUF1_FE_TS_DATA[0-7]
BUF2_FE_TS_DATA[2]
BUF2_FE_TS_DATA[5] BUF1_FE_TS_DATA[5]
BUF1_FE_TS_DATA[2]
BUF2_FE_TS_DATA[4]
BUF2_FE_TS_DATA[7]
BUF2_FE_TS_DATA[1]
BUF1_FE_TS_DATA[7]
BUF1_FE_TS_DATA[4]
BUF1_FE_TS_DATA[1]
BUF2_FE_TS_DATA[3]
BUF2_FE_TS_DATA[6]
BUF2_FE_TS_DATA[0]
BUF1_FE_TS_DATA[6]
BUF1_FE_TS_DATA[3]
BUF1_FE_TS_DATA[0]
+5V
R106
75
PCM_5V_CTL
C113
10uF
16V
EU
CI_ADDR[14]
R149
15K
EU
AR109
33 EU
PCM_A[5]
R137
2K
EU
+3.3V_CI
CI_ADDR[3]
Q104
MMBT3904(NXP)
EU
E
B
C
R101 33
EU
CI_IORD
/PCM_IOWR
C109
27pF
50V
EU
R110
0
READY
/PCM_IRQA
MMBT3904(NXP)
Q102
EU
PCM_A[13]
/PCM_CE
CI_IOWR
R108
75
L100
EU
120-ohm
R117
75
EU
SC1_R+/COMP1_Pr+
Q100
MMBT3904(NXP)
EU
E
B
C
PCM_A[2]
DTV/MNT_VOUT
CI_WE
R198
10K
READY
CI_OE
/PCM_REG
+3.3V_ST
AR102 33
EU
R115
470K
EU
SCART1_Lout
R109
10K
EU
R112
0
READY CI_ADDR[1]
PCM_A[11]
CI_ADDR[2]
SC_RE2
R150
10K
EU
AR100 33
EU
/PCM_WE
SC1_B+/COMP1_Pb+
SC1_FB
CI_ADDR[6]
/PCM_WAIT
C114
27pF
50V
EU
R124
10K
EU
R157
1K
EU
IC100
TC74LCX244FT
EU
3
2Y4
2
1A1
4
1A2
1
1OE
6
1A3
5
2Y3
7
2Y2
8
1A4
9
2Y1
10
GND 11 2A1
12 1Y4
13 2A2
14 1Y3
15 2A3
16 1Y2
17 2A4
18 1Y1
19 2OE
20 VCC
Q105
MMBT3904(NXP)
EU
E
B
C
CI_WE
AV/SC1_CVBS_IN
CI_ADDR[5]
CI_ADDR[0-14]
R113
75
EU
CI_TS_DATA[3]
R147
10K
EU
R152
6.8K
EU
BUF1_FE_TS_VAL_ERR
R153
5.6K
EU
Q114-*1
AO3407A
MULTI
G
D S
R130 33EU
1/16W
5%
BUF2_FE_TS_DATA[0-7]
MMBT3904(NXP)
Q101
EU
CI_TS_DATA[5]
R120
2.7K
EU
R136
330
EU
CI_DET
CI_ADDR[12]
CI_IORD
SC1_G+/COMP1_Y+
R145
6.8K
EU
PCM_A[10]
R160
12K
EU
BUF2_FE_TS_CLK
R123
33
EU
CI_TS_DATA[7]
PCM_A[12]
R100 33
EU
AV/SC1_L_IN
P_17V
REG
PCM_A[9]
PCM_RST
C108
5600pF
50V
EU
R156
7.5K
EU
C137
0.1uF
16V
EU
JK102
10067972-000LF
EU
G1G2
57
21
52
16
10
47
41
5
36
59
23
45
54
18
49
43
13
7
38
2
25
56
20
51
15
9
46
40
4
35
58
22
53
17
11
48
42
12
6
37
1
24
55
19
50
44
14
8
39
3
2660
2761
2862
2963
3064
31
32
33
34
65
66
67
68
69
BUF2_FE_TS_VAL_ERR
BUF2_FE_TS_SYN
BUF2_FE_TS_SYN
+5V
CI_IOWR
R155
3K
EU
R148
15K
EU
R134
100
1/4W
EU
R132 100
EU
R143
180
EU
CI_ADDR[7]
PCM_A[6]
PCM_D[0-7]
R111
10K
EU
CI_TS_DATA[1]
/PCM_OE
R131 33EU
CI_TS_DATA[0]
PCM_A[8]
AR103
33
EU
C115
27pF
50V
EU
CI_ADDR[11]
C105
0.1uF
16V
EU
R144
470
EU
R121
10K
EU
AV/SC1_R_IN
BUF1_FE_TS_SYN
R141
220
EU
BUF2_FE_TS_VAL_ERR
+3.3V_CI
CI_TS_VAL
/CI_CD1
AR104
33
EU
R159
12K
EU
L103
EU
120-ohm
BUF2_FE_TS_DATA[0-7]
AR108
33 EU
C136
0.1uF
16V
READY
Q113
MMBT3904(NXP)
EU
E
B
C
+3.3V
R135
0
EU
IC101
AZ4580MTR-E1
3
IN1+
2
IN1-
4
VEE
1
OUT1
5IN2+
6IN2-
7OUT2
8VCC
Q107
MMBT3904(NXP)
EU
E
B
C
R102
100
EU
/CI_CD2
L101
EU
120-ohm
CI_TS_DATA[2]
AV/SC1_DET
SCART1_Rout
R184
10K
READY
R181
10K
EU
R187
10K
EU
1/16W
5%
R104
10K
EU
/PCM_IORD
CI_ADDR[13]
SC1_ID
C107
5600pF
50V
EU
AR101 33
EU
C116
10uF
16V
EU
CI_TS_SYNC
CI_ADDR[8]
C104
0.1uF
16V
EU
R118
470K
EU
1/16W
5%
SC1_SOG_IN
JK100
PSC008-02
EU
1AUDIO_R_OUT
2AUDIO_R_IN
3AUDIO_L_OUT
4AUDIO_GND
5B_GND
6AUDIO_L_IN
7B_OUT
8ID
9G_GND
10 D2B_IN
11 G_OUT
12 D2B_OUT
13 R_GND
14 RGB_GND
15 R_OUT
16 RGB_IO
17 SYNC_GND1
18 SYNC_GND2
19 SYNC_OUT
20 SYNC_IN
21 COM_GND
23
SHIELD
22 AV_DET
P_17V
R114
10K
EU
R139
2K
EU
SC_RE1
+3.3V_CI
CI_TS_DATA[4]
C112
10uF
16V
EU
R158
1K
EU
Q106
MMBT3904(NXP)
EU E
B
C
R165
10K
EU
0
R129
EU
PCM_A[4]
R103
100
EU
R127
12K
EU
BUF2_FE_TS_CLK
+3.3V
R116
470K
EU
R107
75
PCM_A[0]
BUF1_FE_TS_DATA[0-7]
+5V
AR106 33
EU
CI_ADDR[9]
R126
12K
EU
PCM_A[7]
C131
0.1uF
16V
READY
PCM_A[14]
REG
R146
18K
EU
C100
22uF
10V
EU
CI_TS_DATA[6]
R189
10K
EU
R151
10K
EU
CI_OE
SCART1_MUTE
R140
2K
EU
C101
0.1uF
16V
EU
R154
5.6K
EU
R105
1K
EU
CI_ADDR[0]
+5V
BUF1_FE_TS_CLK
PCM_A[3]
R138
2K
EU
CI_TS_CLK
R119
75
EU
AR107 33
EU
CI_ADDR[4]
R128 0
READY
+5V_CI_ON
AR105 33
EU
PCM_A[1]
AR110
33 EU
+5V_CI_ON
CI_ADDR[10]
R133
10K
EU
C111
220pF
50V
EU
L103-*1
CB1608UA121T
DUP_DVB
L101-*1
CB1608UA121T
DUP_DVB
L100-*1
CB1608UA121T
DUP_DVB
Q104*-1
2SC3052
DUP_DVB E
B
C
Q113*-1
2SC3052
DUP_DVB E
B
C
Q107-*1
2SC3052
DUP_DVB E
B
C
Q106-*1
2SC3052
DUP_DVB E
B
C
Q102-*1
2SC3052
DUP_DVB E
B
C
Q100-*1
2SC3052
DUP_DVB E
B
C
Q101-*1
2SC3052
DUP_DVB E
B
C
Q105-*1
2SC3052
DUP_DVB E
B
C
Q114
ZXMP3F30FHTA
EU
G
D S
Q103
MMBT3906(NXP)
EU
E
B
C
Q103-*1
ISA1530AC1
DUP_DVB E
B
C
D112
MMBD6100
EU
A2
C
A1
D112-*1
KDS184
DUP_DVB
A2
C
A1
C106
0EU
SCART,CI Slot
GP4_S7LR3
1
DTV_R_OUT
SC1_VOUT
REC_8
CI POWER ENABLE CONTROL
CI SLOT
Full SCART
3.3V_CI
2011-12-01
PDP GP4 S7LR3
EAX64696601
7
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

USB DOWN STREAM
Fiber Optic
Fiber Optic
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R235
470K
NON_EU
R280
0
ET_NET
+3.3V
Q202
MMBT3904(NXP)
SIDE_HDMI_2 E
B
C
DDC_SCL_3
R266
1K
D2-_HDMI2
R237
10K
SIDE_HDMI_1
C227
0.1uF
16V
R278
10K
R285
100
+5V_ST
D204
5.6V
ET_NET
R224
10K
USB1_CTL
C225
0.1uF
16V
CK-_HDMI1
Q201
MMBT3904(NXP)
SIDE_HDMI_1 E
B
C
R249
1K
NON_EU
JK207
PEJ027-04
USA
6B T_TERMINAL2
7B B_TERMINAL2
5T_SPRING
4R_SPRING
7A B_TERMINAL1
6A T_TERMINAL1
3E_SPRING
R298
10K
R267
1K
R220
10K
D1+_HDMI1
R230
3.3K
SIDE_HDMI_1
R227
1.8K SIDE_HDMI_1
+5V_ST
RN
D0+_HDMI3
D1+_HDMI3
R289
10K
SIDE_HDMI_2
D2+_HDMI2
COMP2_L_IN
R228
10K
USA
CK-_HDMI3
PM_RXD
R245
33 SIDE_HDMI_2
SPDIF_OUT
IC206
MAX3232CDR
3C1-
2V+
4C2+
1C1+
6V-
5C2-
7DOUT2
8RIN2 9
ROUT2
10
DIN2
11
DIN1
12
ROUT1
13
RIN1
14
DOUT1
15
GND
16
VCC
CEC_REMOTE_S7
C203
10pF
50V
IR
COMP2_Pr+
+5V
R256 10K
JK201
SIDE_HDMI_1
14
13
5D1_GND
20
BODY_SHIELD
12
11
2D2_GND
19
18
10 CK+
4D1+
1D2+
17
9D0-
8D0_GND
3D2-
16
7D0+
6D1-
15
R263
12K
R216
75
+5V
COMP2_Y+
JK202
SIDE_HDMI_2
14
13
5D1_GND
20
BODY_SHIELD
12
11
2D2_GND
19
18
10 CK+
4D1+
1D2+
17
9D0-
8D0_GND
3D2-
16
7D0+
6D1-
15
R226
1K
SIDE_HDMI_1
JK200
HDMI_1
14
13
5D1_GND
20
SHIELD
12
11
2D2_GND
19
18
10 CK+
4D1+
1D2+
17
9D0-
8D0_GND
3D2-
16
7D0+
6D1-
15
DDC_SDA_2
TN
JK200-*1
YKF45-7058V
HDMI1_NON Screw
14
NC
13
CEC
5
DATA1_SHIELD
20
SHIELD
12
CLK-
11
CLK_SHIELD
2
DATA2_SHIELD
19
HPD
18
+5V_POWER
10
CLK+
4
DATA1+
1
DATA2+
17
DDC/CEC_GND
9
DATA0-
8
DATA0_SHIELD
3
DATA2-
16
SDA
7
DATA0+
6
DATA1-
15
SCL
RGB_DDC_SCL
+3.3V_ST
D1-_HDMI2
JP207
JK210
XRJV-01V-0-D12-080
ET_NET
11
22
33
44
55
66
77
88
9
9
D2-_HDMI1
SC1_B+/COMP1_Pb+
PC_R_IN
D0-_HDMI2
USB1_OCD
TX
R284 22
DSUB_B+
HPD2
+3.3V_ST
R25710K
R270
10K
D0-_HDMI1
R244
3.3K
SIDE_HDMI_2
JP208
R250
10K
SIDE_HDMI_2
R200
1K
HDMI_1
COMP2_R_IN
D1-_HDMI1
R297
10K
CEC_REMOTE
+3.3V
R232
33
SIDE_HDMI_1
R234
10K
NON_EU
R225
1K
R258
33
R205
33
R253
75
R211
10
IC204
AP2191SG-13
3IN_2
2IN_1
4EN
1GND
5
FLG
6
OUT_1
7
OUT_2
8
NC
R210
10
USA
+5V
IC207
AP2337SA-7
PEN_TOUCH
1
GND
2VOUT 3
VIN
R248
10K
NON_EU PC_L_IN
R276 100
HPD1
C202
10pF
50V
R259
10K
Q204
MMBT3904(NXP)
USA E
B
C
R222
12K
COMP2_Pb+
CK+_HDMI3
CK-_HDMI2
R213
0
NON_USA
JP201
R255
470K
R204
3.3K
HDMI_1
R268
100
C229
0.1uF
16V
JP241
JK206
PEJ027-04
6B T_TERMINAL2
7B B_TERMINAL2
5T_SPRING
4R_SPRING
7A B_TERMINAL1
6A T_TERMINAL1
3E_SPRING
R229
100K
USA
R252
75
R238
470K
NON_EU
R223
12K
R264
10K
R231
33
SIDE_HDMI_1
R217
10K
HDMI_1
R273
0
ET_NET
TX
JP202
+2.5V
DDC_SCL_1
DDC_SDA_1
R281
10K
HDMI_1
5V_DET_HDMI_2
R291
0
ET_NET
D0-_HDMI3
COMP1_DET
JK209
3AU04S-305-ZC-(LG)
1234
5
+5V
GND
D225
40V
B140A
PEN_TOUCH
R219
470K
R282
10K
HDMI_1
JP204
JK208
PPJ234-02
EU
5A
[GN]O-SPRING
6A
[GN]E-LUG
4A
[GN]CONTACT
7B
[BL]E-LUG-S
5B
[BL]O-SPRING
7C
[RD]E-LUG-S
5C
[RD]O-SPRING_1
4C
[RD]CONTACT_1
5D [WH]O-SPRING
4E [RD]CONTACT_2
5E [RD]O-SPRING_2
6E [RD]E-LUG
HPD3
JK210-*1
BS-R430051
ET_NET_UDE
11
22
33
44
55
66
77
88
9
9
D200
5.6V
ET_NET
+3.3V
AV/SC1_L_IN
JK205
SPG09-DB-010
1
RED
2
GREEN
3
BLUE
4
GND_1
5
DDC_GND
6
RED_GND
7
GREEN_GND
8
BLUE_GND
9
NC
10
SYNC_GND
11
GND_2
12
DDC_DATA
13
H_SYNC
14
V_SYNC
15
DDC_CLOCK
16
SHILED
R251
75
R242
12K
NON_EU
C213
10uF
10V
PC_SER_DATA
R262
12K
JP205
DSUB_VSYNC
+5V_ST
R214
75
AV2_DET
Q200
MMBT3904(NXP)
HDMI_1 E
B
C
D0+_HDMI2
R283 22
R290
0
ET_NET
CEC_REMOTE
R207
33
HDMI_1
C226
0.1uF
16V
R236
12K
NON_EU
D2-_HDMI3
D1+_HDMI2
DDC_SDA_3
DSUB_HSYNC
SIDE_USB_DM
R254
470K
CK+_HDMI2
JK211
PPJ239-01
NON_EU
5J [GN2]O-SPRING
6J [GN2]E-LUG
4J [GN2]CONTACT
7K [BL2]E-LUG-S
5K [BL2]O-SPRING
7L [RD2]E-LUG-S
5L [RD2]O-SPRING_1
5M [WH2]O-SPRING
4N [RD2]CONTACT
5N [RD2]O-SPRING_2
6N [RD2]E-LUG
6D [GN1]E-LUG
5D [GN1]O-SPRING
4D [GN1]CONTACT
7E [BL1]E-LUG-S
5E [BL1]O-SPRING
7F [RD1]E-LUG-S
5F [RD1]O-SPRING_1
4F [RD1]CONTACT_1
5G [WH1]O-SPRING
4H [RD1]CONTACT_2
5H [RD1]O-SPRING_2
6H [RD1]E-LUG
C220
10pF
50V
D205
5.6V
ET_NET
CK+_HDMI1
+3.3V
SIDE_USB_DP
R246
33 SIDE_HDMI_2
RGB_DDC_SDA
R288
10K
SIDE_HDMI_2
C212
0.1uF
16V
R208
33
HDMI_1
R202
10K
HDMI_1
JK204
JST1223-001 DUP_AT
1
GND
2
VCC
3
VINPUT
4
FIX_POLE
TP
PM_TXD
R240
1K
SIDE_HDMI_2
R212
10
DSUB_G+
C200
0.1uF
16V
ET_NET
R218
470K
1/16W 5%
R239
10K
NON_EU
R209
10K
SIDE_HDMI_2
D206
5.6V
ET_NET
PC_SER_CLK
R279
10K
+5V
D0+_HDMI1
JK204-*1
2F01TC1-CLM97-4F DUP_DVB
3VIN
2VCC
1GND
4
SHIELD
D1-_HDMI3
+3.3V
DSUB_R+
D2+_HDMI1
RP
R215
75
DSUB_DET
DDC_SCL_2
R203
10K
SIDE_HDMI_1
R271
33
R233
100K
USA
5V_DET_HDMI_1
COMP2_DET
R201
1.8K HDMI_1
R221
10K
R287
10K
SIDE_HDMI_1
AV/SC1_R_IN
R241
1.8K SIDE_HDMI_2
C219
0.1uF
16V
CEC_REMOTE
R286
10K
SIDE_HDMI_1
5V_DET_HDMI_3
R206
33
SC1_R+/COMP1_Pr+
D2+_HDMI3
R277
100
C228
0.1uF
16V
CEC_REMOTE
SC1_G+/COMP1_Y+
R265
10K
JK203
SPG09-DB-009
1
2
3
4
5
6
7
8
9
10
Q204*-1
2SC3052
DUP_AT E
B
C
Q200-*1
2SC3052
DUP_DVB E
B
C
Q201-*1
2SC3052
DUP_DVB E
B
C
Q202-*1
2SC3052
DUP_DVB E
B
C
RGB PC
SPDIF
PC AUDIO
RS232C
HDMI_1 SIDE_HDMI_2SIDE_HDMI_1
For CEC
GP4_S7LR1
JACK INTERFACE
2
10mm
SIDE USB
COMPONENT2
2011-12-1
ETHERNET
7
1A SPEC
   
WIRED IR
SWITCH ADDED
$0.11
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TUNER
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
BUF1_FE_TS_DATA[7]
BUF1_FE_TS_DATA[6]
BUF1_FE_TS_DATA[5]
BUF1_FE_TS_DATA[4]
FE_TS_DATA[7]
FE_TS_DATA[6]
FE_TS_DATA[5]
FE_TS_DATA[4]
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3] BUF1_FE_TS_DATA[3]
BUF1_FE_TS_DATA[2]
BUF1_FE_TS_DATA[1]
BUF1_FE_TS_DATA[0]
BUF1_FE_TS_CLK
IF_AGC_MAIN
IF_P_MSTAR
TU_SDA
R301
100
FE_TS_DATA[0-7]
+5V
R317
82
A_DEMODE
BUF1_FE_TS_VAL_ERR
Q301
MMBT3906(NXP)
A_DEMODE
E
B
C
+1.8V_TU
R30622
FE_TS_VAL_ERR
TU302
TDSS-G101D
DVB_T/C
5+3.3V
11 DIF[N]
2RESET
10 DIF[P]
4SDA
1NC
9IF_AGC
8CVBS
3SCL
7+1.8V
6SIF
12
SHIELD
R334
0
A_DEMODE
R316
470
A_DEMODE
C311
0.1uF
16V
TU300
TDSH-T101F
DVB_T_SCA
5+B1[3.3V]
11 DIF[N]
2RESET
10 DIF[P]
4SDA
1RF_S/W_CTL
9IF_AGC
8CVBS
3SCL
7+B2[1.8V]
6SIF
12
SHIELD R320 2K
NON_A_DEMODE
TUNER_RESET
FE_TS_DATA[0-7]
R302
0
DVB_T2
FE_TS_VAL_ERR
IF_N_MSTAR
C301
0.1uF
16V
FNIM
C308
0.1uF
16V
A_DEMODE
FE_TS_SYN
C305
68pF
50V
R327
0
FNIM
C306
0.1uF
16V
DVB_T2
+3.3V_TU
TU303
TDSN_B001F
SBTVD
1RF_S/W_CTL
2RESET
3SCL
4SDA
5+B1[3.3V]
6SIF
7+B2[1.8V]
8CVBS
9NC_1
10 NC_2
11 NC_3
12 +B3[3.3V]
13 +B4[1.23V]
14 NC_4
15 GND
16 ERROR
17 SYNC
18 VALID
19 MCLK
20 D0
21 D1
22 D2
23 D3
24 D4
25 D5
26 D6
27 D7
28
SHIELD
C303
10uF
16V
TU_SCL
RF_SWITCH_CTL
C313
10pF
50V
READY
TU_CVBS
R30722
BUF1_FE_TS_DATA[0-7]
+3.3V_TU
FE_TS_SYN
R310
1K
RF_SWITCH
TU304
TDSN-G301D
DVB_T2
1NC_1
2RESET
3SCL
4SDA
5+B1[3.3V]
6SIF
7+B2[1.8V]
8CVBS
9NC_2
10 NC_3
11 NC_4
12 +B3[3.3V]
13 +B4[1.23V]
14 NC_5
15 GND
16 ERROR
17 SYNC
18 VALID
19 MCLK
20 D0
21 D1
22 D2
23 D3
24 D4
25 D5
26 D6
27 D7
28
SHIELD
C302
0.1uF
16V
+2.5V_TU
BUF1_FE_TS_SYN
TU_SIF
C312
10pF
50V
READY
C310
0.1uF
16V
C307
0.1uF
16V
RF_SWITCH
C304
68pF
50V
+1.25V_TU
R3030
H_NIM
R308
2.2K
R311
10K
R309
2.2K
FE_TS_CLK
R312
4.7K
A_DEMODE
FE_TS_CLK
C300
10uF
6.3V
FNIM
TU302-*1
TDSS-G201D
G201D_NON_DEMODE
5+B1[3.3V]
11 DIF[N]
2RESET
10 DIF[P]
4SDA
1NC_1
9IF_AGC
8NC_3
3SCL
7+B2[1.8V]
6NC_2
12
SHIELD
R325
0
FNIM
R326
0
FNIM
R323
0
FNIM
R324
0
FNIM
R332
0
FNIM
R333
0
FNIM
R331
0
FNIM
R329
0
FNIM
R330
0
FNIM
R328
0
FNIM
R322
430
NON_A_DEMODE
R319
430
NON_A_DEMODE
TU301
TDSS-H201F
ATSC
5+B1[3.3V]
11 DIF[N]
2RESET
10 DIF[P]
4SDA
1NC_1
9IF_AGC
8NC_3
3SCL
7+B2[1.8V]
6NC_2
12
SHIELD
Close to Tuner Pin
Close to Tuner Pin
Tuner block
TUNER
TDSS-G201D
TDSS-H201F
TDSH-T101F
TDSN_B001F
TDSN_G301D
TUNER OPT1 OPT2 OPT3
DVB-T/C
ATSC
DVB-T_SCA
SBTVD
DVB_T2
HNIM
HNIM
HNIM
FNIM
FNIM
RF_SW
RF_SW
X
X
X
36
Close to Tuner Pin
Close to Tuner Pin
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BUF1_FE_TS_DATA[5]
BUF1_FE_TS_DATA[4]
PCM_A[6]
CI_TS_DATA[6]
PCM_A[9]
PCM_A[8]
PCM_A[12]
PCM_A[2]
PCM_A[0]
PCM_D[3]
PCM_A[14]
PCM_A[13]
BUF1_FE_TS_DATA[7]
BUF1_FE_TS_DATA[1]
PCM_D[0]
BUF1_FE_TS_DATA[0]
PCM_D[7]
CI_TS_DATA[0]PCM_D[4]
PCM_A[3]
CI_TS_DATA[7]
PCM_D[1]
PCM_A[5]
CI_TS_DATA[2]
CI_TS_DATA[1]
BUF1_FE_TS_DATA[3]
BUF1_FE_TS_DATA[2]
PCM_A[1]
PCM_A[10]
PCM_A[4]
PCM_D[2]
CI_TS_DATA[3]
BUF1_FE_TS_DATA[6]
CI_TS_DATA[4]
CI_TS_DATA[5]
PCM_A[11]
PCM_D[6]
PCM_A[7]
PCM_D[5]
R440
49.9
PF_ALE
SC1_B+/COMP1_Pb+
BUF1_FE_TS_VAL_ERR
PM_TXD
C477
0.1uF
AVDD2P5
C436 10uF
RXBCK-
AUD_SCK
R415 33 TN
/PCM_IRQA
D1+_HDMI2
R430 0 NON_EU
D2+_HDMI2
C487 0.1uF NON-UCC
10uFC455
TP
R429 68
SPI_SCK
SC1_R+/COMP1_Pr+
RN
C452 2.2uF
C431 0.1uF
C469 0.1uF
H_NIM
+1.10V_VDDC
R412 22
TU_CVBS
C482 0.1uF NON-UCC
C416 0.047uF
C459 0.1uF
A_DEMODE
COMP2_Pr+
DSUB_G+
R410 1K
HD
/PCM_OE
R444
49.9
R426 33
L401
BLM18PG121SN1D
DUP_AT
R473 22
C438 0.1uF NON-UCC
C414 0.047uF
R478 33
UART_RXD
CK-_HDMI2
CEC_REMOTE_S7
C430 0.047uF
P_SCL
CK-_HDMI3
R454 22
EU
C488
0.047uF
25V
H_NIM
R449 100
NON_A_DEMODE
P_SCL
HPD1
COMP2_Y+
L404 BLM18SG121TN1D
DUP_DVB
R447 47
A_DEMODE
COMP2_DET
C441 0.1uF NON-UCC
SCART1_MUTE
AVDD_NODIE
R453
2.2K
I2C_SCL
C451 2.2uF
R406
10K
/PCM_WAIT
10uFC435
RXACK-
R432 68
R448
10K
H_NIM
TU_SDA
L406
BLM18PG121SN1D
DUP_AT
+3.3V
AVDD_MIU
10uFC434
R433 33
R43822 EU
C420 1000pF
C495
0.1uF
16V
EU
+1.5V_DDR
AUD_LRCK
AUD_MASTER_CLK
C419 0.047uF
PCM_5V_CTL
R468 22
EU
AVDD25_PGA
AV/SC1_L_IN
TUNER_RESET
AV/SC1_DET
RXACK+
AV2_DET
R424 33
CK+_HDMI1
C485
0.1uF
NON-UCC
C466
10uF
/CI_CD2
RXA4-
+1.10V_VDDC
C401
0.1uF
R472 1K
C472 1uF
DUP_AT
AVSS_PGA
AVDD2P5
R423 33
C478 0.1uFNON-UCC
RXB3-
RGB_DDC_SCL
SOC_RESET
SPDIF_OUT
L407
BLM18SG121TN1D
DUP_DVB
R422 33
EU
AMP_RESET_N
R462 1K
OS
D0-_HDMI2
+1.10V_VDDC
C421 0.047uF
C409 0.047uF
RXB0+
C418 0.047uF
R416 68
SC1_G+/COMP1_Y+
R477100
PWM0
R417 33
SPI_SDO
TU_SCL
RGB_DDC_SDA
R483
3.3K
C483
100pF
DVB_T_SCA
L403
H_NIM
BLM18PG121SN1D
IF_AGC_MAIN
D2-_HDMI3
R461 1K
+3.3V
USB1_CTL
RXBCK+
RXA1-
R457
10K
EU
C423 0.047uF
C417 0.047uF
R428 33
D2-_HDMI2
COMP2_Pb+
+5V
R446 47
A_DEMODE
RXB2+
RF_SWITCH_CTL
5V_DET_HDMI_3
D400
BAW56 GEANDE
DUP_AT
DDC_SDA_3
/PCM_WE
RP
C450 2.2uF
+1.10V_VDDC
MODEL_OPT_1
C496 1uF
PWM1
R467 22
/PCM_IORD
C492 0.1uF
4V
UCC
C486
100pF
DVB_T_SCA
RXB1+
C442
0.1uF
COMP2_R_IN
AUD_LRCH
R476 100
C470
0.1uF
H_NIM
C413 1000pF
C449 2.2uF
R455 22
EU
R449-*1 0
A_DEMODE
PWM1
C484 0.1uF NON-UCC
SC1_SOG_IN
C456
1uF
DUP_AT
AVDD_NODIE
RXA0-
C480 0.1uFNON-UCC
R409 1K
FHD
C465 10uF
DDC_SCL_2
C460
0.1uF
C427 1000pF
R459 1K
SIDE_USB_DP
CK+_HDMI2
COMP2_Y+
LED_RED
RXB4+
PM_RXD
C471
0.1uF
D1-_HDMI2
R434 68
SCART1_Rout
VDD33
CK-_HDMI1
CK+_HDMI3
AMP_SCL
C467 1uF
DUP_AT
C440 0.1uF NON-UCC
L400
BLM18PG121SN1D
DUP_AT
SC1_ID
RXB4-
C445
0.1uF
PC_R_IN
RXA2+
DSUB_HSYNC
BUF1_FE_TS_DATA[0-7]
C489
0.1uF
4V
UCC
/PCM_REG
D2-_HDMI1
R456
10K
EU
BUF1_FE_TS_SYN
R474 22
COMP2_L_IN
AV/SC1_CVBS_IN
R466 22
C415 0.047uF
/PF_CE1
DDC_SDA_1
C454
4.7uF
SC1_FB
D0-_HDMI1
ERROR_DET
D1-_HDMI1
R419 33
C426 0.047uF
DSUB_DET
R427 68
C491 0.1uF
4VUCC
P_SDA
SOC_RESET
/PF_CE0
RF_SWITCH_CTL
D0-_HDMI3
C410 0.047uF
/SPI_CS
DTV/MNT_VOUT
R445
49.9
R442 100
H_NIM
R436 68
/PF_OE
PC_L_IN
SCART1_Lout
R437
1M
+3.3V
R435 33
D2+_HDMI3
+3.3V_ST
D1-_HDMI3
I2C_SDA
TX
R405 1K
2D
C425 0.047uF
R421 33
A_DEMODE
SUB_SDA
C422 0.047uF
D0+_HDMI2
D1+_HDMI1
C408 0.047uF
CI_TS_DATA[0-7]
RXA3-
C453
0.1uF
4V
READY
DSUB_B+
C448 2.2uF
AR400 22 OS
CI_TS_CLK
R451
3.3K
DDC_SCL_3
UART_TXD
R413 22
10uFC457
R450
3.3K
C468 0.1uF
H_NIM
R431 33
AVSS_PGA
C447 2.2uF
/PCM_CE
RXA4+
BUF1_FE_TS_CLK
C4000
0.1uF
4V
READY
AVDD25_PGA
C407 0.047uF
PCM_A[0-14]
RXA3+
HPD3
IF_P_MSTAR
HPD2
RXB3+
R420 68
AVDD_MIU
+3.3V_ST
R418 68
TU_SIF
/CI_CD1
RXB2-
COMP1_DET
+2.5V
R482
3.3K
AR401 22 OS
DSUB_VSYNC
R414 68
RXB0-
RXA0+
R425 68
PWM0
SPI_SDI
/F_RB
C474 0.1uF
C402
0.1uF
UART_RXD
KEY1
C497
22uF
16V
R411
2.4K
5V_DET_HDMI_2
D0+_HDMI3
C490 0.1uF NON-UCC
C444
0.1uF
C411 0.047uF
+3.3V
D2+_HDMI1
MODEL_OPT_1
AMP_MUTE
R481
1K
DDC_SCL_1
DDC_SDA_2
RXA1+
R480 33
/PF_WE
C446
1uF
DUP_AT
UART_TXD
SC_RE2
CI_TS_VAL
R470 1K
D0+_HDMI1
RXB1-
L402
BLM18PG121SN1D
DUP_AT
IF_N_MSTAR
C432 0.1uF
USB1_OCD
5V_ON
C429 0.047uF
EU
L405
BLM18PG121SN1D
DUP_AT
SIDE_USB_DM
R452
2.2K
CI_DET
AV/SC1_R_IN
KEY2
DSUB_R+
C428 0.047uF
A_DEMODE
I2C_SDA
C412 0.047uF
R479 33
D1+_HDMI3
C458 0.1uF
A_DEMODE
C406 0.047uF
/PCM_IOWR
P_SDA
C4001
0.1uF
4V
READY
PM_RXD
AMP_SDA
R443 100
H_NIM
+3.3V
VDD33
X400
24MHz
C424 0.047uF
5V_DET_HDMI_1
PM_TXD
/FLASH_WP
CI_TS_SYNC
R441
49.9
SUB_SCL
R403
100K
C463
0.1uF
PCM_D[0-7]
AUD_SCK
AC_DET
R463 1K
NON_OS
DISP_EN
RL_ON
RXA2-
AUD_MASTER_CLK
PCM_RST
/PF_WP
SC_RE1
R408
10
LED_RED
I2C_SCL
C493 0.1uF
4V
UCC
C461 30pF
C462 30pF
C4003
0.1uF
C4004
0.1uF
L400-*1
CB1608UA121T
DUP_DVB
L403-*1
CB1608UA121T
DUP_DVB
L405-*1
CB1608UA121T
DUP_DVB
L406-*1
CB1608UA121T
DUP_DVB
L402-*1
CB1608UA121T
DUP_DVB
L401-*1
CB1608UA121T
DUP_DVB
C446-*1
1uF
DUP_DVB
C456-*1
1uF
DUP_DVB
C467-*1
1uF
DUP_DVB
C472-*1
1uF
DUP_DVB
D400-*1
KDS181
DUP_DVB
L407-*1 CIS10P121AC
DUP_AT
L404-*1
CIS10P121AC
DUP_AT
C4005
0.1uF
4V
READY
C4006
0.1uF
4V
READY
IC400LGE2111B
MAIN IC PCMDATA0/GPIO126
AB17
PCMDATA1/GPIO127
AB19
PCMDATA2/GPIO128
Y16
PCMDATA3/GPIO120
AD15
PCMDATA4/GPIO119
AE15
PCMDATA5/GPIO118
AD14
PCMDATA6/GPIO117
AB15
PCMDATA7/GPIO116
AC16
PCMADR0/GPIO125
Y17
PCMADR1/GPIO124
AA16
PCMADR2/GPIO122
AB16
PCMADR3/GPIO121
AD16
PCMADR4/GPIO99
Y18
PCMADR5/GPIO101
AE20
PCMADR6/GPIO102
Y19
PCMADR7/GPIO103
AC20
PCMADR8/GPIO108
AB18
PCMADR9/GPIO110
AD17
PCMADR10/GPIO114
AC15
PCMADR11/GPIO112
AE17
PCMADR12/GPIO104
AA19
PCMADR13/GPIO107
AA18
PCMADR14/GPIO106
AC19
PCMREG_N/GPIO123
AE18
PCMOE_N/GPIO113
AE14
PCMWE_N/GPIO197
AD19
PCMIORD_N/GPIO111
AD18
PCMIOWR_N/GPIO109
AC18
PCMCE_N/GPIO115
AC17
PCMIRQA_N/GPIO105
AD20
PCMCD_N/GPIO130
AE21
PCMWAIT_N/GPIO100
W16
PCM_RESET/GPIO129
AA17
PCM2_CE_N/GPIO131
AA20
PCM2_IRQA_N/GPIO132
AB22
PCM2_CD_N/GPIO135
Y21
PCM2_WAIT_N/GPIO133
AB20
PCM2_RESET/GPIO134
Y20
UART1_RX/GPIO44
E5
UART1_TX/GPIO43
E4
UART2_RX/GPIO64
U24
UART2_TX/GPIO65
U25
I2C_SDAM2/DDCR_DA/GPIO71
AB21
I2C_SCKM2/DDCR_CK/GPIO72
AA21
DDCA_DA/UART0_TX
H5
DDCA_CK/UART0_RX
H4
PWM0/GPIO66
AA22
PWM1/GPIO67
Y22
PWM2/GPIO68
V24
PWM3/GPIO69
U23
PWM4/GPIO70
T22
PWM_PM/GPIO199
C7
SAR0/GPIO31
E7
SAR1/GPIO32
D7
SAR2/GPIO33
J6
SAR3/GPIO34
F6
SAR4/GPIO35
C1
TS0CLK/GPIO87 AA11
TS0VALID/GPIO85 Y11
TS0SYNC/GPIO86 AC11
TS0DATA0/GPIO77 AB12
TS0DATA1/GPIO78 AD11
TS0DATA2/GPIO79 W9
TS0DATA3/GPIO80 AE11
TS0DATA4/GPIO81 AB11
TS0DATA5/GPIO82 AE12
TS0DATA6/GPIO83 AC13
TS0DATA7/GPIO84 AB14
TS1CLK/GPIO98 AB13
TS1VALID/GPI96 AC14
TS1SYNC/GPIO97 W13
TS1DATA0/GPIO88 Y14
TS1DATA1/GPIO89 AA14
TS1DATA2/GPIO90 AD13
TS1DATA3/GPIO91 Y13
TS1DATA4/GPIO92 AA13
TS1DATA5/GPIO93 AD12
TS1DATA6/GPIO94 AC12
TS1DATA7/GPIO95 W10
NF_WPZ/GPIO198 Y9
NF_CEZ/GPIO137 AA10
NF_CLE/GPIO136 Y10
NF_REZ/GPIO139 AB10
NF_WEZ/GPIO140 AC9
NF_ALE/GPIO141 AD10
NF_RBZ/GPIO142 AC10
GPIO_PM[0]/GPIO6 M5
PM_UART_TX/GPIO_PM[1]/GPIO7 D4
GPIO_PM[2]/GPIO8 L7
GPIO_PM[4]/GPIO10 J4
PM_UART_RX/GPIO_PM[5]/GPIO11 D5
PM_SPI_SCZ1/GPIO_PM[6]/GPIO12 C4
GPIO_PM[8]/GPIO14 L5
GPIO_PM[9]/GPIO15 L6
PM_SPI_SCZ2/GPIO_PM[10]/GPIO16 B3
GPIO_PM[11]/GPIO17 L4
PM_SPI_SCK/GPIO1 A5
PM_SPI_CZ0/GPIO_PM[12]/GPIO0 D3
PM_SPI_SDI/GPIO2 B5
PM_SPI_SDO/GPIO3 B4
IC400
LGE2111B
MAIN IC A_RXCP
H3
A_RXCN
H2
A_RX0P
J1
A_RX0N
J2
A_RX1P
K1
A_RX1N
J3
A_RX2P
K3
A_RX2N
K2
DDCDA_DA/GPIO24
F4
DDCDA_CK/GPIO23
F5
HOTPLUGA/GPIO19
G5
C_RXCP
AD6
C_RXCN
AE6
C_RX0P
AD7
C_RX0N
AC6
C_RX1P
AD8
C_RX1N
AC7
C_RX2P
AC8
C_RX2N
AE8
DDCDC_DA/GPIO28
AE5
DDCDC_CK/GPIO27
AC5
HOTPLUGC/GPIO21
AD5
D_RXCP
E3
D_RXCN
E2
D_RX0P
F1
D_RX0N
F2
D_RX1P
G1
D_RX1N
F3
D_RX2P
G3
D_RX2N
G2
DDCDD_DA/GPIO30
G7
DDCDD_CK/GPIO29
G6
HOTPLUGD/GPIO22
G4
CEC/GPIO5
R6
HSYNC0
R5
VSYNC0
R4
RIN0P
N1
RIN0M
N2
GIN0P
M1
GIN0M
M3
BIN0P
L2
BIN0M
L3
SOGIN0
M2
HSYNC1
T3
VSYNC1
T2
RIN1P
R3
RIN1M
T1
GIN1P
R2
GIN1M
R1
BIN1P
N3
BIN1M
P2
SOGIN1
P3
RIN2P
W1
RIN2M
W2
GIN2P
V1
GIN2M
V3
BIN2P
U2
BIN2M
U3
SOGIN2
V2
CVBS0
T5
CVBS1
T4
CVBS2
T6
CVBSOUT2
T7
VCOM
U4
IP AC3
IM AD2
SIFP AD1
SIFM AD3
IF_AGC AC2
I2C_SCKM1/GPIO75 AE3
I2C_SDAM1/GPIO76 AE2
XIN AE4
XOUT AD4
SPDIF_IN/GPIO152 B6
SPDIF_OUT/GPIO153 M7
USB0_DM D1
USB0_DP D2
USB1_DM AE9
USB1_DP AD9
I2S_IN_BCK/GPIO150 C10
I2S_IN_SD/GPIO151 B10
I2S_IN_WS/GPIO149 B9
I2S_OUT_BCK/GPIO156 A9
I2S_OUT_MCK/GPIO154 B8
I2S_OUT_SD/GPIO157 C9
I2S_OUT_WS/GPIO155 A8
AUL1 Y3
AUR1 AA2
AUL3 AA1
AUR3 AA3
AUL4 W3
AUR4 Y2
AUOUTL2 AB4
AUOUTR2 AB5
AUVRM AA5
AUVAG AA4
AUVRP Y5
EARPHONE_OUTL AA9
EARPHONE_OUTR AB9
RP B2
TP C2
RN A2
TN B1
LED0/GPIO55 A3
LED1/GPIO56 C3
IRIN/GPIO4 C6
HWRESET K4
IC400
LGE2111B
MAIN IC GPIO36
N5
GPIO37
A6
GPIO38
M6
GPIO39
R7
GPIO40
P5
GPIO41
D6
GPIO42
M4
GPIO45
C8
GPIO46
C5
GPIO49
E6
GPIO50
H6
GPIO51
K5
GPIO52
B7
GPIO53
J7
GPIO54
J5
GPIO73
AB3
GPIO74
AC4
LVA0P AC25
LVA0M AC24
LVA1P AD25
LVA1M AD24
LVA2P AE24
LVA2M AC23
LVACKP AE23
LVACKM AD23
LVA3P AC22
LVA3M AD22
LVA4P AC21
LVA4M AD21
LVB0P V23
LVB0M W24
LVB1P W25
LVB1M W23
LVB2P Y25
LVB2M Y24
LVBCKP Y23
LVBCKM AA24
LVB3P AA23
LVB3M AB24
LVB4P AB25
LVB4M AB23
IC400
LGE2111B
MAIN IC AVDDLV
U17
VDDC_1
P17
VDDC_2
R17
VDDC_3
R18
VDDC_4
T17
VDDC_5
T18
VDDC_6
U18
VDDC_7
J9
VDDC_8
J11
VDDC_9
P8
VDDC_10
R8
VDDC_11
U11
VDDC_12
V10
DVDD_DDR
P18
AVDD_DDR0_C
J14
AVDD_DDR0_D_1
J15
AVDD_DDR0_D_2
J16
AVDD_DDR0_D_3
K16
AVDD_DDR1_C
J17
AVDD_DDR1_D_1
L16
AVDD_DDR1_D_2
L17
AVDD_DDR1_D_3
M16
AVDD2P5_DADC
AA8
AVDD25_PGA
AB1
AVSS_PGA
AB2
AVDD25_LAN
Y8
AVDD_MOD
AB8
DVDD_NODIE
Y4
AVDD_AU33
AA6
AVDD_DVI_USB_MPLL
W6
AVDD_PLL
Y6
VDDP
W7
AVDD_DMPLL
W5
AVDD_NODIE
W4
TEST
K8
GND_EFUSE
J8
GND_85
V4
GND_54
L20
GND_55
L24
GND_56
M8
GND_57
M12
GND_58
M13
GND_59
M14
GND_60
M15
GND_61
M17
GND_62
M18
GND_63
M19
GND_64
M24
GND_65
N7
GND_66
N13
GND_67
N14
GND_68
N15
GND_69
N16
GND_70
N17
GND_71
N18
GND_72
N19
GND_73
N20
GND_74
N25
GND_75
P13
GND_76
P14
GND_77
P19
GND_78
P21
GND_79
P24
GND_80 R19
GND_81 R23
GND_82 T23
GND_83 U5
GND_84 U6
GND_86 V11
GND_87 V15
GND_88 V16
GND_89 V17
GND_90 V18
GND_91 V19
GND_92 V20
GND_93 V21
GND_94 W11
GND_95 W15
GND_96 W17
GND_97 W18
GND_98 W20
GND_99 W21
GND_100 W22
GND_101 Y7
GND_102 AA7
GND_103 AB6
GND_104 AB7
GND_1 A15
GND_2 A17
GND_3 A20
GND_4 B14
GND_5 B16
GND_6 B18
GND_7 B21
GND_8 C11
GND_9 C12
GND_10 C13
GND_11 C20
GND_12 C23
GND_13 C25
GND_14 D23
GND_15 E17
GND_16 E18
GND_17 E20
GND_18 E23
GND_19 F18
GND_20 G10
GND_21 G12
GND_22 G15
GND_23 G16
GND_24 G19
GND_25 G20
GND_26 G24
GND_27 H10
GND_28 H12
GND_29 H13
GND_30 H14
GND_31 H15
GND_32 H16
GND_33 H19
GND_34 H25
GND_35 J12
GND_36 J13
GND_37 J19
GND_38 J20
GND_39 J24
GND_40 K12
GND_41 K13
GND_42 K14
GND_43 K15
GND_44 K18
GND_45 K19
GND_46 K25
GND_47 L8
GND_48 L12
GND_49 L13
GND_50 L14
GND_51 L15
GND_52 L18
GND_53 L19
C4002 0.1uF READY
L421
4
GP4_S7LR
MAIN
2011-10-20
6
DECAP FOR SOC
(HIDDEN - UCC)
I2S_I/F
*H/W opt :
ETHERNET
AUDIO OUT
SOC_RESET
AB3
DTV_IF
MODEL_OPT_2
Close to IC with width trace
VDDC : 2026mA
AVDD2P5:172mA
F4
MODEL OPTION
Normal 2.5V
VDDC 1.05V
Close to MSTAR
HD
PIN NAME
FHD
AUDIO IN
MODEL_OPT_0
ANALOG SIF
LOW
Normal Power 3.3V
AVDD_NODIE:7.362mA
Close to MSTAR
HIGH
Close to MSTAR
SCART1_RGB/COMP1
MODEL OPTION
CVBS In/OUT
AVDD_DDR1:55mA
TUNER_I2C
DECAP FOR SOC (HIDDEN - UCC)
AB2
DSUB
DDR3 1.5V
COMP2
STby 3.3V
DECAP FOR SOC (HIDDEN - UCC)
MODEL_OPT_1
PIN NO. Close to MSTAR
AVDD_DDR0:55mA
Internal demod out
from CI SLOT
for SYSTEM EEPROM
(IC104)
<CHIP Config>
(I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
to delete CI or gate for
for SERIAL FLASH
B51_no_EJ : 4’b0000 Boot from 8051 with SPI flash
SB51_WOS : 4’b0001 Secure B51 without scramble
SB51_WS : 4’b0010 Secure B51 with scramble
MIPS_SPE_NO_EJ : 4’b0100 Boot from MIPS with SPI flash
MIPS_SPI_EJ_1 : 4’b0101 Boot from MIPS with SPI flash
MIPS_SPI_EJ_2 : 4’b0110 Boot from MIPS with SPI flash
MIPS_WOS : 4’b1001 Secure MIPS without scramble
MIPS_WS : 4’b1010 Scerur MIPS with SCRAMBLE
<CHIP Config(LED_R/BUZZ)>
Boot from SPI CS1N(EXT_FLASH) 1’b0
Boot from SPI_CS0N(INT_FLASH) 1’b1
NON_A_DEMODE
AGC 1.25V
100 OHM SERIAL
A_DEMODE 0ohm
C4000,C4005,C4006 IS CAP FOR REPAIR
SHOULD BE BOTTOM SIDE
C453 IS CAP FOR REPAIR
SHOULD BE BOTTOM SIDE
C4001 IS CAP FOR REPAIR
SHOULD BE BOTTOM SIDE
C4002 SHOULD NEAR MAIN IC
DECAP READY FOR TEST
DECAP FOR SOC
(HIDDEN - UCC)
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PCM_A[0]
PCM_A[4]
PCM_A[1]
PCM_A[7]
PCM_A[2]
PCM_A[6]
PCM_A[5]
PCM_A[3]
R573
22
IC503
AT24C256C-SSHL-T
ATMEL_IC503
3
A2
2
A1
4
GND
1
A0
5SDA
6SCL
7WP
8VCC
R571
22 READY
/PF_CE1
RXA4+
RXACK+
AR519
22
RXA2-
R579
2K
R542
10K R565
1K
RXA1+
RXA4-
RXB3+
RXB2+
PC_SER_DATA
R569
4.7K
READY
/PF_CE0
PC_SER_CLK
R516
100
RXA2-
+3.3V
RXBCK+
R515
4.7K
USA
I2C_SDA
R577 4.7K
RXB4-
RXA0+
C547
0.1uF
16V /PF_WP
P_SDA
I2C_SCL
IC502
CAT24C08WI-GT3-H-RECV(TV)
READY
3
A2
2
NC_2
4
VSS
1
NC_1
5SDA
6SCL
7WP
8VCC
RXB0+
SPI_SCK
R538
4.7K
RXB2-
/PF_OE
RXB1+
+3.3V_ST
+3.3V_ST
RXACK+
KEY1
RXA4-
RXB2-
RXB2+
R574
22
RXB1-
IC504
H27U1G8F2BTR-BC
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16 24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
P501
12507WS-08L
1
2
3
4
5
6
7
8
9
PF_ALE
C523
10pF
50V
READY
+3.3V
R518
100
RXBCK+
UART_RXD
RXB3-
RXA1+
RXB0-
PCM_A[0-7]
KEY2
R517
100
P503
TF05-51S
HD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
R556
3.3K
RXB3-
C555
0.1uF
+3.3V_ST
SPI_SDO
/FLASH_WP
R514
22
+3.3V
R536 22
ZD500
DUP_DVB
ZD502
5.48VTO5.76V
DUP_DVB
I2C_SDA
ZD505
DUP_DVB
R519
100
R537 22
+5V
RXA0-
RXA4+
IC505
W25Q80BVSSIG
3
%WP[IO2]
2
DO[IO1]
4
GND
1
CS
5DI[IO0]
6CLK
7HOLD[IO3]
8VCC
C522
10pF
50V
READY
RXA1-
R572
22 READY
C556
0.1uF
R540
10K
RXB1-
+3.3V_ST
SPI_SDI
LD500
+3.3V_ST
RXA3+
+3.3V_ST
RXB4+
R575
33
P500
104060-8017
FHD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
/PF_WE
RXA3-
/F_RB
RXBCK-
RXB3+
/SPI_CS
RXA3+
RXA2+
ZD506
DUP_DVB
RXA0-
Q500
MMBT3904(NXP)
DUP_AT
E
B
C
+3.3V_ST
R567
1K
IC505-*1
MX25L8006EM2I-12G
MX
3
WP#
2
SO/SIO1
4
GND
1
CS#
5SI/SIO0
6SCLK
7HOLD#
8VCC
RXA0+
UART_TXD
+5V
IR
C517
10pF
50V
RXA2+
C552
0.1uF
RXACK-
LED_RED
R570
4.7K
READY
R520
100
SUB_SDA
DISP_EN
RXA3-
R563
4.7K
READY
C520
10pF
50V
RXB0-
R568
4.7K
R564
10K
+3.3V
RXACK-
RXA1-
RXB4+
AR518
22
RXB0+
I2C_SCL
C554
10uF
10V
RXBCK-
RXB4-
SUB_SCL
ZD504
DUP_DVB
R512 4.7K
P_SCL
ZD501
DUP_DVB
R513 4.7K
ZD507
DUP_DVB
C550
0.1uF
IC504-*1
K9F1G08U0D-SCB0
SS
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16 24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
RXB1+
IC503-*1
R1EX24256BSAS0A
Renesas_IC503
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
R578
47K
R539
4.7K
ZD503
DUP_DVB
ZD503-*1
5.6B
DUP_AT
ZD505-*1
5.6B
DUP_AT
ZD504-*1
5.6B
DUP_AT
ZD507-*1
5.6B
DUP_AT
ZD506-*1
5.6B
DUP_AT
ZD502-*1
5.6B
DUP_AT
ZD501-*1
5.6B
DUP_AT
ZD500-*1
5.6B
DUP_AT
Q500-*1
2SC3052
DUP_DVB E
B
C
D500
MMBD6100
DUP_DVB
A2
C
A1
D500-*1
KDS184
DUP_AT
A2
C
A1
C535
0.1uF
16V
C534
0.1uF
16V
Memory.LVDS,IR
GP4_S7LR
5
HDCP EEPROM
8KBit
Addr:10101--
EEPROM
1MBit
A0’h
SERIAL FLASH
8MBit
2011-10-20
NAND Flash
1GBit
LVDS
Key/IR
* LCI: LVDS Connection Indicator
6
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THERMAL
THERMAL
THERMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R641
22
R613
100
5%
C651
22uF
16V
AMP_SCL
P_17V
R640
22
C675
0.22uF
50V
C661
0.022uF
16V
C634
10uF
16V
C681
1000pF
50V
C610
0.1uF
16V
C620
10uF
25V
+1.5V_DDR
C677
0.22uF
50V
IC602
AP1117EG-13
FNIM
ADJ/GND
OUTIN
AUD_MASTER_CLK
R655
100K
1%
R626
0
R653
6.8K
1%
R631
390K
1%
C678
1000pF
50V
P600
SMAW200-H18S1
14
9
4
18
13
8
3
17
12
7
2
16
11
6
1
15
10
5
19
+2.5V
+3.3V_ST
C683
22uF
16V
+2.5V_TU
C608
10uF
10V
R648 120K
R624 2K
C673
0.22uF
50V
R656
47K
1%
C646
0.1uF
50V
C638
0.1uF
50V
R637
0
+3.3V
+5V_ST
+5V
R657
43K
1%
R638
22
R612
1
C643
0.1uF
50V
R634
56K
C654
10uF
25V
R639
10K
R643
22
DCON_EN
C625
10uF
6.3V
FNIM
+1.8V_TU
L606 CIS21J121
DUP_AT
R615 1 FNIM
R609
100
+3.3V
C674
0.22uF
50V
R627
10K
READY
DCON_EN
C600
10uF
10V
R642
22
R661
10K
L612
10.0uH
R687
39
+5V_ST
C660
0.1uF
50V
C609
3300pF
READY
EMI_GND1
L613
120-ohm
2A
DVB_T2
+1.25V_TU
P_17V
P601
SMAW250-H04R
1
2
3
4
ERROR_DET
R614
220
5%
L610
10.0uH
C663 0.1uF 50V
R620
1
FNIM
+1.10V_VDDC
C644
22pF
50V
READY
R635 10K
C666
0.022uF
16V
R619
17.4K
1%
C672
0.22uF
50V
R633
10K
DCON_EN
R686
39
C627
10uF
6.3V
R602
0
Q600
MMBT3904(NXP)
READY
E
B
C
R601
0
5V_ON
C649 0.01uF
AC_DET
C640
22pF
50V
READY
R644
22
C639
22pF
50V
READY
C628
4700pF
50V
+3.3V_TU
C650
10uF
16V
AUD_LRCH
C632
4.7uF
10V
+5V
C680
1000pF
50V
R645
22
R625
2.2
R654
51K
1%
L604
120-ohm
2A
DUP_AT
IC605
TPS65253RHDR
1
ROSC
3
CMP1
7
BST1
9LX1_1
10 LX1_2
11 LX2_1
12 LX2_2
13 VIN2
14 BST2
15 EN2 16 RLIM2 17 SS2 18 CMP2 19 FB2 20 LOW_P 21 V7V
22
V3V
23
GND_1
24
PGOOD
25
GND_2
26
GND_3
27
GND_4
28
GND_5
5
RLIM1
8VIN1
6
EN1
4
SS1
2
FB1 29
[EP]GND
C656
22uF
16V
R618
240
FNIM
R636
0
READY
R6292K
R630
3K
1%
IC604
AZ1117BH-ADJTRE1
OUTPUT
INPUT ADJ/GND
C629
10uF
16V
C670
330pF
50V
C635
22pF
50V
READY
C664 1uF 25V
R604
0
R688
39
C606
0.1uF
16V
IC603
TPS54327DDAR
3
VREG5
2
VFB
4
SS
1
EN
5GND
6SW
7VBST
8VIN
9
[EP]GND
IC601
TJ3940S-2.5V-3L
1
GND
2VOUT 3
VIN
+3.3V
AMP_MUTE
AUD_LRCK
AUD_SCK
L609
10.0uH
R617
59K
1%
RL_ON C655
0.047uF
25V
+3.3V
R628
10K
READY
C612
10uF
6.3V
R605
0
IC600
AP2121N-3.3TRE1
1
GND
2VOUT 3
VIN
P_17V C642 0.01uF
R647 100K
C653
10uF
25V
C669
330pF
50V
R685
39
L605
NR5040T2R2N
2.2uH
C633
0.1uF
16V
L608
NR5040T3R3N
R662
56K
C604-*1
1uF
10V
DUP_AT
C637
4700pF
50V
R670
4.7
READY
C621
0.1uF
50V
C630
0.1uF
16V
C667
0.1uF
50V
C607
0.1uF
16V
C676
0.22uF
50V
C682
0.1uF
16V
DVB_T2
C604
1uF
6.3V
DUP_DVB
C601
0.1uF
16V
C624
1uF
10V
R649 33K
R646
22
L607
NR5040T3R3N
C679
1000pF
50V
R608
0
C645 3300pF
C631
10uF
6.3V
R600
10K
C617
10uF
6.3V
FNIM
IC606
STA368BWG
26
GND_PLL
27
XTI
28
BICKI
29
LRCKI
30
SDI
31
RESET
32
INT_LINE
33
SDA
34
SCL
35
GND_DIG_2
36
VDD_DIG_2
17 OUT3B/FFX3B
3TEST_MODE
6OUT2B
16 CONFIG
15 VDD
14 GND_REG
13 OUT1A
12 GND1
11 VCC1
10 OUT1B
9OUT2A
8VCC2
7GND2
4VSS
5VCC_REG
2SA
21
VDD_DIG_1
1GND_SUB
20
TWARN/OUT4A
19
EAPD/OUT4B 18 OUT3A/FFX3A
23
PWRDN
24
VDD_PLL
25
FILTER_PLL
22
GND_DIG_1
37
[EP]GND
EMI_GND4
R666
4.7
READY
R606
0
C665 0.1uF 50V
R650
33K
C611
3300pF
50V
READY
C671
10uF
10V
DVB_T2
R607
0
AMP_SDA
+3.3V
EMI_GND2
R623 2K
C647
680pF
50V
C652
0.047uF
25V
+3.3V_ST
C6621uF 25V
AMP_RESET_N
GND
EMI_GND3
C626
3300pF
50V
R621
1
C668
68uF
35V
C636 3300pF
L600
120 DUP_AT
L611
10.0uH
C657
22uF
16V
AC_DET
C659
0.1uF
50V
R603
0
L613-*1
CB1608UA121T
DUP_DVB
L604-*1
CB1608UA121T
DUP_DVB
L600-*1
MLB-201209-0120P-N2
DUP_DVB
L606-*1
MLB-201209-0120P-N2
DUP_DVB
C687
330pF
50V
C684
330pF
50V
C685
330pF
50V
C686
330pF
50V
L601
500-ohm
Power,AMP
GP4_S7LR
6
2011-04-01
Close-by
Close-by
Close-by
Close-by
Audio AMP
Power Wafer +3.3V Multi 1.5V DDR / 1.24V Core
Vout=0.765*(1+R1/R2)
3.3V_TU /1.8V_TU3.3Vst 2.5V Multi/2.5_TU
Vout=1.25*(1+R2/R1)
1.25V_TU
R1
R2
Vout=0.8*(1+R1/R2)
R1
R2
R1
R2
R1
R2
R2
R1
EMI GND
Vout=1.25*(1+R2/R1)
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR_256
2011/06/03
12
GP4L_S7LR2
K4B1G1646G-BCK0
IC1202-*2
SS_1G_1600
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
AVDD_DDR0
A-MDQSLB
A_MA5
C1215 0.1uF
B-MDQU1
AVDD_DDR0
B-MA1
R1205
1K 1%
B-MDQU6
B-MA5
A_MODT
B_MA12
B_MA8
A_MA0
B-MDQSUB
A_MA10
C1236 0.1uF
OS
R1231
10K
C1202
1000pF
A_MA6
A_MRESETB
B-MDQL0
A-MA12
A-MDQL4
B-MDQSLB
B-MDQU3
A_MBA2
A-MDML
B_MA2
A-MBA1
B_MA8
B-MDQL2
B-MA0
A-MVREFDQ
A-MCKE
A-MDML
A_MA11
B-MDQU0A-MDQU0
A_MODT
B-MDQL3
A_MRESETB
A-MDQU3
A-MDQU4
C1229 0.1uF
OS
B-MA2
B-MODT
B-MCKB
A-MBA0
B_MBA2
B_MBA0
B-MRASB
B-MBA0
A_MBA1
A-MA7
A-MDQL7
A-MDQU1
B_MWEB
B_MODT
AR1214 22
A-MDQSUB
A-MA13
A_MA14
B-MDQL2
B-MA11
A_MBA0
B-MDQL5A-MDQL7
A-MCASB
C1204
1000pF
B-MRESETB
C1232 0.1uF
OS
B-MRASB
B-MVREFDQ
A-MA8
A-MDMU
B-MA9
AR1224 22
A-MA12
R1203
240
1%
B-MA4
+1.5V_DDR
B-MVREFCA
C1247
1000pF
OS
AVDD_DDR0
C1248
0.1uF
OS
B-MDQU4
A-MDQSLB
A-MRASB
B-MDQU2
A_MA11
B_MA1
B_MA1
B-MA14
C1230 0.1uF
OS
B-MDQU3
A-MDQU7
A_MA6
A-MA2
B-MDQL1
B_MA13
A-MBA2
AVDD_DDR0
B-MDQU5
R1204
1K 1%
R1226
240
1%
OS
A-MVREFCA
B-MDMU
C1210 0.1uF
A-MDQSU
L1202
CIC21J501NE
DUP_AT
AR1203 22AR1222 22
B_MA12
A-MDQU2
A_MBA1
AVDD_DDR0A_MCASB
B-MBA2
B-MA3
A_MCKE
A-MRESETB
A_MA8
B-MDQU7
B-MCK
B-MA12
H5TQ1G63DFR-PBC
IC1202-*1
Hynix_1G_1600
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
A15
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
A-MDQL1
R1237
56
1%OS
B-MDQSU
B-MDQSL
A-MDQU1
R1238
56
1%
OS
R1227
1K 1%
OS
B-MDQL6
B-MVREFDQ
A-MDQL6
A-MDQL0
B-MA13
C1209
0.01uF
50V
B_MA0
AR1209 22
A-MDQL3
A-MDQL6
AR1216 22
B-MA11
B_MCASB
C1227 10uF
B_MA10
AVDD_DDR0
A-MODT
C1213 0.1uF
B_MCKE
C1234 0.1uF
OS
B-MA1
R1225
1K 1%
OS
A-MCASB
B-MDQL3
A-MCKB
AR1221 22
B-MDMU
B-MCK
B-MDQU2
B-MDQL7
AR1204 22
A-MODT
A_MA3
B-MA8
B_MA10
B_MBA1
AR1205 22
A-MDQL4
K4B2G1646C
IC1201-*4
SS_2G_1333
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
AR1225 22
B_MA0
A-MDQSL
A_MA13
K4B2G1646C
IC1202-*4
SS_2G_1333
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
A_MCASB
A-MDQU2
AR1206 22
C1233 0.1uF
OS
A_MA9
B_MA13
AR1212 22
A_MA4
A_MA1
A-MA7
C1207 0.1uF
A_MA0
B-MCASB
B_MCASB
B-MDQU5A-MDQU5
B_MA9
B-MDQU7
B-MDQL1
B-MDQL6
B_MRESETB
A-MA1
B_MA9
A-MDQU6
A_MRASB
A-MDQU5
H5TQ1G63DFR-H9C
IC1201
DDR_1333_HYNIX
EAN61828901
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
B-MA10
C1238
1uF DUP_AT
B-MDQL4
C1249
1000pF
OS
C1231 0.1uF
OS
B-MDQSLB
A_MA2
B-MDQSU
B_MCKE
B-MA7
A-MA13
A-MDQL5
B_MWEB
A-MCK
A-MA0
B-MDQU6
A-MA14
B_MRESETB
A-MCKB
A-MDQU4
B-MDQL5
R1232
10K
OS
A-MA11
A-MA11
C1218
1uF DUP_AT
B_MA11
R1236 56
1%
B-MDQSL
A-MDQU0
B-MBA2
A-MA5
K4B1G1646G-BCH9
IC1202-*3
SS_1G_1333
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
B-MWEB
R1202
1K 1%
C1235 0.1uF
OS
AR1220 22
R1201
1K 1%
B-MBA0
A-MDQL3
B-MDML
AR1211 22
A_MA5
A-MRESETB
B-MCKB
K4B1G1646G-BCK0
IC1201-*2
SS_1G_1600
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
B_MBA2
H5TQ1G63DFR-PBC
IC1201-*1
Hynix_1G_1600
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
A15
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
A-MWEB
A_MA10
B-MCKE
B-MA8
A-MA4
A_MBA0
A-MBA1
R1228
1K 1%
OS
AR1202 22
B-MDQL7
AVDD_DDR0
A-MDQSU
B_MA7
B_MA5
A-MA6
B_MBA0
B-MCKE
A-MA14
A-MA6
B-MBA1
B-MDQL0
A_MA9
B-MCASB
C1214 0.1uF
A-MDQL5
C1205 10uF
B-MDQSUB
C1203
0.1uF
B-MA3
R1224
1K 1%
OS
K4B1G1646G-BCH9
IC1201-*3
SS_1G_1333
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
C1250
0.1uF
OS
A_MA3
B-MA6
AR1219 22
B-MA0
AVDD_DDR0
A-MDQU6
B_MRASB
A_MA7
A-MCK
A-MA5
B-MA10
B_MA7
B_MA5
B-MDQU1
A_MRASB
A_MA12
B-MVREFCA
C1216 0.1uF
OS
A-MDQL0
B-MA9B_MBA1
B_MA11
A-MDQSUB
C1251
10uF
A_MA14
A-MA2
B_MA4
AVDD_DDR0
A-MDQU7
B_MA4
AR1207 22
B_MA14
A-MA3
B-MDML
B_MA3
C1212 0.1uF
C1241
1uF DUP_AT
A_MWEB
A-MVREFCA
A-MA10
A-MVREFDQ
B-MA2
H5TQ1G63DFR-H9C
IC1202
DDR_1333_HYNIX
EAN61828901
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
A-MDQL2
A-MA1
B-MA4
AR1215 22
B_MA14
A-MA0
B-MA12
B-MA7
A_MWEB
C1211 0.1uF
C1228 0.1uF
OS
A-MA9
C1208 0.1uF
A-MA4
A_MBA2
A-MDQL2
B-MA6
A_MA4
B-MDQU4
B_MRASB
AR1210 22
A-MA9
A_MA12
AR1217 22
A_MA8
C1201
0.1uF
A-MDQU3
A_MA2
B-MWEB
B_MA2
AR1213 22
B_MA6
A_MCKE
AR1223 22
A-MBA0
A-MWEB
AR1208 22
B-MBA1
C1240
0.01uF
50V
OS
B-MDQU0
B-MDQL4
B-MRESETB
B-MODT
A-MA3
AR1218 22
A-MDMU
A-MBA2
A-MA8
R1235 56
1%
B-MA14
C1219
1uF DUP_AT
A-MA10
B_MODT
B-MA5
A_MA13
B_MA6
B-MA13
A-MCKE
A_MA7
A-MDQSL
A-MDQL1
A-MRASB
B_MA3
A_MA1
C1218-*1
1uF
DUP_DVB
C1219-*1
1uF
DUP_DVB
C1238-*1
1uF
DUP_DVB
C1241-*1
1uF
DUP_DVB
L1202-*1
CB2012PK501T
DUP_DVB
IC400
LGE2111B
MAIN IC
A_DDR3_A0
F9
A_DDR3_A1
E10
A_DDR3_A2
G9
A_DDR3_A3
C14
A_DDR3_A4
F11
A_DDR3_A5
A14
A_DDR3_A6
F10
A_DDR3_A7
C15
A_DDR3_A8
D11
A_DDR3_A9
C16
A_DDR3_A10
G13
A_DDR3_A11
E11
A_DDR3_A12
F12
A_DDR3_A13
B15
A_DDR3_A14
D10
A_DDR3_BA0
B12
A_DDR3_BA1
G11
A_DDR3_BA2
B13
A_DDR3_MCLK
B17
A_DDR3_MCLKZ
C17
A_DDR3_MCLKE
F13
A_DDR3_ODT
A11
A_DDR3_RASZ
B11
A_DDR3_CASZ
A12
A_DDR3_WEZ
E9
A_DDR3_RESET
G8
A_DDR3_DQSL
B22
A_DDR3_DQSBL
C22
A_DDR3_DQSU
A21
A_DDR3_DQSBU
C21
A_DDR3_DQML
B20
A_DDR3_DQMU
D17
A_DDR3_DQL0
B23
A_DDR3_DQL1
B19
A_DDR3_DQL2
A23
A_DDR3_DQL3
C19
A_DDR3_DQL4
B24
A_DDR3_DQL5
C18
A_DDR3_DQL6
A24
A_DDR3_DQL7
A18
A_DDR3_DQU0
D15
A_DDR3_DQU1
F17
A_DDR3_DQU2
F14
A_DDR3_DQU3
E16
A_DDR3_DQU4
D14
A_DDR3_DQU5
D16
A_DDR3_DQU6
E14
A_DDR3_DQU7
F16
B_DDR3_A0 E22
B_DDR3_A1 G21
B_DDR3_A2 F20
B_DDR3_A3 E24
B_DDR3_A4 K20
B_DDR3_A5 F24
B_DDR3_A6 J21
B_DDR3_A7 F23
B_DDR3_A8 H22
B_DDR3_A9 G23
B_DDR3_A10 L21
B_DDR3_A11 G22
B_DDR3_A12 J22
B_DDR3_A13 G25
B_DDR3_A14 H20
B_DDR3_BA0 D25
B_DDR3_BA1 K22
B_DDR3_BA2 E25
B_DDR3_MCLK H23
B_DDR3_MCLKE M20
B_DDR3_MCLKZ H24
B_DDR3_ODT C24
B_DDR3_RASZ B25
B_DDR3_CASZ D24
B_DDR3_WEZ F22
B_DDR3_RESET E21
B_DDR3_DQSL P25
B_DDR3_DQSBL N23
B_DDR3_DQSU N24
B_DDR3_DQSBU M23
B_DDR3_DQML L23
B_DDR3_DQMU R20
B_DDR3_DQL0 P23
B_DDR3_DQL1 L25
B_DDR3_DQL2 R24
B_DDR3_DQL3 K23
B_DDR3_DQL4 T25
B_DDR3_DQL5 J23
B_DDR3_DQL6 T24
B_DDR3_DQL7 K24
B_DDR3_DQU0 N21
B_DDR3_DQU1 P22
B_DDR3_DQU2 L22
B_DDR3_DQU3 R21
B_DDR3_DQU4 P20
B_DDR3_DQU5 R22
B_DDR3_DQU6 M22
B_DDR3_DQU7 N22
CLose to Saturn7M IC
CLose to DDR3 CLose to DDR3
CLose to Saturn7M IC
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only