Linear DC2194A Quick setup guide

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DEMO MANUAL DC2194A
DESCRIPTION
LTM4642IY
20VIN, DUAL 4A or SINGLE 8A
DC/DC µMODULE REGULATOR
Demonstration circuit of DC2194A features the
LT M
®
4642IY, the wide input voltage, high efficiency and
power density, dual 4A or single 8A DC/DC step-down
µModule regulator. The step-down regulator operates
from an input voltage range of 4.5V to 20V (or 2.5V min.
with 5V external bias voltage at CPWR) and provides an
adjustable output voltage range from 0.6V to 5V at 4A load
current per channel. The part is capable of operating in
dual phase single output, delivers up to 8A load current
with interleaved two phases at 180 degrees. Differential
output voltage sensing is available on Channel 1 for ap-
plications requiring more accurate output load regulation.
A user-selectable mode input is provided to allow users to
trade off ripple noise for light load efficiency:Discontinu-
ous Mode (DCM) of operation delivers higher efficiency
at light load while Continuous Conduction Mode (CCM) is
BOARD PHOTO
preferred for noise sensitive applications. The mode pin
can also be used to sync the switching frequency to an
external clock. Programmable switching frequency range
is from 600kHz to 1400kHz with a ±30% synchronization
capture range. Constant on time, valley current mode
control architecture and integrated internal control loop
compensation allow very fast transient response to line
and load changes while maintaining loop stability.
It is recommended to read the data sheet and demo
manual of LTM4642 prior using or making any changes
to DC2194A.
Design files for this circuit board are available at
http://www.linear.com/demo/DC2194A
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
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DEMO MANUAL DC2194A
PARAMETER CONDITIONS VALUE
Dual Phase Dual Output Configuration (Default)
Input Voltage Range 4.5V to 20V
Input Voltage Range 2.5V to 20V
(with External CPWR Bias Supply)
Default Output Voltage
VOUT1
VOUT2
VIN=4.5V to 20V
ILOAD=0A to 4A
fSW=800kHz
1.8V ±1.5%
1.2V ±1.5%
Default Switching Frequency Programmed Frequency with an External Resistor
from FREQ Pin to SGND
800kHz ±10%
Maximum Continuous Output Current IOUT per Channel
(Dual Phase Dual Outputs)
VIN =4.5V to 20V
fSW=800kHz
4A
Output Voltage Ripples
(Peak-to-Peak)
VOUT1,P-P
VOUT2,P-P
(Dual Phase Dual Outputs)
VIN=12V
fSW=800kHz
VOUT1=1.8V at IOUT1=4A
VOUT2=1.2V at IOUT2=4A
COUT= 1x150µF+1x22µF per Channel
VOUT1,P-P=27mV (Figure 8a)
VOUT2,P-P=17mV (Figure 8b)
Dynamic Load Transient Response
VOUT1,P-P
VOUT2,P-P
(Dual Phase Dual Outputs)
VIN=12V
fSW=800kHz
Mode=CCM
VOUT1=1.8V, IOUT_STEP=2A to 4A
VOUT2=1.2V, IOUT_STEP=2A to 4A
COUT=1x150µF+1x22µF per Channel
VOUT1,P-P=86mV (Figure 7a)
VOUT2,P-P=67mV (Figure 7b)
Efficiency
(Dual Phase Dual Outputs)
VIN=12V
fSW=800kHz
VOUT1=1.8V at IOUT1=4A
VOUT2=1.2V at IOUT2=4A
Channel 1: 87.8% (Figure 4)
Channel 2: 84.2% (Figure 4)
Thermal Performance
(Dual Phase Dual Outputs)
VIN=12V
fSW=800kHz
VOUT1=1.8V at IOUT1=4A
VOUT2=1.2V at IOUT2=4A
TA=25°C, No Forced Airflow/Heat Sink
57.2°C Peak Temperature
(Figure11a)
PERFORMANCE SUMMARY
Specifications are at TA=25°C
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DEMO MANUAL DC2194A
PERFORMANCE SUMMARY
Specifications are at TA=25°C
PARAMETER CONDITIONS VALUE
Dual Phase Single Output Configuration (Optional)
Input Voltage Range 4.5V to 20V
Input Voltage Range 2.5V to 20V
(with External CPWR Bias Supply)
Default Output Voltage
VOUT
VIN=4.5V to 20V
ILOAD=0A to 8A
fSW=800kHz
1.8V ±1.5%
Default Switching Frequency Programmed Frequency with External Resistor from
FREQ Pin to SGND
800kHz ±10%
Maximum Continuous Output Current IOUT
(Dual Phase Single Output)
VIN =4.5V to 20V
fSW=800kHz
8A
Output Voltage Ripples
(Peak-to-Peak)
VOUT,P-P
(Dual Phase Single Output)
VIN=12V
fSW=800kHz
VOUT=1.8V at IOUT=8A
COUT= 1x100µF+1x47µF per channel
VOUT,P-P=10mV (Figure 10a)
Dynamic Load Transient Response
VOUT,P-P
(Dual Phase Single Output)
VIN=12V
fSW=800kHz
Mode=CCM
VOUT=1.8V, IOUT_STEP=4A to 8A
COUT=1x100µF+1x47µF per Channel
VOUT,P-P=138mV (Figure 9b )
Efficiency
(Dual Phase Single Output)
VIN=12V
fSW=800kHz
Mode=CCM
VOUT=1.8V at IOUT=8A
87.9 % (Figure 6)
Thermal Performance
(Dual Phase Single Output)
VIN=12V
fSW=800kHz
VOUT=1.8V at IOUT=8A
TA=25°C, No Forced Airflow/Heat Sink
59.2°C Peak Temperature
(Figure12a)
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DEMO MANUAL DC2194A
QUICK START PROCEDURE
Demonstration circuit DC2194A is easy toset up toevaluate
the performance of the LTM4642. Please refer to Figure 1
for proper measurement equipment setup and follow the
procedures below:
1. With power off, connect the input power supply at VIN
(J4) and GND (J5)
2. Connect the first load between VOUT1 (J6) and GND
(J7) for Channel1, connect the second load between
VOUT2 (J8) and GND (J3) for Channel2. Preset all the
loads to 0A.
3. Connect the DMMs at the input (E4 and E5) to moni-
tor input voltage. Connect DMMs at VO1+ (E6) and
VO1– (E7), VO2+ (E11) and VO2– (E9) to monitor DC
output voltages. These output voltage test points are
Kelvin sensed directly across COUT1 for Channel1 and
COUT4 for Channel2 to provide accurate measurement
of output voltages. Do not apply load current to any of
the above test points to avoid damage to the regulator.
Do not connect the ground leads of scope probes to
VO1– and VO2–.
4. Turn on the power supply at the input. Measure and
make sure the input supply voltage is 12V. Place the
RUN 1 (JP4) and RUN2 (JP5) in the “ON” position. The
output voltage should be 1.8V±1.5% for Channel1 and
1.2±1.5% for Channel2.
5. Once the input and output voltages are properly estab-
lished, adjust the input voltage between 4.5V and 20V
and the loads within the operating range of 0A to 4A
max per channel. Observe the output voltage regula-
tion, output voltage ripples, switch node waveform,
load transient response and other parameters. Refer to
Figure 2 for proper output voltage ripple measurement.
NOTE 1: To measure the input/output voltage ripple
properly, do not use the long ground lead on the
oscilloscope probe. See Figure2 for the proper scope
probe placement technique. Short, still leads need to
be soldered to the (+) and (–) terminals of an output
capacitor. The probe’s ground ring needs to touch the
(–) lead and the probe tip needs to touch the (+) lead.
6. DC2194A provides convenient on board BNC terminals
to accurately measure output ripples of Channel1 and
Channel 2. Connect short BNC cables from VOUT1,
VOUT2 to the scope inputs (Scope probe ratio 1:1, AC
coupling) to observe output voltage ripples.
7. DC2194A provides an optional onboard load transient
circuit to measure ∆VOUT peak-to-peak deviation dur-
ing rising or falling dynamic load transient. The simple
load step circuit consisting of a 30V N-channel power
MOSFET in series with a 10mΩ, 1W,1% current sense
resistor. The MOSFET is configured as a voltage control
current source (VCCS) device, therefore the output cur-
rent step and its magnitude is created and controlled by
adjusting the amplitude of the applied input voltage step
at the gate of the MOSFET. Use a function generator to
provide a voltage pulse between IOSTEP CLK (E17) and
GND (E18); the input voltage pulse should be set at the
frequency less than 10Hz and maximum duty cycle of
less than 5% to avoid excessive thermal stress on the
MOSFET device. The output current step is measured
directly across the 10mΩ current sense resistor and
monitored by connecting a BNC cable from IOSTEP to
the input of the oscilloscope (scope probe ratio 1:1,
DC coupling), the equivalent voltage to current scale
is 10mV/1A. The load step current slew rate dI/dt can
be set by adjusting the rising time and fall time of the
input voltage pulse.
The default load step circuit is connected to VOUT1 but
can be used for VOUT2 by simply removing the zero
Ohm jumper R27 and stuffing it at the position of R28
and vice versa. Repeat Step 7 to perform load step
transient evaluation for Channel2.
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DEMO MANUAL DC2194A
Figure 1. Proper Measurement Equipment Setup
Figure 2. Scope Probe Placement for Measuring Input or Output Voltage Ripple
+–
+–
+–
VIN
4.5V TO 20V
+–
+–
+–
LOAD1
(0A TO 4A)
LOAD2
(0A TO 4A)
+
–
VOUT1 VOUT2
+ –
VOUT GND
COUT
QUICK START PROCEDURE
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DEMO MANUAL DC2194A
QUICK START PROCEDURE
8. To program other output voltages for Channel 1 or
Channel2, insert correct values of the bottom feedback
resistors (Table1).
These values are calculated based on a typical feedback
referencevoltageof0.6Vand fixed internal top feedback
resistor of 60.4kΩ.
Table 1. Bottom Resistive Divider Values (1%) for Setting
Typical Output Voltages
VOUT (V) 1.0 1.2 1.5 1.8 2.5 3.3 5.0
RBOT (kΩ) 90.9 60.4 40.2 30.1 19.1 13.3 8.25
* NOTE 2: LTM4642 has been internally compensated
for most of input, output voltages and frequency ranges.
However, to obtain the best efficiency, thermal and load
transient response performance when selecting output
voltages different than the demo boarddefault set voltages,
thefollowingparameters need to be optimized accordingly:
input voltages, switching frequency, output capacitors
and optional external compensation values (Feedforward
Capacitors: C1, C12 and CCOMP: C3, C11). Please refer to
Table2 for more details.
Table 2. Suggested Optimized Switching Frequency for Typical
Input and Output Voltages
VIN
(V)
3.3V 5.0V 5V 12V 12V 12V 20V 20V 20V
VOUT
(V)
1V
1.2V
1.5V
1.8V
1V
1.2V
1.5V
1.8V
1.8V
2.5V
3.3V
1.0V
1.2V
1.5V
1.8V
2.5V
2.5V
3.3V
5.0V
1V
1.2V
1.5V
1.8V
2.5V
3.3V
5.0V
fSW
(kHz)
600 650 800 650 800 1000
1200
650 800 1000
1200
R5
(kΩ)
R_freq
68.1 66.5 49.9 66.5 49.9 39.2
32.4
66.5 49.9 39.2
32.4
Differential Output Voltage Sensing
The LTM4642 includes an internal low offset, high input
impedance, unity gain, high bandwidth differential ampli-
fier for applications that require true remote sensing. This
feature allows users to accurately sense the output voltage
across the output capacitor at the load point in a widely
distributed power system where power trace’s parasitic
voltage drops are always presented. The differential ampli-
fier’s output is internally connected to the error amplifier’s
inverting input. VOUTS1+ and VOUTS1–are Kelvin connected
directly across COUT1 on DC2194A.
(Optional) Output Voltage Tracking
TRK/SS1 and TRK/SS2 allow users to program output
voltage supply tracking during start-up or shutdown while
operating several voltage supply rails at the same time.
Channel 1 is configured as a master and Channel2 is a
slave channel on DC2194A. Coincident tracking mode
can be implemented by connecting TRK/SS2 of the
slave channel to the mid-point of an additional resistive
divider (R19, R20) to the master channel’s output volt-
age. The ratio of this divider is identical to that of the
slave’s channel feedback divider. In this tracking mode,
output voltage of the master channel must be higher
than the output voltage of the slave channel. The rising
time of the output voltage can be adjusted by changing
the soft start capacitor’s values of the master channel.
Coincident tracking mode can be activated by inserting
JP6 between Pin 1 and 2 of TRACK2SEL and perform-
ing start-up/shutdown by releasing RUN1 from GND
and pulling RUN1 to GND accordingly. Tracking mode
can be observed by monitoring VOUT1, VOUT2 and FB1,
FB2 using scope probes. The same method can be used
to configure VOUT1 or VOUT2 tracking an external supply
voltage by inserting JP3 (TRK1 SEL) to TRACK or JP6
(TRK2 SEL) to EXT, applying an external voltage supply
at TRACK1 (E8) or TRACK2 (E13) and repeating start-up/
shutdown test to evaluate the tracking function of the
regulator. Ratiometric tracking mode can be achieved by
connecting TRK/SS2 to FB1. Ratiometric tracking mode
can save two resistors while coincident tracking mode
offers better voltage regulation. It is optional for users
to determine the most appropriate tracking method for
the power supply design.
(Optional) External Frequency Synchronization
The MODE/PLLIN pin can be used to synchronize the
internal oscillator clock frequency to the external clock
signal. Place JP2 (MODE/PLLIN) to CLKIN, apply an
external clock at CLKIN (E10) to vary the switching fre-
quency within ±30% of the set frequency. The external
clock input high threshold is 2V typical, while the input
low threshold is 0.5V.
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DEMO MANUAL DC2194A
(Optional) Lower the Default Current Limit Setting for
Channel 1
The default current limit setting for Channel 1 is 7A
peak current limit with VRNG1 tied to INTVCC. DC2194A
provides an option to lower the peak current limit setting
for Channel 1 (applications that required lower peak
current limit to effectively protect the power devices during
temporary output overloaded condition or output shorted
circuit) by adjusting the DC voltage level at VRNG1. An
external resistive divider from INTVCC can be used to set
the voltage on VRNG pin between 1V to 0.6V, lower the
VRNG1 voltage than 1V resulting in a lower maximum
sense voltage and peak current limit.
(Optional) Operation with Low VIN Range
(2.5V≤VIN≤4.5V)
LTM4642 is equipped with CPWR pin, allowing VIN to
operate down to VIN=3.3V typical. CPWR pin is the main
input power to the control IC and can be disconnected from
the default VIN supply voltage (Remove R13) and tied to
an external 5V bias supply voltage at E14. If the DC bias
supply voltage for CPWR is less than 5.3V, DRVCC can
also be tied to this pin by stuffing R15=0Ω. Since the
RUN pins of Channel1 and Channel2 are directly tied to
VIN, pull up resistors at the RUN pins (R9, R23) should
be re-calculated and inserted to make sure the part can
start up at low VIN. A good value to start with is 115kΩ
using internal RUN pin pull-down resistor of 100k, RUN
Pin On threshold of 1.1V min. to 1.3V max and RUN pin
absolute max voltage of 6V. Care should be taken by not
exceeding maximum voltage rating on DRVCC/INTVCC pin
when operating in this mode. Refer to Table2. for recom-
mended optimized switching frequency while operating at
low VIN voltage range.
(Optional) Operation with EXTVCC
EXTVCC pin is available for optional external 5V bias supply
to power INTVCC/DRVCC. The advantage of using EXTVCC
is to shut down the internal LDO powered from VIN, turn
on the internal EXTVCC switch and directly source the ex-
ternal 5V bias supply to power INTVCC/DRVCC, therefore
improving overall efficiency and reducing temperature
rise of the part, especially at high input voltage range. An
onboardturret(E3) is available for EXTVCC with a minimum
of 4.7µF decoupling ceramic capacitor to PGND. Do not
exceed the maximum rated voltage for EXTVCC and make
sure VIN is powered up before applying EXTVCC.
(Optional) Dual Phase Single Output Circuit
Configuration:
DC2194A can be configured as dual phase single output
to provide up to 8A total load current.
The following simple modification is required:(Channel1
is master, Channel2 is slave). Please refer to Table3 for
more details.
Table 3. Dual Phase Single Output Circuit Configuration
PIN NAME CONNECTIONS MODIFIED COMPONENTS
1 VOUT1
VOUT2
Tie VOUT1, VOUT2 together. Stuff R35=0Ω and short the exposed copper pads at VOUT1, VOUT2 on the
bottom layer of the board .
2 FB2 Tie to INTVCC to disable the EA of the slave channel. Remove FB2 bottom divider resistor (R17) and stuff R26=0Ω.
3 COMP2 Left open or externally tied to COMP1. Remove C11.
4 RUN1
RUN2
Tie RUN1, RUN2 together. Stuff R25=0Ω, R9=115kΩ, remove R23.
5 TRSK/SS2 Left open. Remove JP6.
6 PHASMD Tie to SGND or FLOAT: set phase interleaved 180°
between CH1 and CH2.
JP1=SNGD or FLOAT.
7 PGOOD2 Left open. Remove R12.
QUICK START PROCEDURE
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DEMO MANUAL DC2194A
QUICK START PROCEDURE
Figure 3. Measured Efficiency at 5VIN, 800kHz,
Dual Phase Dual Outputs
Figure 7a. Load Transient Response (CH1)
Dual Phase Dual Outputs
Figure 5. Measured Efficiency at 20VIN, 800kHz,
Dual Phase Dual Outputs
Figure 4. Measured Efficiency at 12VIN, 800kHz,
Dual Phase Dual Outputs
Figure 7b. Load Transient Response (CH2)
Dual Phase Dual Outputs
Figure 6. Measured Efficiency at 12VIN, 800kHz,
Dual Phase Single Output
LOAD CURRENT (A)
0
EFFICIENCY (%)
100
65
95
85
75
65
90
80
70
60
50 3
DC2194 F03
421
1.0VOUT
1.2VOUT
1.5VOUT
1.8VOUT
2.5VOUT
3.3VOUT
LOAD CURRENT (A)
0
EFFICIENCY (%)
95
65
85
75
65
90
80
70
60
50 3
DC2194 F04
421
1.0VOUT
1.2VOUT
1.5VOUT
1.8VOUT
2.5VOUT
3.3VOUT
LOAD CURRENT (A)
0
EFFICIENCY (%)
95
65
85
75
65
90
80
70
60
50 3
DC2194 F05
421
1.2VOUT
1.5VOUT
1.8VOUT
2.5VOUT
LOAD CURRENT (A)
0
EFFICIENCY (%)
95
65
85
75
65
90
80
70
60
50
DC2194 F06
8642 5 731
1.0VOUT
1.2VOUT
1.5VOUT
1.8VOUT
2.5VOUT
3.3VOUT
50µs/DIV
VOUT
50mV/DIV
ILOAD
2A/DIV
DC2194 F07a
VO_P-P = 86mV
2A TO 4A
fSW = 800kHz
VIN = 12V, VOUT = 1.8V
ILOAD STEP = 2A TO 4A AT 2A/µs
COUT_POSCAP = 1×150µF/4V/7mΩ
COUT_CERAMIC = 1×22µF/10V/X7R/1206
CFF = 220pF
50µs/DIV
VOUT
50mV/DIV
ILOAD
2A/DIV
DC2194 F07b
VO_P-P = 67mV
2A TO 4A
fSW = 800kHz
VIN = 12V, VOUT = 1.2V
ILOAD STEP = 2A TO 4A AT 2A/µs
COUT_POSCAP = 1×150µF/4V/7mΩ
COUT_CERAMIC = 1×22µF/10V/X7R/1206
CFF = 220pF
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DEMO MANUAL DC2194A
QUICK START PROCEDURE
5µs/DIV
VOUT
50mV/DIV
DC2194 F08a
20MHz BWL
fSW = 800kHz
VIN = 12V, VOUT = 1.8V
ILOAD = 4A
COUT_POSCAP = 1×150µF/4V/7mΩ
COUT_CERAMIC = 1×22µF/10V/X7R/1206
CFF = 220pF
VO_P-P = 27mV
5µs/DIV
VOUT
50mV/DIV
DC2194 F08b
20MHz BWL
fSW = 800kHz
VIN = 12V, VOUT = 1.2V
ILOAD = 4A
COUT_POSCAP = 1×150µF/4V/7mΩ
COUT_CERAMIC = 1×22µF/10V/X7R/1206
CFF = 220pF
VO_P-P = 17mV
Figure 8a. Output Ripple Voltage (CH1),
Dual Phase Dual Outputs
Figure 8b. Output Ripple Voltage (CH2)
Dual Phase Dual Outputs
Figure 9a. Load Transient Response,
Dual Phase Single Output
Figure 9b. Load Transient Response,
Dual Phase Single Output
Figure 10a. Output Ripple Voltage,
Dual Phase Single Output
Figure 10b. Output Ripple Voltage,
Dual Phase Single Output
50µs/DIV
VOUT
50mV/DIV
ILOAD
2A/DIV
DC2194 F09a
VO_P-P = 73mV
4A TO 6A
fSW = 800kHz
VIN = 12V, VOUT = 1.8V
ILOAD STEP = 4A TO 6A AT 2A/µs
COUT_CERAMIC = 1×100µF/6.3V/X5R/1206
+ 1×47µF/6.3V/X5R/1206
CFF = 220pF
50µs/DIV
VOUT
100mV/DIV
ILOAD
5A/DIV
DC2194 F09b
VO_P-P = 138mV
fSW = 800kHz
VIN = 12V, VOUT = 1.8V
ILOAD STEP = 4A TO 8A AT 4A/µs
COUT_CERAMIC = 1×100µF/6.3V/X5R/1206
+ 1×47µF/6.3V/X5R/1206
CFF = 220pF
4A TO 8A
5µs/DIV
VOUT
20mV/DIV
DC2194 F10a
20MHz BWL
fSW = 800kHz
VIN = 12V, VOUT = 1.8V
ILOAD = 8A
COUT_CERAMIC = 1×100µF/6.3V/X5R/1206
+ 1×47µF/6.3V/X5R/1206
CFF = 220pF
VO_P-P = 10mV
5µs/DIV
VOUT
20mV/DIV
DC2194 F10b
20MHz BWL
fSW = 800kHz
VIN = 20V, VOUT = 1.8V
ILOAD = 8A
COUT_CERAMIC = 1×100µF/6.3V/X5R/1206
+ 1×47µF/6.3V/X5R/1206
CFF = 220pF
VO_P-P = 10.6mV
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DEMO MANUAL DC2194A
QUICK START PROCEDURE
Figure 11a. Thermal Performance at 12VIN,
Dual Phase Dual Outputs
Figure 11b. Thermal Performance at 20VIN,
Dual Phase Dual Outputs
Figure 12a. Thermal Performance at 12VIN,
Dual Phase Single Output
Figure 12b. Thermal Performance at 20VIN,
Dual Phase Single Output
f
SW = 800kHz
V
OUT1 = 1.8V, VOUT2 = 1.2V
V
IN = 12V, ILOAD = 4A PER PHASE
TA = 25°C, NO FORCED AIRFLOW, NO HEAT SINK
f
SW = 800kHz
V
OUT1 = 1.8V, VOUT2 = 1.2V
V
IN = 20V, ILOAD = 4A PER PHASE
TA = 25°C, NO FORCED AIRFLOW, NO HEAT SINK
fSW = 800kHz
VOUT = 1.8V
VIN = 12V, ILOAD = 8A
TA = 25°C, NO FORCED AIRFLOW, NO HEAT SINK
f
SW = 800kHz
V
OUT = 1.8V
V
IN = 20V, ILOAD = 8A
TA = 25°C, NO FORCED AIRFLOW, NO HEAT SINK
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11
dc2194afa
DEMO MANUAL DC2194A
PARTS LIST
ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER
Required Circuit Components
1 1 CIN1 CAP., ALUM. ELECT., 100µF, 25V, 7343 PANASONIC, 25SVPF100M
2 2 CIN2, CIN3 CAP., 22µF, X5R, 25V, 10%, 1206 MURATA, GRM31CR61E226KE15L
3 2 COUT1, COUT4 CAP., 22µF, X7R, 10V, 20%, 1206 MURATA, GRM31CR71A226K
4 2 COUT3, COUT6 CAP., ALUM. ELECT., 150µF, 4V, 7343 PANASONIC, EEFSX0G151E7
5 2 C1, C12 CAP., 220pF, C0G, 50V, 5%, 0603 AVX, 06035A221JAT2A
6 2 C5, C15 CAP., 0.01µF, X7R, 25V, 10%, 0603 TDK, C1608X7R1E103K080AA
7 4 C7, C8, C9, C20 CAP., 4.7µF, X5R, 25V, 10%, 0603 MURATA, GRM188R61E475KE11D
8 2 C16, C17 CAP., 1µF, X5R, 6.3V, 10%, 0603 MURATA, GRM188R60J105KA01D
9 1 C19 CAP., 1µF, X7R, 10V, 10%, 0805 AVX, 0805ZC105KAT2A
10 1 Q1 MOSFET SPEED SRS 30V 30A LFPAK RENESAS, RJK0305DPB-02#J0
11 8 R1, R2, R4, R13, R18,
R31, R32, R33
RES., 0 OHM, 1/10W, 0603 VISHAY, CRCW06030000Z0EA
12 2 R3, R8 RES., 30.1k, 1/10W, 1%, 0603 VISHAY, CRCW060330K1FKEA
13 1 R5 RES., 49.9k, 1/10W, 1%, 0603 VISHAY, CRCW060349K9FKEA
14 6 R7, R17, R19, R20, R21,
R22
RES., 60.4k, 1/10W, 1%, 0603 VISHAY, CRCW060360K4FKEA
15 2 R9, R23 RES., 255k, 1/10W, 1%, 0603 VISHAY, CRCW0603255KFKEA
16 3 R11, R12, R29 RES., 10k, 1/10W, 1%, 0603 VISHAY, CRCW060310K0FKEA
17 1 R14 RES., 2.2Ω, 1/10W, 1%, 0603 VISHAY, CRCW06032R20FKEA
18 1 R27 RES., 0Ω, 2010 TEPRO (NAKOMA), RNH6083
19 1 R30 RES., 0.010Ω, 1W, 1%, 2512 VISHAY, WSL2512R0100FEA
20 1 U1 I.C., LTM4642IY#PBF, BGA56-11.25X9X4.92 LINEAR TECH., LTM4642IY#PBF
Additional Demo Board Circuit Components
1 0 COUT2, COUT5 CAP., OPT, 1206 OPT
2 0 C2, C3, C4, C6, C10, C11,
C13, C14, C18
CAP., OPTION 0603 OPT
3 0 R6, R16 RES., OPTION, 0805 OPT
4 0 R10, R15, R24, R25,
R26, R34
RES., OPTION, 0603 OPT
5 0 R28 RES., OPT, 2010 OPT
6 0 R35 RES., OPTION, 2512 NIC, NRC100ZOTRF
Hardware: For Demo Board Only
1 18 E1-E18 TEST POINT, TURRET, 0.094" MTG. HOLE MILL-MAX, 2501-2-00-80-00-00-07-0
2 1 JP1 CONN., HEADER, 1X4, 2mm WURTH ELEKTRONIK, 62000411121
3 2 JP2, JP6 CONN., HEADER, 2X3, 2mm WURTH ELEKTRONIK, 62000621121
4 3 JP3, JP4, JP5 CONN., HEADER, 1X3, 2mm WURTH ELEKTRONIK, 62000311121
5 6 XJP1-XJP6 SHUNT, 2mm WURTH ELEKTRONIK, 60800213421
6 3 J1, J2, J9 CONN, BNC, 5 PINS CONNEX, 112404
7 6 J3-J8 CONN., JACK, BANANA, NON-INSULATED, 0.218" KEYSTONE, 575-4
8 4 (STAND-OFF) STAND-OFF, NYLON, SNAP-ON, 0.500" KEYSTONE, 8833(SNAP ON)
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12
dc2194afa
DEMO MANUAL DC2194A
SCHEMATIC DIAGRAM
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
4.5V-20V
1.8V / 4 A
NOTE: UNLESS OTHERWISE SPECIFIED 1. ALL RESISTORS ARE IN OHMS, 0603. ALL CAPACITORS ARE IN MICROFARADS, 0603.
6.3V
ON
10V
1.2V / 4 A
TRACK1 SEL.
CCM DCM
SOFT-START
EXT
OFF
R2
25SVPF100M
RUN1
CLKOUT
PHASE
120
90
60
o
o o
2 PRODUCTION GL 01/28/16
CLKIN
ON OFF
RUN2
1%
LT
GL
m
2
25V
4.5V<VIN<20V 4.5V<VIN<5.3V 2.375V<VIN<4.5V
CPWR=VIN DRVCC, CPWR=VIN CPWR= EXT. 5V
R13 = 0 OHM R15 = OPT R15 = 0 OHM R13 = OPT R15 = OPT R13 = 0 OHM
VIN
VO1+
VO1-
INTVCC
VOUT1
INTVCC
VO1+
INTVCC
VFB1
VFB1
INTVCC
INTVCC
INTVCC
CPWR
CPWR
VOUT1 VOUT2
VIN
VIN
VO2+
VO2-
VOUT2
VOUT1
VFB2
RUN1
RUN2
VOUT2
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
__
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
__
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
__
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
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Thursday, January 28, 2016
12
HIGH DENSITY, DUAL 4A STEP-DOWN
N/A
LTM4642IY
DEMO CIRCUIT 2194A
MODULE REGULATOR
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
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Thursday, January 28, 2016
12
HIGH DENSITY, DUAL 4A STEP-DOWN
N/A
LTM4642IY
DEMO CIRCUIT 2194A
MODULE REGULATOR
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
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Thursday, January 28, 2016
12
HIGH DENSITY, DUAL 4A STEP-DOWN
N/A
LTM4642IY
DEMO CIRCUIT 2194A
MODULE REGULATOR
R34 OPT
R7
60.4K
C8 4.7uF
E4
VIN+
C14 OPT
J6
VOUT1
J7
GND
R32 0
R19 60.4K
CIN3 22uF
25V
1206
E7
VO1-
R11 10K
R33
0
J4
VIN
COUT4
22uF
1206
COUT2
OPT
1206
R12 10K
R24 OPT
J5
GND
JP5
1 3 2
J8
VOUT2
U1
LTM4642IY
VOUT1
F1
VOUT1
G1
VOUT1
G2
VOUT1
H1
VIN1 G7
VIN1 G6
VIN1 G5
VOUTS-
F3
VOUTS1
F2
CLKOUT
D4
TRKSS1
F5
RUN1
G3
VRNG1
G4
COMP1
E3
PHASMD
B4
GND
C2
GND
D1
GND
D5
GND
E1
GND
H6
GND
E5
GND
E7
GND
F7
GND
H4
GND
H5
SGND E2 SGND D2
RUN2 B3
TRKSS2 C5
VFB2 C4
COMP2 D3
DRVCC E6
INTVCC D7
EXTVCC D6
MODE_PLLIN
C3
FREQ
E4
SW1
H3
VFB1
F4
VOUT2 C1 VOUT2 B2 VOUT2 B1 VOUT2 A2
PGGOD1 F6
PGOOD2
C6
CPWR C7
VIN2 B5
VIN2 B6
VIN2 B7
VOUT1
H2
VOUT2 A1
GND
H7
SW2 A3
GND
A4
GND
A5
GND
A6
GND
A7
R14 2.2
C15
0.01uF
COUT1
22uF 10V 1206
COUT5
OPT 1206
E12
CLKOUT
C2 OPT
VOUT1
TRACK2 SEL.
JP6
1 3
2 4
5 6
C12 220pF
C3
OPT
CPWR
E14
R10 OPT
R31 0
TRACK2
E13
JP1
1 3 2
4
R23 255K
R22 60.4K
JP3
SOFT-START
TRACK
1 3 2
E6
VO1+
C10 OPT
R1 0
CIN2 22uF
25V
1206
J3
GND
+
COUT6 150uF
4V
C7 4.7uF
JP4
1 3 2
C20 4.7uF
MODE/PLLIN
JP2
1 3
2 4
5 6
C4
OPT
R20 60.4K
C1
220pF
R15 OPT
R5
49.9k
R13
0
R6
OPT
0805
E11 VO2+
C5
0.01uF
E15
RUN1
R4 0
E2
RUN2
R17 60.4K
R9
255K
SW1
E10
CLKIN
+
CIN1 100uF
E9 VO2-
SW2
C13
OPT
C9
4.7uF
R8
30.1K
EXTVCC
E3
PGOOD2
E1
0
R16
OPT 0805
E5
VIN-
+
COUT3
150uF 4V
R18
0
PGOOD1
E16
C6 OPT
R21 60.4K
E8
TRACK1
C11
OPT
R3 30.1k
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13
dc2194afa
DEMO MANUAL DC2194A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SCHEMATIC DIAGRAM
5
5
4
4
3
3
2
2
1
1
D D C C B B A A
OPTIONAL JUMPER FOR DUAL PHASE SINGLE OUTPUT CONFIGURATION
VOUT1
Load Transient Circuit
VOUT2
2
LT
GL
m
DUTY CYCLE 5% MAX
IOSTEP
10mV / A
INTVCC
VOUT2VOUT1
VOUT1 VOUT2
RUN1 RUN2
VFB2
VOUT2
VOUT1
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
Thursday, January 28, 2016
22
HIGH DENSITY, DUAL 4A STEP-DOWN
N/A
LTM4642IY
DEMO CIRCUIT 2194A
MODULE REGULATOR
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
Thursday, January 28, 2016
22
HIGH DENSITY, DUAL 4A STEP-DOWN
N/A
LTM4642IY
DEMO CIRCUIT 2194A
MODULE REGULATOR
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
Thursday, January 28, 2016
22
HIGH DENSITY, DUAL 4A STEP-DOWN
N/A
LTM4642IY
DEMO CIRCUIT 2194A
MODULE REGULATOR
R29 10K
IOSTEP CLK
E17
R25 OPT
C18 OPT
C16 1uF
R28 OPT 2010
Q1
RJK0305DPB
3
2
4
5
1
J1 C17
1uF
GND
E18
R35 OPT 2512
R27
0 Ohm
2010
J9
R26
OPT
C19 1uF 0805
J2
R30 0.010 1W
2512
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14
dc2194afa
DEMO MANUAL DC2194A
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
[phone] ●FAX: [phone] ●www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2016
LT 0616 REV A • PRINTED IN USA
DEMONSTRATION BOARD IMPORTANT NOTICE
Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:
This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT
OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety
measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union
directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.
If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date
of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU
OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS
FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR
ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims
arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all
appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or
agency certified (FCC, UL, CE, etc.).
No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,
customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.
Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and
observe good laboratory practice standards. Common sense is encouraged.
This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application
engineer.
Mailing Address:
Linear Technology
1630 McCarthy Blvd.
Milpitas, CA 95035
Copyright © 2004, Linear Technology Corporation
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