Microchip Technology TC4451 User manual

2006-2014 Microchip Technology Inc. DS20001987C-page 1
TC4451/TC4452
Features:
• High Peak Output Current: 13A (typical)
• Low Shoot-Through/Cross-Conduction Current in
Output Stage
• Wide Input Supply Voltage Operating Range:
- 4.5V to 18V
• High Continuous Output Current: 2.6A
(maximum)
• Matched Fast Rise and Fall Times:
- 21 ns with 10,000 pF Load
- 42 ns with 22,000 pF Load
• Matched Short Propagation Delays: 44 ns
(typical)
• Low Supply Current:
- With Logic ‘1’ Input – 140 µA (typical)
- With Logic ‘0’ Input – 40 µA (typical)
• Low Output Impedance: 0.9(typical)
• Latch-Up Protected: Withstands 1.5A Output
Reverse Current
• Input Withstands Negative Inputs Up To 5V
• Pin-Compatible with the TC4420/TC4429,
TC4421/TC4422 and TC4421A/TC4422A
MOSFET Drivers
• Space-Saving, Thermally-Enhanced, 8-Pin DFN-
S Package
Applications:
• Line Drivers for Extra Heavily-Loaded Lines
• Pulse Generators
• Driving the Largest MOSFETs and IGBTs
• Local Power On/Off Switch
• Motor and Solenoid Driver
• LF Initiator
General Description:
The TC4451/TC4452 are single-output MOSFET
drivers. These devices are high-current buffers/drivers
capable of driving large MOSFETs and insulated gate
bipolar transistors (IGBTs). The TC4451/TC4452 have
matched output rise and fall times, as well as matched
leading and falling-edge propagation delay times. The
TC4451/TC4452 devices also have very low cross-
conduction current, reducing the overall power
dissipation of the device.
These devices are essentially immune to any form of
upset, except direct overvoltage or over-dissipation.
They cannot be latched under any conditions within
their power and voltage ratings. These parts are not
subject to damage or improper operation when up to
5V of ground bounce is present on their ground
terminals. They can accept, without damage or logic
upset, more than 1.5A inductive current of either
polarity being forced back into their outputs. In addition,
all terminals are fully protected against electrostatic
discharge (ESD) up to 4.0 kV (HBM) and 400V (MM).
The TC4451/TC4452 inputs may be driven directly
from either TTL or CMOS (3V to 18V). Moreover,
300 mV of hysteresis is built into the input, providing
noise immunity and enabling the device to be driven
from slowly rising or falling waveforms.
With a wide operating temperature range and having
both surface-mount and pin-through-hole packages,
the TC4451/TC4452 family of 12A MOSFET driversfits
into any application where high gate/line capacitance
drive is required.
12A High-Speed MOSFET Drivers

TC4451/TC4452
DS20001987C-page 2 2006-2014 Microchip Technology Inc.
Package Types
8-Pin PDIP/SOIC(1, 2)
1
2
3
4
VDD
5
6
7
8OUTPUT
GND
VDD
INPUT
NC
GND OUTPUT
5-Pin TO-220(1, 2)
VDD
GND
INPUT
GND
OUTPUT
TC4451
Tab is Common to VDD
Note 1: Duplicate pins must both be connected for proper operation.
2: Exposed thermal pad (EP) of the DFN-S package is electrically isolated; see Table 3-1.
TC4451
8-Pin DFN-S(1, 2)
VDD
INPUT
NC
GND
VDD
OUTPUT
GND
OUTPUT
TC4451
1
2
3
4
8
7
6
5
EP
9
1
2
3
45
6
7
8
VDD
INPUT
NC
GND
TC4452
VDD
OUTPUT
GND
OUTPUT
VDD
INPUT
NC
GND
TC4452
VDD
OUTPUT
GND
OUTPUT
1
2
3
4
8
7
6
5
EP
9
TC4452

2006-2014 Microchip Technology Inc. DS20001987C-page 3
TC4451/TC4452
Functional Block Diagram
Effective
Input
Output
Input
GND
VDD
300 mV
4.7V
C = 25 pF
Inverting
Non-Inverting
140 µA
Cross-Conduction
Reduction and Pre-Drive
Circuitry
Output
TC4451
TC4452

TC4451/TC4452
DS20001987C-page 4 2006-2014 Microchip Technology Inc.
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage .....................................................+20V
Input Voltage ....................(VDD + 0.3V) to (GND – 5V)
Input Current (VIN >V
DD)...................................50 mA
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. These are stress ratings only and functional
operation of the device at these or any other conditions
above those indicated in the operation sections of the
specifications is not implied. Exposure to Absolute
Maximum Rating conditions for extended periods may
affect device reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, TA= +25°C with 4.5V VDD 18V.
Parameters Sym. Min. Typ. Max. Units Conditions
Input
Logic ‘1’, High Input Voltage VIH 2.4 1.5 — V
Logic ‘0’, Low Input Voltage VIL —1.30.8V
Input Current IIN -10 — +10 µA 0V VIN VDD
Input Voltage VIN -5 — VDD +0.3 V
Output
High Output Voltage VOH VDD – 0.025 — — V DC Test
Low Output Voltage VOL — — 0.025 V DC Test
Output Resistance, High ROH —1.01.5IOUT =10mA,V
DD =18V
Output Resistance, Low ROL —0.91.5IOUT =10mA,V
DD =18V
Peak Output Current IPK —13—AV
DD =18V
Continuous Output Current IDC 2.6 — — A 10V VDD 18V (Note 2,
Note 3)
Latch-Up Protection
Withstand Reverse Current IREV — >1.5 — A Duty cycle 2%, t 300 µs
Switching Time (Note 1)
Rise Time tR—3040nsFigure 4-1, CL=15,000pF
Fall Time tF—3240nsFigure 4-1, CL=15,000pF
Propagation Delay Time tD1 —4452nsFigure 4-1, CL=15,000pF
Propagation Delay Time tD2 —4452nsFigure 4-1, CL=15,000pF
Power Supply
Power Supply Current IS—140200µAV
IN =3V
—40100µAV
IN =0V
Operating Input Voltage VDD 4.5 — 18.0 V
VDD Ramp Rate SVDD 0.2 — — V/ms
Note 1: Switching times ensured by design.
2: Tested during characterization, not production tested.
3: Valid for AT and MF packages only. TA=+25°C.

2006-2014 Microchip Technology Inc. DS20001987C-page 5
TC4451/TC4452
DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE)
Electrical Specifications: Unless otherwise noted, over the operating temperature range with 4.5V VDD 18V.
Parameters Sym. Min. Typ. Max. Units Conditions
Input
Logic ‘1’, High Input Voltage VIH 2.4 — — V
Logic ‘0’, Low Input Voltage VIL ——0.8V
Input Current IIN -10 — +10 µA 0V VIN VDD
Output
High Output Voltage VOH VDD –0.025 — — V DCTest
Low Output Voltage VOL ——0.025VDCTest
Output Resistance, High ROH ——2.2IOUT =10mA,V
DD =18V
Output Resistance, Low ROL ——2.0IOUT =10mA,V
DD =18V
Switching Time (Note 1)
Rise Time tR—3560nsFigure 4-1, CL=15,000pF
Fall Time tF—3860nsFigure 4-1, CL=15,000pF
Propagation Delay Time tD1 —5565nsFigure 4-1, CL=15,000pF
Propagation Delay Time tD2 —5565nsFigure 4-1, CL=15,000pF
Power Supply
Power Supply Current IS— 200 400 µA VIN =3V
—50150µAV
IN =0V
Operating Input Voltage VDD 4.5 — 18.0 V
VDD Ramp Rate SVDD 0.2 — — V/ms
Note 1: Switching times ensured by design.
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V.
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Specified Temperature Range (V) TA-40 — +125 °C
Maximum Junction Temperature TJ— — +150 °C
Storage Temperature Range TA-65 — +150 °C
Package Thermal Resistances
Thermal Resistance, 5L-TO-220 JA — 39.5 — °C/W Without heat sink
Thermal Resistance, 8L-6x5 DFN-S JA — 35.7 — °C/W Typicalfour-layerboardwith
vias to ground plane
Thermal Resistance, 8L-PDIP JA —89.3—°C/W
Thermal Resistance, 8L-SOIC JA — 149.5 — °C/W

TC4451/TC4452
DS20001987C-page 6 2006-2014 Microchip Technology Inc.
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-1: Rise Time vs. Supply
Voltage.
FIGURE 2-2: Rise Time vs. Capacitive
Load.
FIGURE 2-3: Fall Time vs. Supply
Voltage.
FIGURE 2-4: Fall Time vs. Capacitive
Load.
FIGURE 2-5: Rise and Fall Times vs.
Temperature.
FIGURE 2-6: Crossover Energy vs.
Supply Voltage.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0
20
40
60
80
100
120
140
160
180
200
220
4 6 8 10121416
18
Rise Time (ns)
Supply Voltage (V)
47,000 pF
22,000 pF
10,000 pF
0
50
100
150
200
250
300
100 1000 10000
100000
Rise Time (ns)
Capacitive Load (pF)
5V
18V
10V
0
20
40
60
80
100
120
140
160
180
200
220
4 6 8 10 12 14 16
18
Fall Time (ns)
Supply Voltage (V)
47,000 pF
22,000 pF
10,000 pF
0
50
100
150
200
250
300
100 1000 10000
100000
Fall Time (ns)
Capacitive Load (pF)
5V
18V
10V
0
10
20
30
40
-40 -25 -10 5 20 35 50 65 80 95 110
125
Rise and Fall Times (ns)
Temperature (°C)
tRISE
tFALL
VDD = 18V
1E-09
1E-08
1E-07
4 6 8 10121416
18
Crossover Energy (A·sec)
Supply Voltage (V)
10-7
10-8
10-9

2006-2014 Microchip Technology Inc. DS20001987C-page 7
TC4451/TC4452
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-7: Propagation Delay vs.
Supply Voltage.
FIGURE 2-8: Propagation Delay vs. Input
Amplitude.
FIGURE 2-9: Propagation Delay vs.
Temperature.
FIGURE 2-10: Quiescent Supply Current
vs. Supply Voltage.
FIGURE 2-11: Quiescent Supply Current
vs. Temperature.
FIGURE 2-12: Input Threshold vs.
Temperature.
40
45
50
55
60
65
70
75
80
85
90
95
46810121416
18
Propagation Delay (ns)
Supply Voltage (V)
tD2
tD1
CLOAD = 15,000 pF
VIN = 5V
40
45
50
55
60
65
70
75
80
85
90
95
100
23456789
10
Propagation Delay (ns)
Input Amplitude (V)
tD2
tD1
CLOAD = 15,000 pF
VDD = 10V
30
35
40
45
50
55
60
-40 -25 -10 5 20 35 50 65 80 95 110
125
Propagation Delay (ns)
Temperature (oC)
tD2
tD1
VDD = 10V
VIN = 5V
CLOAD = 15,000 pF
20
40
60
80
100
120
140
46810121416
18
I
QUIESCENT
(µA)
Supply Voltage (V)
INPUT = High
INPUT = Low
20
40
60
80
100
120
140
160
180
200
220
-40 -25 -10 5 20 35 50 65 80 95 110
125
I
QUIESCENT
(µA)
Temperature (oC)
INPUT = High
VDD = 18 V
INPUT = Low
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2
-40 -25 -10 5 20 35 50 65 80 95 110
125
Input Threshold (V)
Temperature (oC)
VIH
VIL
VDD = 12 V

TC4451/TC4452
DS20001987C-page 8 2006-2014 Microchip Technology Inc.
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-13: Input Threshold vs. Supply
Voltage.
FIGURE 2-14: High State Output
Resistance vs. Supply Voltage.
FIGURE 2-15: Low State Output
Resistance vs. Supply Voltage.
FIGURE 2-16: Supply Current vs.
Capacitive Load (VDD = 18V).
FIGURE 2-17: Supply Current vs.
Capacitive Load (VDD = 12V).
FIGURE 2-18: Supply Current vs.
Capacitive Load (VDD =6V).
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2
46810121416
18
Input Threshold (V)
Supply Voltage (V)
VIH
VIL
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4 6 8 10 12 14 16 18
Supply Voltage (V)
ROUT-HI (:)
TJ= +125oC
TJ= +25oC
VIN = 5V (TC4452)
VIN = 0V (TC4451)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
4 6 8 10 12 14 16 18
Supply Voltage (V)
ROUT-LO (:)
TJ= +125oC
TJ= +25oC
VIN = 0V (TC4452)
VIN = 5V (TC4451)
0
50
100
150
200
250
300
100 1,000 10,000
100,000
Supply Current (mA)
Capacitive Load (pF)
VDD = 18 V
2 MHz
1 MHz
200 kHz
100 kHz
50 kHz
10 kHz
0
50
100
150
200
250
300
100 1,000 10,000
100,000
Supply Current (mA)
Capacitive Load (pF)
VDD = 12 V
2 MHz
1 MHz
200 kHz
100 kHz
50 kHz
10 kHz
-5
15
35
55
75
95
115
135
155
175
100 1,000 10,000
100,000
Supply Current (mA)
Capacitive Load (pF)
VDD = 6 V 2 MHz 1 MHz
200 kHz
100 kHz
50 kHz
10 kHz

2006-2014 Microchip Technology Inc. DS20001987C-page 9
TC4451/TC4452
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-19: Supply Current vs.
Frequency (VDD = 18V).
FIGURE 2-20: Supply Current vs.
Frequency (VDD = 12V).
FIGURE 2-21: Supply Current vs.
Frequency (VDD =6V).
0
50
100
150
200
250
10 100 1000
10000
Supply Current (mA)
Frequency (kHz)
VDD = 18 V
0.1 µF
47,000 pF
22,000 pF
15,000 pF
10,000 pF
1,000 pF
470 pF
0
50
100
150
200
250
10 100 1000
10000
Supply Current (mA)
Frequency (kHz)
VDD = 12 V
0.1 µF
47,000 pF
22,000 pF
15,000 pF
10,000 pF
1,000 pF
470 pF
0
50
100
150
200
250
10 100 1000
10000
Supply Current (mA)
Frequency (kHz)
VDD = 6 V
0.1 µF
47,000 pF
22,000 pF
15,000 pF
10,000 pF
1,000 pF
470 pF

TC4451/TC4452
DS20001987C-page 10 2006-2014 Microchip Technology Inc.
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
3.1 Supply Input (VDD)
The VDD input is the bias supply for the MOSFET driver
and is rated for 4.5V to 18V with respect to the ground
pin. The VDD input should be bypassed to ground with
a local ceramic capacitor. The value of the capacitor
should be chosen based on the capacitive load that is
being driven. A minimum value of 1.0 µF is suggested.
3.2 Control Input (INPUT)
The MOSFET driver input is a high-impedance,
TTL/CMOS-compatible input. The input also has
300 mV of hysteresis between the high and low
thresholds that prevents output glitching even when the
rise and fall time of the input signal is very slow.
3.3 CMOS Push-Pull Output (OUTPUT,
OUTPUT)
The MOSFET driver output is a low-impedance,
CMOS, push-pull style output capable of driving a
capacitive load with 12A peak currents. The MOSFET
driver output is capable of withstanding 1.5A peak
reverse currents of either polarity.
3.4 Ground (GND)
The ground pins are the return path for the bias current
and for the high peak currents that discharge the load
capacitor. The ground pins should be tied into a ground
plane or have very short traces to the bias supply
source return.
3.5 Exposed Thermal Pad (EP)
The exposed thermal pad of the6x5 DFN-S package is
not internally connected to any potential. Therefore,
this pad can be connected to a ground plane or other
copper plane on a printed circuit board (PCB) to help
remove heat from the package.
3.6 Thermal Tab
The thermal tab of the TO-220 package is connectedto
the VDD potential of the device and this connection is
used as a current-carrying path.
TABLE 3-1: PIN FUNCTION TABLE
8-Pin PDIP,
SOIC 8-Pin DFN-S 5-Pin TO-220 Symbol Description
11— V
DD Supply input, 4.5V to 18V
2 2 1 INPUT Control input, TTL/CMOS-compatible input
3 3 — NC No connection
4 4 2 GND Ground
5 5 4 GND Ground
6 6 5 OUTPUT/OUTPUT CMOS push-pull output
7 7 — OUTPUT/OUTPUT CMOS push-pull output
883 V
DD Supply input, 4.5V to 18V
— 9 — EP Exposed thermal pad
——TAB V
DD Thermal tab is at the VDD potential

2006-2014 Microchip Technology Inc. DS20001987C-page 11
TC4451/TC4452
4.0 APPLICATIONS INFORMATION
FIGURE 4-1: Switching Time Test Circuits.
Inverting Driver
Non-Inverting Driver
Input
tD1 tF
tR
tD2
Input: 100 kHz, square wave
tRISE = tFALL 10 ns
Output
Input
Output
tD1 tF
tR
tD2
+5V
10%
90%
10%
90%
10%
90%
+18V
0V
90%
10%
10% 10%
90%
+5V
+18V
0V
0V
0V
90%
26
7
54
18
CL= 15,000 pF
0.1 µF 4.7 µF
Input
VDD = 18V
Output
0.1 µF
Note: Pinout shown is for the DFN-S, PDIP and SOIC packages.
VDD VDD
Input
GND GND
Output
Output
TC4451
TC4452

TC4451/TC4452
DS20001987C-page 12 2006-2014 Microchip Technology Inc.
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC®designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
5-Lead TO-220 Example
YYWWNNN
XXXXXXXXX
XXXXXXXXX
TC4451
VAT^^
1319256
3
e
8-Lead DFN-S (6x5x0.9 mm) Example
PIN 1
NNN
PIN 1
TC4451
VMF ^^
1319
256
3
e
8-Lead PDIP (300 mil) Example
XXXXXXXX
XXXXXNNN
YYWW
TC4451V
PA^^ 256
1319
3
e
8-Lead SOIC (3.90 mm) Example
NNN
TC4451V
OA^^ 1319
256
3
e

2006-2014 Microchip Technology Inc. DS20001987C-page 13
TC4451/TC4452
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 
    
  
  
  
    
    
    
    
    
    
    
    
    
     
    
    
E
Q
D
D1
H1
A
A1
A2
c
N
e
e1
b
123
L
CHAMFER
OPTIONAL
Pφ
   

TC4451/TC4452
DS20001987C-page 14 2006-2014 Microchip Technology Inc.
 !"#$ %&'(()* +


   
    
    
  
     
     
     

 
    
  
  
    
    
  
  
  
     
     
    
    
     
NOTE 2
A1
A
A3
NOTE 1 12
E
N
D
EXPOSED PAD
NOTE 1
21
E2
L
N
e
b
K
BOTTOM VIEW
TOP VIEW
D2
   

2006-2014 Microchip Technology Inc. DS20001987C-page 15
TC4451/TC4452
     


TC4451/TC4452
DS20001987C-page 16 2006-2014 Microchip Technology Inc.
B
A
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
1RWH
Microchip Technology Drawing No. C04-018D Sheet 1 of 2
/HDG3ODVWLF'XDO,Q/LQH3$PLO%RG\>3',3@
eB
E
A
A1
A2
L
8X b
8X b1
D
E1
c
C
3/$1(
.010 C
12
N
NOTE 1
TOP VIEW
END VIEWSIDE VIEW
e

2006-2014 Microchip Technology Inc. DS20001987C-page 17
TC4451/TC4452
Microchip Technology Drawing No. C04-018D Sheet 2 of 2
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
1RWH
/HDG3ODVWLF'XDO,Q/LQH3$PLO%RG\>3',3@
Units INCHES
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e.100 BSC
Top to Seating Plane A - - .210
Molded Package Thickness A2 .115 .130 .195
Base to Seating Plane A1 .015
Shoulder to Shoulder Width E .290 .310 .325
Molded Package Width E1 .240 .250 .280
Overall Length D .348 .365 .400
Tip to Seating Plane L .115 .130 .150
Lead Thickness c.008 .010 .015
Upper Lead Width b1 .040 .060 .070
Lower Lead Width b.014 .018 .022
Overall Row Spacing eB - - .430
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
3.
1.
protrusions shall not exceed .010" per side.
2.
4.
Notes:
§
--
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
Pin 1 visual index feature may vary, but must be located within the hatched area.
§ Significant Characteristic
Dimensioning and tolerancing per ASME Y14.5M
e
DATUM A DATUM A
e
b
e
2
b
e
2
ALTERNATE LEAD DESIGN
(VENDOR DEPENDENT)

TC4451/TC4452
DS20001987C-page 18 2006-2014 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

2006-2014 Microchip Technology Inc. DS20001987C-page 19
TC4451/TC4452
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

TC4451/TC4452
DS20001987C-page 20 2006-2014 Microchip Technology Inc.
+(%,!-./(()*+01
     
