MICROTRONIX ViClaro IV GX User manual

Unit 126-4056 Meadowbrook Drive
London, ON Canada N6L 1E3
www.microtronix.com
Microtronix
Camera Link Development Kit
User Manual
Revision 1.9.0

Page 2 of 19
This User Manual provides basic information about using the
Microtronix ViClaro IV GX Camera Link Development Kit, PN: 6282-
03-01.
The following table shows the document revision history.
Date
Description
May 2011
Initial release –Version 1.0
June 2011
Camera Link Medium added - Version 1.1
August 2011
Added new Camera Link Receiver Board –Version 1.2
July 2012
Transmitter and PoCL - Version 1.3
August 2012
Camera Link Full added –Version 1.4
September 2012
Add new Camera Link Transmitter board - Version 1.5
June 13, 2013
Remove ViClaroIII receiver reference designs
July 08, 2013
Update for ViClaro IV reference designs –1.61
June 09, 2016
Update for Altera reference designs –1.9
E-MAIL
Support Information: support@microtronix.com
WEBSITE
General Website: http://www.microtronix.com
Downloads: http://www.microtronix.com/downloads/
Support FTP site: http://microtronix.leapfile.com
PHONE NUMBERS
General: (001) 519-690-0091
Fax: (001) 519-690-0092
Path/Filename
A path/filename
[SOPC Builder]$
<cmd>
A command that should be run from
within the Cygwin Environment.
Code
Sample code.
Indicates that there is no break between
the current line and the next line.
Document
Revision
History
How to Contact
Microtronix
Typographic
Conventions

Camera Link IP Core Design Kit –User Manual
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Table of Contents
E-mail............................................................................................................................................2
Website.........................................................................................................................................2
Phone Numbers............................................................................................................................2
Document Revision History ............................................................................................................. 2
How to Contact Microtronix ............................................................................................................. 2
Typographic Conventions................................................................................................................ 2
Options..........................................................................................................................................4
Introduction...................................................................................................................................... 4
Kit Contents..................................................................................................................................... 4
Related Documentation ................................................................................................................5
Design Kit Overview ........................................................................................................................ 5
Microtronix IP Cores .....................................................................................................................6
Reference Designs .......................................................................................................................7
Camera Link Receiver HSMC Daughter Card..............................................................................7
Overview of HSMC Daughter Cards................................................................................................ 7
Camera Link Transmitter HSMC Daughter Card..........................................................................8
HDMI Transmitter/Receiver HSMC Daughter Card......................................................................9
Cameral Link Software .................................................................................................................. 10
Installation...................................................................................................................................11
Camera Link IP Core ..................................................................................................................11
I2C Master-Slave-PIO IP Core ...................................................................................................11
Avalon Multi-port SDRAM Memory Controller IP Core...............................................................11
OpenCore Plus Evaluation License............................................................................................11
Overview of Microtronix IP Cores.................................................................................................. 11
IP Core Licenses ........................................................................................................................... 11
Installing the Microtronix IP Core license....................................................................................12
Full IP Core License....................................................................................................................12
Supported Video Resolution.......................................................................................................13
Camera Link Frame Grabber Reference Design........................................................................... 13
Microtronix ViClaro Video Host Board Reference Project ..........................................................14
Hardware Setup ..................................................................................................................... 14
Running the Frame Grabber Project...................................................................................... 15
Camera Link Transmitter Reference Design................................................................................. 16
Supported Video Resolution.......................................................................................................17
Microtronix ViClaro Video Host Board Reference Project..........................................................17
Hardware Setup ..................................................................................................................... 18
Running the Camera Link Transmitter Project....................................................................... 18

Camera Link IP Core Design Kit –User Manual
Page 4 of 19
This User Manual provides basic information about using the
Microtronix ViClaro IV GX Camera Link Development Kit, PN 6282-
03-01.
The kit is designed to help engineers use the Microtronix Camera Link
IP Core to build vision systems incorporating Camera Link™ Base,
Medium & Full Channel Link configurations. The Design Kit supports
camera control signals, serial communication, and video data. It is
designed to aid engineers building both Camera and Frame Grabber
devices.
The Microtronix ViClaro IV GX Camera Link Development Kit
includes the following components:
Microtronix ViClaro IV GX Video Host Board, PN 6282-00-00
AC Power Supply
Microtronix HDMI Transmitter / Receiver HSMC Daughter
Card, PN: 6256-01-01
Microtronix Camera Link IP Core with 1-year OpenCore Plus IP
Core license
Board mounting hardware
Quartus Reference Designs
Board schematics
Installation CD
The camera Link HSMC Daughter Cards are not included in the Kit.
These items are ordered separately to allow options for purchase of the
Camera Link receiver only, the transmitter only, or both options.
OPTIONS
The Kit can be purchased with the following options:
Microtronix Camera Link Receiver HSMC Daughter Card,
PN: 6283-01-01
Microtronix Camera Link Transmitter HSMC Daughter Card,
PN: 6287-01-01
MDR26 –MDR26 Male-Male Camera Link Cables,
PN: 811-MDR26-3M
Microtronix Quad Link LVDS Interface HSMC Daughter
Card, PN: 6253-01-01 and
Microtronix One meter Hirose –MDR26 Male Camera Link
Adapter Cables, PN: 811-MDR26-1M for use with the Quad
Link LVDS Interface HSMC Daughter Card.
Kit Contents
Introduction

Camera Link IP Core Design Kit –User Manual
Page 5 of 19
RELATED DOCUMENTATION
The Camera Link Design Kit includes Microtronix User Manuals and
schematics for the supplied HSMC daughter cards and user
documentation for the Microtronix IP cores used in the Quartus
reference designs.
The Microtronix ViClaro IV GX Camera Link Development Kit is supplied
with the Microtronix ViClaro IV GX Video Host Board and the
Microtronix HDMI Transmitter / Receiver HSMC Daughter Card. The
two boards are shown below:
Figure 1: ViClaro IV GX Video Host Board and HDMI Transmitter /
Receiver Daughter Card
Design Kit
Overview

Camera Link IP Core Design Kit –User Manual
Page 6 of 19
Figure 2: Camera Link Transmitter HSMC Daughter Card
with optional PN: 811-MDR26 cables
MICROTRONIX IP CORES
The ViClaro IV GX Camera Link Development Kit is supplied with a
1-year OpenCore Plus licenses for the following Microtronix IP cores:
Camera Link IP Core,
I2C Master-Slave-PIO IP Core; and
Avalon Multi-port SDRAM Memory Controller IP Core;
OpenCore Plus licenses enable the designer develop their system by:
1. Evaluating the behavior of the IP core within the targeted
system,
2. Verifying the functionality of the design, and
3. Evaluating its size and speed of the core quickly and easily.
The Quartus® II development software generates time-limited
programming files for designs containing the Microtronix IP, allowing
device programming and design verification before license purchase.

Camera Link IP Core Design Kit –User Manual
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REFERENCE DESIGNS
The following Quartus Reference Designs are supplied:
Camera Link Frame Grabber supporting Base, Medium, Full,
Full Octo and Full Deca modes on the Microtronix ViClaro IV
GX Video Host Board. This design requires the optional
Microtronix Camera Link Receiver HSMC Daughter Card.
Camera Link Trasmitter supporting Base, Medium, Full, Full
Octo and Full Deca modes on the Microtronix ViClaro IV GX
Video Host Board. This design requires the optional
Microtronix Camera Link Transmitter HSMC Daughter Card.
The Camera Link Frame Grabber design takes 24 bit RGB video from
Camera Link and outputs it as HDMI 720p video from the HDMI
Transmitter / Receiver Daughter Card.
The Camera Link Transmitter design takes 720p, 24 bit RGB video from
the HDMI Transmitter / Receiver Board and transmits it over the
Camera Link Interface.
In addition to the Microtronix Camera Link IP, the designs incorporate
the I2C and the Avalon SDRAM IP cores. The user can replace these
cores with IP from other vendors if they wish. The designs can also be
easily modified to target other development platforms or FPGA devices.
NOTE: The design was tested with an IMPERX ICL-B0610C-KC000
camera.
The following section provides a brief overview of the HSMC Daughter
Cards. For more detailed information the user should reference the
User Manual supplied with each of the cards.
CAMERA LINK RECEIVER HSMC DAUGHTER CARD
The Microtronix Camera Link Receiver HSMC Daughter Card (PN:
6283-01-01) is shown in Figure 3 below. It provides two Camera Link
MDR-26 female connectors (3M –14B26-SZLB-X00-OLC). The card
supports Power over Camera Link (PoCL).
Overview of
HSMC
Daughter
Cards

Camera Link IP Core Design Kit –User Manual
Page 8 of 19
Figure 3: Camera Link Receiver HSMC Daughter Card
Camera data output is compliant with Base Camera Link standard and
includes 12VDC Power over Camera Link (PoCL), 4 W max, 24 data
bits, four sync signals (LVAL, FVAL, DVAL and User Out), 1 reference
clock, four external inputs CC1, CC2, CC3, CC4 and a bi-directional
serial interface.
For additional information on the CL card please refer to the Camera
Link Receiver User Manual.
CAMERA LINK TRANSMITTER HSMC DAUGHTER CARD
The Microtronix Camera Link Transmitter HSMC Daughter Card (PN:
6287-01-01) is shown in Figure 3 below. It provides two Camera Link
MDR-26 female connectors (3M –14B26-SZLB-X00-OLC). The card
supports configuration to indicate Power over Camera Link (PoCL).

Camera Link IP Core Design Kit –User Manual
Page 9 of 19
Figure 4: Camera Link Transmitter HSMC Daughter Card
Camera data output is compliant with Base Camera Link standard and
includes 12VDC Power over Camera Link (PoCL), 4 W max, 24 data
bits, four sync signals (LVAL, FVAL, DVAL and User Out), 1 reference
clock, four external inputs CC1, CC2, CC3, CC4 and a bi-directional
serial interface.
For additional information on the CL card please refer to the Camera
Link Receiver User Manual.
HDMI TRANSMITTER/RECEIVER HSMC DAUGHTER CARD
The Microtronix HDMI Transmitter/Receiver HSMC Daughter Card
(PN: 6256-00-00) provides a HDMI output/input port. The HDMI port is
used to display the incoming Camera Link video.

Camera Link IP Core Design Kit –User Manual
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Figure 5: HDMI Transmitter/Receiver HSMC Daughter Card
For additional information on this card please refer to the HDMI
Transmitter/Receiver HSMC Daughter Card User Manual.
The Cameral Link Design Kit requires an installed version of the Altera
Quartus FPGA design software (either the Altera Web Edition or the Full
Edition).
The Cameral Link Design Kit software is supplied by Microtronix on a
CD or as a zipped file. If you received the latter, unzip the file to a
temporary file directory and run the setup.exe file. The software should
self-install from the CD or it can be manually installed by running the
setup.exe file.
WARNING: Remove older installations of the Cameral Link Design
Kit software (including previous version of the Microtronix
IP Cores) from the PC prior to installing the new version
of software.
Cameral Link
Software

Camera Link IP Core Design Kit –User Manual
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INSTALLATION
Follow these steps to install the Microtronix Camera Link IP Core
Design Kit files on your computer.
1. Insert the Microtronix Camera Link IP Core Design Kit
Installation CD into your CD-ROM (or equivalent). Or run the
setup file contained in the zip file.
2. The setup program for the package should start. If it doesn’t,
browse to the CD using Windows Explorer and double-click on
the setup icon.
3. Follow all the prompts. The setup program will attempt to auto-
detect the installation location of the Quartus II. Please correct
the specified paths if the setup program doesn’t or incorrectly
detects them.
CAMERA LINK IP CORE
The Microtronix Camera Link IP Core is designed for building vision
systems incorporating Camera Link™ communication interfaces
including Base, Medium & Full Channel Link configurations. The core
supports camera video data and optional PoCL SafePower control.
Camera control signals and serial communication are not directly
supported. The IP is designed for building both Camera and Frame
Grabber devices.
I2C MASTER-SLAVE-PIO IP CORE
The Microtronix I2C Master/Slave/PIO IP Core is a complete I2C
solution offering three modes of operation and support for standard I2C
bus transmission speeds. The I2C Master/Slave core is used to
configure the registers of the HDMI Transmitter.
AVALON MULTI-PORT SDRAM MEMORY CONTROLLER IP CORE
The Microtronix Avalon Multi-port SDRAM Memory Controller IP
Core is required to interface to the on-board DDR2 SDRAM devices. It
is designed to maximize the performance of the Altera Nios II processor
in Avalon® multi-master streaming data systems.
The Camera Link Design Kit is supplied with Open Cores Plus
evaluation licenses for all of the listed Microtronix IP cores.
OPENCORE PLUS EVALUATION LICENSE
An OpenCore Plus Evaluation license enables you to design and
evaluate your design in circuit on a hardware test platform. Microtronix
requires the customer NIC or Guard ID (from a Server or PC
Overview of
Microtronix IP
Cores
IP Core
Licenses

Camera Link IP Core Design Kit –User Manual
Page 12 of 19
workstation) in order to generate an Evaluation license to support
OpenCore Plus compilation.
To generate an Evaluation license, Microtronix requires one of two
things:
1. Your Altera Software Guard ID (dongle), this is a 9-digit number
starting with T. (Example: T000012345) or.
2. Your 12-digit Network MAC Address (Example: 0123456789AB)
Your NIC number is a 12-digit hexadecimal network card number that
identifies the Windows workstation serving the Quartus II Web Edition
license. You can find the NIC number by typing ipconfig /all at the
command prompt. Your NIC number is the number on the physical
address line, minus the dashes, for example, 00C04FA392EF.
Once either is received, Microtronix will send you the license file(s) to
enable Quartus to generate a .sof file for you to run on your target
board.
INSTALLING THE MICROTRONIX IP CORE LICENSE
To install an IP Core license, follow these steps:
1) Run the Altera Quartus II program and from the menu select >
Tools > License Setup. This menu gives the location of the folder and
name of the master license file used by Quartus. For example:
C:\altera\licences\T000085155.dat.
2) Open this license file with a text editor (i.e. Notepad).
3) In a separate text editor window, open the license_filename.dat file
provided by Microtronix.
4) Select all of the text in the Microtronix license file.
5) Paste this text into the Altera license.dat file at the end of the file.
6) If it is a Server License, you may need to edit the Server Name or
TCP Port in the header per notes in Server License.
7) Save this file and close the text editor.
8) Return to Quartus and start your project. For more information,
please visit http://altera.com/literature/an/an340.pdf
FULL IP CORE LICENSE
To generate pof program files incorporating the Camera Link IP core
requires the user to have purchased a Full IP Core license. These
licenses are generated by Microtronix based on a NIC or Guard ID

Camera Link IP Core Design Kit –User Manual
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supplied by the user. They can be supplied as either Floating Server or
a Node Locked PC workstation license.
After purchasing a Full License you receive your license file. Copy the
license file (license.dat) to your current Quartus license file and the
LVDS core (CC21_6246) will show in the Quartus License Setup
(Tools->License Setup).
additional licensing details.
The ViClaro IV GX Camera Link Development Kit is shipped with a
Frame Grabber Quartus Reference Design for the ViClaro IV (Cyclone
IV GX) board.
The reference design use a Camera Link video source and outputs the
received video through the HDMI card to a display. The reference
design can also output a colour bar test pattern to the HDMI monitor.
Pressing switch PB1 on the ViClaro IV switches between the test
pattern and the Frame Grabber camera input.
The design can be compiled for Base, Medium, Full, Full Octo or Full
Deca mode by setting a parameter in the design file. Pre-compiled sof
files are included for all modes.
NOTE: Microtronix tested with the IMPERX ICL-B0610C-KC000
camera and Vivid Engineering CLS-211 Camera Link
Simulator.
The Altera Cyclone V Reference design supports the Camera Link
receiver board and outputs the video on the SDI-TX output. The output
can be switched between a colour bar test pattern and the SDI-TX
output by pressing PB1. The design can be compiled for Base and
Medium. Full modes are not supported due to lack of dedicated clock
inputs on HSMC header. Pre-compiled sof files are included for Base
and Medium modes.
SUPPORTED VIDEO RESOLUTION
The reference designs support 24 bit and 36 bit RGB (which is mapped
to HDMI 24 bit RGB) frames from the camera link interface and
supports the following video resolution:
Camera resolution up to 1080p
Camera Link clock up to 85MHz
Camera Link
Frame Grabber
Reference
Design

Camera Link IP Core Design Kit –User Manual
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The camera input is scaled and frame-rate-converted to 720p60 HDMI
output.
As there is no single-pixel format defined for Full modes, the Camera
Link Full reference designs do not make use of all ports.
Figure 6: Block Diagram of Frame Grabber Reference
Design
MICROTRONIX VICLARO VIDEO HOST BOARD REFERENCE PROJECT
This section describes how to run the Quartus Reference Design on the
Microtronix ViClaro III Video Host board.
Hardware Setup
To run the Camera Link Frame Grabber Reference Project on the
ViClaro IV Video Host board requires the hardware to be installed and
connected as follows:
1. Install the Microtronix Camera Link HSMC Daughter Card on
HSMC Connector J3 of the ViClaro IV Host Video board.
a. Attach the MDR26 cable between J2 on the Camera Link
board and the Camera Link video source.

Camera Link IP Core Design Kit –User Manual
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b. For Camera Link Medium and Full modes, attach a second
MDR26 Camera Link Cable between J3 on the Camera Link
Board and the Camera Link video source.
2. Install the Microtronix HDMI Transmitter card on HSMC Connector,
J2 on the ViClaro IV Video Host board.
a. Attach the HDMI Cable to the HDMI connector J6 of the
board and connect to a suitable monitor.
Running the Frame Grabber Project
The default configuration demonstrates the basic operation of the
board. The following steps are required to load and run the Frame
Grabber Reference Design:
1. Apply power to the ViClaro IV Host Video board.
2. Use the Quartus programmer to download the selected sof file from
the reference design folder. The following pre-compiled files are
supplied:
a. example\viclaroiv_cl_receiver_BASE.sof
b. example\viclaroiv_cl_receiver_MEDIUM.sof
c. example\viclaroiv_cl_receiver_FULL.sof
d. example\viclaroiv_cl_receiver_FULL_OCTO.sof
e. example\viclaroiv_cl_receiver_FULL_DECA.sof
3. Use pushbutton switch PB0 to reset the design.
4. Observe the LEDs on the ViClaro IV GX Board:
LED0 indicates the receiver PLL for the Base mode link has
locked to a clock on the camera link Base port. This LED should
be ON for all camera link modes when a camera link source is
connected.
LED1 indicates the receiver PLL for the Medium mode link has
locked to a clock. This LED should be on for all modes except
Base when a camera link source is connected.
LED2 indicates the receiver PLL for the Full mode link has
locked to a clock. This LED should be on for the FULL modes
when a camera link source is connected.
5. The projects contain a small Nios II application that allows you to
switch between the colour bar test pattern and the Frame Grabber
video source. Use pushbutton switch PB1 to switch between the
Test Pattern and the Frame Grabber input. Note that the video will

Camera Link IP Core Design Kit –User Manual
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only switch to Frame Grabber Input if a valid camera link source is
connected.
6. The design treats the four camera link control signals (CC1 .. CC4)
as a 4 bit binary value that can be incremented by pressing PB2.
The ViClaro IV GX Camera Link Development Kit is shipped with a
Camera Link Transmitter Quartus Reference Design for the Microtronix
ViClaro IV (Cyclone IV GX) board.
The reference design can take either 720p 60 fps video from the HDMI
Transmitter / Receiver Board, or a locally generated color bar Test
Pattern, and transmits the image over Camera Link. For both sources, a
Microtronix logo overlay is mixed with the image. A NIOS II CPU
program slowly changes the position of the logo.
The design can be compiled for Base, Medium, Full, Full Octo or Full
Deca modes by changing a parameter in the top level design file. Pre-
compiled sof files are provided for each mode.
Camera Link
Transmitter
Reference
Design

Camera Link IP Core Design Kit –User Manual
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Figure 7: Block Diagram of Transmitter Reference Design
SUPPORTED VIDEO RESOLUTION
The design accepts HDMI input with 1280 x 720 pixel frame size at
either 59.94 or 60 fps (74.25 MHz pixel clock).
The reference design transmits 1280x720 pixel frames over camera link
with a 75 MHz pixel clock. For all camera link modes, the video
transmitted is 24 bit. The designs do not use all camera link ports when
operating in Medium and Full modes.
MICROTRONIX VICLARO VIDEO HOST BOARD REFERENCE PROJECT
This section describes how to run the Quartus Reference Design on the
Microtronix ViClaro III Video Host board.

Camera Link IP Core Design Kit –User Manual
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Hardware Setup
To run the Camera Link Camera Reference Project on the ViClaro IV
Video Host board requires the hardware to be installed and connected
as follows:
1. Install the Microtronix Camera Link Transmitter HSMC Daughter
Card on HSMC Connector J3 (HSMC 3) of the ViClaro IV Host
Video board.
a. Attach the MDR26 cable between J2 on the Camera Link
Transmitter HSMC Daughter Card board and the Frame
Grabber.
b. For Camera Link Medium and Full Modes, attach a second
MDR 26 cable between J3 on the Camera Link Transmitter
HSMC Daughter Card and the Frame Grabber.
2. Install the Microtronix HDMI Transmitter / Receiver HSMC
Daughter Card on J2 (HSMC 2) of the ViClaro IV Host Board.
Connect a 720p, 59.94 or 60 Hz video source to HDMI connector
J5.
Running the Camera Link Transmitter Project
The default configuration demonstrates the basic operation of the
board. The following steps are required to load and run the Reference
Design:
1. Apply power to the ViClaro IV Host Video board.
2. Use the Quartus programmer to download the selected sof file from
the reference design folder. The following pre-compiled files are
supplied:
a. example\viclaroiv_cl_transmitter_BASE.sof
b. example\viclaroiv_cl_transmitter_MEDIUM.sof
c. example\viclaroiv_cl_transmitter_FULL.sof
d. example\viclaroiv_cl_transmitter_FULL_OCTO.sof
e. example\viclaroiv_cl_transmitter_FULL_DECA.sof
3. Use pushbutton switch PB0 to reset the design.
4. The projects contain a small Nios II application that allows you to
switch between the colour bar test pattern and the HDMI input
signal video source. Use pushbutton switch PB1 to switch between
the sources.

Camera Link IP Core Design Kit –User Manual
Page 19 of 19
5. The design displays the state of the Camera Link Control Signals
(CC1 to CC4) on LED0 to LED3.
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