MiTAC 8381 User manual

SERVICE MANUAL FOR
8381
SERVICE MANUAL FOR
SERVICE MANUAL FOR
8381
8381
BY: Valley. Valley.Hu Hu
RepairTechnologyResearchDepartment /EDVD
RepairTechnologyResearchDepartment /EDVD
Jul.2003

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Contents
1. Hardware Engineering Specification ----------------------------------------------------------------------------
1.1 Introduction ----------------------------------------------------------------------------------------------------------
1.2 SystemHardwareParts----------------------------------------------------------------------------------------------
1.3 OtherFunctions------------------------------------------------------------------------------------------------------
1.4PeripheralComponents----------------------------------------------------------------------------------------------
1.5 Power Management--------------------------------------------------------------------------------------------------
1.6 Appendix1: VT 8235 GPIO DEFINITIONS ------------------------------------------------------------------------
1.7 Appendix2: H8 Pins Definitions -------------------------------------------------------------------------------------
2. SystemView& Disassembly --------------------------------------------------------------------------------------
2.1 SystemView ---------------------------------------------------------------------------------------------------------
2.2 SystemDisassembly -------------------------------------------------------------------------------------------------
3. Definition & Location of Connectors / Switches Setting ----------------------------------------------------
4. Definition & Location of Major Component ------------------------------------------------------------------
5. Pin Description of Major Component ---------------------------------------------------------------------------
5.1 Mobile AthlonXP(Thoroughbred / Barton) Processor model 8 --------------------------------------------------
5.2 VIA VT8372 North Bridge with S3 ProSavage8 AGP8X-----------------------------------------------------------
5.3 VIA VT8235 PCI-LPC South Bridge -------------------------------------------------------------------------------
6. SystemBlock Diagram---------------------------------------------------------------------------------------------
7. Maintenance Diagnostics ------------------------------------------------------------------------------------------
7.1 Introduction ----------------------------------------------------------------------------------------------------------
7.2 ErrorCodes ----------------------------------------------------------------------------------------------------------
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8. Trouble Shooting --------------------------------------------------------------------------------------------------
8.1 No Power -----------------------------------------------------------------------------------------------------------
8.2 Battery Can t Be Charged -----------------------------------------------------------------------------------------
8.3 No Display ----------------------------------------------------------------------------------------------------------
8.4 LCD No Display or Picture Abnormal----------------------------------------------------------------------------
8.5 External Monitor No Display or Color Abnormal----------------------------------------------------------------
8.6 Memory Test Error ------------------------------------------------------------------------------------------------
8.7 Keyboard and Touch-Pad Test Error-----------------------------------------------------------------------------
8.8 Hard DriveTest Error --------------------------------------------------------------------------------------------
8.9 CD-ROM DriveTest Error----------------------------------------------------------------------------------------
8.10 USB Port Test Error ---------------------------------------------------------------------------------------------
8.11 PC-Card Socket Fail ---------------------------------------------------------------------------------------------
8.12 LAN Test Error --------------------------------------------------------------------------------------------------
8.13 Audio Failure -----------------------------------------------------------------------------------------------------
8.14 Mini PCI Test Error ---------------------------------------------------------------------------------------------
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132
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136
9. Spare Parts List ----------------------------------------------------------------------------------------------------
10. SystemExploded Views -----------------------------------------------------------------------------------------
11. Circuit Diagram---------------------------------------------------------------------------------------------------
12. Reference Material-----------------------------------------------------------------------------------------------
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Contents
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1. HardwareEngineering Specification
1.1Introduction
The 8381 motherboard would support the AMD35WMobile Thoroughbred /Barton CPU with OPGA, 462 Socket,
which will support different speeds up to 2200+ forThoroughbred35W(L2 cache 256K) and to 2500+ for Barton
35W(L2 cache 512K).
This system is based on PCIarchitecture,which have standard hardware peripheral interface. The power
management complieswith Advanced Configuration and Power Interface (ACPI)2.0. Italso provides easy
configuration through CMOS setup, which is built in system BIOS software and can be pop-up bypressing F2 at
system start up or warm reset. System also provides icon LEDsto displaysystem status, such as Power indicator,
HDD,CDROM, NUM LOCK, CAP LOCK, SCROLL LOCK,WIRELESS LAN and Batterycharging status. It also
equipped 4USB ports.The memorysubsystem supports 256MB on board DDR memory,One JEDEC-standard 200-
pin, small-outline, dual in-line memory module (SODIMM) ,support PC2100.
Integrated VIA Apollo KN266 and S3 Graphics, ProSavage8 128-bit 2D/3D graphics controller with equivalent 8x
AGP performance in a single chip, 64-bit Advanced Memorycontroller supporting PC2100/PC1600 DDR SDRAM.
Combines with VIA VT8235 Vlink-LPC South Bridge with integrated audio, 4USB ports, ATA100 IDE and LAN
Mac.
To provide for the increasing number of multimedia applications,the AC97 CODEC CMI9738S is integrated onto
the motherboard.
Afull set of software drivers and utilities are available to allow advanced operating systems such as Windows 2000
and Windows XP Home/Professional Edition to take full advantage of the hardware capabilities such as bus

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mastering IDE, Windows 95-readyPlug &Play,Advanced Power Management (APM) and Advance configuration
and power interface (ACPI).
Following chapters will have more detail description for each individual sub-systems and functions.

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1.2SystemHardware Parts
Item System A System B
CPU AMD 35WAthlon XPCPUAMD 35W Athlon XPCPU
Corelogic VIAKN266 (VT8372 +VT8235) VIAKN266 (VT8372 +VT8235)
Memory onBoard DDRRAM:SamsungK4H561638D-TCB0DDRRAM: SamsungK4H561638D-TCB0
ACAdapter Delta:60W FSP:90WFSP090-1ADC21
IDEExternal DVD-ROM Driver 8X DVD MKE: SR-8177(8X)
IDEInternal Combo Drive 24*10*8*24 Combo(QSI:SBW-242)
USBExternalFDD driver W/O Mitsumi ext. FDD W/O Mitsumi ext. FDD
HDD Fujitsu 20GBMHT2020ATFujitsu 40GBMHT2040T
TFTLCD Display 14.1 XGAQDIQD141*1LH12 14.1 XGA(CMO:N141X6-L01)
Video Controller S3 ProSavage8S3 ProSavage8
Pointing Device SynapticsTM41PDM-311SynapticsTM41PDM-311
FIR/ SIR NoneNone
PCMCIA TI PCI1510 TI PCI1510
Audio CMI9783 CMI9783
I/O NoneNone
KeyboardController Hitachi H8/2140BHitachi H8/2140B
Fax Modem Askey V1456VQL-P1(INT)Askey1456VQL4A(INT)
Battery MSL6 cells 2000mAH(Panasoniccell) MSL6 cells 2000mAH(sanyo cell)

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1.2.1 The AMD AthlonXP processor model 8
The AMD AthlonXP processor model 8is the latest member of the AMD Athlonfamily of processors designed to
meet the computation-intensive requirements of cutting-edge software applications running on high-performance
desktop systems. Delivered in an OPGA package, the AMD AthlonXP processor model 8deliversthe integer,
floating-point, and 3D multimedia performance for highlydemanding applications running on x86 system platforms.
The AMD AthlonXP processor model 8 delivers compelling performance for cutting-edge software applications that
include high-speed Internet capability, digital content creation, digital photo editing, digital video, image
compression, video encoding for streaming over the Internet, soft DVD, commercial 3D modeling, workstation-class
Computer-Aided Design (CAD), commercial desktop publishing, and speech recognition. The AMD AthlonXP
processor model 8 also offers the scalabilityand reliabilitythat ITmanagers and businessusersrequire for enterprise
computing.
The AMD AthlonXP processor model 8features aseventh-generation micro architecturewith an integrated,
exclusive L2 cache, which supports the growing processor and system bandwidth requirements of emerging software,
graphics, I/O, and memory technologies. The high-speed execution coreof the AMD AthlonXP processor model 8
includes multiple x86 instruction decoders, adual-ported 128-Kbytesplit level-one (L1) cache, an exclusive 256-
KbyteL2 cache, three independent integer pipelines, three addresscalculation pipelines, and asuper scalar, fully
pipelined, out-of-order,three-way floating-point engine. The floating-point engine is capable of delivering
outstanding performance on numerically complex applications.
The features of the AMD AthlonXP processor model 8 are Quaint Speed architecture, a high-performance full-speed
cache, a266-MHz, 2.1-Gigabyte per second systembus, and 3DNow! Professional technology.The AMD Athlon
system bus combines the latest technological advances, such as point-to-point topology,source-synchronous packet-
based transfers, and low-voltage signaling to provide an extremely powerful, scalable busfor an x86 processor.

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The AMD AthlonXP processor model 8is binary-compatible with existing x86 software and backwards compatible
with applications optimized for MMX, SSE, and 3DNow! technology.Using adata format and Single-Instruction
Multiple-Data (SIMD) operations based on the MMX instruction model, the AMD AthlonXP processor model 8
can produce as many as four, 32-bit, single-precision floating-point results per clock cycle. The 3DNow!
Professional technology implemented in the AMD AthlonXP processor model 8includes new integer multimedia
instructions and software-directed data movement instructions for optimizing such applications as digital content
creation and streaming video for the internet, as well as new instructions for Digital Signal Processing (DSP) and
communications applications.
The following featuressummarize the AMD AthlonXP processor model 8QuantiSpeedarchitecture:
An advanced nine-issue, super pipelined, super scalar x86 processor micro architecture designed for increased
Instructions Per Cycle (IPC) and high clock frequencies
Hardware data pre-fetch that increases and optimizes performance on high-end software applications utilizing
high-bandwidth system capabilities
Fully pipelined floating-point unit that executes all x87(floating-point), MMX, SSE and 3DNow! Instructions
Advanced two-level Translation Look-aside Buffer (TLB) structures for both enhanced data and instruction
address translation.
The AMD AthlonXP processor model 8with QuantiSpeedarchitecture incorporates three TLB optimizations: the
L1 DTLB increases from 32 to 40 entries, the L2 ITLB and L2 DTLBboth use exclusive architecture, and the TLB
entries can be speculativelyloaded.
The AMD AthlonXP processor model 8 delivers excellent system performance in acost-effective, industry-standard
form factor. The AMD AthlonXP processor model 8 is compatible with motherboards based on Socket A.

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1.2.2 System frequency
System frequencysynthesizer ICS950902 pinconfiguration is suitable for VIA KN266 chipsetwith PC133 or DDR
memory.
OutputFeatures:
1 -Pair of differential CPU clocks @ 3.3V (CK408)/ 1 -Pair of differential open drain CPU clocks (K7)
1 -Pair of differential push pull CPU_PP clocks @ 2.5V
3 -AGP @3.3V
7 -PCI @ 3.3V
1 -48MHz @ 3.3V fixed
1 -24_48MHz @ 3.3V
2 -REF @3.3V, 14.318MHz
Features/Benefits:
Programmable output frequency.
Programmable output divider ratios.
Programmable output rise/fall time.

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Programmable output skew.
Programmable spread percentage for EMI control.
Watchdog timer technologyto reset system if system malfunctions.
Programmable watch dog safe frequency.
Support I 2 C Index read/write and block read/write operations.
Uses external 14.318MHz crystal.
KeySpecifications:
CPU_CS -CPUT/C: <250ps
CPU_CS -AGP: <250ps
CPU -DDR/SD: <250ps
PCI -PCI: <500ps

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1.2.3 Core Logic VIA KN266+ VIA 8235
1.2.3.1 VIAKN266 Chipset
KeySpecifications:
High Performance CPU Interface Socket-A support for AMD_ AthlonProcessors.
266 or 200 MHz CPU Front Side Bus (FSB).
Built-in Phase Lock Loop circuitryfor optimal skew control within andbetween clocking regions.
Five outstanding transactions (four In-Order Queue (IOQ) plus one output latch).
Dynamic deferred transaction support.
High Bandwidth 266MB/sec 8-bit V-Link Host Controller:
Supports 66 MHz V-Link Host interface with peak bandwidth of 266MB/sec.
V-Link operates at 2X or 4X modes.
Full-duplex commands with separate strobe / command.
Request / Data split transaction.
Configurable outstanding transaction queue forHost to V-Link Client accesses.

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Supports Defer / Defer-Replytransactions.
Transaction assurance for V-Link Host to Client access (eliminates V-Link Host-Client Retrycycles).
Intelligent V-Link transaction protocol to eliminate data wait-state / throttle transfer latency. All V-Link
transactions (both Host and Client) have a consistent view of transaction data depth and buffer size to avoid data
overflow.
Highlyefficient V-Link arbitration with minimum overhead. All V-Link transactions have predictable cycle
length with known Command / Data duration.
Additional Features:
250 MHz RAMDAC with Gamma Correction.
12-bit interface to external TV encoder(No used).
I2C Serial Bus and DDC Monitor Communications.
2.5V Core and Mixed 3.3V/5V Tolerant and GTL+ I/O.
35 x 35mm HSBGA (Ball Grid Arraywith Heat Spreader) package with 552 balls.
Advanced High-Performance SDR / DDR DRAM Controller:
DRAM interface synchronous with host CPU (100/133 MHz) for most flexible configuration.

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DRAM interface maybe faster than CPU by33 MHz to allow use of 133 MHz memory with 100 MHz FSB.
DRAM interface maybe slower than CPU by33 MHz to allow use of 100 MHz memorywith 133 MHz FSB.
Concurrent CPU, AGP, and V-Link access.
Supports SDR and DDR SDRAM memory types.
Clock Enable (CKE) control for SDRAM power reduction in high speed systems.
Mixed 1M / 2M / 4M / 8M / 16M / 32M / 64MxN DRAMs.
Supports 8 banks up to 4 GB DRAMs(512Mb x8/x16 DRAM technology)for registered SDR/DDR modules.
Supports 6 banks up to 3 GB DRAMs(512Mb x8/x16 DRAM technology)for unbufferedSDR/DDR modules.
Flexible row and column addresses. 64-bit data width only.
LVTTL 3.3V DRAM interface with 5V-tolerant inputs for SDR SDRAM and 2.5V SSTL-2 DRAM interface for
DDR SDRAM.
Programmable I/O drive capabilityfor MA, command, and MD signals.
Dual copies of control signals for improved drive.
Two-bank interleaving for 16Mbit SDRAM support.
Two-bank and four bank interleaving for 64Mbit SDRAM support.
Supports maximum 8-bank interleave (i.e., 8 pages open simultaneously); banks are allocated based on LRU.

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Seamless DRAM command scheduling for maximum DRAM bus utilization.
Four cache lines (16 quadwords) of CPU to DRAM write buffers.
Four cache lines of CPU to DRAM read prefetchbuffers.
Read around write capabilityfornon-stalled CPU read.
Speculative DRAM read before snoop result.
Burst read and write operation.
x-1-1-1-1-1-1-1 back-to-back accesses for SDR SDRAM.
x-1/2-1/2-1/2-1-1/2-1/2-1/2 back-to-back accesses for DDR SDRAM.
Supports DDR SDRAM CL 2/2.5/3 and 1T per command.
Decoupled and burst DRAM refresh with staggered RAS timing (CAS before RAS or self refresh).
Integrated ProSavage8 2D/3D/Video Accelerator:
Optimized Shared Memory Architecture (SMA).
Equivalent 8x AGP internal performance.
8 / 16 / 32 MB frame buffer using system memory.
Floating point triangle setup engine.

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Single cycle 128-bit 3D architecture.
8M triangles/second setup engine.
140M pixels/second trilinearfill rate.
Microsoft DirectX texture compression.
Next generation, 128-bit 2D graphics engine.
High qualityDVD video playback.
Flat panel monitor support.
2D/3D resolutions up to 1920x1440.
3D Rendering Features:
Single-pass multiple textures.
Anisotropicfiltering.
8-bit stencil buffer.
32-bit true color rendering.
Specularlighting and diffuse shading.
Alpha blending modes.

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Massive 2K x 2K textures.
MPEG-2 video textures.
Vertex and table fog.
16 or 24-bit Z-buffering.
Reflection mapping, texture morphing, shadows, procedural textures and atmospheric effects.
2D Hardware Acceleration Features:
ROP3 TernaryRaster Operation BitBLTs.
8, 16, and 32 bppmode acceleration.
Motion Video Architecture:
High qualityup/down scaler.
Planar to packed format conversion.
Motion compensation for full speed DVD playback.
Hardware subpictureblending and highlights.
Multiple video windows for video conferencing.

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Contrast, hue, saturation, brightness and gamma controls.
Digital port for NTSC/PAL TV encoders.
Extensive LCD Support:
Integrated 2-channel 110 MHz LVDS interface with 4-bit data path per channel.
Support for all resolutions up to 1600x1200.
Panel power sequencing.
Hardware Suspend/Standbycontrol.
Flat Panel Monitor Support:
12-bit TFTflat panel interface to TMDS encoders.
Digital Vis3ual Interface (DVI) 1.0 compliant.
Advanced System Power Management Support:
Power down of SDRAM (CKE).
Independent clock stop controls for CPU / SDRAM and on-chip AGPbus.

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Clock run and clock generator control for on-chip AGP bus.
VTT suspend power plane preserves memorydata.
Suspend-to-DRAM and self-refresh power down.
Low-leakage I/O pads.
ACPI1.0B and PCIB us Power Management 1.1 compliant.
1.2.3.2 VIAVT8235 V-LINK CLIENT HIGHLY INTEGRATED SOUTH BRIGDE
High Bandwidth 533 MB/s 8-bit V-Link Client Controller:
Supports 66 MHz V-Link Client interface with peak bandwidth of 533MB/sec.
V-Link operates in 2x,4x, and 8x modes.
Full duplex commandswith separate Strobe / Command.
Request / Data split transaction.
Configurable outstanding transaction queue forV-Link Client accesses.
Auto Client Retry to eliminate V-Link Host-Client Retry cycles.
Auto connect / reconnect capabilityand dynamic stop for minimumpower consumption.

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Paritychecking to insure correct data transfers.
Integrated Peripheral Controllers:
Integrated Fast Ethernet Controller with 1 / 10 / 100 Mbitcapability.
Integrated USB 2.0 Controller with three root hubs and six function ports.
Dual channel UltraDMA-133 / 100 / 66 / 33 master mode EIDE controller.
AC-link interface for AC-97 audio codecand modem codec.
HSP modem support.
Integrated DirectSound compatible digital audio controller.
LPC interface for Low Pin Count interface to Super-I/O or ROM.
Integrated LegacyFunctions:
Integrated Keyboard Controller with PS2 mouse support.
Integrated DS12885-style Real Time Clock with extended 256 byte CMOS RAM and Day/Month Alarm for
ACPI.
Integrated DMA, timer, and interrupt controller.

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Serial IRQ for docking and non-docking applications.
Fast reset and Gate A20 operation.
Concurrent PCI Bus Controller:
33 MHz operation.
Supports up to six PCI masters.
Peer concurrency.
Concurrent multiple PCI master transactions; i.e., allow PCI masters from both PCI buses active at the same time.
Zero wait state PCI master and slave burst transfer rate.
PCI to system memory data streaming up to 132Mbyte/sec (data sent to north bridge via high speed V-Link
Interface).
PCI master snoop ahead and snoop filtering.
Eight DWof CPU to PCI posted write buffers.
Byte merging in the write buffers to reduce the number of PCI cycles and to create further PCI bursting
possibilities.
Enhanced PCI command optimization (MRL, MRM, MWI, etc.)
Four lines of post write buffers from PCI masters to DRAM.