Nintendo Ultra64 Manual

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Version 1.1
Nintendo Ultra64 RSP Programmer’s Guide
Silicon Graphics Computer Systems, Inc.
2011 N. Shoreline Blvd.
Mountain View, CA 94043-1389
©1996 Silicon Graphics Computer Systems, Inc. All Rights Reserved.

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Table of Contents
1. Introduction..................................................................................................................... 15
Document Description ................................................................................................. 16
What It Is.................................................................................................................. 16
What It Is Not .......................................................................................................... 16
Information Presentation....................................................................................... 17
RSP Software Development Tools.............................................................................. 19
rspasm....................................................................................................................... 19
cpp............................................................................................................................. 20
m4.............................................................................................................................. 21
buildtask................................................................................................................... 21
rsp2elf ....................................................................................................................... 21
rsp, rspg.................................................................................................................... 21
Gameshop Debugger (gvd)................................................................................... 22
2. RSP Architecture............................................................................................................. 23
Overview........................................................................................................................ 24
Slave to the CPU...................................................................................................... 24
Part of the RCP........................................................................................................ 24
R4000 Core ............................................................................................................... 25
Clock Speed.............................................................................................................. 26
Vector Processor...................................................................................................... 26
Major R4000 Differences .............................................................................................. 27
Pipeline Depth......................................................................................................... 27
No Interrupts, Exceptions, or Traps..................................................................... 27
Coprocessors............................................................................................................ 27
Missing Instructions ............................................................................................... 27

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Modified Instructions............................................................................................. 28
IMEM.............................................................................................................................. 29
Addressing............................................................................................................... 29
Explicitly Managed................................................................................................. 29
DMEM ............................................................................................................................ 30
Addressing............................................................................................................... 30
Explicitly Managed Resource................................................................................ 30
External Memory Map ................................................................................................. 31
Scalar Unit Registers..................................................................................................... 32
SU Register Format................................................................................................. 32
Register 0.................................................................................................................. 32
Register 31................................................................................................................ 32
SU Control Registers............................................................................................... 33
Vector Unit Registers.................................................................................................... 34
VU Register Format................................................................................................ 34
VU Register Addressing ........................................................................................ 34
Computational Instructions........................................................................ 34
Loads, Stores, and Moves ........................................................................... 35
Accumulator ............................................................................................................ 36
VU Control Registers.............................................................................................. 36
Vector Compare Code Register (VCC) ..................................................... 36
Vector Carry Out Register (VCO).............................................................. 37
Vector Compare Extension Register (VCE).............................................. 38
SU and VU Interaction ................................................................................................. 39
Dual Issue of Instructions...................................................................................... 39
RSP Instruction Set........................................................................................................ 40
Instruction Formats................................................................................................. 40
SU Instruction Format................................................................................. 40

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VU Instruction Format ................................................................................ 40
Distinguishing SU and VU Instructions.............................................................. 40
Illegal Instructions .................................................................................................. 40
Execution Pipeline ........................................................................................................ 41
RSP Block Diagram................................................................................................. 41
Mary Jo’s Rules........................................................................................................ 43
Register Hazards..................................................................................................... 43
SU is Bypassed......................................................................................................... 44
Coprocessor 0 ............................................................................................................... 45
Interrupts, Exceptions, and Processor Status............................................................ 46
Interrupts.................................................................................................................. 46
Exceptions................................................................................................................ 46
Processor Status....................................................................................................... 46
3. Vector Unit Instructions................................................................................................. 47
VU Loads and Stores.................................................................................................... 48
Normal...................................................................................................................... 50
Packed....................................................................................................................... 52
Transpose ................................................................................................................. 54
VU Register Moves....................................................................................................... 56
VU Computational Instructions.................................................................................. 57
Using Scalar Elements of a Vector Register ........................................................ 58
VU Multiply Instructions............................................................................................. 61
Vector Multiply Examples..................................................................................... 64
VU Add Instructions .................................................................................................... 67
Vector Add Examples............................................................................................. 68

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VU Select Instructions.................................................................................................. 70
Vector Select Examples .......................................................................................... 73
VU Logical Instructions ............................................................................................... 74
VU Divide Instructions ................................................................................................ 75
Reciprocal Table Lookup ....................................................................................... 77
Higher Precision Results........................................................................................ 78
Vector Divide Examples......................................................................................... 78
4. RSP Coprocessor 0 .......................................................................................................... 81
Register Descriptions.................................................................................................... 82
RSP Point of View................................................................................................... 82
$c0................................................................................................................... 83
$c1................................................................................................................... 83
$c2, $c3........................................................................................................... 83
$c4................................................................................................................... 85
$c5................................................................................................................... 88
$c6................................................................................................................... 88
$c7................................................................................................................... 88
$c8................................................................................................................... 88
$c9................................................................................................................... 89
$c10................................................................................................................. 89
$c11................................................................................................................. 90
$c12................................................................................................................. 92
$c13................................................................................................................. 92
$c14................................................................................................................. 93
$c15................................................................................................................. 93
CPU Point of View.................................................................................................. 93
Other RSP Addresses................................................................................... 95
DMA ............................................................................................................................... 96
Alignment Restrictions........................................................................................... 96
Timing....................................................................................................................... 96

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DMA Full.................................................................................................................. 96
DMA Wait................................................................................................................ 96
DMA Addressing Bits ............................................................................................ 97
CPU Semaphore...................................................................................................... 97
DMA Examples ....................................................................................................... 97
Controlling the RDP ................................................................................................... 100
How to Control the RDP Command FIFO........................................................ 100
Examples ................................................................................................................ 101
5. RSP Assembly Language............................................................................................. 105
Different From Other MIPS Assembly Languages ................................................ 106
Why?....................................................................................................................... 106
Major Differences from the R4000 Instruction Set ........................................... 106
Syntax ........................................................................................................................... 107
Tokens..................................................................................................................... 107
Identifiers ............................................................................................................... 107
Constants................................................................................................................ 107
Operators................................................................................................................ 108
Comments.............................................................................................................. 108
Program Sections................................................................................................... 109
Labels...................................................................................................................... 109
Keywords............................................................................................................... 109
Expressions ............................................................................................................ 110
Expression Operators................................................................................ 110
Precedence .................................................................................................. 111
Expression Restrictions............................................................................. 111
Registers ................................................................................................................. 112
Vector Register Element Syntax.......................................................................... 112
Program Statements.............................................................................................. 113
Assembly Directives................................................................................................... 114
.align........................................................................................................................ 114

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.bound..................................................................................................................... 114
.byte......................................................................................................................... 115
.data......................................................................................................................... 115
.dmax ...................................................................................................................... 115
.end.......................................................................................................................... 116
.ent........................................................................................................................... 116
.half.......................................................................................................................... 116
.name....................................................................................................................... 116
.print........................................................................................................................ 117
.space....................................................................................................................... 117
.symbol ................................................................................................................... 117
.text.......................................................................................................................... 117
.unname.................................................................................................................. 118
.word....................................................................................................................... 118
BNF Specification of the RSP Assembly Language................................................ 119
6. Advanced Information................................................................................................. 125
DMEM Organization and Usage ............................................................................. 126
Jump Tables ........................................................................................................... 126
Constants................................................................................................................ 126
Labels in DMEM ................................................................................................... 127
Dynamic Data........................................................................................................ 127
Diagnostic Information ........................................................................................ 127
Performance Tips........................................................................................................ 128
Dual Execution...................................................................................................... 128
Vectorization.......................................................................................................... 128
Software Pipelining ................................................................................... 130
Loop Inversion ........................................................................................... 131
Loop Unrolling........................................................................................... 132
Program Flow of Control.......................................................................... 132
Profiling RSP Code ............................................................................................... 133

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Microcode Overlays.................................................................................................... 135
Memory System Implications ............................................................................. 135
Entirely Up to You................................................................................................ 135
RSP Assembler Tricks........................................................................................... 136
A Sample RSP Linker ........................................................................................... 136
Overlay Example................................................................................................... 138
Overlay Makefile........................................................................................ 138
Overlay DMEM Initialization .................................................................. 139
Overlay Initialization Code...................................................................... 140
Overlay Decision Code ............................................................................. 141
Overlay DMA Code................................................................................... 141
Controlling the RSP from the CPU.......................................................................... 142
Starting RSP Tasks................................................................................................ 142
RSP Boot Microcode .................................................................................. 142
Hidden OS Functions........................................................................................... 143
__osSpDeviceBusy..................................................................................... 143
__osSpRawStartDma()............................................................................... 143
__osSpRawReadIo()................................................................................... 143
__osSpRawWriteIo().................................................................................. 144
__osSpGetStatus() ...................................................................................... 144
__osSpSetStatus() ....................................................................................... 144
__osSpSetPc().............................................................................................. 144
Microcode Debugging Tips....................................................................................... 145
RSP Yielding ................................................................................................................ 147
Requesting a Yield ..................................................................................... 148
Checking for Yield ..................................................................................... 148
Yielding ....................................................................................................... 148
Saving a Yielded Process .......................................................................... 149
Restarting a Yield Process......................................................................... 149
A. RSP Instruction Set Details.......................................................................................... 151
Instruction Notation Examples........................................................................... 154

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