Nintendo Game boy advance Owner's manual

AGB-06-0001-002-B13

Released: May 27, 2005

Programming Manual

Version 1.35



1999-2005 NINTENDO

ii

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AGB-06-0001-002-B13

Released: May 27, 2005

"Confidential"

These coded instructions, statements, and

computer programs contain proprietary

information of Nintendo of America I

nc. and/or Nintendo Company Ltd., and are pro-

tected by Federal copyright law. They may not be disclosed to third

parties or copied

or duplicated in any form,

in whole or in part, without the

prior written consent of Nin-

tendo.



1999-2005 NINTENDO

TM and ®

are trademarks of Nintendo.

All other trademarks and copyrights are pro

perty of their respective owners.

May 25, 2005

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Released: May 27, 2005

Table of Contents

Contents

Revisi

on

History.....................

............

.............

............

............xiii

Introdu

ction

...........

.............

............

..........

.............

....

xxi

Using

This

Manua

l

.............

..........

.............

...xxii

1

The

Game

Boy

Advan

ce

System

.............

..............

.............

..............

...........1

1.1

System

Overv

iew.....................

.............

............

.............

............

.............

..........1

2

System

Configu

ration

............

.............

...........

........3

2.1

CPU

Block

Diagram...............

.............

............

.............

..........3

2.2

Complet

e

Block

Diagra

m

.............

............

....

4

2.3

Memory

Config

uration

and

Acces

s

Widths................

.............

...............

.............

..........5

2.4

Little-E

ndian................

............

.............

............

.............

..........

............5

3

Game

Boy

Advanc

e

Memory..

.............

..............

.............

...........

......7

3.1

Overall

Memory

Map

.............

............

.............

..........7

3.2

Memory

Config

uration

...........

.............

.........8

3.2

.1

Gam

e

Boy

Adv

anc

e

Inte

rna

l

Memo

ry

....

.....

....

.....

....

.....

....

.....

....

.....

....

.....

....8

3.2.2

Game

Pak

Memory

............

.............

............

.............

............

......9

3.3

Game

Pak

Memory

Wait

Control........................

.............

......9

3.3.1

Acces

s

Timing........

.............

............

.............

............

.............

............

...12

3.3.2

Game

Pak

Bus......................

.............

............

.............

...........

.

13

4

LCD

.............

............

.............

............

.............

............

..........

............

............15

4.1

LCD

Status

............

.............

............

.............

............

.............

............

.........

....

16

4.1.1

V

Counter.................

.............

............

..............

...........

.............

..........

....16

4.1.2

Genera

l

LCD

Status..................

.............

............

.............

........16

5

Image

System..

.............

............

.............

..........

.............

....

19

5.1

BG

Modes................

............

.............

............

.............

............

.............

............21

5.1.1

Details

of

BG

Modes

.............

............

.............

............21

5.1.2

VRAM

Memory

Map...............

.............

..............

.........23

6

Rende

ring

Funct

ions

.............

............

.............

...........

.......25

6.1

Charact

er

Mode

BG

(BG

Modes

0-2)

.............

..............

.............

.......25

6.1.1

BG

Control

............

.............

............

.............

...........

.............

............

.....25

6.1.2

Mosaic

Size............

............

.............

............

.............

............

...........

.....29

6.1.3

VRAM

Addres

s

Mappin

g

of

BG

Data........................

.............

..............

............30

6.1.4

Charac

ter

Data

Format

............

.............

............

.........32

6.1

.5

BG

Scr

een

Dat

a

For

mat

....

.....

....

.....

....

.....

....

.....

....

.....

....

.....

....

.....

....

.

33

6.1.

6

BG Scre

en Data Ad

dre

ss Mapp

ing for th

e LCD Scre

en

....

.....

....

.....

....

....35

6.1

.7

BG

Rota

tion

and

Sca

ling

Fea

ture

s

....

.....

....

.....

....

.....

....

.

40

6.1.8

BG

Scroll

ing

...........

.............

............

.............

............

...........

....42

6.2

Bitmap

Mode

BGs

(BG

Modes

3-5)

..............

............

.............

............

...........43

6.2.1

BG

Control

............

.............

............

.............

...........

.............

............

.....43

6.2.2

BG

Rotatio

n/Scal

ing...............

.............

............

.............

...........43

6.2.3

Pixel

Data..............

.............

............

.............

............

..........

.......44

6.2.

4

Pix

el Data Addre

ss Mappi

ng for

the LCD Scree

n

....

.....

....

.....

....

....44

6.3

OBJ

(Object

)

.............

............

.............

............

..........

............47

6.3.1

OBJ

Functi

on

Overvie

w

............

.............

............

.............

............

.........47

6.3.2

Charac

ter

Data

Mappin

g

...........

.............

.......48

6.3.3

OAM

............

.............

............

.............

............

........

.......50

6.3

.4

OBJ

Rot

atio

n/S

cal

ing

Fea

ture

.....

....

.....

....

.....

....

.....

....

.....

..57

6.4

Displa

y

Priorit

y

of

OBJ

and

BG..............

.............

....58

6.4.1

Priority

Among

BGs

............

.............

............

.............

............

.............

..

58

6.4.2

Priority

Among

OBJs.............

.............

............

.............

............58

6.4.3

Priority

Among

BGs

and

OBJs..............

............

.............

............

..............

.........59

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AGB-06-0001-002-B13

Released: May 27, 2005

7

Color

Palette

s

...........

.............

............

.............

...........

............

........61

7.1

Color

Palette

Overvi

ew

.............

...........

......61

7.1.1

16

Colors

x

16

Palette

s

............

.............

........61

7.1.2

256

Colors

x

1

Palette........

.............

.

61

7.1.3

Color

0

Transp

arenc

y

............

.............

..........61

7.2

Color

Palette

RAM

............

.............

............

.............

..............

.............

............

...........

..

62

7.3

Color

Data

Format

...............

............

.............

............

.............

............

..........

..

63

8

Window

Featur

e

............

.............

............

.............

..............

.............

...........

............

..

65

8.1

Window

Positio

n

Setting.......................

............

.............

............

.............

.......65

8.2

Window

Contro

l

............

.............

..............

.............

............

.............

.........

.......65

8.2.1

Control

of

Inside

of

Window

............

.............

............

.............

..

66

8.2

.2

Con

trol of Outs

ide of Wind

ow and Insi

de of OBJ Windo

w

.....

....

.....

....

.....

....

.....

....

.....66

9

Color

Specia

l

Effects

............

.............

............

.............

...........

........67

9.1

Selectio

n

of

Color

Specia

l

Effects.......

.............

............

.............

........67

9.2

Color

Specia

l

Effects

Process

ing...........

.............

............

.............

............

......69

9.2.1

Coeffic

ients

for

Color

Specia

l

Effects............

............

.............

............

.............

..

69

10

Sound

............

.............

............

.............

............

.............

..........

.............

........71

10.1

Sound Bl

ock Diag

ram

............

.............

............

.............

............

..............

.........71

10.2

Direct

Sound

s A a

nd B

............

.............

..............

.............

...........

......71

10.2.1

Sound

FIFO

Input

Registe

rs

............

...............

.............

............

.............

............72

10.3

Sound

1

.............

...........

..............

............

.............

............

.............

............

......73

10.4

Sound

2

.............

............

.............

............

..........

......76

10.5

Sound

3

.............

............

.............

............

..........

......78

10.5.1

Wavefo

rm RA

M.....................

.............

...........

.............

..............

...........

.............

.

81

10.6

Sound

4

.............

............

.............

............

..........

......82

10.7

Sound Control................

............

..............

............

.............

............

..........

........84

10.8

Sound P

WM Con

trol

..............

.............

............

.............

........87

11

Timer

.............

............

..............

.............

............

.............

.........

.............

........89

11.1

Timer

Setting

............

.............

............

.............

...........

..........89

11.2

Timer Co

ntrol

.............

............

.............

............

.............

...........

..........89

12

DMA Transfer

.............

............

..............

.............

..........

............

......91

12.1

DMA 0

............

.............

............

.............

..........

..........91

12.1.1

Source

Address

...........

.............

............

.............

............

.............

.........92

12.1.2

Destin

ation

Addres

s

.............

..............

.............

...........92

12.1.3

Word

Count...................

............

.............

.......92

12.1.4

DMA

Contro

l

.............

............

.............

...........93

12.2

DMA 1 and 2.................

.............

..............

.............

........

.......95

12.2.1

Source

Address

...........

.............

............

.............

............

.............

.........95

12.2.2

Destin

ation

Addres

s

.............

..............

.............

...........95

12.2.3

Word

Count...................

.............

............

.............

.......96

12.2.4

DMA

Contro

l

.............

............

.............

...........97

12.3

DMA 3

............

.............

............

.............

..........

..........99

12.3.1

Source

Address

...........

.............

............

.............

............

.............

.........99

12.3.2

Destin

ation

Addres

s

.............

..............

.............

...........99

12.3.3

Word

Count...................

.............

............

.............

.....100

12.3.4

DMA

Contro

l

.............

............

.............

.........100

12.3.5

Display

Synchr

onizati

on DMA............

..............

............

.............

............

.........103

12.4

DMA Pro

blems:

How to

Avoid

Them

............

.............

............

.........104

12.4.1

When

the D

MA Re

peat F

unctio

n is

not

Used

...........

.............

............104

12.4.2

When

the DM

A Rep

eat F

unction

is Use

d

.............

...........

.............

.....104

13

Commun

ication Functions......................

.............

..............

.............

..........107

13.1

8-Bit/32

-Bit No

rmal S

erial

Commun

ication

.............

..............

.............

.........108

13.1.1

SIO

Timing

Chart

.............

.109

13.1.2

32-Bit

Normal

Serial

Communic

ation

Data R

egister

s

.............

............

............110

May 25, 2005

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Released: May 27, 2005

13.1.3

Control

Regist

er

.............

..............

............

.............

............

.....110

13.2

16-Bit Mult

i-playe

r Communic

ation.....................

............

.............

............

.....113

13.2.1

Connec

tion S

tatus

during

Multi-p

layer

Commun

ication

.............

..............

.......113

13.2.2

Data

Registe

rs

...............

.............

............

.............

............

......115

13.2.3

Data

Transiti

on

Diagram

.............

...........

.............

............

.............

......116

13.2.4

Control

Regist

er

.............

..............

............

.............

............

.....117

13.3

UART

Communi

cation

Functio

ns

.............

..............

............

.............

............

.............120

13.3.1

Data

Registe

r

............

.............

............

.............

............

..........120

13.3.2

Relatio

ns Be

tween

Data

Registe

r, FIF

O, and

Shift

Registe

r

.............

.............120

13.3.3

When

FIFO

is

not

Used

............

..............

............

.............

............

.............

......120

13.3.4

When

FIFO

is

Used

...........

..............

.............

..............

.............

..........121

13.3.5

Control

Regist

er

.............

..............

............

.............

............

.....122

13.4

General-

Purpose

Communic

ation

............

.............

............

.............

..

125

13.5

JOY Bus Communic

ation.........

.............

...126

13.5.1

JOY

Bus

Communi

cation

Control

............

.............

............

.............

.....126

13.5.2

Receiv

e

Data

Register

s

...........

.............

............

.............

............

.........127

13.5.3

Send

Data

Registe

rs

..............

.............

............

.............

............

..........127

13.5.4

Receiv

e

Status

Registe

r

...........

.............

..............

.............

..............

...

127

13.5.5

JOY

Bus

Commun

ication

Operati

ons

..............

.............

............

.............

.........128

13.5.6

[JOY

Bus

Reset]

Comman

d(FFh)

Receiv

ed

.............

............128

13.5.7

[Type/S

tatus

Data

Request

] Comm

and(00h

) Rec

eived...................

.............

..

128

13.5.8

[JOY Bu

s Data

Write] C

ommand

(15h)

Receive

d

.............

.....129

13.5.9

[JOY Bu

s Data

Read]

Command

(14h) R

eceive

d.....................

............

............129

13.6

Game Bo

y Advan

ce Game

Link Ca

ble

...............

............

.............

............

.....131

14

Key Input

............

.............

............

.............

............

..............

...........

.............

............133

14.1

Key

Status

............

.............

............

.............

............

.............

............133

14.2

Key Interrupt Control.....

............

.............

............

.............

..........

......133

14.2.1

Interru

pt Conditi

ons..............

............

.............

............

.............

...........

.

133

15

Interru

pt

Control.

.............

............

.............

...........

............135

15.1

Interrupt Ma

ster Enab

le Registe

r

.............

............

.............

..135

15.2

Interrup

t Enable Regist

er........................

............

.............

............

.............

...........

.....135

15.3

Interrup

t Request Register......

..............

............

.............

............

.....136

15.3.1

About

H-Blank

Interrup

ts..................

.............

............

.............

............136

15.3.2

About

Game

Pak

Interrup

ts

............

.............

............

.............

.............136

15.3.3

Caution

s Re

garding

Clearing

IME a

nd IE

.............

............

.....136

15.3.4

Other

Caution

s

.............

............

.............

......136

15.4

System-A

llocate

d Area

in Work

RAM

..............

.............

............

.............

......137

15.5

Interru

pt Operation..........

............

.............

............

.............

............

.........

.....137

15.5.1

Normal

Interrup

t

.............

............

.............

............

......138

15.5.2

Multiple

Interrup

ts

............

..............

.............

............

.............

..

139

16

Power-D

own Func

tions

............

.............

............

.............

...........

..

141

16.1

Stop

Functi

on............

.............

............

.............

...........

........141

16.1.1

Stop

Funct

ion

Summary

.............

..............

.............

..

141

16.1.2

Impleme

nting

Stop

............

..............

.............

............141

16.1.3

System Wo

rking Sta

tus in Stop

Mode....

.............

............

.............

......141

16.1.4

Stop Fu

nction

Caution

s..................

.............

..............

.............

............142

16.1.5

Guidelin

es fo

r Use

of the

Stop

Functio

n

............

.............

......142

16.2

Halt

Functi

on.............

.............

............

.............

...........

........144

16.2.1

Halt Func

tion Summ

ary.......

.............

...........144

16.2.2

Halt T

ransitio

n Me

thod.........................

.............

............

.............

............

.........144

16.2.3

System Wo

rking Sta

tus in Halt M

ode.....

.............

............

.............

......144

17

Game Boy Advance System Calls...

.............

............

.............

......145

17.1

System Cal

l Operation..............

.............

..........

.....145

17.1.1

Normal

Calls

...............

..............

............

.............

...........

.............

..............

.......145

vi

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5

AGB-06-0001-002-B13

Released: May 27, 2005

17.1.2

Multiple

Calls..........

.............

..............

.............

..........146

18

ROM Regis

tration D

ata

.............

............

.............

..........

..

149

18.1

Start Addr

ess

............

.............

............

.............

...........

........149

18.2

Nintend

o Logo Cha

racter Da

ta

.............

............

.............

............

.............

......149

18.3

Game

Title

.............

............

.............

..........

............149

18.4

Game

Code

.............

............

.............

............

.............

............

.........149

18.5

Maker

Code

.............

............

.............

............

...........

..........149

18.6

96h..................

.............

............

.............

............

...........

......149

18.7

Main Un

it Code

.............

............

.............

..........

.....149

18.8

Device Type................

.............

..........

......150

18.9

Mask R

OM Versi

on No.

............

.............

..

150

18.10

Comple

ment

Check

............

.............

..............

.......150

18.11

Reserv

ed

Area.................

.............

..............

.............

..........150

May 25, 2005

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1

3

Released: May 27, 2005

Tables

Table 1 - Game Boy Advance Memory Configuration and Access Widths................................................5

Table 2

-

Game Pak

Memory Wait

Control Values

...............

.............

...........

.............

....11

Table 3

-

Wait

Contro

l

Values and

Wait Cycles

............

.............

..............

.............

........12

Table

4

-

Game

Pak

Bus

Termina

ls......................

.............

...........

.......13

Table 5

-

Game Boy

Advanc

e Display Screen

Featur

es

.............

..............

.............

.......15

Table 6

- Background Mode Details (Characte

r Format

BG Screen)

............

..............

.............

..............

.

21

Table

7

-

Background

Mode

Details (Bitmap

Format BG

Screen)

...........

............

...

22

Table

8

-

Backgro

und

Mode

Regis

ters

............

.............

..............

.........25

Table

9

-

Screen Size

Setting

s

...........

.............

............

.............

............

............27

Table

10

-

BG

Mode

3..............

.............

...........

..........44

Table 11

-

BG

Mode 4

(Frame 0)

..............

.............

...............

.............

...........

....

45

Table 12

-

BG

Mode 4

(Frame 1)

..............

.............

...............

.............

...........

....

45

Table 13

-

BG

Mode 5

(Frame 0)

..............

.............

...............

.............

...........

....

46

Table 14

-

BG

Mode 5

(Frame 1)

..............

.............

...............

.............

...........

....

46

Table

15

-

OBJ

Functi

on

Featu

res......................

.............

.......47

Table 16

- Rendering

Cycles and

the Corresponding Number

of Displayable Objects

...........

............

....

48

Table 17 - Specifications for the BLDCNT Register.................................................................................68

Table 18

-

EVA, EVB,

and EVY

Values

.............

............

.............

............69

Table 19

-

Sound 1

Freque

ncy

Change Bits

..............

.............

...............

.............

..............

.........73

Table 20

-

Sound 3

Output Level Selections

.............

..............

.............

..............

.........79

Table 21

-

Sound 4

Prescal

ar

Input Clock Selection

............

.............

............

.............

............

....84

Table 22 -

PWM Modulation Amplitu

de Resolutio

n and

Samplin

g Cycle Frequency

..............

..

88

Table

23

-

Timer

Control Prescalar

Selectio

n

............

.............

............

.............

..........

....

90

Table 24 - DMA Transfer Timing Selections (DMA 0)..............................................................................94

Table 25 - DMA Transfer Timing Selections (DMA 1 and 2)....................................................................98

Table 26 - DMA Transfer Timing Selections (DMA 3)............................................................................101

Table

27

-

Communi

cation

Functio

ns

..............

...............

.............

............

.............

........107

Table 28

-

Normal Serial

Communic

ation Baud

Rates

.............

..............

.............

..............

.......118

Table 29

-

UART

Communi

cation Error

Conditi

ons

............

.............

...

123

Table 30

-

UART Communicatio

n

Baud Rates

.............

..............

.............

......124

Table 31

-

The JOY

Bus Reset

Comman

d

............

..............

.............

..............

...........

.

128

Table 32 - The Type/Status Data Request Command...........................................................................128

Table 33

-

The JOY

Bus Data

Write Command........................

.............

............

.............

..........129

Table 34 - The JOY Bus Data Read Command.....................................................................................129

Table 35

-

System Status while in

Stop Mode

.............

..............

.............

..............

.............

......141

Table 36 - Terminology for Entering Sleep Mode from the Menu Screen..............................................142

Table 37 -

Terminol

ogy for Entering Sleep Mode Using a

Buttons Shortc

ut

.............

..............

..............143

Table 38 - Terminology for Automatically Entering Sleep Mode............................................................143

Table 39

-

System Status while in

Halt Mode

............

.............

..............

.............

.........144

viii

G

a

m

e

B

o

y

A

d

v

a

n

c

e

P

r

o

g

r

a

m

i

n

g

M

a

n

u

a

l

M

a

y

2

5

,

2

0

5

AGB-06-0001-002-B13

Released: May 27, 2005

Figures

Figure 1

-

Bit

Operati

on

Attribute Symbols

..............

............

.............

............

...........

......xxii

Figure 1 - Game Boy Advance CPU Block Diagram..................................................................................3

Figure 2

-

Complete Game Boy

Advanc

e

System Block Diagram....................

..............

.............

.

4

Figure 3 - Game Boy Advance CPU Memory Addresses (Little-Endian)...................................................5

Figure 4 - Game Boy Advance System Memory Map................................................................................7

Figure

5

-

The

WAITCNT

Registe

r...................

..............

.............

..............

...........

.........10

Figure 6

-

Sequen

tial Access

Timing Chart

..............

............

.............

............

..........

.......12

Figure 7

-

Random Access

Timing Chart

...............

.............

............

.............

...........

.......12

Figure 8 - Display Screen Horizontal and Vertical Blanking Intervals......................................................15

Figure

9

-

The

VCOUNT

Regist

er.........................

.............

..............

.............

..............

.........

.......16

Figure 10

-

The

DISPSTA

T

Registe

r

...........

.............

..............

.............

..............

.............

..........

..

16

Figure 11

-

The

DISPCNT Register

.............

............

..

19

Figure 12 - Background Mode Memory Maps..........................................................................................23

Figure 13

-

Backgro

und

Screen Control

Registe

rs

.............

............

.............

...........

.......26

Figure 14 - Text Background and Rotation/Scaling Background Screen Control Registers....................26

Figure 15

-

Text

Backg

round Screen

Sizes

............

.............

............

......27

Figure 16

-

Rotation

/Scaling Background Screen

Sizes

...........

.............

............

.............

............28

Figure

17

-

The

MOSAIC

Registe

r

.............

..............

.............

..............

.............

..........

....

29

Figure

18

-

Mosaic

Schema

tic

...........

.............

............

..............

............

..

29

Figure 19

-

VRAM Base

Blocks for

Backgr

ound Data

............

.............

..............

.............

............31

Figure 20 - 16-Color x 16-Palette Character Data Format.......................................................................32

Figure 21

-

256-Col

or

x

1-Palet

te

Charac

ter Data

Format.................

.............

..

33

Figure 22 - Text Background Screen Format...........................................................................................34

Figure 23

-

Rotatio

n/Scali

ng

Backgr

ound Screen

Format

...........

..............

.............

...............

.............

.....34

Figure 24

- Virtual Screen

Size of

256 x

256 Pixels (Text

Background)

...........

......

35

Figure 25

- Virtual Screen

Size of

512 x

256 Pixels (Text

Background)

...........

......

36

Figure 26

- Virtual Screen

Size of

256 x

512 Pixels (Text

Background)

...........

......

36

Figure 27

- Virtual Screen

Size of

512 x

512 Pixels (Text

Background)

...........

......

37

Figure 28 - Virtual Screen Size of 128 x 128 Pixels (Rotation/Scaling Background)...............................37

Figure 29 - Virtual Screen Size of 256 x 256 Pixels (Rotation/Scaling Background)...............................38

Figure 30 - Virtual Screen Size of 512 x 512 Pixels (Rotation/Scaling Background)...............................38

Figure 31 - Virtual Screen Size of 1024 x 1024 Pixels (Rotation/Scaling Background)...........................39

Figure 32 - Referencing Rotated Background Data.................................................................................40

Figure 33 - Registers for Setting the Starting Point of BG Data...............................................................41

Figure 34 -

Register

s for

Setting the Direction Para

meters of BG

Data

.............

..............

.............

..........41

Figure

35

-

Offset

Setting

s

Registe

rs........................

............

.............

............

..........

.......42

Figure

36

-

Offset

Illustra

tion...........

.............

............

.............

............

...........

............

......43

Figure 37

-

The

BG2CNT Register

............

..............

.............

...........

....

43

Figure 38 - 32,768-Color Simultaneous Display Format..........................................................................44

Figure

39

-

256-Col

or

Display

Format.......

.............

............

.............

..........

........44

Figure 40 - VRAM 2-Dimensional Mapping for OBJ Characters..............................................................49

Figure 41 - VRAM 1-Dimensional Mapping for OBJ Characters..............................................................49

Figure 42

-

Writing Rotation/Sc

aling Parameters to OAM

.............

......51

Figure

43

-

OBJ

Attribute 0

...........

.............

............

.............

............

......52

Figure 44 - Cropping when Displaying a Scaled or Rotated Object.........................................................53

Figure 45

-

Croppin

g

when Displaying a

Magnifi

ed Character

.............

..............

.............

...........54

Figure

46

-

OBJ

Attribute 1

...........

.............

............

.............

............

......55

Figure

47

-

Object

Sizes

...........

.............

............

.............

...........

..........55

Figure

48

-

OBJ

Attribute 2

...........

.............

............

.............

............

......56

Figure 49

-

OBJ Character Data

Referen

ced with

Rotation................

.............

............

.............

............

...

57

Figure 50

-

Object

Rotation

/Scaling Parameters

.............

............

.............

........58

Figure 51

-

Backgro

und

and

Object

Priority...............

.............

............

.............

..........

....

59

Figure 52

-

Color Palette

RAM

Memory Map

.............

............

.............

..........

....62

May 25, 2005

ix

©

1

9

-

2

0

5

N

I

N

T

E

N

D

O

A

G

B

-

0

6

-

0

1

-

0

2

-

B

1

3

Released: May 27, 2005

Figure 53 - Referencing Palette RAM for OBJ and BG Modes................................................................62

Figure

54

-

Color

Data

Format

............

...............

.............

............

.............

...........

............63

Figure 55 - Window Position Setting Registers........................................................................................65

Figure 56

-

Window Display

Priority Example.........................

.............

............

.............

..........

....65

Figure 57

-

The

WININ

Registe

r

.............

..............

.............

..........

........66

Figure 58

-

The

WINOUT

Registe

r

.............

..............

.............

..........

....

66

Figure 59 - The BLDCNT Register...........................................................................................................67

Figure 60 -

The

BLDALP

HA

and

BLDY

Regist

ers

.............

..............

.............

....

69

Figure 61 -

α

Blendi

ng

betwee

n

OBJ

and

BG

.............

............

.............

............70

Figure 62 - Game Boy Advance Sound System Block Diagram..............................................................71

Figure 63

-

Sound FIFO

Input

Regist

ers......................

.............

..............

.............

..............

.........72

Figure 64 - The SOUND1CNT_L Register...............................................................................................73

Figure

65

-

The

SOUND1

CNT_H

Registe

r

.............

..............

.............

..............

.............

...........

...74

Figure 66 - Waveform Amplitude Peak Proportions.................................................................................75

Figure 67

-

The

SOUND1

CNT_X

Registe

r

............

.............

..............

.............

...75

Figure 68 - The SOUND2CNT_L Register...............................................................................................76

Figure

69

-

The

SOUND2

CNT_H

Registe

r

.............

..............

.............

..............

.............

...........

...77

Figure 70 - The SOUND3CNT_L Register...............................................................................................78

Figure

71

-

The

SOUND3

CNT_H

Registe

r

.............

..............

.............

..............

.............

...........

...79

Figure 72

-

The

SOUND3

CNT_X

Registe

r

............

.............

..............

.............

...79

Figure

73

-

Wavefo

rm

RAM

Registe

rs

.............

...............

.............

........81

Figure 74 - The SOUND4CNT_L Register...............................................................................................82

Figure

75

-

The

SOUND4

CNT_H

Registe

r

.............

..............

.............

..............

.............

...........

...83

Figure 76 - The SOUNDCNT_L Register.................................................................................................84

Figure 77

-

The

SOUNDCNT

_X

Registe

r

.............

..............

............

.............

............

.......85

Figure

78

-

The

SOUNDCN

T_H

Regist

er

...........

.............

.......86

Figure

79

-

The

SOUNDBI

AS

Regist

er

............

.............

............

.............

...........87

Figure

80

-

PWM

Conver

sion

Image..........

............

.............

............

.............

..........

........88

Figure

81

-

Timer

Setting

Regist

ers

..............

.............

............

.............

..........

....

89

Figure

82

-

Timer

Control

Register

s................

............

.............

..............

.............

............

...........

..

89

Figure 83

-

DMA

0

Source Address

Regist

ers......................

.............

...........

....92

Figure 84

-

DMA 0

Destina

tion Address Registers

............

.............

.....92

Figure

85

-

The

DMA0CNT

_L

Registe

r.....................

............

.............

...........

.............

..........

.......92

Figure

86

-

The

DMA0CNT

_H

Regist

er

.............

...............

............

.............

............

.............

........93

Figure 87

-

DMA 1

and 2

Source Address Registers..............

.............

...............

.............

...........95

Figure 88

-

DMA 1

and 2

Destinat

ion Address Registers

............

.............

........95

Figure 89 -

DMA 1

and 2

Word Count Registers

..............

............

.............

............

.............

........96

Figure 90

-

DMA 1

and 2

Control Register

s

.............

..............

.............

..............97

Figure 91

-

DMA

3

Source Address

Regist

ers......................

.............

...........

....99

Figure 92

-

DMA 3

Destina

tion Address Registers

............

.............

.....99

Figure 93 - The DMA3CNT_L Register..................................................................................................100

Figure

94

-

The

DMA3CNT

_H

Regist

er

.............

...............

............

.............

............

.............

......100

Figure 95 - Connecting during Normal Serial Communication:..............................................................108

Figure 96

-

SIO Timing

Chart (8-bit Communication

)

.............

............

.............

............

.............109

Figure 97

-

The

SIODATA

8

Regist

er

.............

..........109

Figure 98 - 32-Bit Normal Serial Communication Data Registers..........................................................110

Figure 99

-

The

SIOCNT Register

(32-Bits

)

............

.............

............

.............

...............110

Figure 100 - Normal Serial Communication Flow (Example).................................................................112

Figure 101

-

Multi-Pl

ayer

Communi

cation Connection Status

..............

...............

......113

Figure 102

-

Multi-pla

yer

Communi

cation Timing

Chart

............

.............

..............

.............

.......114

Figure 103 - Multi

Player Game Boy Advance Game Link Cable Connectin

g Diagram

..............

..........115

Figure 104 - The SIOMLT_SEND Register............................................................................................115

Figure

105

-

Multi-Pl

ayer

Data

Registe

rs

..............

............

.............

............

...........

........115

Figure 106

-

Multi-Pl

ayer

Data

Transit

ions

..............

............

.............

............

...........

.....116

x

G

a

m

e

B

o

y

A

d

v

a

n

c

e

P

r

o

g

r

a

m

i

n

g

M

a

n

u

a

l

M

a

y

2

5

,

2

0

5

AGB-06-0001-002-B13

Released: May 27, 2005

Figure

107

-

The

SIOCNT

Registe

r

(16-Bit)........

..............

............

.............

............

.............

......117

Figure 108

-

Multi-pla

yer

Communi

cation Flow

(Examp

le)

............

.............

....119

Figure

109

-

UART

Commun

ication..............

.............

..............

.............

..............

.........120

Figure 110

-

The

SIODATA8 Register

...............

.............

............

.............

........120

Figure 111

-

Serial Communicatio

n

withou

t

FIFO.....................

.............

..............

.............

..............

.......120

Figure 112

-

Serial Communicatio

n

with

FIFO......................

..............

.............

..............

..........121

Figure 113 - Example: Writing Data Registers.......................................................................................121

Figure 114

-

The SIOCNT

Regist

er

(UART)

.............

..............

.............

..............

.........122

Figure 115

-

The RCNT

Registe

r

(Genera

l-Purpos

e

Commun

ication

)

..............

.............

..........125

Figure 116 -

The RCNT Register (JOY

Bus Communicat

ion)

............

.............

............

.............

.............126

Figure 117 - The JOYCNT Register.......................................................................................................126

Figure 118 - JOY Bus Receive Data Registers......................................................................................127

Figure 119

-

JOY Bus

Send Data

Registe

rs

..............

.............

............

.............

..........

..

127

Figure

120

-

The

JOYSTA

T

Registe

r

............

..............

.............

.........127

Figure 121 - Game Boy Advance Game Link Cable Connection Types................................................131

Figure

122

-

The

KEYINPUT Register

...............

.............

............

.............

........133

Figure 123

-

The

KEYCNT

Registe

r

...............

..............

............

.............

............

.............

..........133

Figure

124

-

The

IME

Registe

r.................

.............

..............

.............

..........

.....135

Figure

125

-

The

IE

Regist

er...............

.............

..............

.............

...........

........135

Figure

126

-

The

IF

Registe

r

...........

..............

.............

..............

.............

...........

............136

Figure 127

-

System-

Allocate

d

Area

in

Work RAM

.............

............

.............

...........

.....137

Figure 128 -

Game Boy Advance ROM

Registra

tion Data

...........

.............

............

.............

......149

Figure

129

-

Device

Type

Bits............

..............

.............

............

.............

............

...........

............150

Nintendo Game Boy Advance Owner's manual

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