Pericom PI3EQX7741ST EVB User manual

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PI3EQX7741ST
PI3EQX7741ST (USB3.0) Evaluation Board User Manual
by Noyes Mok
Introduction
Pericom’s PI3EQX7741ST is a low power high performance 5.0Gbps signal ReDriver designed for USB3.0 protocol.
The device provides programmable Equalization (EQ) and De-Emphasis (DE) to optimize performance over a variety
of physical mediums by reducing Inter-Symbol Interference (ISI)
The PI3EQX7741ST evaluation board (EVB) is designed to demonstrate the benefits, performance and key features
of PI3EQX7741ST. This user manual describes the usage of this EVB and it will be divided into following sections:
Overview
Quick start
Board Design information
PI3EQX7741ST EVB Schematic
PCB Layout
PCB Layout Reference
BOM List
Overview
Figure 1 is the block diagram of Pericom PI3EQX7741ST Evaluation board (EVB) and Figures 2(a) and (b) is the
top and bottom view of EVB board. There is an USB3.0 Type-B Receptacle connector (JP6) which is used to
connect PC’s USB3.0 port through a USB3.0 cable and the USB3.0 Type-A receptacle connector (JP7) is used to
connect USB3.0 HDD or Hub through a USB3.0 cable. The EQ and DE setting on SW1 are used to select the
equalization and de-emphasis level on PI3EQX7741ST. JP2 is used to enable receive detect function.
PI3EQX7741ST operation required +3.3V which was provided by the 3.3V LDO.
Figure 1, block diagram of PI3EQX7741ST EVB
SW1
PI3EQX7741ST
USB 3.0
Type A
Receptacle
BO±
BI±
Switch for EQ and
DE selection
3.3V
LDO
AI±
JP6 JP7
AO±
D±
TX±
RX±
VDD
EQ_A/B
DE_A/B
JP2 RxDET
HOST Device
USB 3.0
Type B
Receptacle

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Figure 2(a), top view of PI3EQX7741ST EVB Figure 2(b), bottom view of PI3EQX7741ST EVB
Quick Start
To start-up the PI3EQX7741ST EVB, complete the following steps:
1. Check the head pin status and SW1 setting as described in Table 1
2. Connect the JP6 on EVB to PC’s USB3.0 port through a USB3.0 Type A to B cable.
3. Plug the USB3.0 device into EVB USB Type-A connector JP7 through USB3.0 cable
Header pin is set as defaulted on EVB.
Header pin # Pin name Switch status Remark
JP2 RxDet Open Enable Receive detect function
JP4 EN_A# Open Channel A enable
JP5 EN_B# Open Channel B enable
JP8 VTH* Open Pull HIGH for normal operation
JP9 VDD Short Use internal power from PC USB port
SW1 – 1
SW1 – 2 DE_A SW1 – 1 = ON SW1 – 2 = OFF De-emphasis setting on channel A = 0dB
SW1 – 3
SW1 – 4 EQ_A SW1 – 3 = ON SW1 – 4 = OFF Equalizer setting on channel A = 3dB
SW1 – 5
SW1 – 6 DE_B SW1 – 5 = ON SW1 – 6 = OFF De-emphasis setting on channel B = 0dB
SW1 – 7
SW1 – 8 EQ_B SW1 – 7 = ON SW1 – 8 = OFF Equalizer setting on channel B = 3dB
Remark: *header pin VTH is connected to RES pin on PI3EQX7741ST
Table 1, Header pin settings for EVB (header pins location refers to Figure 4)
Figure 3, Connection of PI3EQX7741ST EVB
PC with USB3.0 host
USB3.0 device
EVB plug-into PC
USB port through
USB3.0 cable PI3EQX7741ST
EVB
Device plug-into
EVB through
USB3.0 cable

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Detail Description
The functionality of header pins of switch are described in this section.
Functionality of Header Pins
Header Pin Header Pin
Name Pins on PI3EQX7741ST Description
JP2 RxDet RxDet
Short = Receiver detect function disable
Open = Receiver detect function ENABLE
JP4 EN_A# EN_A#
Short = Channel A disable
Open = Channel A ENABLE
JP5 EN_B# EN_B#
Short = Channel B disable
Open = Channel B ENABLE
JP8 VTH* RES Reserved pin – MUST tie HIGH for normal operation
JP9 VDD VDD33
Short = Use internal power
Open = Use external 3.3V power
VTH* is connected to RES pin on PI3EQX7741ST
Functionality of Switch (SW1)
Switch - # Pin on
PI3EQX7741ST Switch Status Value
SW1 – 1 = ON, SW1 – 2 = OFF 0dB
SW1 – 1 = OFF, SW1 – 2 = OFF -3.5dB
SW1 – 1
SW1 – 2 DE_A
SW1 – 1 = OFF, SW1 – 2 = ON -6dB
SW1 – 3 = ON, SW1 – 4 = OFF 3dB
SW1 – 3 = OFF, SW1 – 4 = OFF 6dB
SW1 – 3
SW1 – 4 EQ_A
SW1 – 3 = OFF, SW1 – 4 = ON 9dB
SW1 – 5 = ON, SW1 – 6 = OFF 0dB
SW1 – 5 = OFF, SW1 – 6 = OFF -3.5dB
SW1 – 5
SW1 – 6 DE_B
SW1 – 5 = OFF, SW1 – 6 = ON -6dB
SW1 – 7 = ON, SW1 – 8 = OFF 3dB
SW1 – 7 = OFF, SW1 – 8 = OFF 6dB
SW1 – 7
SW1 – 8 EQ_B
SW1 – 7 = OFF, SW1 – 8 = ON 9dB

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Board Design Information:
PI3EQX7741ST EVB Schematic

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PCB Layout
Figure 4, Top view of PI3EQX7741ST EVB Layout
Figure 5, Bottom view of PI3EQX7741ST EVB Layout
JP6
SW1
JP2
GND
USB3.0
Type A
Receptacle
USB3.0
Type B
Receptacle
JP9
JP8
JP5
JP4
3.3V LDO
Header pin for external
power supply use
USB3.0
Type A
Receptacle JP7
USB3.0
Type B
Receptacle
JP6
JP7

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PCB Layout Requirements
a. Stack Up:
Layer # Plane Material Type Thickness (mil)
Solder Mask 0.4
Layer 1 Signal 1.2
Prepreg FR4 1080
FR4 2216 7.3
Layer 2 GND 1.2
Core 44
Layer 3 Power 1.2
Prepreg FR4 2216
FR4 1080 7.3
Layer 4 Signal 1.2
Solder Mask 0.4
b. Isolation Spacing = 25 mil
c. Width & Spacing (W/S) of 90ΩDifferential Trace = 11 / 10 / 11 mil
BOM List
Item Quantity Reference Description
1 6
C1, C2, C3, C8, C9, C10 0.1uF Capacitor
2 4
C4, C5, C6, C7 0.01uF Capacitor
3 5
EC1, EC2, EC3, EC4, EC5 22uF Capacitor
4 1
D1 Green LED
5 2
JP1, JP3 3 x 1 Header Pin
6 5 JP2, JP4, JP5, JP8, JP9 2X1 Header Pin
7 1 JP6 USB3.0 Type B Receptacle connector
8 1 JP7 USB3.0 Type A Receptacle connector
9 8 R1, R2, R3, R4, R5, R6, R7, R8 10kΩResistor
10 1
R9 NP
11 1
R10 0ΩResistor
12 1
R11 510ΩResistor
13 1
SW1 SPDT switch
14 1
U1 PI3EQX7741ST
15 1
U2 CJ1117 – 3.3V