Qorvo ACT88760 User manual

ACT88760
Advanced PMIC with 7 Bucks, 6
LDOs
Data Sheet Rev.
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© 2020 Qorvo US, Inc. All rights reserved. Confidential
®
BENEFITS and FEATURES
•Wide input voltage range
•Vin = 2.7V to 5.5V
•Complete integrated power solution
•3x 4A DC/DC Step-Down (Buck) Regulators
•2x 3A DC/DC Step-Down (Buck) Regulators
•2x 2A DC/DC Step-Down (Buck) Regulators
•Parallelable Bucks for higher current
•2x 800mA High PSRR LDOs
•4x 400mA General Purpose LDOs
•LDO Load Switch Mode
•Space Savings
•Fully integrated
•High Fsw = 1.125MHz to 2.25MHz
•Optimized for 0.47µH Inductor
•Integrated sequencing
•Integrated Constant Current LED Sinks
•Easy system level design
•Configurable Sequencing
•Multiple Wake up Triggers with GPIOs
•Seamless Sequencing of External Supplies
•11 Programmable GPIOs
•Highly configurable
•µP interface for status reporting and controllability
•Programmable Reset and Power Good GPIO’s
•Flexible Sequencing Options
•Multiple Sleep Modes
•Integrated DVS
•I2C Interface – 1MHz
APPLICATIONS
•Video processor and core supply voltage.
•Computer Vision.
•AR / VR Applications.
•Connected Home Applications.
•Portable devices.
GENERAL DESCRIPTION
The ACT88760 PMIC is an integrated ActiveCiPSTM
power management integrated circuit. It powers a wide
range of processors, including, video processors,
FPGA’s, wearables, peripherals, and microcontrollers.
The ACT88760 is highly flexible and can be reconfig-
ured via I2C for multiple applications without the need
for PCB changes. The low external component count
and high configurability significantlyspeeds time to mar-
ket. Examples of configurable options include output
voltage, startup time, slew rate, system level sequenc-
ing, switching frequency, sleep modes, operating
modes etc. ACT88760 is programmed at the factory
with a default configuration. These settings can be opti-
mized for a specific design through the I2C interface.
The ACT88760 is available in several default configura-
tion. Contact the factory for specific default configura-
tions.
The ACT88760 integrates seven high efficiency switch-
ing regulators, six linear regulators, and eleven GPIOs.
Two LDOs can be configured as load switches. The
eleven GPIOs pins are configurable and used for a va-
riety of system functions.
The ACT88760 is designed to work with a single lithium
ion or lithium polymer batteries with an input voltage up
to 5.5V. It works with input voltages as low as 2.6V.
The seven switchingconverters are peak current mode,
fixed frequency DC-DC step down converters. Buck1/2
and Buck3/4 can be paralleled for 8A or 6A of output
current. The high switching frequencies allow small in-
ductors which reduce solution size and optimize load
transient response. The converters are internally com-
pensated for small ceramic output capacitors.
Two LDOs are high PSRR with > 70dB. The other for
are general purpose LDOs. LDO5/6 can be configured
as load switches with less than 25mΩ RDSON.
The ACT88760 PMIC is available in a 3.85mm x
3.85mm 81 ball WLCSP package.

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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
FUNCTIONAL BLOCK DIAGRAM
nPB/PWREN
GP IO 2
GP IO 1
SCL
AGND
2x22µF
GP IO 4
GP IO 3
SDA
ACT88760
Digital
Core
LDO2
V re f
1µF
LDO1
V re f
1µF
VINL1
Buck1
Controller
VFB 1
Vref
VFB1
0.47µH
SW1
PGND1
VINB1
VFB322µF
SW3
Buck3
Controller
Vref
PGND3
VINB3
VFB 3
0.47µH
Buck4
Controller
Vref
22µF
SW4
VFB 4
VFB 4
0.47µH
PGND4
VINB4
Buck5
Controller
Vref
22µF
SW5
VFB 5
VFB 5
0.47µH
PGND5
VIN B5
GP IO 6
Buck6
Controller
V re f
22µF
SW6
VFB 6
VFB 6
0.47µH
PGND6
VIN B6
LDO3
V re f
1µF
VINL3
LDO4
V re f
1µF
VINL4
VINL5
LDO6
LDO / Load
Switch Driver
VINL6
LDO5
Buck7
Controller
V re f
2x22µF
SW7
VFB 7
VFB 7
1µF
PGND7
VIN B7
VFB 2
Buck2
Controller
Vref
0.47µH
VIN_B2
PGND2
VFB22x22µF
SW2
VINL2
1µF
1µF
GP IO 8
GP IO 7
AVIN
VIN_IO
GP IO 10
GP IO 9
GP IO 5

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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
ORDERING INFORMATION
PART NUMBER VIN
V
Buck1/2
Dual
Phase
VBuck3VBuck4VBuck5VBuck6VBuck7
ACT88760-101T
0.8V 0.8V 1.2V 1.1V 3.3V 0.8V
VLDO1 VLDO2 VLDO3 VLDO4 VLDO5 VLDO6
0.8V 0.6V 1.8V 3.0V LSW LSW
ACT88760-102.E2T
VIN
V
Buck1/2
Dual
Phase
VBuck3 VBuck4 VBuck5 VBuck6 VBuck7
3.3-5V 0.8V 1.0V 1.8V 1.2V 3.3V 3.3V
VLDO1 VLDO2 VLDO3 VLDO4 VLDO5 VLDO6
1.8V 1.2V 3.3V 3.3V LSW LSW
ACT88760-104T
VIN
V
Buck1/2
Dual
Phase
VBuck3 VBuck4 VBuck5 VBuck6 VBuck7
5V 0.8V 1.8V 1.1V 1.2V 1.2V 3.3V
VLDO1 VLDO2 VLDO3 VLDO4 VLDO5 VLDO6
0.8V 1.8V 2.8V 2.8V 2.8V 1.8V
ACT88760-xxxT
Option Code
Product Number
Tape and Reel
Note 1: Standard product options are identified in this table. Contact factory for custom options, minimum order quantity required.
Note 2: “xxx” represents the CMI (Code Matrix Index) option. The CMI identifies the IC’s default register settings.

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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
PIN CONFIGURATION – WLCSP - 81
3.85mm
3.85mm
0.4 mm
0.4mm
LDO6
SW_B4
PGND1PGND1
SW_B1 GPIO7
GPIO3AVIN
SW_B1
GPIO4
SW_B1
VINL6LDO4
VIN_B1 VIN_B1
VIN_B2 VIN_B2
SW_B2 SW_B2
VIN_B1
SW_B2 SW_B4
VIN_B4
VIN_B3
SW_B3
PGND3
GPIO1
0
LDO5
VINL3LDO3VINL5
VIN_B7
PGND2PGND2
PGND5FB_B5 VINL2PGND6FB_B6
PGND4
PGND7
PGND1
VIN_B2
SW_B7
LDO2
AGND
SW_B3
VIN_B3
PGND3
VIN_B4
PGND2VIN_B7
GPIO9
SW_B7 PGND4PGND7
FB_B2
FB_B1
VINL4
GPIO8VIO SCL GPIO5
GPIO1FB_B3REFBP
FB_B7 GPIO11 FB_B4
SDA GPIO6GPIO2
VIN_B7
SW_B5 VIN_B5 VINL1SW_B6
VIN_B6
PGND7
SW_B7
LDO1
A
B
C
D
E
F
G
H
I
1 2 3 4 5 6 7 8 9
Figure 1: Pin Configuration – Top View (bumps down) – WLCSP- 81

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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
PIN DESCRIPTIONS
Ball (CSP) NAME DESCRIPTION
A1
LDO6
Output of LDO6 / LSW6
A2 VINL6 Input to LDO6 / LSW6
A3
LDO4
Output of LDO4
A4
VINL4
Input to LDO4
A5
AGND
Analog Ground. Kelvin connect to the other ground pins on the IC.
A6
VINL3
Input to LDO3
A7
LDO3
Output of LDO3
A8
VINL5
Input to LDO5 / LSW5
A9
LDO5
Output of LDO5 / LSW5
B1, B2, B3
PGND1
Power GND for Buck1
B4
FB_B1
Feedback for Buck1. Connect to the Buck1 output capacitor.
B5
GPIO3
GPIO3
B6
AVIN
Analog Power Input Pin – Main Power Input to the PMIC.
B7
GPIO4
GPIO4 Pin
B8, B9
PGND3
Dedicated Power GND for Buck3
C1, C2, C3
SW_B1
Switch Pin for Buck1 (connect to inductor)
C4
GPIO7
GPIO7 Pin (Can Configure as PWREN, PWRON or nPB Input Pins)
C5
REFBYP
Reference Bypass Pin. Must connect a 100nF between REFBYP and AGND.
C6
GPIO1
GPIO1
C7
FB_B3
Feedback for Buck3. Connect to the Buck3 output capacitor.
C8, C9
SW_B3
Switch Pin for Buck1 (connect to inductor)
D1, D2, D3
VIN_B1
Dedicated Input Voltage to Buck1
D4
GPIO8
GPIO8
D5
VIO
Input / Output Voltage Reference Level for GPIOs
D6
SCL
I2C Clock Pin
D7
GPIO5
GPIO5
D8, D9
VIN_B3
Dedicated Input Voltage to Buck3
E1, E2, E3
VIN_B2
Dedicated Input Voltage to Buck2
E4
GPIO9
GPIO9 Pin
E5
GPIO2
GPIO2 Pin
E6
SDA
I2C Data Pin
E7
GPIO6
GPIO6 Pin (Can Configure as PWREN, PWRON or nPB Input Pins)
E8, E9
VIN_B4
Dedicated Input Voltage to Buck4
F1, F2, F3
SW_B2
Switch Pin for Buck2 (connect to inductor)
F4
GPIO10
GPIO10 Pin
F5
FB_B7
Feedback for Buck7. Connect to the Buck7 output capacitor.
F6
GPIO11
GPIO11 (Can Configure as PWREN or PWRON Input Pins)
F7
FB_B4
Feedback for Buck4. Connect to the Buck4 output capacitor.
F8, F9
SW_B4
Switch Pin for Buck4 (connect to inductor)
G1, G2, G3
PGND2
Dedicated Power GND for Buck2
G4
FB_B2
Feedback for Buck2. Connect to the Buck2 output capacitor.
G5, H5, I5
VIN_B7
Dedicated Input Voltage to Buck7

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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
G6, H6, I6
SW_B7
Switch Pin for Buck7 (connect to inductor)
G7, H7, I7
PGND7
Dedicated Power GND for Buck7
G8, G9
PGND4
Dedicated Power GND for Buck4
H1
PGND5
Dedicated Power GND for Buck5
H2
FB_B5
Feedback for Buck5. Connect to the Buck5 output capacitor.
H3
VINL2
Input to LDO2
H4
LDO2
Output of LDO2
H8
FB_B6
Feedback for Buck6. Connect to the Buck6 output capacitor.
H9
PGND6
Dedicated Power GND for Buck6
I1
SW_B5
Switch Pin for Buck5 (connect to inductor)
I2
VIN_B5
Dedicated Input Voltage to Buck5
I3
VINL1
Dedicated Input Voltage to LDO1
I4
LDO1
Output of LDO1
I8
VIN_B6
Dedicated Input Voltage to Buck6
I9
SW_B6
Switch Pin for Buck6 (connect to inductor)

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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
ABSOLUTE MAXIMUM RATINGS (NOTE1)
PARAMETER VALUE UNIT
All Pins to AGND unless stated otherwise below
-0.3 to 6.0
V
PGNDx, x = 1, 2, 3, 4, 5 , 6, 7 to AGND
-0.3 to + 0.3
V
AVIN to AGND
-0.3 to 6.0
V
VIO to AGND
-0.3 to Min (6.0 or AVIN +
0.3V)
V
REFBYP to AGND
-0.3 to 6.0
V
VIN_Bx, x = 1, 2, 3, 4, 5, 6, 7 to AGND (VIN_Bx = AVIN is required)
-0.3 to 6.0
V
FB_Bx, x = 1, 2, 3, 4, 5, 6, 7 to AGND
-0.3 to 6.0
V
SW_Bx, x = 1, 2, 3, 4, 5, 6, 7 to PGND
-1.0 to VIN_Bx + 1.0
V
VINLx, x = 1, 2, 3, 4, 5, 6 to AGND
-0.3 to 6.0
V
LDOx, x = 1, 2, 3, 4, 5, 6 to AGND
-0.3 to
Min (6.0 or VINLx + 0.3V)
V
GPIOx, x = 1, 2, 3, 4, 6, 7, 8, 11 to AGND
-0.3 to
Min (6.0 or AVIN + 0.3V)
V
GPIOx, x = 5, 9, 10 to AGND
-0.3 to 6.0V
V
nPB, PWREN, PWRON to AGND
-0.3 to Min (6.0 or AVIN +
0.3V)
V
SDA, SCL to AGND
-0.3 to
Min (6.0 or AVIN + 0.3V)
V
Junction to Ambient Thermal Resistance (Note 2)
23
°C/W
Operating Junction Temperature
-40 to 150
°C
Storage Temperature
-55 to 150
°C
HBM ESD
2000
V
MSL Rating
1
Note1: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may affect
device reliability.
Note2: Measured on Qorvo Evaluation Kit

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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
RECOMMENDED OPERATING CONDITIONS
PARAMETER VALUE UNIT
All Pins to AGND unless stated otherwise below
0 to 5.5
V
AVIN to AGND
2.6 to 5.5
V
VIO to AGND
1.62V to 1.8V
V
VIN_Bx, x = 1, 2, 3, 4, 5, 6, 7 to AGND (VIN_Bx = AVIN is required)
2.6 to 5.5
V
VINLx, x = 1, 2 to AGND
1.08 to 5.5
V
VINLx, x = 3, 4, 5, 6, to AGND
2.6 to 5.5
V
GPIOx, x = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 to AGND
0 to 5.5
V
nPB, PWREN, PWRON to AGND
0 to 5.5
V
SDA, SCL to AGND
0 to 5.5
V
Operating Junction Temperature
-40 to 125
°C
Note1: AVIN must always be the highest input voltage to the IC.

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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
DIGITAL I/O ELECTRICAL CHARACTERISTICS
(AVIN = 3.8V, VIO = 1.8V, Tj= -40°C to +125°C, unless otherwise specified.)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
GPIO Pins
VIO, GPIO Reference Voltage Operating Voltage Range 1.62 1.8 AVIN V
VIL, GPIOx, x = 1-8, 11 Input Low
GPIO power from AVIN. AVIN
= 2.7V - 5.0V, In-
put mode
0.3 V
VIL, GPIOx, x = 1-8, 11 Input Low GPIO power from VIO. VIO = 1.8V Input mode 0.26 V
VIH, GPIOx, x = 1-8, 11 Input High
GPIO power from AVIN. AVIN
= 2.7V - 5.0V, In-
put mode
1.0 V
VIH, GPIOx, x = 1-8, 11 Input High GPIO power from VIO. VIO = 1.8V Input mode 1.1 V
VIL, GPIOx, x = 9-10 Input Low VIO = 1.8V Input mode 0.4 V
VIH GPIOx, x = 9-10 Input High VIO = 1.8V Input mode 1.35 V
GPIOx, x = 1-11 Input Deglitch
Time (falling)
30 µs
GPIOx, x = 1-11 Input Deglitch
Time (rising)
30 µs
GPIOx, x = 1-8, 11 Delay time
GPIOxDly [1:0] = 00
GPIOxDly [1:0] = 01
GPIOxDly [1:0] = 10
GPIOxDly [1:0] = 11
0
1
2
4
ms
VOHPP, GPIOx, x = 1-8, 11 Output
High (Not GPIO5)
AVIN = 5.0V, VIO = 1.8V, I
OH
= 0.1mA, GPIO
configured as push-pull output type.
1.6 V
VOHPP, GPIOx, x = 1-8, 11 Output
High (Not GPIO5)
AVIN = 5.0V, VIO = 3.3V, I
OH
= 0.1mA, GPIO
configured as push-pull output type.
3.1 V
VOLPP, GPIOx, x = 1-8, 11 Output
Low (Not GPIO5)
AVIN = 5.0V, VIO = 1.8V, I
OL
= 0.1mA, GPIO
configured as push-pull output type.
0.3 V
VOLPP, GPIOx, x = 1-8, 11 Output
Low (Not GPIO5)
AVIN = 5.0V, VIO = 3.3V, I
OL
= 0.1mA, GPIO
configured as push-pull output type.
0.2 V
IOOD, GPIOx, x = 1-10 Open Drain
Output High
VO = AVIN = 5.0V, VIO = 1.8 – 5.0V. Output
Leakage Current, TJ= 25
O
C
1 µA
VOLOD, GPIOx, x = 1-10 Open
Drain Output Low
IOL = 1mA, AVIN = 5.0V, VIO = 1.8 – 5.0V 0.2 V

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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
LED Current Sink Programming
(Analog GPIO Pin Only – See GPIO table for Analog GPIO Pin List)
ISINK range GPIOx_ILED [2:0] 0 3.0 6 mA
ISINK, LED Current Sink Settings
GPIOx_ILED = 000 (LED disabled) 0 mA
GPIOx_ILED = 001 0.5 mA
GPIOx_ILED = 010 1 mA
GPIOx_ILED = 011 1.5 mA
GPIOx_ILED = 100 2 mA
GPIOx_ILED = 101 3 mA
GPIOx_ILED = 110 4 mA
GPIOx_ILED1, 2 = 111 6 mA
nPB – Push Button Pin Characteristics
(Applicable when IC is configured for Push Button Function, nPB pin)
nPB De-bounce Time
Push button presses shorter than this time are
ignored.
50 ms
nPB Power Off Time
(duration for successful turn-off)
EN_PWROFF = 1
EN_PWROFF TIME [1:0] = 00
EN_PWROFF TIME [1:0] = 01
EN_PWROFF TIME [1:0] = 10
EN_PWROFF TIME [1:0] = 11
1<t<4
4<t<8
8
12
s
nPB Power Cycle with Push Button
EN_PB_CYCLE = 1
PWRCYCTIME [1:0] = 00
PWRCYCTIME [1:0] = 01
PWRCYCTIME [1:0] = 10
PWRCYCTIME [1:0] = 11
1<t<4
4<t<8
8
12
s
PWREN – Power Enable Pin Characteristics
(Applicable when IC is configured for Power Enable Function, PWREN pin)
PWREN Input Low GPIO power from AVIN. AVIN = 2.7V - 5.0V 0.3 V
PWREN Input High GPIO power from AVIN. AVIN = 2.7V – 5.0V 1 V
PWREN Input Low AVIN > 2.7V, VIO = 1.8V (VIO used for I/O) 0.26 V
PWREN Input High AVIN > 2.7V, VIO = 1.8V (VIO used for I/O) 1.1 V
PWREN, EXT_PG Deglitch Time
(falling)
1 30
µs
PWREN, EXT_PG Deglitch Time
(rising)
1 30
µs

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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
SYSTEM CONTROL ELECTRICAL CHARACTERISTICS
(VIN_Bx = 3.8V, VIO = 1.8V, Tj= -40°C to +125°C, unless otherwise specified.)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
AVIN Operating Voltage Range 2.7 5.5
V
VIO Operating Voltage Range 1.62 1.8 AVIN
V
UVLO Threshold Falling (Note 1) VIN_LVL=0 2.5 2.6 2.7 V
VIN_LVL=1 3.35 3.50 3.65 V
UVLO Hysteresis (Note 1)
Rising threshold higher than falling
threshold
50 mV
UV Deglitch Time
UV Detection deglitch time
Falling – Enter UV condition
Rising – Exit UV condition
5
100
µs
OV Deglitch Time
OV Detection deglitch time
Falling – Enter OV condition
Rising – Exit OV condition
5
200
µs
OV Rising Threshold Programmable
Range
Programmable in 0.3V steps 3.7 5.8 V
OV Threshold Accuracy (Note 1) -3 3 %
OV Hysteresis (Note 1) 80 200 320 mV
System Monitor (SYSMON) Rising
Threshold Programmable Range
Programmable in 100mV steps 2.6 4.7 V
System Monitor (SYSMON) Accuracy -3
SET
POINT
3 %
System Monitor (SYMON) Hysteresis 100 mV
System Warning (SYSWARN) Rising
Threshold. Programmable Range
Programmable in 100mV steps 2.6 4.7 V
System Warning (SYSWARN) Accuracy -3
SET
POINT
3 %
System Warning (SYSWARN) Hystere-
sis
100 mV
System Monitor Shutdown (Falling
threshold)
SYSMON Falling threshold
SETTING 0
SETTING 1
2.5
3.35
2.6
3.5
2.7
3.65
V
Operating Supply Current (AVIN) All Regulators Disabled 10 20 µA
Operating Supply Current (AVIN)
All Regulators Enabled but no load, All
Buck LPM = 1. All LDO in LDO mode,
charge pump disabled
700 µA
Operating Supply Current (AVIN)
All Buck Regulators Enabled but no load.
ALL LDOs are off. ULPM = 1 for all buck
regulators, PMIC in SLEEP/DPSLP
mode. Fast clock off
230 µA
Operating Supply Current (AVIN)
Single Buck Regulator Enabled but no
load. ALL LDOs are off. ULPM = 1 for all
buck regulator, PMIC in SLEEP/DPSLP
mode
170 µA

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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
Operating Supply Current (AVIN)
Single LDO Regulator Enabled but no
load. ALL BUCKs are off. PMIC in
SLEEP/DPSLP mode. Fast clock off
65 µA
Thermal Warning Threshold
TWARN0 Register Bit, TWARN = 00
TWARN1
-30
TWARN1-
20
TWARN1-
10
°C
TWARN1 Register Bit, TWARN = 01
TWARN2
-30
TWARN2-
20
TWARN2-
10
°C
TWARN2 Register Bit, TWARN = 10
TWARN3
-30
TWARN3-
20
TWARN3-
10
°C
TWARN3 Register Bit, TWARN = 11 TSD-35 TSD-25 TSD-15 °C
TSD, Thermal Shutdown Temperature rising 145 165 185 °C
Thermal Shutdown Hysteresis 30 °C
Startup Delay after initial AVIN
Time from AVIN > UVLO threshold to
start of first regulator turning On. (0ms
turn on delay setting)
nSaveIqMstr=1
620 750
µs
Time from AVIN > UVLO threshold to
start of first regulator turning On. (0ms
turn on delay setting)
nSaveIqMstr=0
920 1150 µs
Transition time from Deep Sleep
(DPSLP) State to Active State
Time from GPIOx pin transition to time
when the first regulator turns ON with
minimum turn on delay configuration.
1 ms
Transition time from Sleep State
(SLEEP) to Active State
Time from I2C command to exit sleep
mode to time when the first regulator
starts to turn ON with minimum turn on
delay configuration.
200 µs
Time to first power rail turn off when en-
tering SLEEP / DPSLP
Time from turn-off event to when the first
power rail turns off with minimum off de-
lay.
200 µs
Startup Delay Programmable Range
(ONDLY’s MSB = 0)
(Note that the ONDLY’s MSB bit is a
factory bit and cannot be changed by
the user)
ONDLY= 0000
ONDLY= 0001
ONDLY= 0010
ONDLY= 0011
ONDLY= 0100
ONDLY= 0101 (Note 2)
ONDLY= 0110 (Note 2)
ONDLY= 0111 (Note 2)
0
500
1000
2000
4000
8000
16000
32000
µs
Startup Delay Programmable Range
(ONDLY’s MSB = 1
(Note that the ONDLY’s MSB bit is a
factory bit and cannot be changed by
the user)
ONDLY= 1000
ONDLY= 1001
ONDLY= 1010
ONDLY= 1011
ONDLY= 1100
ONDLY= 1101
ONDLY= 1110
ONDLY= 1111
28.5
28.5
114
228
456
912
1824
3648
µs
Turn Off Delay Programmable Range
(OFFDLY’s MSB = 0)
(Note that the OFFDLY’s MSB bit is a
factory bit and cannot be changed by
the user)
OFFDLY = 0000
OFFDLY = 0001
OFFDLY = 0010
OFFDLY = 0011
OFFDLY = 0100
OFFDLY = 0101
OFFDLY = 0110
OFFDLY = 0111
0
500
1000
2000
4000
8000
16000
32000
µs

Data Sheet Rev.
B, June 14, 2022 | Subject to change without notice 13 of 68
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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
Turn Off Delay Programmable Range
(OFFDLY’s MSB = 1)
(Note that the OFFDLY’s MSB bit is a
factory bit and cannot be changed by
the user)
OFFDLY = 1000
OFFDLY = 1001
OFFDLY = 1010
OFFDLY = 1011
OFFDLY = 1100
OFFDLY = 1101
OFFDLY = 1110
OFFDLY = 1111
N/A
28.5
114
228
456
912
1824
3648
µs
nRESET Programmable Delay
nRST [1:0] = 000
nRST [1:0] = 001
nRST [1:0] = 010
nRST [1:0] = 011
nRST [1:0] = 100
nRST [1:0] = 101
nRST [1:0] = 110
nRST [1:0] = 111
5
10
20
40
0.5
1.0
2.5
100.0
ms
Note1: All Under-voltage Lockout, Overvoltage measurements are referenced between AVIN and AGND pin.
Note2: These ONDLY settings are not allowed when UV_FLTMSK = 0

Data Sheet Rev.
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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
BUCK1 & BUCK2 & BUCK7 ELECTRICAL CHARACTERISTICS, REGULATOR:
(VIN_B1/2 = 3.8V, Tj= -40°C to +125°C, unless otherwise specified.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
Operating Voltage Range 2.6 AVIN V
Output Voltage Range
Configurable in 5mV steps, RANGE = 0
Configurable in 25mV steps, RANGE = 1
0.5
0.5
1.135
3.675
V
VFB_BX, Output Voltage Accuracy
(Note2)
V
OUT
= 1.0V, I
OUT
= 2000mA (continuous PWM
mode)
-1% VNOM1% V
V
OUT
= 1.0V, I
OUT
= 10mA (discontinuous mode
operation), Buck LPM = 1
-1% VNOM1% V
V
OUT
= 1.0V, 10mA (discontinuous mode opera-
tion) Buck ULPM = 1 (Ultra Low Power Mode Ena-
bled)
-3% VNOM3% V
VFB_BX, Output Voltage Accuracy
V
OUT
= 1.0V, I
OUT
= 2000mA (continuous PWM
mode)
-1.5% VNOM1.5% V
V
OUT
= 1.0V, I
OUT
= 10mA (discontinuous mode
operation), Buck LPM = 1
-1.5% VNOM1.5% V
V
OUT
= 1.0V, 10mA (discontinuous mode opera-
tion) Buck ULPM = 1 (Ultra Low Power Mode Ena-
bled)
-3.5% VNOM3.5% V
Maximum Operation Duty Cycle 99 %
Shutdown Current Regulator Disabled, (Note2) 0.1 1 µA
Regulator Disabled 0.1 4.5 uA
Standby Supply Current, Buck Low
Power Mode Enabled
Regulator Enabled, No Load, Buck LPM = 1 &
Fixed On-Time Disabled.
50 µA
Standby Supply Current, Buck Ultra
Low Power Mode Enabled
Regulator Enabled, No Load, Buck ULPM = 1 &
Fixed On-Time Enabled.
10 µA
Load Regulation
VOUT = Default CMI Setting PWM mode.
0.05
%/A
Line Regulation
VIN = 3.2V to 5.5V
0.05
%/V
P
GOOD
, Power Good Threshold
V
OUT
Rising
89
92
95
%
Power Good Hysteresis
VOUT Falling
3
%
OV
FLT
, Overvoltage Threshold
V
OUT
Rising
109
112
115
%
Overvoltage Hysteresis
VOUT Falling
3
%
Switching Frequency
FREQ_SET [1:0] = 0x
FREQ_SET [1:0] = 10
FREQ_SET [1:0] = 11
2.25
1.5
1.125
MHz
TSS, Soft-Start Period
10% to 90% ramp time of V
OUT
SST=1
SST=0
0.25
0.5
ms
ILIM, Internal High Side Peak Cur-
rent Limit (Cycle-by-Cycle)
ILIMSET=0
ILIMSET=1
3.8
5.0
A
Internal High Side Peak Current
Limit (Cycle-by-Cycle) Tolerance
At Default Set Point
All Other Set Points
-20
-25
20
25
%
IWARN, Internal High Side Peak
Current Limit Warning Threshold.
Warning threshold as % of ILIM threshold -37 -22.5 -8 %

Data Sheet Rev.
B, June 14, 2022 | Subject to change without notice 15 of 68
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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
Low Side Peak Current Limit (Cy-
cle-by-Cycle) (Note3)
ILIMSET=0
ILIMSET=1
4.2
5.5
A
Low Side On-Resistance, NMOS ISW = 1A, VIN = 3.8V 12 mΩ
High Side On-Resistance, PMOS ISW = 1A, VIN = 3.8V 30 mΩ
SW Leakage Current – NMOS VIN = 5V, VSW = 5V (Note2) 1 µA
VIN = 5V, VSW = 5V 1 µA
SW Leakage Current – PMOS VIN = 5V, VSW = 0V (Note2) 1 µA
VIN = 5V, VSW = 0V 4.5 µA
Output Pull Down Resistance Enabled when regulator disabled, VOUT=0.1V 3.6 Ω
Dynamic Voltage Scaling Rate
Vout_range = 0
+ DVS_SET[] = 00
+ DVS_SET[] = 01
+ DVS_SET[] = 10
+ DVS_SET[] = 11
Vout_range = 1
+ DVS_SET[] = 00
+ DVS_SET[] = 01
+ DVS_SET[] = 10
+ DVS_SET[] = 11
11.2
5.6
2.8
1.4
56
28
14
7
mV/ µs
COUTMIN, Minimum Output Cap Min output capacitance with voltage de-rating 20 µF
Note1: There are three balls for VIN, Buck1/2/7, and SW. Buck1/2/7 are rated for 6A average lifetime rating at 105 deg C junction.
Note2: TA= +25°C
Note3: LSILIM is used for current run-away protection.

Data Sheet Rev.
B, June 14, 2022 | Subject to change without notice 16 of 68
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© 2021 Qorvo US, Inc. All rights reserved. Confidential
ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
BUCK3 & BUCK4 ELECTRICAL CHARACTERISTICS, REGULATORS:
(VIN_B3/4 = 3.8V, Tj= -40°C to +125°C, unless otherwise specified.)
PARAMETER CONDITIONS MIN TYP MAX UNIT
Operating Voltage Range 2.6 AVIN V
Output Voltage Range
Configurable in 5mV steps, RANGE = 0
Configurable in 25mV steps, RANGE = 1
0.5
0.5
1.135
3.675
V
Output Voltage Accuracy
(Note2)
V
OUT
= 1.0V, I
OUT
= 2000mA (continuous PWM
mode)
-1% VNOM 1% V
V
OUT
= 1.0V, I
OUT
= 10mA (discontinuous mode
operation), Buck LPM = 1
-1% VNOM 1% V
V
OUT
= 1.0V, 10mA (discontinuous mode opera-
tion) Buck ULPM = 1 (Ultra Low Power Mode En-
abled)
-3% VNOM 3% V
VFB_BX, Output Voltage Accuracy
VOUT = 1.0V, IOUT = 2000mA (continuous
PWM mode)
-1.5% VNOM 1.5% V
VOUT = 1.0V, IOUT = 10mA (discontinuous
mode operation), Buck LPM = 1
-1.5% VNOM 1.5% V
VOUT = 1.0V, 10mA (discontinuous mode opera-
tion) Buck ULPM = 1 (Ultra Low Power Mode En-
abled)
-3.5% VNOM 3.5% V
Maximum Operation Duty Cycle 99 %
Shutdown Current Regulator Disabled (Note2) 0.1 1 µA
Regulator Disabled 0.1 3 uA
Standby Supply Current, Low
Power Mode Enabled
Regulator Enabled, No Load, Buck LPM = 1 50 µA
Standby Supply Current, Buck Ultra
Low Power Mode Enabled
Regulator Enabled, No Load, Buck ULPM = 1 10 µA
Load Regulation VOUT = Default CMI Setting PWM mode. 0.05 %/A
Line Regulation VIN = 3.2V to 5.5V 0.05 %/V
PGOOD, Power Good Threshold VOUT Rising, 89 92 95 %
Power Good Hysteresis VOUT Falling 3 %
OVFLT, Overvoltage Threshold VOUT Rising, 109 112 115 %
Overvoltage Hysteresis VOUT Falling 3 %
Switching Frequency FREQ_SET[1:0] = 0x FREQ_SET[1:0] = 10
FREQ_SET[1:0] = 11
2.25
1.5
1.125
MHz
TSS, Soft-Start Period
10% to 90% ramp time of VOUT
SST=1
SST=0
0.25
0.5
ms
ILIM, Internal High Side Peak Cur-
rent Limit (Cycle-by-Cycle)
ILIMSET=0
ILIMSET=1
3.5
4.5
A
Internal High Side Peak Current
Limit (Cycle-by-Cycle) Tolerance
At Default Set Point
All Other Set Points
-20
-25
20
25
%

Data Sheet Rev.
B, June 14, 2022 | Subject to change without notice 17 of 68
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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
IWARN, Internal High Side Peak
Current Limit Warning Threshold.
Warning threshold as % of ILIM threshold -37 -22.5 -8 %
Low Side Peak Current Limit (Cy-
cle-by-Cycle) (Note3)
ILIMSET=0
ILIMSET=1
3.7
4.7
A
Low Side On-Resistance, NMOS ISW = 1A, VIN = 3.8V 25 mΩ
High Side On-Resistance, PMOS ISW = 1A, VIN = 3.8V 50 mΩ
SW Leakage Current – NMOS VIN = 5V, VSW = 5V (Note2) 1 µA
VIN = 5V, VSW = 5V 1 uA
SW Leakage Current – PMOS VIN = 5V, VSW = 0V (Note2) 1 µA
VIN = 5V, VSW = 0V 3 uA
Output Pull Down Resistance Enabled when regulator disabled, VOUT=0.1V 3.6 Ω
Dynamic Voltage Scaling Rate
- Vout_range = 0
+ DVS_SET[] = 00
+ DVS_SET[] = 01
+ DVS_SET[] = 10
+ DVS_SET[] = 11
- Vout_range = 1
+ DVS_SET[] = 00
+ DVS_SET[] = 01
+ DVS_SET[] = 10
+ DVS_SET[] = 11
11.2
5.6
2.8
1.4
56
28
14
7
mV/ µs
COUTMIN, Minimum Output Cap Min output capacitance with voltage de-rating 12 µF
Note1: There are two balls for VIN, Buck3/4, and SW. Buck3/4 are rated for 4A average lifetime rating at 105 deg C junction.
Note2: TA= 25°C
Note3: LSILIM is used for current run-away protection.

Data Sheet Rev.
B, June 14, 2022 | Subject to change without notice 18 of 68
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ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
BUCK5 & BUCK6 ELECTRICAL CHARACTERISTICS, REGULATORS:
(VIN_B5/6 = 3.8, Tj= -40°C to +125°C, unless otherwise specified.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
Operating Voltage Range 2.6 AVIN V
Output Voltage Range Configurable in 25mV steps, RANGE = 0 0.5 3.675 V
VFB_BX, Output Voltage Accuracy
(Note2)
V
OUT
= 1.0V, I
OUT
= 2000mA (continuous
PWM mode)
-1% VNOM 1% V
V
OUT
= 1.0V, I
OUT
= 10mA (discontinuous
mode operation), Buck LPM = 1
-1% VNOM 1% V
V
OUT
= 1.0V, 10mA (discontinuous mode op-
eration) Buck ULPM = 1 (Ultra Low Power
Mode Enabled)
-3% VNOM 3% V
VFB_BX, Output Voltage Accuracy
V
OUT
= 1.0V, I
OUT
= 2000mA (continuous
PWM mode)
-1.5%VNOM 1.5%V
V
OUT
= 1.0V, I
OUT
= 10mA (discontinuous
mode operation), Buck LPM = 1
-1.5%VNOM 1.5%V
V
OUT
= 1.0V, 10mA (discontinuous mode op-
eration) Buck ULPM = 1 (Ultra Low Power
Mode Enabled)
-3.5%VNOM 3.5%V
Maximum Operation Duty Cycle 99 %
Shutdown Current Regulator Disabled (Note2) 0.1 1µA
Regulator Disabled 0.1 2.5 µA
Standby Supply Current, Low
Power Mode Enabled
Regulator Enabled, No Load, Buck LPM = 1
& Fixed On-Time Disabled.
50 µA
Standby Supply Current, Ultra Low
Power Mode Enabled
Regulator Enabled, No Load, Buck ULPM =
1 & Fixed On-Time Enabled.
10 µA
Load Regulation VOUT = Default CMI Setting PWM mode. 0.05 %/A
Line Regulation VIN = 3.2V to 5.5V 0.05 %/V
PGOOD, Power Good Threshold VOUT Rising, 89 92 95 %
Power Good Hysteresis VOUT Falling 3%
OVFLT, Overvoltage Threshold VOUT Rising, 109 112 115 %
Overvoltage Hysterisis VOUT Falling 3%
Switching Frequency
FREQ_SET [1:0] = 0x
FREQ_SET [1:0] = 10
FREQ_SET [1:0] = 11
2.25
1.5
1.125
MHz
TSS, Soft-Start Period
10% to 90% ramp time of V
OUT
SST=1
SST=0
0.25
0.5
ms
ILIM, Internal High Side Peak Cur-
rent Limit (Cycle-by-Cycle)
ILIMSET=0
ILIMSET=1
2.0
3.0
A
Internal High Side Peak Current
Limit (Cycle-by-Cycle) Tolerance
At Default Set Point
All Other Set Points
-20
-25
20
25
%
IWARN, Internal High Side Peak
Current Limit Warning Threshold.
Warning threshold as % of ILIM threshold -37 -22.5 -8 %

Data Sheet Rev.
B, June 14, 2022 | Subject to change without notice 19 of 68
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© 2021 Qorvo US, Inc. All rights reserved. Confidential
ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
Low Side Peak Current Limit (Cy-
cle-by-Cycle) (Note3)
ILIMSET=0
ILIMSET=1
2.6
3.8
A
Low Side On-Resistance, NMOS ISW = 0.5A, VIN = 3.8V, TJ= 25°C 35 mΩ
High Side On-Resistance, PMOS ISW = 0.5A, VIN = 3.8V, TJ= 25°C 80 mΩ
SW Leakage Current – NMOS VIN = 5V, VSW = 5V, TJ= 25°C 1µA
SW Leakage Current – PMOS VIN = 5V, VSW = 0V, TJ= 25°C 1µA
Output Pull Down Resistance Enabled when regulator disabled, VOUT=0.1V 6.7 Ω
Dynamic Voltage Scaling Rate
DVS_SET[] = 00
DVS_SET[] = 01
DVS_SET[] = 10
DVS_SET[] = 11
56
28
14
7
mV/ µs
COUTMIN, Minimum Output Cap Min output capacitance with voltage de-rating 12 µF
Note1: There are two balls for VIN, Buck5/6, and SW. Buck5/6 are rated for 4A average lifetime rating at 105 deg C junction.
Note2: TA= +25°C
Note3: LSILIM is used for current run-away protection

Data Sheet Rev.
B, June 14, 2022 | Subject to change without notice 20 of 68
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© 2021 Qorvo US, Inc. All rights reserved. Confidential
ACT88760
Advanced PMIC with 7 Bucks, 6 LDOs
®
LDO1 & LDO2 ELECTRICAL CHARACTERISTICS
(VIN_LDO1/2 = 3.8V, Tj= -40°C to +125°C, unless otherwise specified.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
VINLx, Operating Input Voltage 1.08 AVIN V
VLDOx, Output Voltage Range
Configurable in 12.5mV steps, RANGE = 0
Configurable in 12.5mV steps, RANGE = 1
0.5
1.2
1.2875
1.9875
V
Output Voltage Accuracy (Note1) At Default CMI Output Setting -1 VNOM 1 %
Output Voltage Accuracy At Default CMI Output Setting -1.5 VNOM 1.5 %
Line Regulation
V
INLX
– V
LDOX
> 400mV AVIN > 3.3V, I
OUT
=
10mA
0.25 % / V
Load Regulation
V
INLX
– V
LDOX
> 400mV AVIN > 3.3V, I
OUT
=
10mA to 500mA, VOUTSET = 0.8V
0.7 % / A
V
INLX
– V
LDOX
> 400mV AVIN > 3.3V, I
OUT
=
10mA to 500mA, VOUTSET = 0.6V
1.3 % / A
IQ1, Supply Current
Regulator Enabled, VOUT > 1.0V, No Load,
Charge pump enabled
190
µA
IQ1, Supply Current
Regulator Enabled, VOUT < 1.0V, No Load,
Charge pump disabled
52
µA
ISD, Shut Down Current Regulator Disabled 1
µA
IOUT Maximum Output Current 800 mA
ILIM, Output Current Limit 810 1100 mA
I
SHORT
, Shorted Output Foldback
Current
30 %
VDO, Drop Out Voltage ILIM = 0, IOUT = 150mA, AVIN – VOUTL > 2.0V 150 mV
ILIM = 1, IOUT = 300mA, AVIN – VOUTL > 2.0V
300
mV
Soft-Start Period SST_LDO=0, Default VOUTL, 10% to 90% 320 500 µs
SST_LDO=1, Default VOUTL, 10% to 90% 160 250 µs
Power Good Threshold VLDO Rising, % of VNOM 89 92 95 %
Power Good Hysteresis VLDO Falling, % of VNOM 3 %
Overvoltage Fault Threshold VLDO Rising, % of VNOM 109 112 115 %
Overvoltage Fault Hysteresis VLDO Falling, % of VNOM 3 %
PSRR, Power Supply Rejection
Ratio
f = 1kHz, I
OUT
= 10mA,
VOUTL = 0.8V, VINL = 1.2V
75 dB
f = 10kHz, I
OUT
= 10mA,
VOUTL = 0.8V, VINL = 1.2V
65 dB
f = 100kHz, I
OUT
= 10mA,
VOUTL = 0.8V, VINL = 1.2V
55 dB
f = 2000kHz, I
OUT
= 10mA,
VOUTL = 0.8V, VINL = 1.2V
40 dB
VLTR, Transient Response (Note1)
I
OUT
10mA to 250mA in 10us, V
OUTL
= 1.8V, V
INL
= 2.7V
1 %