Richtek Rt8241 User manual

RT8241

DS8241-03 January 2014 www.richtek.com

High Efficiency Single Synchronous Buck PWM Controller

General Description

The RT8241 PWM controller provides high efficiency,

excellenttransientresponse,andhighDCoutputaccuracy

needed for stepping down high voltage batteries to

generate low voltage CPU core, I/O, and chipset RAM

supplies in notebook computers.

TheRT8241supportsonchipvoltageprogrammingfunction

between0.675Vand0.9VbycontrollingGXdigitalinputs.

Theconstant-on-timePWM control schemehandleswide

input/output voltage ratios with ease and provides 100ns

“instant-on”responsetoloadtransientswhilemaintaining

a relatively constant switching frequency.

The RT8241 achieves high efficiency at a reduced cost

by eliminating the current-sense resistor found in

traditional current-mode PWMs. Efficiency is further

enhanced by its ability to drive very large synchronous

rectifier MOSFETs and enter diode emulation mode at

lightloadcondition. Thebuckconversionallowsthisdevice

todirectlystepdownhigh voltage batteries at the highest

possibleefficiency.TheRT8241isintendedforCPUcore,

chipset, DRAM, or other low voltage supplies as low as

0.675V.

The RT8241 is available in a WQFN-12L 2x2 package.

Features

zMeet Intel VCCSA Voltage Slew Rate

zBuilt-in 1% Reference Voltage

z2-Bit Programmable Output Voltage with Integrated

Transition Support

zQuick Load-Step Response within 100ns

z4700ppm/°°

°°

°C Programmable Current Limit by Low

Side RDS(ON) Sensing

z4.5V to 26V Battery Input Range

zInternal Ramp Current Limit Soft-Start Control

zDrives Large Synchronous Rectifier FETs

zIntegrated Boost Switch

zOver/Under Voltage Protection

zThermal Shutdown

zPower Good Indicator

zRoHS Compliant and Halogen Free

Pin Configurations

(TOPVIEW)

WQFN-12L 2x2

Ordering Information

Applications

zNotebookComputers

zCPU/GPUCore Supply

zChipset/RAM Supply

zGenericDC/DCPower Regulator

Note :

Richtek products are :

`RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

`Suitable for use in SnPb or Pb-free soldering processes.

LGATE PGOOD

UGATE

PHASE G0

BOOT

VCC

GND

654

12 1011

GND13

RT8241

Package Type

QW : WQFN-12L 2x2 (W-Type)

Lead Plating System

G : Green (Halogen Free and Pb Free)

Z : ECO (Ecological Element with

Halogen Free and Pb free)

Switching Frequency Operation

A : 300kHz

B : 400kHz

C : 500kHz

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RT8241

Typical Application Circuit

For Fixed Voltage Regulator :

ForAdjustable Voltage Regulator :

VCCRT8241

VCC 5

PGOOD

11 CS

12,

13 (Exposed Pad) GND

BOOT

UGATE

PHASE

LGATE

CBYPASS

RCS

R3 C1

R4 Q1

Q2 R5*

C2*

LOUT

VIN

CIN

VOUT

COUT

* : Optional

Chip Enable

VCCRT8241

VCC 5

PGOOD

11 CS

12,

13 (Exposed Pad) GND

BOOT

UGATE

PHASE

LGATE

CBYPASS

RCS

R3 C1

R4 Q1

Q2 R5*

C2*

LOUT

VIN

CIN

VOUT

COUT

* : Optional

C3*

RFB1

RFB2

Chip Enable

Marking Information

30W

30 : Product Code

W : Date Code

RT8241AGQW

41W 40W

41 : Product Code

W : Date Code 40 : Product Code

W : Date Code

30 : Product Code

W : Date Code 41 : Product Code

W : Date Code 40 : Product Code

W : Date Code

RT8241BGQW RT8241CGQW

RT8241AZQW RT8241BZQW RT8241CZQW

G0 G1 VFB

0 0 0.9V

0 1 0.8V

1 0 0.725V

1 1 0.675V

Table 1. VID Table

30W 41W 40W

DS8241-03 January 2014 www.richtek.com

RT8241

Functional Pin Description

Pin No. Pin Name Pin Function

1 LGATE Gate Drive Output for Low Side External MOSFET.

2 PHASE

External Inductor Connection Pin for PWM Converter. It behaves as the

current sense comparator input for low side MOSFET RDS(ON) sensing and

reference voltage for on time generation.

3 UGATE Gate Drive Output for the High Side External MOSFET.

4 BOOT

Supply Input for High Side Driver. Connect a capacitor to the floating node

(PHASE) pin.

5 VCC

Control Voltage Input. Provides the power for the buck controller, the low

side driver and the bootstrapcircuit forhigh sidedriver. Bypass to GNDwith

a 4.7μF ceramic capacitor.

6 EN Chip Enable (Active High).

7 G0 2-Bit Input Pin.

8 G1 2- Bit Input Pin.

9 PGOOD

Open Drain Power Good Indicator. High impedance indicates power is

good.

10 FB Output Voltage Feedback Input.

11 CS Current Limit Threshold Setting Input. Connect a setting resistor to GND

and the current limit threshold is equal to 1/8 of the voltage seen at this pin.

12, 13 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected

to GND for maximum power dissipation.

Function Block Diagram

DRV

-1/8

10µA

Diode

Emuation

Min toff

TRIGQOne shot

TRIG

On-time compute

PHASE One shot

Thermal

Shutdown

85% VREF

Voltage

Programmer

0.45V S1 Q

Latch

1.1V S1 Q

Latch

VREF

COMP

TON

ZCD

OC threshold

leakage

LG RDS(ON)

UG RDS(ON)

BST switch

resistance

VCC

PGOOD

GND

BOOT

UGATE

PHASE

LGATE

FB SS

(Internal)

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RT8241

Electrical Characteristics

Absolute Maximum Ratings (Note 1)

zVCC, FB, PGOOD, EN, CS,G0, G1 to GND ----------------------------------------------------------------------- −0.3V to 6V

zPHASE toGND

DC----------------------------------------------------------------------------------------------------------------------------- −0.3V to 32V

<20ns ------------------------------------------------------------------------------------------------------------------------−8V to 38V

zBOOT to PHASE ----------------------------------------------------------------------------------------------------------- −0.3V to 6V

zUGATE to PHASE

DC----------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V

<20ns ------------------------------------------------------------------------------------------------------------------------−5V to 7.5V

zLGATEtoGND

DC----------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V

<20ns ------------------------------------------------------------------------------------------------------------------------−2.5V to 7.5V

zPowerDissipation,PD@TA=25°C

WQFN-12L2x2 ------------------------------------------------------------------------------------------------------------ 0.606W

zPackageThermal Resistance (Note 2)

WQFN-12L 2x2, θJA ------------------------------------------------------------------------------------------------------- 165°C/W

zJunctionTemperature----------------------------------------------------------------------------------------------------- 150°C

zLeadTemperature(Soldering, 10 sec.)------------------------------------------------------------------------------- 260°C

zStorageTemperatureRange -------------------------------------------------------------------------------------------- −65°Cto150°C

zESD Susceptibility (Note 3)

HBM(HumanBody Mode) ---------------------------------------------------------------------------------------------- 2kV

MM(MachineMode)------------------------------------------------------------------------------------------------------ 200V

Recommended Operating Conditions (Note 4)

zSupply Input Voltage, VIN ------------------------------------------------------------------------------------------------ 4.5V to 26V

zControl Voltage, VCC------------------------------------------------------------------------------------------------------ 4.5V to 5.5V

zJunctionTemperatureRange-------------------------------------------------------------------------------------------- −40°Cto125°C

zAmbientTemperatureRange-------------------------------------------------------------------------------------------- −40°Cto85°C

(VCC = 5V, VIN = 8V, VEN = 5V, TA= 25°C, unless otherwise specified)

Parameter Symbol Test Conditions Min Typ Max Unit

PWM Controller

VCC Quiescent Supply Current IQFB forced above the regulation

point, VEN = 5V -- 500 1250 μA

VCC Shutdown Current ISHDN V

CC current, VEN = 0V -- -- 1 μA

CS Shutdown Current CS pull to GND -- -- 1 μA

TA= 25°C −1 0 1

FB Error Comparator Threshold VFB TA= −40°C to 85°C (Note 5) −1.5 0 1.5 %

VOUT Voltage Range VOUT 0.675 -- 3.3 V

RT8241A VFB = 0.9V (fSW = 300kHz) -- 400 --

RT8241B VFB = 0.9V (fSW = 400kHz) -- 300 --On-Time, Pulse Width RT8241C tON VFB = 0.9V (fSW = 500kHz) -- 240 -- ns

Minimum Off-Time tOFF 250 400 550 ns

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RT8241

Parameter Symbol Test Conditions Min Typ Max Unit

Current Sensing

CS Source Current 9 10 11 μA

CS Source Current

Temperature Coefficient -- 4700 -- ppm/°C

Zero Crossing Threshold PHASE − GND −10 -- 5 mV

Protection Function

Current Limit Threshold

Offset GND − PHASE = VCS/8 −20 0 20 mV

Negative Current Limit

Threshold Offset PHASE − GND = VCS/8 -- 3 -- mV

Under Voltage Protection UVP Detect, Falling Edge 0.41 0.45 0.49 V

UVP Fault Delay VFB = 0.375V -- 3.5 -- μs

Over Voltage Protection OVP Detect, Rising Edge 1.065 1.1 1.133 V

OVP Fault Delay VFB = 1.183V -- 5 -- μs

VCC Under Voltage Lockout

(UVLO) Threshold VUVLO Falling edge, PWM disabled below

this level 3.5 3.7 3.9 V

VCC UVLO Hysteresis ΔVUVLO -- 100 -- mV

VOUT Soft-Start From EN = High to VOUT = 95% -- 0.8 -- ms

Dynamic VID Slew Rate SGX G0/G1 Transition 1.75 -- 10 mV/μs

UVP Blank Time From EN signalgoing high -- 3 - ms

Thermal Shutdown TSD -- 150 --

Thermal Shutdown

Hysteresis ΔTSD -- 10 -- °C

Driver On-Resistance

UGATE Driver Source RUGATEsr BOOT−PHASE forced to 5V,

UGATE High State -- 1.8 3.6 Ω

UGATE Driver Sink RUGATEsk BOOT−PHASE forced to 5V,

UGATE Low State -- 1.2 2.4 Ω

LGATE Driver Source RLGATEsr LGATE, High State -- 1.8 3.6 Ω

LGATE Driver Sink RLGATEsk LGATE, Low State -- 0.8 1.34 Ω

LGATE Rising (VPHASE = 1.5V) -- 30 --

Dead Time UGATE Rising -- 30 -- ns

Internal Boost Charging

Switch On-Resistance VCC to BOOT, 10mA -- -- 80 Ω

EN Threshold Logic-High VIH 1.8 -- --

EN Threshold

Voltage Logic-Low VIL -- -- 0.5

Voltage Programming (G0, G1)

Logic-High 750 -- --

G0, G1 Input

Threshold

Voltage Logic-Low -- -- 300 mV

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RT8241

Parameter Symbol Test Conditions Min Typ Max Unit

PGOOD (upper side threshold determined by OVP threshold)

Trip Threshold Falling edge, measured at FB,

with respect to reference, no

load. −19 −15 −11 %

Trip Hysteresis -- 3 -- %

Fault Propagation Delay Falling edge, FB forced below

PGOOD trip threshold -- 2.5 --

μs

Output Low Voltage ISINK = 1mA -- -- 0.4

Leakage Current High State, forced to 5V -- -- 1 μA

Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for

stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended

periods may remain possibility to affect device reliability.

Note 2. θJA is measured in natural convection at TA = 25°C on a low effective thermal conductivity test board of JEDEC 51-3

thermal measurement standard.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. Guaranteed by Design.

DS8241-03 January 2014 www.richtek.com

RT8241

Typical Operating Characteristics

Efficiency vs. Output Current

100

0.001 0.01 0.1 1 10

Output Current (A)

Efficiency (%)

VIN = 8V, VCC = VEN = 5V, VOUT = 0.9V

Switching Frequency vs. Output Current

100

125

150

175

200

225

250

275

300

325

350

0.001 0.01 0.1 1 10

Output Current (A)

Switching Frequency (kHz)1

VIN = 8V, VCC = VEN = 5V, VOUT = 0.9V

Efficiency vs. Output Current

100

0.001 0.01 0.1 1 10

Output Current (A)

Efficiency (%)

VIN = 12V, VCC = VEN = 5V, VOUT = 0.9V

Switching Frequency vs. Output Current

100

125

150

175

200

225

250

275

300

325

350

0.001 0.01 0.1 1 10

Output Current (A)

Switching Frequency (kHz)1

VIN = 12V, VCC = VEN = 5V, VOUT = 0.9V

Efficiency vs. Output Current

100

0.001 0.01 0.1 1 10

Output Current (A)

Efficiency (%)

VIN = 20V, VCC = VEN = 5V, VOUT = 0.9V

Switching Frequency vs. Output Current

100

125

150

175

200

225

250

275

300

325

350

0.001 0.01 0.1 1 10

Output Current (A)

Switching Frequency (kHz)1

VIN = 20V, VCC = VEN = 5V, VOUT = 0.9V

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RT8241

Dynamic VID Down

Time (20μs/Div)

No Load, VIN = 12V, VCC = VEN = 5V,

VOUT = 0.9V to 0.8V

(5V/Div)

UGATE

(20V/Div)

LGATE

(10V/Div)

0.8V

VOUT

(50mV/Div)

0.9V

Dynamic VID Up

Time (20μs/Div)

(5V/Div)

0.8V

UGATE

(20V/Div)

LGATE

(10V/Div)

No Load, VIN = 12V, VCC = VEN = 5V,

VOUT = 0.8V to 0.9V

VOUT

(50mV/Div)

0.9V

Shutdown Current vs. Input Voltage

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

5 7 9 1113151719212325

Input Voltage (V)

Shutdown Current (µA)1

NoLoad,EN=GND

Quiescent Current vs. Input Voltage

670

680

690

700

710

720

730

5 7 9 1113151719212325

Input Voltage (V)

Quiescent Current (µA)1

No Load, VEN = 5V

Power On from EN

Time (400μs/Div)

VIN = 12V, VCC = VEN = 5V, VOUT = 0.9V,

PGOOD

(10V/Div)

VOUT

(1V/Div)

PHASE

(10V/Div)

(5V/Div)

ILOAD = 0.1A VOUT

(1V/Div)

Power Off from VIN

Time (1ms/Div)

PHASE

(10V/Div)

(5V/Div)

VIN = 12V, VCC = VEN = 5V,

VOUT = 0.9V, ILOAD = 0.1A

PGOOD

(10V/Div)

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RT8241

Load Transient Response

Time (100μs/Div)

VIN = 12V, VCC = VEN = 5V,

VOUT = 0.9V, ILOAD = 0A to 6A

ILOAD

(5A/Div)

VOUT_ac

(20mV/Div)

LGATE

(10V/Div)

UGATE

(20V/Div)

Over Voltage Protection

PGOOD

(5V/Div)

VOUT

(500mV/Div)

LGATE

(5V/Div) No Load, VIN = 12V, VCC = VEN = 5V, VOUT = 0.9V

Time (100μs/Div)

Under Voltage Protection

Time (100μs/Div)

PGOOD

(5V/Div)

VOUT

(1V/Div)

LGATE

(5V/Div)

UGATE

(20V/Div)

No Load, VIN = 12V, VCC = VEN = 5V, VOUT = 0.9V

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RT8241

Application Information

TheRT8241isof aconstanton-timePWMcontroller which

providesfourDC feedbackvoltages by controlling theG0

and G1 digital input. The constant on-time PWM control

scheme handles wide input/output ratios with ease and

provides100ns “instant-on”responseto loadstepswhile

maintaininga relatively constantoperatingfrequencyand

inductoroperatingpointoverawiderangeofinputvoltages.

The topology circumvents the poor load transient timing

problems of fixed-frequency current mode PWMs, while

avoidingthe problemscausedby widely varyingswitching

frequenciesinconventionalconstanton-timeandconstant

off-time PWM schemes. The DRVTM mode PWM

modulator is specifically designed to have better noise

immunity for such a single output application.

PWM Operation

TheMachResponseTM,DRVTM modecontroller relies on

the output filter capacitor's Effective Series Resistance

(ESR) to act as a current sense resistor, so the output

ripplevoltageprovides the PWMramp signal.Referringto

the function diagrams of the RT8241, the synchronous

high side MOSFET is turned on at the beginning of each

cycle. After the internal one-shot timer expires, the high

side MOSFET is turned off. The pulse width of this one

shot is determined by the converter's input and output

voltages to keep the frequency fairly constant over the

input voltage range. Another one-shot sets a minimum

off-time(400ns typ.).

On-Time Control (TON)

The on-time one-shot comparator has two inputs. One

input monitors the output voltage, while the other input

samples the input voltage and converts it to a current.

This input voltage proportional current is used to charge

an internal on-time capacitor. The on-time is the time

required for the voltage on this capacitor to charge from

zerovoltstoVOUT, thereby makingthe on-timeof the high

sideswitchdirectlyproportional to the output voltage and

inversely proportional to the input voltage. The

implementation results in a nearly constant switching

frequency without the need of a clock generator.

Diode-Emulation Mode

RT8241automaticallyreducesswitchingfrequencyatlight-

loadconditionstomaintainhighefficiency. This reduction

offrequencyisachievedsmoothly andwithout increasing

VOUT ripple or load regulation. As the output current

decreasesfromheavyloadcondition, theinductorcurrent

is also reduced, and eventually comes to the point that

its valley touches zero current, which is the boundary

between continuous conduction and discontinuous

conductionmodes. By emulating thebehavior of diodes,

thelow side MOSFET allows only partial negativecurrent

whentheinductor freewheelingcurrent becomesnegative.

As the load current is further decreased, it takes longer

and longer to discharge the output capacitor to the level

that is required for the next “ON”cycle. The on-time is

kept the same as that in the heavy-load condition. In

reverse,when the output current increasesfromlight load

to heavy load, the switching frequency increases to the

presetvalueastheinductorcurrentreachesthecontinuous

condition. The transition load point to the light-load

operation can be calculated as follows (Figure 1) :

IN OUT

LOAD ON

(V V )

−

≈×

where tON is the on-time.

Figure1. Boundary Condition of CCM/DCM

The switching waveforms may appear noisy and

asynchronouswhenlightloadingcausesdiode-emulation

operation, but this is a normal operating condition that

resultsinhighlight-loadefficiency.Trade-offsinDEMnoise

vs. light-load efficiency is made by varying the inductor

value.Generally, low inductor values produce a broader

efficiencyvs.loadcurve,whilehighervaluesresultinhigher

full-load efficiency (assuming that the coil resistance

remains fixed) and less output voltage ripple. The

disadvantages for using higher inductor values include

IL_Peak

ILOAD = IL_Peak/2

tON

Slope = (VIN-VOUT) / L

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RT8241

FB1

OUT FB FB2

VV(1 )

=×+

where VFB is as shown in Table 2.

Table 2. Feedback Voltage Selection

G0 State G1 State Feedback Voltage

0 0 VFB = 0.9V

0 1 VFB = 0.8V

1 0 VFB = 0.725V

1 1 VFB = 0.675V

Figure 2. Setting VOUT with a Resistor-Divider

Output Voltage Transition Operation

The digital input control pin Gx allows VOUT to transition

tobothhigher andlowervalues.Foradownwardtransition,

therapidchangeofGxfromhightolowwillsuddenlycause

VFB todrop to anew internalVREF.At this timetheLGATE

will drive high to turn on the low side MOSFET and draw

currentfromtheoutputcapacitorviathe inductor.LGATE

will remain on until VFB falls to the new internal VREF, at

which point a normal UGATE switching cycle begins, as

shown in Figure 3. For a down transition, the low side

MOSFET remains on until VFB reaches the new internal

VREF.Thus, thenegativeinductorcurrentwill beincreased.

If the negative current become large enough to trigger

NOCP,thelowsideMOSFETwill be turned offto prevent

Figure3. OutputVoltageDownTransition

LGATE

PHASE

UGATE

CIN

VIN

RFB1

RFB2

BOOT

VOUT

COUT

For an upward transition (from lower to higher VOUT) as

showninFigure4,Gxchangesfromlow tohighandcauses

VFB to rise to a new internal VREF. This quickly trips the

VFB comparator regardless of whether DEM is active or

not, generating an UGATE on-time and causing a

subsequent LGATE to be turned on. At the end of the

minimum off-time (400ns), if VFB is still below the new

internalVREF,anotherUGATE on-timewillbestarted.This

sequence continues until the FB pin exceeds the new

internal VREF.

largerphysical sizeanddegradedload-transientresponse

(especially at low input voltage levels).

Output Voltage Setting (FB)

As Figure 2 shows, the output voltage can be adjusted

from 0.675V to 3.3V by setting the feedback resistors

RFB1 and RFB2. Choose RFB2 to be approximately 20kΩ,

and solve for RFB1 using the equation :

large negative current from damaging the component.

Referto theNegative Over CurrentLimitsection forafull

description.

Figure 4. Output Voltage Up Transition

VFB

VOUT

UGATE

LGATE

VREF

GND

Initial VOUT

Final VOUT

Initial VREF

Final VREF

GND

VREF Initial VREF

Final VREF

VFB

UGATE

LGATE

Initial VOUT

Final VOUT

VOUT

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RT8241

If the VOUT change is significant, there can be several

consecutivecycleof UGATEon-timefollowedbyminimum

LGATE time. This can cause a rapid increase in inductor

current: typically it only takes a few switching cycles for

inductor current to rise up to the current limit. At some

point the VFB will rise up to the new internal VREF and the

UGATE pulses will cease, but the inductor's LI2energy

must then flow into the output capacitor. This can create

a significant overshoot, as shown in Figure 5.

Figure 5. Output Voltage Up Transition with

Overshooting

This overshoot can be approximated by the following

equation, where ICL is the current limit, VFINAL is the

desired set point for the final voltage, Lis in μH and COUT

is in μF. 22

MAX FINAL

OUT

V()V

Current Limit Setting (OCP)

TheRT8241hasa cycle-by-cycle current limitingcontrol.

The current limitcircuit employs aunique “valley”current

sensing algorithm. If the magnitude of the current sense

signal at the CS pin is above the current limit threshold,

the PWM is not allowed to initiate a new cycle (Figure.

6). In order to provide both good accuracy and a cost

effective solution, the RT8241 supports temperature

compensated MOSFET RDS(ON) sensing. The CS pin

shouldbeconnectedtoGNDthroughthetripvoltagesetting

resistor, RCS. The 10μACS terminal source current , ICS,

and the trip voltage setting resistor, RCS, set the CS trip

CS CS

V(mV)=R(k)10(A)

Ω×

The Inductor current can be monitored by the voltage

between GND and the PHASE pin. Hence, the PHASE

pin should be connected to the drain terminal of the low

side MOSFET. ICS has temperature coefficient to

compensatethetemperaturedependencyoftheRDS(ON).

GND is used as the positive current sensing node, so

GND should be connected to the source terminal of the

bottomMOSFET.

Whilethecomparison is beingdoneduringthe OFF state,

VCS setsthe valley level ofthe inductor current. Thus,the

load current at over-current threshold, ILOAD_OC, can be

calculated as follows : ripple

LOAD_OC DS(ON)

CS IN OUT OUT

DS(ON) SW IN

I8R 2

V(VV)V

8R 2Lf V

−×

=+×

×××

Inanover-currentcondition,thecurrenttotheloadexceeds

thecurrent totheoutputcapacitor,thus causingtheoutput

voltage to fall. Eventually the voltage crosses the under

voltageprotectionthreshold andthe device shuts down.

Figure 6. “Vally” Current Limit

Negative Over Current Limit (PWM Only Mode)

TheRT8241supports cycle-by-cyclenegative overcurrent

limitingin CCM Mode only.The over current limitis setto

benegative but is the sameabsolutevalueasthe positive

over current limit. If output voltage continues to rise, the

lowsideMOSEFT remains on. Thus, the inductor current

is reduced and reverses direction after it reaches zero.

When there is too much negative current in the inductor,

the low side MOSFET is turned off and the current flows

towards VIN through the body diode of the high side

MOSFET. Because this protection limits the discharge

current of the output capacitor, the output voltage tends

IL_Peak

ILOAD

ILIM

voltage, VCS, as in the following equation.

GND

VREF Initial VREF

Final VREF

VFB

UGATE

LGATE

Initial VOUT

Final VOUT

VOUT

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RT8241

to rise, eventually hitting the over voltage protection

thresholdandshutting downthe device.Ifthedevice hits

the negative over current threshold again before output

voltage is discharged to the target level, the low side

MOSFETisturnedoffandthe process repeats.Itensures

maximum allowable discharge capability when output

voltagecontinues to rise. On the other hand,if theoutput

is discharged to the target level before negative current

threshold is reached, the low side MOSFET is turned off,

the high side MOSFET is then turned on, and the device

resumesnormaloperation.

MOSFETGate Driver (UGATE, LGATE)

Thehighsidedriverisdesignedtodrive high current, low

RDS(ON) N-MOSFET(s). When configured as a floating

driver, 5V bias voltage is delivered from the VCC supply.

Theaveragedrivecurrentisproportionaltothegatecharge

atVGS = 5Vtimesswitching frequency. Theinstantaneous

drive current is supplied by the flying capacitor between

theBOOTandPHASEpins.Adeadtimeto prevent shoot

through is internally generated between high side

MOSFET off to low side MOSFET on, and low side

MOSFEToff tohighside MOSFET on.Thelow side driver

is designed to drive high current, low RDS(ON) N-

MOSFET(s).The internal pull-down transistorthat drives

LGATElowis robust, with a 0.8Ωtypicalon resistance.A

5V bias voltage is delivered from the VCC supply. The

instantaneous drive current is supplied by the flying

capacitorbetweenVCC andGND.

Forhighcurrent applications, some combinationsof high

and low side MOSFETs might be encountered that will

cause excessive gate drain coupling, which can lead to

efficiency killing, EMI-producing shoot through currents.

This is often remedied by adding a resistor in series with

BOOT, which increases the turn-on time of the high side

MOSFETwithout degradingthe turn-offtime,asshownin

Figure 7.

Figure 7. Reducing the UGATE Rise Time

PHASE

UGATE Q1 CIN

VIN

BOOT R

Power Good Output (PGOOD)

Thepowergoodoutputisanopen-drainoutputandrequires

a pull-up resistor. When the feedback voltage is above

1.1Vor below 0.45V, PGOODwillbe pulled low. PGOOD

is allowed to be high until soft-start ends and the output

reaches 89% of its set voltage. There is a 2.5μs delay

built into PGOODcircuitry to prevent false transition.

WhenGx changes, PGOOD remains in its present state

for 32 clock cycles. Meanwhile, VOUT or VFB regulates to

thenewlevel.

POR, UVLO and Soft-Start

Power On Reset (POR) occurs when VCC rises above

3.7V (typ.).After POR is triggered, the RT8241 will reset

thefaultlatchandpreparethePWMforoperation. Below

3.6V (typ.), the VCC Under Voltage Lockout (UVLO)

circuitryinhibits switching by keepingUGATEandLGATE

low. A built-in soft-start is used to prevent surge current

fromthe power supply input afterENis enabled.Itclamps

the ramping of the internal reference voltage which is

comparedwiththeFBsignal. Thetypical soft-startduration

is 0.8ms.

Over Voltage Protection (OVP)

Theoutput voltagecanbecontinuouslymonitored forover

voltageprotection.WhenVFB exceeds1.1V,over voltage

protectionistriggered andthelowsideMOSFETislatched

on.This activatesthe low side MOSFETto dischargethe

output capacitor. The RT8241 is latched once OVP is

triggered and can only be released by VCC or ENpower

on reset. There is a 5μs delay built into the over voltage

protection circuit to prevent false transitions.

Under Voltage Protection (UVP)

Theoutputvoltagecanbecontinuouslymonitoredforunder

voltage protection. When VFB is less than 0.45V, under

voltageprotectionis triggered andthen both UGATE and

LGATEgate drivers areforcedlow.In ordertoremovethe

residual charge on the output capacitor during the under

voltage period, if PHASE is greater than 1V, the LGATE

is forced high until PHASE is lower than 1V. There is a

3.5μs delay built into the under voltage protection circuit

to prevent false transitions. During soft-start, the UVP

blanking time is 3ms.

14 DS8241-03 January 2014www.richtek.com

RT8241

ON IN OUT

LOAD(MAX)

T(VV)

LLIR I

×−

=×

whereLIR is the ratio of peak-to-peakripplecurrent to the

maximum average inductor current. Select a low pass

inductor having the lowest possible DC resistance that

fitsinthe allowed dimensions. Ferrite cores are oftenthe

best choice, although powdered iron is inexpensive and

canwork wellat 200kHz.The core must be large enough

not to saturate at the peak inductor current (IPEAK) :

PEAK LOAD(MAX) LOAD(MAX)

LIR

II I

=+×

Output Capacitor Selection

The output filter capacitor must have ESR low enough to

meetoutputrippleandloadtransientrequirement,yethave

high enough ESR to satisfy stability requirements.Also,

thecapacitancemustbehighenoughtoabsorbtheinductor

energy going from a full load to no load condition without

trippingthe OVP circuit. For CPU core voltageconverters

andotherapplicationswheretheoutputissubjecttoviolent

loadtransient,theoutputcapacitor's sizedependsonhow

much ESR is needed to prevent the output from dipping

too low under a load transient. Ignoring the sag due to

finite capacitance :

LOAD(MAX)

ESR I−

≤

In non-CPU applications, the output capacitor's size

depends on how much ESR is needed to maintain at an

acceptablelevel ofoutput voltage ripple:

LOAD(MAX)

ESR LIR I −

≤×

Organic semiconductor capacitor(s) or special polymer

capacitor(s)are recommended.

Output Capacitor Stability

Stabilityisdetermined bythevalueoftheESRzerorelative

totheswitching frequency.The point of instabilityis given

by the following equation :

ESR OUT

f2ESRC 4

=≤

××

Do not put high value ceramic capacitors directly across

theoutputswithout takingprecautionsto ensure stability.

Large ceramic capacitors can have a high ESR zero

frequency and cause erratic and unstable operation.

However, it is easy to add sufficient series resistance by

placingthecapacitorsacoupleof inchesdownstream from

the inductor and connecting FB divider close to the

inductor.Therearetwo related but distinct ways including

double pulsing and feedback loop instability to identify

theunstableoperation.Doublepulsingoccursduetonoise

on the output or because the ESR is too low such that

there is not enough voltage ramp in the output voltage

signal.This “fools”the error comparator intotriggeringa

newcycle immediately after the 400ns minimum off-time

periodhasexpired.Double-pulsing is moreannoyingthan

harmful,resultinginnothing worse thanincreased output

ripple.However,itmay indicate the possible presence of

loopinstability, which is caused by insufficientESR. Loop

instability can result in oscillation at the output after line

or load perturbations that can trip the over voltage

protection latch or cause the output voltage to fall below

the tolerance limit. The easiest method for stability

checking is to apply a very zero-to-max load transient

and carefully observe the output voltage ripple envelope

forovershootandringing.Ithelpsto simultaneouslymonitor

the inductor current with anAC probe. Do not allow more

thanoneringingcycleafterthe initialstep-responseunder-

orovershoot.

Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

differencebetweenjunctionandambienttemperature.The

maximum power dissipation can be calculated by the

followingformula:

PD(MAX) =(TJ(MAX) −TA) / θJA

whereTJ(MAX) is the maximumjunctiontemperature,TAis

theambienttemperature,andθJAisthejunction toambient

thermalresistance.

For recommended operating condition specifications of

theRT8241, the maximum junction temperature is 125°C

Output Inductor Selection

Theswitching frequency (on-time)andoperatingpoint(%

ripple or LIR) determine the inductor value as follows :

DS8241-03 January 2014 www.richtek.com

RT8241

andTAis theambienttemperature.Thejunctiontoambient

thermal resistance, θJA, is layout dependent. For WQFN-

12L2x2 packages, the thermal resistance, θJA, is 165°C/

W on a standard JEDEC 51-3 single-layer thermal test

board. The maximum power dissipation at TA = 25°Ccan

be calculated by the following formula :

PD(MAX) = (125°C −25°C) / (165°C/W) = 0.606W for

WQFN-12L2x2package

Themaximumpower dissipationdependsontheoperating

ambient temperature for fixed TJ(MAX) and thermal

resistance, θJA. For the RT8241 package, the derating

curve in Figure 8 allows the designer to see the effect of

rising ambient temperature on the maximum power

dissipation.

Figure8.DeratingCurves forthe RT8241Package

LayoutConsiderations

Layout is very important in high frequency switching

converter design. If designed improperly, the PCB could

radiate excessive noise and contribute to converter

instability. For best performance of the RT8241, the

following guidelines should be strictly followed.

`ConnectanRC low-passfilterfrom VCC, (1μFand10Ω

are recommended). Place the filter capacitor close to

theIC.

`Keep current limit setting network as close as possible

to the IC. Routing of the network should be kept away

from high voltage switching nodes to prevent it from

coupling.

`Connections from the drivers to the respective gate of

the high side or the low side MOSFET should be as

short as possible to reduce stray inductance.

`All sensitive analog traces and components pertaining

to FB, GND, EN, PGOOD, CS and VCC should be

placedaway from highvoltageswitchingnodes such as

PHASE,LGATE, UGATE, orBOOTnodes to prevent it

fromcoupling. Use internal layer(s) asground plane(s)

and shield the feedback trace from power traces and

components.

`Currentsenseconnectionsmustalwaysbemadeusing

Kelvin connections to ensure an accurate signal, with

the current limit resistor located at the device.

`Power sections should connect directly to ground

plane(s) using multiple vias as required for current

handling(includingthechippower groundconnections).

Powercomponents should be placedto minimizeloops

and reduce losses.

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0.45

0.50

0.55

0.60

0.65

0 25 50 75 100 125

Ambient Temperature (°C)

mum

ower

(W)

Four-Layer PCB

16 DS8241-03 January 2014www.richtek.com

RT8241

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should

obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot

assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be

accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

Outline Dimension