Rohm BD GC0 Series Installation and operating instructions

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© 2017 ROHM Co., Ltd.
No. 60AP001E Rev.001
2017.4
Application Note
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
Linear Regulator Series
BDxxGC0 Series Application Information
The information in this application note only provides hints for IC mounting. For this reason, these notes should not be considered as
an IC quality explanation or a warranty. See the latest data sheet for the IC standard values. Also, note that the application circuits
used in the explanations for each item have been simplified. Be sure to verify operations using the actual application.
Table of contents
1.TypicalApplicationCircuit...................................................................................................................................................................................................2
1.1.AdjustableoutputtypeBD00GC0WEFJ,BD00GC0MEFJ-LB,BD00GC0MEFJ-M..............................................................................................2
1.2.FixedoutputtypeBDxxGC0WEFJ,BDxxGC0MEFJ-LB,BDxxGC0MEFJ-M.......................................................................................................3
2.Outputvoltagesetting(Adjustableoutputtype)................................................................................................................................................................4
3.Kelvin connection...............................................................................................................................................................................................................5
4.Outputvoltagetolerance....................................................................................................................................................................................................5
5.Studyofinput/outputvoltagedifferenceandcharacteristics............................................................................................................................................6
6.Outputcontrol(EN)pin......................................................................................................................................................................................................6
7.Outputcapacitor.................................................................................................................................................................................................................7
8.Inputcapacitor....................................................................................................................................................................................................................8
9.Load....................................................................................................................................................................................................................................8
10.Efficiency...........................................................................................................................................................................................................................9
11.Thermaldesign...............................................................................................................................................................................................................10
12.Terminalprotection.........................................................................................................................................................................................................13
13.Softstart..........................................................................................................................................................................................................................16
14.Sequenceforturningpoweron.....................................................................................................................................................................................17
15.Sequenceforturningpower off.....................................................................................................................................................................................21
16.Inrush current..................................................................................................................................................................................................................24
17.Overcurrentprotection(OCP).......................................................................................................................................................................................25
18.Thermalshutdown (TSD)..............................................................................................................................................................................................25
19.Input-outputequivalentcircuit........................................................................................................................................................................................26
20. Lineup.............................................................................................................................................................................................................................27

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Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
1. TypicalApplication Circuit
1.1.Adjustableoutput type BD00GC0WEFJ,BD00GC0MEFJ-LB, BD00GC0MEFJ-M
Vcc
EN
GND
FB
Vo
R1
R2
CIN COUT
VIN
OFF ON
VOUT
5
8
3
1
2
FIN
E-Pad
N.C
N.C
N.C
4
6
7Vcc
EN
GND
FB
Vo
R1
R2
CIN COUT
VIN VOUT
5
8
3
1
2
FIN
E-Pad
N.C
N.C
N.C
4
6
7
Figure 1-1. When using the output ON/OFF function Figure 1-2. When not using the output ON/OFF function
Package
HTSOP-J8
Pin
configuration
(Top View)
1 4
58
2 3
67
Pin
number
Pin name
Function
1
Vo
Output pin
Supplies electrical power to the load. To prevent vibrations on this pin, connect Vo and GND
with a capacitor. → See page 7.
2
FB
Output voltage setting pin
The FB pin is a tolerance amp input pin. Based on the ground, the FB pin voltage can be
outputted from 1.5 V to 13 V at 0.8 V. Connect a resistor divider circuit. → See page 4.
3
GND
Ground
This is the ground for the regulator circuit.
4
N.C
Unconnected pin
This is not connected to the internal circuit. Leave this open or connect GND.
5
EN
Enable pin
The IC can be set to shutdown status by using the EN pin. Set to the pin to “High” to turn
output on, and to “Low” to turn output off. → See page 6.
6, 7
N.C
Unconnected pin
This is not connected to the internal circuit. Leave this open or connect GND.
8
Vcc
Input pin
Power is supplied to the IC through the input pin. To stabilize the pin input, connect Vcc and
GND with a ceramic capacitor. Place the capacitor near the pin. → See page 8.
E-Pad
FIN
Exposedpad
The exposedpad is connected to the die via the lead frame. We recommend soldering exposed
pad to a ground plane with a wide copper foil area to improve heat dispersion efficiency. Also,
exposedpad is electrically connected to GND in the package internally via substrate.
Backside: Exposedpad

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Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
1. TypicalApplication Circuit
1.2. Fixed output type BDxxGC0WEFJ,BDxxGC0MEFJ-LB, BDxxGC0MEFJ-M
Vcc
EN
GND
Vo_s
Vo
CIN COUT
VIN
OFF ON
VOUT
5
8
3
1
2
FIN
E-Pad
N.C
N.C
N.C
4
6
7Vcc
EN
GND
Vo_s
Vo
CIN COUT
VIN VOUT
5
8
3
1
2
FIN
E-Pad
N.C
N.C
N.C
4
6
7
Figure 1-3. When using the output ON/OFF function Figure 1-4. When not using the output ON/OFF function
Package
HTSOP-J8
Pin
configuration
(Top View)
1 4
58
2 3
67
Pin
number
Pin name
Function
1
Vo
Output pin
Supplies electrical power to the load. To prevent vibrations on this pin, connect Vo and GND
with a capacitor. → See page 7.
2
Vo_s
Outputvoltagemonitor pin
This pin is used to eliminate drops in voltage that occur due to wiring resistance between the
regulator output and the load. → See page 5.
3
GND
Ground
This is the ground for the regulator circuit.
4
N.C
Unconnected pin
This is not connected to the internal circuit. Leave this open or connect GND.
5
EN
Enable pin
The IC can be set to shutdown status by using the EN pin. Set to the pin to “High” to turn
output on, and to “Low” to turn output off. → See page 6.
6, 7
N.C
Unconnected pin
This is not connected to the internal circuit. Leave this open or connect GND.
8
Vcc
Input pin
Power is supplied to the IC through the input pin. To stabilize the pin input, connect Vcc and
GND with a ceramic capacitor. Place the capacitor near the pin. → See page 8.
E-Pad
FIN
Exposedpad
The exposedpad is connected to the die via the lead frame. We recommend soldering exposed
pad to a ground plane with a wide copper foil area to improve heat dispersion efficiency. Also,
exposedpad is electrically connected to GND in the package internally via substrate.
Backside: Exposedpad

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Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
2. Output voltage setting (Adjustable output
type)
Adjustable output voltage types use an external resistor divider,
allowing the output voltage to be set from 1.5 V to 13 V. The
output voltage can be calculated with the following equation.
   
󰇟󰇠
Vcc
EN GND FB
Vo
R1
R2
CIN COUT
VIN VOUT
I2
IFB
0.8 [V]
R1I2[V]
Figure 2-1. Output voltage setting
The FB pin of this IC outputs at 0.8 V, based on the ground. The
I2current of R2can be calculated at 0.8 V/R2, and the current of
R1is the current of R2with the addition of the bias current IFB.
Note that as the internal circuit of the FB pin is a gate input, the
bias current (10 nA) is slight and can be ignored. The voltage of
R1multiplied by I2added to 0.8 V is the output voltage VOUT, as
shown in the following equation.
    
  
To obtain the optimum load regulation performance, directly
connect the PCB traces to the bottom side of the output voltage
setting resistor.
The setting resistance for a typical output voltage is shown next.
In this example. The E24 series is used for the nominal
resistance values. Use the same type of resistors for R1and R2.
If different types are used, the ratio for R1and R2will change due
to the differences in their tolerances and temperature
characteristics, which may degrade the output voltage precision.
When using chip resistances at or below a size of 0402 mm
(01005 inch), select the parts while using caution for the rated
power of the resistor and the maximum voltage.
Settingwithminimum number ofcomponents
Target
VO(V)
R1 (kΩ) R2 (kΩ)
Calc.
VO' (V)
Error
(%)
1.5 13 15 1.493 - 0.444
1.8 15 12 1.800 0
1.85 12 9.1 1.855 + 0.267
1.9 22 16 1.900 0
215 10 2.000 0
2.05 47 30 2.053 + 0.163
2.1 9.1 5.6 2.100 0
2.2 16 9.1 2.207 + 0.3
2.3 30 16 2.300 0
2.5 51 24 2.500 0
2.55 18 8.2 2.556 + 0.239
2.6 27 12 2.600 0
2.7 43 18 2.711 + 0.412
2.75 39 16 2.750 0
2.8 30 12 2.800 0
2.85 10 3.9 2.851 + 0.045
2.9 24 9.1 2.910 + 0.341
2.95 43 16 2.950 0
333 12 3.000 0
3.1 43 15 3.093 - 0.215
3.2 30 10 3.200 0
3.3 7.5 2.4 3.300 0
3.4 39 12 3.400 0
3.5 9.1 2.7 3.496 - 0.106
3.7 33 9.1 3.701 + 0.03
543 8.2 4.995 - 0.098
5.4 27 4.7 5.396 - 0.079
613 2 6.000 0
6.3 11 1.6 6.300 0
730 3.9 6.954 - 0.659
827 3 8.000 0
947 4.7 8.800 - 2.222
10 15 1.3 10.031 + 0.308
12 51 3.6 12.133 + 1.111
13 20 1.3 13.108 + 0.828
High precisionsetting
Target
VO(V)
R1 (kΩ) R2 (kΩ)
Calc.
VO' (V)
Error
(%)
1.5 6.2+4.3 12 1.500 0
1.8 15 12 1.800 0
1.85 15+0.75 12 1.850 0
1.9 22 16 1.900 0
215 10 2.000 0
2.05 18+0.75 12 2.050 0
2.1 9.1 5.6 2.100 0
2.2 10+7.5 10 2.200 0
2.3 30 16 2.300 0
2.5 51 24 2.500 0
2.55 20+15 16 2.550 0
2.6 27 12 2.600 0
2.7 22+16 16 2.700 0
2.75 39 16 2.750 0
2.8 30 12 2.800 0
2.85 30+0.75 12 2.850 0
2.9 30+1.5 12 2.900 0
2.95 43 16 2.950 0
333 12 3.000 0
3.1 30+16 16 3.100 0
3.2 30 10 3.200 0
3.3 7.5 2.4 3.300 0
3.4 39 12 3.400 0
3.5 33+0.75 10 3.500 0
3.7 36+7.5 12 3.700 0
5 51+12 12 5.000 0
5.4 56+1.5 10 5.400 0
6 47+18 10 6.000 0
6.3 68+0.75 10 6.300 0
7 24+3.9 3.6 7.000 0
827 3 8.000 0
9 33+3.9 3.6 9.000 0
10 68+3.3 6.2 10.000 0
12 51+3.6 3.9 12.000 0
13 51+3.9 3.6 13.000 0
(2-1)

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Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
3. Kelvin connection
Normally, the optimum regulation can be achieved at the time
that the output voltage setting resistor is connected to the Vo pin.
For applications where the load current is frequent, the wiring
width is narrow, the distance to the load is great and so on, the
voltage may drop due to resistance in the PCB traces, which
may result in a lower voltage at the load point. You can eliminate
this influence by bringing the upper side of the output voltage
setting resistance divider as close to the load as possible to
connect. Place resistance voltage dividers with high impedance
close to the IC and stretch out the traces on the upper side of
the resistor with low impedance, to achieve noise tolerance.
Connect the GND side of the IC as well using an independent
ground trace to the load, so that it is not influenced by voltage
drops in load current. As the IC’s output capacitor COUT is used
to prevent oscillation, place it close to the IC; and place a large
capacitance capacitor CBULK close to the load to respond to
abrupt loads (Figure 3-1).
For the fixed output type, output voltage setting resistors are built
in, so the upper side of the resistor divider is often connected to
the output inside of the IC. In this configuration, the voltage may
drop due to the wiring resistance up to the load. On this regulator
IC, the upper side of the resistor divider goes to the Vo_s pin, so
that a Kelvin connection can be made as with the adjustable
output type (Figure 3-2).
4. Output voltage tolerance
The maximum output voltage tolerance for a fixed output type is
the sum of the output voltage tolerance, the input constancy
tolerance and the load constancy tolerance. For an adjustable
output type, the maximum output voltage tolerance is the sum of
the reference-voltage (C terminal voltage VC) tolerance times the
tolerance external resistor for output voltage settings (see the
following formula), the input constancy tolerance and the load
constancy tolerance.
Output voltage tolerance for adjustable output type
Minimum value
󰇛󰇜  󰇛󰇜 󰇛󰇜 󰇛󰇜
󰇛󰇜 󰇟󰇠
Maximum value
󰇛󰇜  󰇛󰇜 󰇛󰇜 󰇛󰇜
󰇛󰇜 󰇟󰇠
Vcc
EN GND FB
Vo
R1
R2
CIN COUT VIN RLOAD CBULK
ILARGE
ILARGE
Figure 3-1. Kelvin connection (Adjustable output type)
Vcc
EN GNDVo_s
Vo
CIN COUT VIN RLOAD CBULK
ILARGE
ILARGE
Figure 3-2. Kelvin connection (Fixedoutputtype)
(4-1)
(4-2)

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Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
5. Study of input/output voltage difference and
characteristics
For the minimum value of the input voltage, the minimum
input/output voltage at the load current to be used is read from
the “Input/output voltage difference vs. output current” graph on
the data sheet, to get the voltage added to the output voltage.
As this time, this works as DC, but the control capacity is
degraded. When there are fluctuations in the load, a large
current cannot be supplied in a short period of time from input to
output, as the input/output voltage difference is small. In other
words, the load responsiveness will slow down. The slowness in
responsiveness will also show up as a degradation in PSRR
characteristics. If only the minimum voltage amount of the
input/output voltage difference is ensured because efficiency is
emphasized, the expected characteristics of the LDO will not be
achieved. Increase the input voltage until the high-speed load
responsiveness and PSRR capabilities are achieved, and find a
compromise between efficiency and each characteristic.
6. Output control (EN) pin
The output can be turned on/off by using the CTL pin. When EN
is at a low level, Vo will turn off; and as the operations of the
entire IC will be turned off, the current consumption will be zero.
When EN is at the high level, the IC turns on, and Vo turns on.
To make certain that IC is turned on/off, apply the voltage that is
listed in the electrical characteristics on the data sheet for the
EN pin voltage. For the designed reference values, the threshold
median value is approximately 1.7 V, the tolerance is around
±0.2 V, the temperature characteristic is around 1.85 V to 1.5 V
(-40°C to +105°C), and overall is around 1.3 V to 2.05 V.
The EN pin is an output voltage on/off control pin and operates
as a switch, but is designed based on the assumption that
switching between High/Low on the normal EN input will be over
a short time. Stabilize the EN pin at the midpoint potential of the
High/Low switch. At the intermediate potential, the output
voltage may become unstable.
There are no restrictions on the start sequence for Vcc and EN.
When not using the output control function, connect the EN pin
to Vcc. At this time, a series resistor is unnecessary.
The delay time between when the EN pin reaches “High” and
the output voltage starts is approximately 200 µs (design
reference value; Figure 6-1).
EN
VOUT
10%
tDELAY t
LH
Figure 6-1. Definition of startup delay time
Controlling the EN pin via mechanical switch may cause
chattering in the output voltage, due to chattering in the switch.
Insert an RC filter before the EN pin, and make sure that the
chattering waveform does not reach the EN pin (upper part of
Figure 6-2). If the wiring between the EN pin and switch is long,
a large pulse wave may be generated due to the inductance
component of the wiring; and if this voltage exceeds the voltage
capacity of the EN pin, the IC may break down. It is necessary
to insert an RC filter before the EN pin, in order to lower the peak
value of the pulse waveform (lower part of Figure 6-2). Change
the C value to adjust the waveform.
EN
C
10kΩLH
EN
C
10kΩ
LP
Figure 6-2. RC filter circuit for EN pin

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Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
7. Output capacitor
Place the output capacitor within 3 cm of the Vo-GND pin IC, in
order to stabilize the loop. Connect a capacitor with an actual
capacitance of 1 µF or greater, considering the tolerance and
temperature characteristics. If the capacitance is too small,
oscillation may occur. Although there is no limit to the maximum
value for the output capacitance, the following points must be
considered. Increasing the capacitance will lengthen the
charging time when the power is on, and the discharging time
when the power is off. Since it is possible that the IC can be
damaged when turning off the power due to an input and output
voltage inversion, which causes a large current to flow back into
the IC, connect a reverse current bypass diode or a reverse
current protection diode.
Figure 7-1. ESR stable operating range
Vcc
EN GND FB
Vo
R1
R2
CIN COUT
VIN
1μF1μF
Ceramic
ESR
0.01Ω～
100Ω
RLOAD
IO=0～1A
Figure 7-2. ESR stable operating range evaluation circuit
Refer to Figure 7-1 for the ESR. This graph is based on an
evaluation circuit for Figure 7-2, and is not perfectly equal to the
capacitor that is actually used. Also, as this is based on the IC
alone and the resistive load, it will change in reality due to the
wiring impedance and input power impedance on the board. For
this reason, check sufficiently whether there are oscillations by
using the conditions of the final product.
When using a ceramic capacitor, we recommend the use of an
X5R or X7R, which have good temperature characteristics. Do
not use Z5U, Y5V or F, which have large capacitance variances
(Figure 7-3). Although the capacitance value will fall below the
nominal value due to differences in tolerance, temperature
characteristics and DC bias characteristics, set it so that the
capacitance does not fall below the minimum value (1 µF). For
the DC bias characteristics, the capacitance tends to drop more
with smaller sizes (Figure 7-4).
STD
Char
Temperature Characteristic
TEMP Range
Capacity Change
Rate
JIS
B
-25 to +85 °C
±10%
EIA
X5R
-55 to +85 °C
±15%
EIA
X7R
-55 to +125 °C
±15%
EIA
X7U
-55 to +125 °C
+22%, -56%
JIS
F
-25 to +85 °C
+30%, -80%
EIA
Y5V
-30 to +85 °C
+22%, -82%
EIA
Z5U
+10 to +85 °C
+22%, -56%
EIA
Z5V
+22%, -82%
Figure 7-3. Temperature characteristic of major high dielectric
constant multilayer ceramic capacitor
0.01
0.1
1
10
0 0.2 0.4 0.6 0.8 1
EFFECTIVE SERIES RESISTANCE：ESR(Ω)
OUTPUT CURRENT：Io(A)
Stable operating range
Unstable operating range
-80
-70
-60
-50
-40
-30
-20
-10
0
10
20
30
-75 -50 -25 0 25 50 75 100 125 150
Capacitance change (%)
Temperature (℃)
B
X7R
Y5V
X5R

8/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
Figure 7-4. DC bias characteristic of high dielectric constant
multilayer ceramic capacitor, comparison by size
Although electrolytic capacitors are inexpensive and offer a large
capacitance, caution must be used, as the electrolyte may
harden at low temperatures, leading to a sudden drop in
capacitance and an increase in ESR. Also, if the heat from the
LDO reaches the electrolytic capacitor, the electrolyte will
become hot, which has an impact on the lifespan of the capacitor.
To resolve this, place the electrolytic capacitor further away so
that it does not get too hot, or reduce the width of the copper
wiring to the minimum current capacity tolerance, so that heat is
not easily transmitted from the LDO.
If the fluctuations in the load current are abrupt, ripple voltage
may occur in output. To reduce the ripple voltage, increase the
capacitance of the output capacitor. Since ceramic capacitors
with a large capacitance are expensive, you can reduce costs
by adding an aluminum electrolytic capacitor, using small-
capacitance ceramic capacitors in parallel as a bulk capacitor.
Increasing the output capacitance will increase the electrical
charge that charges the output capacitor from the input side. For
this reason, a voltage drop may occur if the load responsiveness
of the input side power is not good. To prevent this, use a larger
input capacitor that is appropriate for the output capacitance.
8. Input capacitor
The purpose of the input capacitor is to keep down the phase
fluctuations in the power line during circuit operations, stabilizing
the IC input. When the input trace is particularly long or when
the input power impedance is high, the input capacitor is
effective in ensuring the stability of the LDO input power.
Connect the capacitor within 1 cm of the Vcc-GND pin IC. The
purpose of the input capacitor is to make the source impedance
smaller. For this reason, we recommend a ceramic capacitor
with a small ESR. Connect a capacitor with an actual
capacitance of 1 µF or greater. Although the capacitance value
will fall below the nominal value due to differences in tolerance,
temperature characteristics and DC bias characteristics, set it so
that the capacitance does not fall below the minimum value (1
µF). If the output current changes drastically, increasing the
capacitance of the output capacitor will reduce the ripple voltage.
However, if there are momentary problems with the current
supply potential on the input current side due to the larger output
capacitor, the input voltage may drop. To prevent this, increase
the capacitance of the input capacitor as well, so that it
approximates the input capacitance. For the bulk capacitor,
connect an aluminum electrolytic capacitor in parallel with the
ceramic capacitor.
9. Load
As this IC has over current protection (OCP) characteristics
resembling the number “7”, when the load is a constant current
source or when the output voltage is negative when starting up,
the output voltage will not rise if the load current exceeds the IC
output (supply) current, and the IC will fail to start up.
The IC will operate when the constant current load is on after the
IC’s output voltage is at the default value on startup; but
afterwards, if the thermal shutdown circuit operates and the
output goes off, the IC cannot be restarted. Further, if the IC
cannot be started, constant current load will flow to the
electrostatic breakdown protection diode (between Vo-GND).
Due to this, the chip temperature will rise depending on the
current value, which may result in destruction of the IC or solder
melting. For this reason, use of constant current load is not
recommended.
0
0.5
1
1.5
2
2.5
0246810 12 14 16
Capacitance (μF)
DC voltage (V)
2.2µF, 16V, X5R
1608(0603)
T=0.90mm
3216(1206)
T=1.30mm
2012(0805)
T=0.95mm

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Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
10. Efficiency
The efficiency can be calculated with the following equation.
  
    󰇛 󰇜󰇟󰇠
：󰇟󰇠
：󰇟󰇠
：󰇟󰇠
：󰇟󰇠
Note that when   , efficiency can be calculated with the
following equation.
＝
 󰇟󰇠
We can see from the equation that smaller voltage differences
between inputs/outputs result in better efficiency.
(10-1)
(10-2)

10/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
11. Thermal design
To ensure highly reliable operations, it is necessary to make
sure that the IC junction temperature does not exceed 150°C.
The junction temperature estimate can be calculated using the
following two methods.
1. When measuring the IC temperature using the surface
temperature, use thermal characteristic parameter ψJT for the
calculation. If the thermocouple can be firmly stabilized at the
package surface center, the temperature TTat the package
surface center can be precisely measured. Because of this,
the junction temperature can be calculated precisely by using
this thermal characteristic parameter.
  󰇟󰇠
：󰇟󰇠
：
󰇟󰇠
：󰇟󰇠
Pcan be calculated by the IC consumption power using the
following equation.
  󰇛 󰇜 󰇛 󰇜󰇟󰇠
：󰇟󰇠
：󰇟󰇠
：󰇟󰇠
：󰇟󰇠
Also, the peak output current that can flow constantly can be
calculated with the following equation.
󰇛󰇜 󰇛󰇜 
󰇛 󰇜󰇟󰇠
󰇛󰇜：
󰇟󰇠
：
󰇟󰇠
：
󰇟󰇠
：󰇟󰇠
：󰇟󰇠
2. Use thermal resistance θJA to easily calculate the junction
temperature.
  󰇟󰇠
：󰇟󰇠
：
󰇟󰇠
：󰇟󰇠
Also, the peak output current that can flow constantly can be
calculated with the following equation.
󰇛󰇜 󰇛󰇜 
󰇛 󰇜󰇟󰇠
󰇛󰇜：
󰇟󰇠
：󰇟󰇠
：
󰇟󰇠
：󰇟󰇠
：󰇟󰇠
The thermal characteristics parameter ΨJT and thermal
resistance θJA are values measured using a specific PCB. As the
influence of PCB characteristics, copper foil layout, parts layout,
chassis shape, surrounding environment and so on cause heat
radiation to change, the thermal characteristics parameter and
thermal resistance will also change. It is necessary to consider
that the values will differ from the actual equipment board.
HTSOP-J8 package thermal characteristics parameters and
thermal resistance
PCB type
JT (°C/W)
JA (°C/W)
1layer(1s)
15
130.4
2layers(2s)
6
38.7
4layers(2s2p)
5
29.2
Figure 11-1 through 11-13 and Table 11-1 to 11-3 shows the
specifications for the PCB used in measurement.
(11-1)
(11-2)
(11-3)
(11-4)
(11-5)

11/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
HTSOP-J8 package PCB specifications, 1 layer (1s)
Conforms to JEDEC standard JESD51-3/ -7
76.2mm
114.3mm
Figure 11-1. Top Layer Trace
1.27
3.9
1.35
0.75
4.9
3.2
Figure 11-2. Footprint
Top Layer
Figure 11-3. 1-layer board sectional view
Table 11-1. 1-layer PCB specifications
HTSOP-J8 package PCB specifications, 2 layers (2s)
Conforms to JEDEC standard JESD51-3/ -5/ -7
114.3mm
76.2mm
Figure 11-4. Figure 11-5.
Top Layer Trace Bottom Layer Trace
Thermal via
φ0.30mm, 1.2mm pitch
1.27
3.9
1.35
0.75
4.9
3.2
Figure 11-6. Footprint
via
Top Layer
Bottom Layer
Figure 11-7. 2-layer board sectional view
Table 11-2. 2-layer PCB specifications
Item
Value
Board thickness
1.57mm
Boardoutlinedimensions
76.2mm×114.3mm
Board material
FR-4
Tracethickness
(Finishthickness)
70 μm (2oz)
Leadwidth
0.254mm
Copperfoilarea
Footprint
Item
Value
Board thickness
1.60mm
Board outlinedimensions
76.2mm×114.3mm
Board material
FR-4
Tracethickness
(Finishthickness)
Top
Bottom
70 μm (2oz)
70 μm (2oz)
Leadwidth
0.254mm
Copperfoilarea
Top
Bottom
Footprint
5505mm2(74.2mm× 74.2mm)

12/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
HTSOP-J8 package PCB specifications, 4 layers (2s2p)
Conforms to JEDEC standard JESD51-3/ -5/ -7
114.3mm
76.2mm
Figure 11-8. Figure 11-9.
Top Layer Trace Middle 1 Layer Trace
Figure 11-10. Figure 11-11.
Middle 2 Layer Trace Bottom Layer Trace
Thermal via
φ0.30mm, 1.2mm pitch
1.27
3.9
1.35
0.75
4.9
3.2
Figure 11-12. Footprint
via
Middle 1
Top Layer
Bottom Layer
Middle 2
Insulation distance 0.6mm
Figure 11-13. 4-layer board sectional view
Table 11-3. 4-layer PCB specifications
Item
Value
Board thickness
1.60mm
Board outlinedimensions
76.2mm×114.3mm
Board material
FR-4
Tracethickness
(Finishthickness)
Top
Middle1
Middle2
Bottom
70 μm (2oz)
35 μm (1 oz)
35 μm (1 oz)
70 μm (2oz)
Leadwidth
0.254mm
Copperfoilarea
Top
Middle1
Middle2
Bottom
Footprint
5505mm2(74.2mm× 74.2 mm)
5505mm2(74.2mm×74.2mm)
5505mm2(74.2mm×74.2mm)

13/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
12. Terminal protection
If inverse or excess voltage is applied to the IC terminals, the
device may be damaged or the output voltage may not rise.
When the following conditions are anticipated, we recommend
that the terminals be adequately protected.
1. When the input/output voltage conditions are reversed
→ Reverse current bypass
2. When the output load is conductive
→ Output reverse voltage protection
3. Possibility of input polarities connected in reverse
→ Input reverse voltage protection
4. Hot-plugging → Hot-plugging countermeasures
5. Load exists between disparate power sources
→ Reverse current bypass
6. Positive-negative power source (both power sources)
1. When the input/output voltage conditions are reversed
When the capacitance of the output capacitor is large, and a load
remains in the output capacitor even after the input power shuts
down, or the speed that the input power shuts down is extremely
fast, reverse current will flow from output to input via parasitic
elements in the IC because the input/output voltage state will be
inverted. Operation is not guaranteed for parasitic elements, and
this can degrade or destroy elements.
As a countermeasure, connect a reverse current bypass diode
externally (Figure 12-1), so that the reverse current does not
pass through the inside of the IC. Note that when the input side
is left open and the IC is powered down, no degradation of
parasitic elements or breakdown will occur due to the reverse
current value being a slight IC bias current only. Owing to this,
the bypass diode is not necessary (Figure 12-2).
It is necessary for the bypass diode to turn on before the
parasitic element in the IC. As the voltage to turn on the internal
parasitic element is approximately 0.6 V for the MOSFET type
regulator, a low forward voltage of VFis required. When the
value of the reverse current is large, a considerable amount of
diode leakage current will flow from input to output, even if the
output is off during shutdown. For this reason, a small value
(around 1 µA or less) must be selected. Select an inverse rated
voltage that is larger than the input/output voltage difference
(80% derating or less) to be used. Select a forward direction
rated current that is larger than the reverse rated current value
(50% derating or less) to be used. From the above conditions,
we recommend a rectifier diode or Schottky barrier diode; but as
the inverse current of many Schottky barrier diodes is generally
large, select one with a small value.
IN GNDOUT
CIN CO
VIN VO
D1
Figure 12-1. Reverse current bypass diode
IN GNDOUT
CIN CO
VIN VO
ON OFF IBIAS
Figure 12-2. When the input is open
2. When the output load is conductive
When the output load is conductive, the energy stored in the
conductive load at the instant the output voltage goes off will be
shunted to ground. A diode is used between the IC output pin
and GND pin to prevent electrostatic breakdown. If a large
electric current flows to this diode, the IC may break down. To
prevent this, connect a Schottky barrier diode in parallel to the
electrostatic breakdown prevention diode (Figure 12-3).
When the IC output pin and load are connected via a long wire,
a conductive load may occur. Measure the waveform using an
oscilloscope. Aside from this, when the load is a motor, a diode
is necessary due to counter electromotive force in the motor,
which causes the same kind of current to flow.
VIN
GND
CIN GND
IN OUT
COD1
VO
GND
XLL
Figure 12-3. Conductive load current path (when output is off)

14/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
3. Possibility of input polarities connected in reverse
When connecting an input to power, if the positive and negative
terminals are connected in reverse due to careless error, a large
electric current may flow between the IC input pin and the GND
pin to the electrostatic breakdown prevention diode (Figure 12-
4). The easiest countermeasure is to connect a Schottky barrier
diode or a rectifier diode in series with the power, as shown in
Figure 12-5. Using the correct connection, a power loss will
occur in VF×IOdue to a voltage drop in the forward voltage VFof
the diode, so this is not suitable for a battery-operated circuit.
The VFfor a Schottky barrier diode is lower than that of a rectifier
diode, so the loss will be somewhat smaller. Since the diode will
get hot, select a diode with a wide margin of power dissipation.
When connected in reverse, current for the diode will flow in
reverse, but the value will be slight.
VIN
GND
CIN GND
IN OUT
CO
VO
GND
Figure 12-4. Current path when the input is connected in
reverse
IN GND OUT
CIN CO
VIN VO
D1
Figure 12-5. Countermeasure #1 against reverse connection
Figure 12-6 shows how to connect the diode in parallel with the
power source. Since it is necessary for the diode to turn on faster
than the electrostatic breakdown protection diode inside the IC,
use a Schottky barrier diode with a low VF. Using the correct
connection, this will operate in the same way as without the
diode. Since the total current will keep flowing to the diode when
connected in reverse, heat will occur, which may lead to
breakdown if the current capacity in the previous stage is too
large. The prerequisites for this circuit are either to protect the
circuit from accidental mistakes over the short-term, or for an
over current protection circuit to bepresent in the previous stage.
For placing greater emphasis on safety by using a protection
circuit, connect the power source in series to the fuse. Although
maintenance of the fuse is required, this will protect the circuit
with even greater certainty (Figure 12-7).
IN GND OUT
CIN CO
VIN VO
D1
Figure 12-6. Countermeasure #2 against reverse connection
IN GND OUT
CIN CO
VIN VO
D1
F1
Figure 12-7. Countermeasure #3 against reverse connection
Figure 12-8 shows how to connect the P-ch MOSFET in series
with the power source. The diode between the MOSFET drain-
source is a body diode (parasitic element). Using the correct
connection, the P-ch MOSFET will be on, and the voltage drop
here will be the ON resistance of MOSFET times the output
current IO. As this is smaller than the voltage drop via diode
(Figure 12-5), the power loss will be smaller. When connecting
in reverse, MOSFET will not turn on, so there will be no current
flow.
When this value exceeds the rated voltage between MOSFET
gate-source (in consideration of derating), divide the resistance
between gate and source, and lower the gate-source voltage as
shown in Figure 12-9.
IN GND OUT
CIN CO
VIN VO
Q1
Figure 12-8. Countermeasure #4 against reverse connection
IN GND OUT
CIN CO
VIN VO
Q1
R1
R2
Figure 12-9. Countermeasure #5 against reverse connection

15/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
4. Hot-plugging
When connecting a wire to the IC input while the supply side
power is on, a pulse waveform will be generated due to contact
between the wiring inductance component and the metal of the
connector plug. If this surge voltage exceeds the IC’s absolute
maximum rating, the IC may break down. Use a TVS (transient
voltage suppressor) diode to absorb the surge, so that the surge
voltage does not reach the IC input pin (Figure 12-10).
IN GND OUT
CIN CO
VIN VO
D1
LP
Figure 12-10. Hot-plugging countermeasure
5. Load exists between disparate power sources
As shown in Figure 12-11, when a load exists between disparate
power sources, the timing for rises and drops are different, so
current will flow to another power output terminal through the
load. Reverse voltage will occur between IC inputs and outputs
at this time, so a reverse current bypass diode is needed.
IN GNDOUT
CIN1CO1
VIN1VO1
D1
U1
IN GNDOUT
CIN2CO2
VIN2VO2
D2
U2
RLOAD1
RLOAD2
RLOAD3
Figure 12-11. Current path and diode insertion between
disparate power sources
6. Positive-negative power source (both power sources)
For positive-negative power supplies as shown in Figure 12-12,
the speeds at which the power supplies rise are different. For
this reason, when there is a load between positive and negative,
the power source that started first pulls current from the other
output through the load, which applies negative voltage to the
output. Be sure to connect a Schottky barrier diode with a low VF
between the output and GND, to prevent damage to the IC and
to prevent the output voltage from failing to rise.
IN GND OUT
CIN1D1CO1
CO2 D2
GND
OUTIN
CIN2
+VIN
-VIN
GND
+VIN
GND
-VIN
RL1
RL2
RL3
負荷
正電圧レギュレータ
負電圧レギュレータ
Figure 12-12. Inserting a diode between positive-negative
power supplies; current path when negative power supply
regulator starts first
Positivevoltage regulator
Negativevoltage regulator
Load
Positivevoltage regulator

16/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
13. Soft start
By starting the output voltage for a fixed interval when the power
is turned on, the maximum value of inrush current that charges
the output capacitor can be reduced. The rise time during soft
start is fixed within the IC at 800 µs (typ). For this reason, the
time cannot be adjusted externally. As shown in figure 13-1, the
soft start time is defined as the time until the output voltage
reaches the default value of 95%, with the origin as the point at
which EN turns on from Low to High. For reference, the
variations in time are as follows: 400 µs min, 800 µs standard,
1200 µs max. The soft start time is not dependent on the output
voltage. Note that the start time may differ depending on the rise
times for VCC and EN, as well as the capacitance of the output
capacitor. Refer to “Sequence for turning power supply on” for
more details.
VOUT
VCC
95%
TSS t
EN
Figure 13-1. Definition of soft start time

17/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
14. Sequence for turning power on
There are no restrictions on the start sequence for Vcc and EN. The starting time depends on the rising time for VCC and CTL, as well
as the capacitance of the output capacitor. These differences are shown below.
1. When the circuit turns on in order of VCC → EN
VOUT
VCC
95%
TSS t
EN
VOUT
VCC
95%
TSS t
EN
Enable VTH
VOUT
VCC
t
EN
Enable VTH
TSS
95%
Figure 14-1 shows the startup characteristics for when EN abruptly turns on after VCC rises. At the same time, this shows the soft start
time definition. The soft start time is the time until the output voltage reaches the default value of 95%, with the origin as the point at
which EN turns on from Low to High.
Figure 14-2 shows the startup characteristics for when EN is turned on before the soft start time. The soft start circuit begins operating
from the time that the voltage of EN exceeds the threshold value, and the output voltage rises in accordance with the soft start time.
Figure 14-3 shows the startup characteristics for when EN is turned on after the soft start time. The soft start circuit begins operating
from the time that the voltage of EN exceeds the threshold value, and the output voltage rises in accordance with the soft start time.
Figure14-1.
When EN turns on abruptly
Figure14-2.
When EN is turned on
before the soft start time
Figure14-3.
When EN is turned on
after the soft start time

18/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
14. Sequence for turning power on (continued)
2. When the circuit turns on in order of EN →VCC
VOUT
VCC
95%
TSS t
EN
VOUT
VCC
95%
TSS t
EN
約1.2V
VOUT
VCC
TSS t
EN
約1.2V
Figure 14-4 shows the startup characteristics when VCC abruptly turns on after the EN rises. The soft start circuit begins operating
from the time that the voltage of VCC rises, and the output voltage rises in accordance with the soft start time.
Figure 14-5 shows the startup characteristics for when VCC is turned on before the soft start time. The soft start circuit begins operating
from the time that VCC exceeds 1.2 V, and the output voltage rises in accordance with the soft start time.
Figure 14-6 shows the startup characteristics for when VCC is turned on after the soft start time. The soft start circuit begins operating
and the output rises from the time when the voltage of VCC exceeds approximately 1.2 V. However, since the speed at which the
voltage of VCC rises is slower than the speed at which the voltage rises during soft start, the output voltage rise is restricted by the
voltage of VCC. For this reason, the start time will be longer and will exceed the soft start time.
Approx.1.2V
Figure14-4.
When Vcc turns on abruptly
Figure14-5.
When VCC is turned on
before the soft start time
Figure14-6.
When VCC is turned on
after the soft start time
Approx.1.2V

19/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
14. Sequence for turning power on (continued)
3. When VCC and EN turn on at the same time
VOUT
VCC, EN
95%
TSS t
VOUT
VCC, EN
95%
TSS t
Enable VTH
VOUT
VCC, EN
TSS t
Enable VTH
Figure 14-7 shows the startup characteristics when VCC and EN are abruptly turned on at the same time. The soft start circuit begins
operating from the time that VCC and EN rise, and the output voltage rises in accordance with the soft start time.
Figure 14-8 shows the startup characteristics for when VCC and EN are turned on before the soft start time. The soft start circuit begins
operating from the time that the voltage of EN exceeds the threshold value, and the output voltage rises in accordance with the soft
start time.
Figure 14-9 shows the startup characteristics for when VCC and EN are turned on after the soft start time. The soft start circuit begins
operating and the output begins to rise from the time when the voltage of EN exceeds the threshold value. However, since the speed
at which the voltage of VCC rises is slower than the speed at which thevoltage rises during soft start, the output voltage rise is restricted
by the voltage of VCC. For this reason, the start time will be longer and will exceed the soft start time.
Figure14-7.
When VCC and EN turns on abruptly
Figure14-8.
When VCC and EN are
turned on before the soft
start time
Figure14-9.
When VCC and EN are
turned on after the soft
start time

20/27
Application Note
BDxxGC0 Series Application Information
© 2018 ROHM Co., Ltd.
No. 61AN078E Rev.004
FEBRUARY 2020
14. Sequence for turning power on (continued)
4. When the output capacitor’s capacitance is large
When the capacitance of the output capacitor increases, the charging current at start time also increases. Although this changes
depending on the output voltage and over current protection circuit limits, the charging current generally changes when the output
capacitance is around several µF to first half of several hundred µF, but the soft start time remains the same when starting. When the
output capacitance equals or is greater than around the first half of several hundred µF, the over current protection circuit activates
according to the increase in charging current. Due to this, the charging current value is limited by the over current protection circuit.
For this reason, the start time will be longer and will exceed the soft start time, as shown in Figure 14-10. In this condition, the start
time will grow longer along with the increase in output capacitance. Figure 14-11 shows the condition in which the current limit affects
the start partway through due to the over current protection circuit. In this case, the charging current decreases when the charging of
the capacitor is completed to a certain extent. Due to this, the over current protection is released, and the circuit returns to normal
operations. This condition occurs when the capacitance of the output capacitor is between the ranges shown in Figure 14-7 and Figure
14-10. When the output capacitor’s capacitance is large, check the start time with the actual operating conditions.
VOUT
VCC, EN
TSS t
V
OUT
VCC, EN
95%
TSS t
Figure14-10.
When starting while the
current limit is applied by
the over current protection
circuit
Figure14-11.
When starting while the
current limit is applied partway
through by the over current
protection circuit